Mother-son type W-waveband radio frequency chip testing device

Abstract

The invention provides a primary-secondary type W-waveband radio frequency chip testing device, and relates to the technical field of W-waveband radio frequency chip testing. A mother board of the device is provided with a plurality of first mounting grooves matched with subunits, and the positions of first butt joint connecting pieces correspond to the positions of the first mounting grooves; the daughter board is provided with a second mounting groove for mounting a bare chip or a packaging chip, the substructure is connected with one side, provided with the first butt joint plug, of the daughter board, the substructure is mounted in the first mounting groove, and the daughter board is electrically connected with the mother board through the matching effect of the second connecting piece and the first butt joint connecting piece; the mother board can correspondingly input a control signal and a power supply through the control connecting piece and the power supply connecting piece so as to provide the control signal and the power supply for the daughter board. The bare chip and the packaging chip can be respectively mounted on the daughter board, the problem that the bare chip cannot be electrified for screening and cannot be replaced can be solved, the radio frequency chip testing device has the advantage of testing different types of radio frequency chips at the same time, and the practicability and the use value are high.

Description

Technical Field

[0001] The present specification relates to the technical field of W-band radio frequency chip testing, and in particular to a mother-child type W-band radio frequency chip testing device. Background Art

[0002] W-band RF chips are mainly available in two forms: bare die and packaged. Bare die can eliminate the impact of loss caused by packaging, and compared with packaged forms, it has the advantage of excellent performance, but bare die is difficult to test and screen. Especially in high-reliability application scenarios, it is necessary to perform aging experiments on the chip in addition to testing, and the requirements for chip testing equipment are relatively high.

[0003] W-band RF chip testing usually requires the use of a test board. Among them, a single-chip test board is suitable for testing W-band bare chips and packaged chips, but it has the disadvantages of low test efficiency and cumbersome and complex circuits in multi-sample testing. Multiple RF chips of the same type can be integrated on a multi-chip test board. However, during bare chip testing, individual chip defects occur because the chips cannot be screened and replaced, which leads to insufficient number of samples on the multi-chip test board, and it cannot be screened in the aging life test. Summary of the invention

[0004] The purpose of this specification is to provide a mother-child type W-band radio frequency chip testing device, which can overcome the above-mentioned defects of the W-band radio frequency chip testing device.

[0005] The embodiments of this specification are implemented as follows:

[0006] A mother-and-child type W-band radio frequency chip testing device, comprising a mother structure, a motherboard and a plurality of sub-units;

[0007] The motherboard is provided with a plurality of first mounting slots adapted to the subunits, the motherboard is provided with a control connector, a power connector and a plurality of first docking connectors, and the positions of the first docking connectors correspond to the positions of the first mounting slots;

[0008] The subunit at least includes a subboard and a substructure, the subboard is provided with a second mounting groove for mounting a bare chip or a packaged chip, one side of the subboard along the thickness direction thereof is a plane sidewall, the other side of the subboard along the thickness direction thereof is provided with a second docking connector, the substructure is connected to a side of the subboard provided with the first docking plug, the substructure is installed in the first mounting groove, and the subboard is electrically connected to the motherboard through the cooperation of the second connector and the first docking connector;

[0009] The mother structure is fixedly connected to a side of the motherboard away from the sub-unit, and the mother structure is used to support and dissipate heat for the motherboard;

[0010] The motherboard can input control signals and power through the control connector and the power connector respectively, so as to provide control signals and power to the daughterboard through the cooperation of the first docking connector and the second docking connector.

[0011] The embodiments of this specification have at least the following advantages or beneficial effects:

[0012] Compared with the prior art, the mother-child type W-band RF chip testing device can install bare chips and packaged chips respectively on the daughter boards by setting up a mother board and a daughter board. It can not only solve the problem that bare chips cannot be powered on for screening and cannot be replaced, but also has the advantage of testing different types of RF chips at the same time, and has high practicality and use value. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions of the embodiments of this specification, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present specification and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying any creative work.

[0014] Figure 1 This is a schematic diagram of the structure of the mother-child W-band RF chip testing device provided in this manual;

[0015] Figure 2 A schematic diagram of the structure of the subunit provided in this specification;

[0016] Figure 3 A schematic diagram of the structure of the bare chip installed on the daughter board provided in this manual;

[0017] Figure 4 A schematic diagram of the structure of the sub-board provided in this manual with the packaged chip installed;

[0018] Figure 5 A schematic diagram of the structure of the motherboard provided for this manual;

[0019] Figure 6 A schematic diagram of the connection between the motherboard and the control device provided for this manual;

[0020] Icons: 1. Mother structure; 11. First heat dissipation protrusion; 2. Motherboard; 21. First mounting slot; 22. Control connector; 23. Power connector; 24. Driver chip; 3. Mother cover; 4. Substructure; 41. Heat dissipation groove; 42. Second heat dissipation protrusion; 5. Subboard; 51. Second mounting slot; 52. Second docking connector; 53. Countersunk hole; 54. Notch; 55. Second electrical contact point; 6. Subcover; 7. Bare chip; 8. Packaged chip. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solutions and advantages of the embodiments of this specification more clear, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are part of the embodiments of this specification, not all of the embodiments. Generally, the components of the embodiments of this specification described and shown in the drawings here can be arranged and designed in various different configurations.

[0022] Therefore, the following detailed description of the embodiments of the present specification provided in the accompanying drawings is not intended to limit the scope of the present specification claimed for protection, but merely represents selected embodiments of the present specification. Based on the embodiments in the present specification, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present specification.

[0023] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0024] In the description of the embodiments of this specification, it should be noted that if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, or the orientation or position relationship in which the product of this specification is usually placed when used. It is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on this specification. In addition, if the terms "first", "second", "third", etc. appear, they are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0025] In addition, the use of terms such as "horizontal", "vertical", and "overhanging" does not mean that the components must be absolutely horizontal or overhanging, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0026] In the description of the embodiments of this specification, it is also necessary to explain that, unless otherwise clearly specified and limited, the words "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be fixedly connected, detachably connected, or integrally connected; it can be mechanically connected or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or it can be internal communication between two components. For ordinary technicians in this field, the specific meanings of the above terms in this specification can be understood according to specific circumstances.

[0027] Please refer to Figures 1 to 6 , a mother-and-child type W-band radio frequency chip testing device provided in an embodiment of this specification mainly includes a mother structure 1, a motherboard 2 and a plurality of sub-units;

[0028] The motherboard 2 is provided with a plurality of first mounting grooves 21 adapted to the subunits, the motherboard 2 is provided with a control connector 22, a power connector 23 and a plurality of first docking connectors, and the positions of the first docking connectors correspond to the positions of the first mounting grooves 21;

[0029] The subunit at least includes a sub-board 5 and a sub-structure 4, the sub-board 5 is provided with a second mounting groove 51 for mounting a bare chip 7 or a packaged chip 8, one side of the sub-board 5 along its thickness direction is a plane side wall, the other side of the sub-board 5 along its thickness direction is provided with a second docking connector 52, the sub-structure 4 is connected to the side of the sub-board 5 provided with the first docking plug, the sub-structure 4 is installed in the first mounting groove 21, and the sub-board 5 is electrically connected to the motherboard 2 through the cooperation of the second connector and the first docking connector;

[0030] The mother structure 1 is fixedly connected to a side of the motherboard 2 away from the sub-unit, and the mother structure 1 is used to support and dissipate heat for the motherboard 2;

[0031] The motherboard 2 can input control signals and power through the control connector 22 and the power connector 23 to provide control signals and power to the daughterboard 5 through the cooperation of the first docking connector and the second docking connector 52 .

[0032] In this embodiment, when installing the bare chip 7, the bare chip 7 is installed in the above-mentioned second installation groove 51, and the cooperation of the sub-board 5 and the sub-structure 4 forms a small packaged chip 8. At this time, the bare chip 7 can be powered on for screening. At the same time, the setting of the above-mentioned sub-board 5 and the sub-structure 4 can effectively solve the problem of damaging the bare chip 7 during the power-on screening test stage, thereby solving the problem of being unable to identify defective chips.

[0033] In this embodiment, the motherboard 2 is provided with a control switch corresponding to each first installation slot 21. By controlling the off state of the control switch, the sub-units installed in the first installation slot 21 can be controlled and tested respectively. It can be seen that the sub-units arranged on the motherboard 2 can be tested independently.

[0034] In this embodiment, the circuit structure of the daughter board 5 can be flexibly set according to the test requirements or needs, so that the daughter board 5 can be installed with different types of bare chip 7 or packaged chip 8, thereby achieving the effect of testing the bare chip 7 and packaged chip 8 through the sub-unit without replacing or redesigning the motherboard 2, which can effectively improve the reusability of the motherboard 2 and reduce the R&D cost and cycle. Moreover, by installing different types of RF chips, the comparison requirements of cross-tests under different packaging forms can also be met.

[0035] In the present embodiment, the number of the first mounting slots 21 is 16, and the number of subunits is 16. It can be seen that the above-mentioned setting method can simultaneously test multiple bare chip chips 7 and / or packaged chips 8, so that the above-mentioned testing device has the advantages of large capacity and high efficiency. Moreover, the above-mentioned sub-board 5 can be flexibly replaced according to each test chip, which can effectively overcome the defect that the traditional multi-chip test board can only test one type of RF chip, that is, when testing various RF chips, it can overcome the defects of long R&D cycle and high R&D cost of the R&D test board.

[0036] It can be seen that the above-mentioned mother-child type W-band RF chip testing device can respectively install the bare chip 7 and the packaged chip 8 on the daughter board 5 by setting the mother board 2 and the daughter board 5. It can not only solve the problem that the bare chip 7 cannot be powered on for screening and cannot be replaced, but also has the advantage of testing different types of RF chips at the same time, and has high practicality and use value.

[0037] In the present embodiment, the electrical contact points of the bare chip 7 are connected to the daughter board 5, and the daughter board 5 can transmit the control signal to the bare chip 7 under the cooperation of the first docking connector and the second docking connector 52, so as to achieve the effect of power-on screening test, avoid the problem of being unable to test due to the small electrical contact points of the bare chip 7, and at the same time avoid the problem of the bare chip 7 being damaged during the power-on screening stage due to its small size and thin thickness.

[0038] In this embodiment, the bare chip 7 is connected to the daughter board 5 by gold wire bonding. Specifically, the bare chip 7 can be fixed to the second mounting groove 51 by conductive glue, and then gold wire bonding is performed to electrically connect the bare chip 7 to the daughter board 5.

[0039] In this embodiment, the packaged chip 8 is connected to the sub-board 5 by means of reflow soldering. In this way, the packaged chip 8 can be electrically connected to the sub-board 5.

[0040] In this embodiment, a mother cover plate 3 adapted to the mother structure 1 is further included. The size of the mother structure 1 is larger than that of the mother plate 2. The mother cover plate 3 is circumferentially provided with an extended side wall along its thickness direction. The side of the extended side wall away from the mother cover plate 3 is connected to the mother structure 1. The mother plate 2 is arranged between the mother structure 1 and the mother cover plate 3, and the circumferential side wall of the mother plate 2 can abut against the extended side wall.

[0041] In detail, the above-mentioned mother cover plate 3 is covered on the mother board 2 provided with the sub-unit, and the mother board 2 is restricted in the above-mentioned extended side wall, the side wall of the mother cover plate 3 close to the mother structure 1 and the cavity formed by the mother structure 1. It can effectively avoid the mother board 2 from sliding when the mother cover plate 3 is covered on the mother board 2, thereby preventing the mother board 2 from sliding and damaging the sub-unit structure.

[0042] In this embodiment, the sub-unit further includes a sub-cover plate 6, and the sub-cover plate 6 is provided on the side of the sub-plate 5 away from the sub-structure 4. By providing the above-mentioned sub-cover plate 6, the sub-cover plate 6 and the sub-structure 4 can cooperate to fix the above-mentioned sub-plate 5, and have a protective effect on the upper wall surface and the lower wall surface of the sub-plate 5, which can further prevent the above-mentioned sub-plate 5 from being damaged.

[0043] In this embodiment, the mother structure 1 is provided with a first heat dissipation protrusion 11 at a position corresponding to the first mounting groove 21, and the first heat dissipation protrusion 11 can abut against the side of the substructure 4 close to the motherboard 2; the substructure 4 is provided with a heat dissipation groove 41, and the side wall of the heat dissipation groove 41 along the thickness direction of the substructure 4 is provided with a second heat dissipation protrusion 42, and the second heat dissipation protrusion 42 can abut against the bare chip 7 or the packaged chip 8 installed in the second mounting groove 51.

[0044] Specifically, by setting the above-mentioned first heat dissipation protrusion 11 and the second heat dissipation protrusion 42, the sub-board 5 can dissipate heat through the sub-structure 4, and the sub-unit can also dissipate heat through the second heat dissipation protrusion 42. It can be seen that the above-mentioned mother-and-child type W-band RF chip testing device has a preset heat dissipation path, which can meet the high requirements of RF chips such as bare chip 7 and packaged chip 8 for heat dissipation and grounding.

[0045] In this embodiment, the side of the sub-board 5 away from the sub-cover 6 is provided with resistors, capacitors and connectors required by the peripheral circuit. By providing a heat dissipation groove 41 at the position of the sub-structure 4, the heat dissipation groove 41 can reserve space for the resistors, capacitors and connectors so that the resistors, capacitors and connectors provided on the sub-structure 4 and the sub-board 5 do not interfere with each other.

[0046] In this embodiment, the first mounting groove 21 and the second mounting groove 51 are both through grooves, which can further improve the heat dissipation efficiency of the sub-board 5 .

[0047] In this embodiment, the corners of the second installation groove 51 are configured in a chamfered manner, which can facilitate the installation of the bare chip 7 .

[0048] In this embodiment, the sub-cover plate 6 is further provided with a limiting boss, which can ensure that the bare chip 7 or the packaged chip 8 provided on the sub-plate 5 will not be touched after installation.

[0049] In this embodiment, the sub-plate 5 is provided with a plurality of countersunk holes 53 , and the sub-plate 5 is fixedly connected to the sub-structure 4 via the countersunk holes 53 , and the sub-plate 5 is fixedly connected to the sub-cover plate 6 via the countersunk holes 53 .

[0050] In this embodiment, by providing the countersunk hole 53 , the side of the daughter board 5 close to the daughter cover 6 can be made into a smooth plane (ie, there is no protrusion), so that the daughter board 5 can be compatible with the probe test of the bare chip 7 .

[0051] In this embodiment, the two opposite side walls of the sub-plate 5, the sub-structure 4 and the sub-cover plate 6 are symmetrically provided with notches 54 with their length directions as symmetry axes, and the notches 54 are used to install or remove the sub-unit. The notches 54 are provided to facilitate hand-held or mechanical hand-held handling of the sub-unit, thereby facilitating installation or removal of the sub-unit.

[0052] In this embodiment, the size of the notch 54 can at least ensure that there is space reserved for disassembling the sub-unit.

[0053] In this embodiment, the second docking connector 52 includes at least two groups of second electrical contact points 55, and the two groups of second electrical contact points 55 are symmetrically arranged on the sub-board 5. The first docking connector includes at least two groups of first electrical contact points, and the two groups of first electrical contact points can be connected to the second electrical contact points 55 accordingly.

[0054] In this embodiment, the two groups of second electrical contacts 55 are arranged side by side on the sub-board 5 along the setting direction of the second docking connector 52, and the two groups of second electrical contacts 55 are arranged in an axially symmetrical manner. During the transmission of the control signal, if one group of electrical contacts is damaged due to the harsh environment of the test, it can be immediately replaced by another group of electrical contacts to transmit the control signal, so that the test process can be completed smoothly.

[0055] In this embodiment, the motherboard 2 is provided with at least two driving chips 24 , and the control signal input by the control connector 22 can be transmitted to the daughterboard 5 through the driving chip 24 , the first docking connector and the second docking connector 52 in sequence.

[0056] In this embodiment, the two driving chips 24 are respectively disposed at the source end and the load end of the motherboard 2. Specifically, the source end is located at the control board, and the load end is located at the motherboard.

[0057] In this embodiment, the above-mentioned two driver chips 24 can be arranged on the adapter board, and the above-mentioned two driver chips 24 are symmetrically arranged on the motherboard 2. By arranging the above-mentioned two driver chips 24, the attenuation and distortion effects of the control signal corresponding to the long transmission line can be offset, so that when the control signal reaches the daughter board 5, the daughter board 5 can quickly identify the control signal to execute the content of the control signal, thereby making the above-mentioned W-band RF chip testing device more reliable.

[0058] In this embodiment, the control signal transmission line of the above-mentioned W-band RF chip testing device is a long transmission line (that is, in the aging test, the transmission path length of the control signal is 1.5m). When the control signal passes through the two-stage drive amplification of the driver chip 24, the control rate can be effectively improved, that is, it can be increased from 2MHz to 50MHz, and the load capacity is stronger. At the same time, it can avoid the risk of insufficient verification due to insufficient communication rate during the aging test.

[0059] In this embodiment, the motherboard 2 can be connected to a host computer (ie, an external device) through a high-temperature wire to its control board and an external power supply, thereby providing power supply and control for the aging test device.

[0060] In this embodiment, the first docking connector and the second docking connector 52 are both high-temperature resistant plugs, with a temperature resistance range of at least [-55°C, 125°C]. Moreover, the arrangement of the mother structure 1 and the mother cover 3 can effectively prevent the risk of failure of the mother board 2 in a high-temperature aging test. The arrangement of the sub-structure 4 and the sub-cover 6 can ensure that the RF chip (and the gold wire bonding position) provided on the sub-board 5 is not damaged in a long-term high-temperature aging test, thereby ensuring that the test can be carried out safely and orderly.

[0061] In this embodiment, the substructure 4 and the sub-cover plate 6 are made of aluminum alloy, which not only makes the structure of the subunit light, but also prevents the subunit from melting in a long-term high-temperature environment.

[0062] In this embodiment, in order to enable the mother structure 1 to be adsorbed and placed on the probe station (when the bare chip 7 is subjected to a probe test), the flatness and roughness of the side of the mother structure 1 away from the mother cover plate 3 should meet the expected requirements.

[0063] In this embodiment, when a probe is needed during the test of the bare chip 7, the probe has an operating area (i.e., the side of the sub-board close to the sub-cover board) and must not be blocked by other objects. The vertical stacking design ensures that the chip to be tested is at the highest height without any obstruction.

[0064] In this embodiment, the above-mentioned operation area is the front side of the daughter board, and there is no other device except the chip, and the assembly hole of the daughter board is designed with a countersunk hole, so that there will be no height after the screw is installed, and the chip on the front side of the daughter board is at the highest position.

[0065] The above are only preferred embodiments of this specification and are not intended to limit this specification. For those skilled in the art, this specification may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this specification shall be included in the protection scope of this specification.

Claims

1. A mother-child W-band radio frequency chip testing device, characterized in that: It includes a mother structure, a motherboard and a plurality of sub-units; The motherboard is provided with a plurality of first mounting slots adapted to the subunits, the motherboard is provided with a control connector, a power connector and a plurality of first docking connectors, and the positions of the first docking connectors correspond to the positions of the first mounting slots; The subunit at least includes a subboard and a substructure, the subboard is provided with a second mounting groove for mounting a bare chip or a packaged chip, one side of the subboard along the thickness direction thereof is a plane sidewall, the other side of the subboard along the thickness direction thereof is provided with a second docking connector, the substructure is connected to a side of the subboard provided with the first docking plug, the substructure is installed in the first mounting groove, and the subboard is electrically connected to the motherboard through the cooperation of the second connector and the first docking connector; The mother structure is fixedly connected to a side of the motherboard away from the sub-unit, and the mother structure is used to support and dissipate heat for the motherboard; The motherboard can input control signals and power through the control connector and the power connector respectively, so as to provide control signals and power to the daughterboard through the cooperation of the first docking connector and the second docking connector.

2. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: The bare chip is connected to the daughter board by gold wire bonding.

3. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: The packaged chip is connected to the daughter board in a reflow soldering manner.

4. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: It also includes a mother cover plate adapted to the mother structure, the size of the mother structure is larger than that of the mother plate, the mother cover plate is circumferentially provided with an extended side wall along its thickness direction, the extended side wall is connected to the mother structure on a side away from the mother cover plate, the mother plate is arranged between the mother structure and the mother cover plate, and the circumferential side wall of the mother plate can abut against the extended side wall.

5. The mother-child W-band radio frequency chip testing device according to claim 11, characterized in that: The subunit further comprises a sub-cover plate, and the sub-cover plate is arranged to cover a side of the sub-plate away from the sub-structure.

6. The mother-child W-band radio frequency chip testing device according to claim 5, characterized in that: The sub-plate is provided with a plurality of countersunk holes, the sub-plate is fixedly connected to the sub-structure via the countersunk holes, and the sub-plate is fixedly connected to the sub-cover plate via the countersunk holes.

7. The mother-child W-band radio frequency chip testing device according to claim 5, characterized in that: The two opposite side walls of the sub-plate, the sub-structure and the sub-cover plate are symmetrically provided with notches with their length directions as symmetry axes, and the notches are used for installing or removing the sub-units.

8. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: The second docking connector includes at least two groups of second electrical contacts, which are symmetrically arranged on the sub-board. The first docking connector includes at least two groups of first electrical contacts, which can be connected to the second electrical contacts accordingly.

9. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: The motherboard is provided with at least two driving chips, and the control signal input by the control connector can be transmitted to the daughterboard through the driving chip, the first docking connector and the second docking connector in sequence.

10. The mother-child W-band radio frequency chip testing device according to claim 1, characterized in that: The mother structure is provided with a first heat dissipation protrusion at a position corresponding to the first mounting groove, and the first heat dissipation protrusion can abut against a side of the substructure close to the motherboard; the substructure is provided with a heat dissipation groove, and the side wall of the heat dissipation groove along the thickness direction of the substructure is provided with a second heat dissipation protrusion, and the second heat dissipation protrusion can abut against a bare chip or a packaged chip installed in the second mounting groove.

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