Data Management Method, Device, and Electronic Device Applied to EDA Software

Abstract

The present invention provides a data management method, apparatus, and electronic device applied to EDA software, belonging to the technical field of data management. In this method, a storage system that unifies physical memory and external storage is provided. The target data being used during the operation of the EDA software can be stored in physical memory / cache devices, and the data that is not temporarily needed is stored in external storage, reducing the large-capacity requirement for the storage space of physical memory / cache devices and greatly reducing costs. When implemented, the target data required for the operation of the EDA software is pre-stored in physical memory / cache devices. The data stored in physical memory / cache devices is convenient to read and write, without affecting the running speed of the EDA software. Customers of the EDA software only need to write programs according to the access abstract address of the target data they need to access, without knowing the specific process of the storage system for querying the target data, that is, without understanding any other technical details, and without adding any maintenance and usage burdens.

Description

Technical Field

[0001] The present invention relates to the technical field of data management, and in particular, to a data management method, device, and electronic device applied to EDA software. Background Art

[0002] As the chip integration level becomes higher and higher, with the development from billions to tens of billions, hundreds of billions, or even trillions of gate-level transistors, the design scale continues to expand, and the corresponding design data volume also increases significantly. This makes the data to be processed and stored during the EDA simulation process increase, and the demand for memory also continuously climbs. For example, when designing a high-end chip with billions of transistors, if it is a highly complex chip design, such as a high-end processor chip or a large-scale SoC chip with billions or more transistors, such projects require processing a large amount of data in each link from the front-end functional design, logic design to the back-end physical design, verification, etc. From storing a large amount of logic gate information, signal states to the electrical characteristics, layout and wiring details of transistors, hundreds of GB or even several TB of memory may be required to meet the requirements. Especially during the physical design and layout verification of large-scale chips, the memory size directly affects the software running speed and design efficiency.

[0003] During the EDA simulation process, especially during functional simulation and timing simulation with high real-time requirements, the memory needs to be able to quickly respond to data requests to ensure the accuracy and real-time nature of the simulation. Low-latency memory performance can reduce the waiting time during the simulation process, increase the iteration speed of the simulation, and thus accelerate the chip design cycle; EDA simulation involves various types of data, including code files, design documents, simulation results, intermediate data, etc. The sizes and life cycles of these data are different. Some are code files as small as a few KB, while some are layout physical inspection files at the GB level or even larger. Moreover, during the simulation process, these data are constantly generated, modified, and deleted, and the dynamic changes of the data increase the complexity of memory management.

[0004] If the memory is insufficient, it will have the following many impacts on the EDA project:

[0005] I. Slow software operation or even crashes: First, when the EDA software starts up, it needs to load various modules, library files, and project-related data into memory. If the memory is insufficient, this loading process will become extremely slow. For example, the startup operation that originally only takes a few minutes may be extended to more than ten minutes or even longer. When starting a large-scale chip design software, it needs to read a large amount of design templates, component libraries, etc. Insufficient memory will cause delays in data reading and loading, that is, it will lead to an extended startup and loading time. Second, during the project process, when engineers perform operations such as opening design files, switching design views, and running simulations, the memory needs to respond quickly and process the relevant data. When the memory is insufficient, the response time of these operations will increase significantly, showing an obvious lag. For example, after clicking to run the simulation, it may take a long time to get feedback, seriously affecting work efficiency, that is, it will lead to a lag in operation response. Third, continuous memory pressure may cause the software to run beyond its tolerance limit, resulting in software crashes. Especially when dealing with large-scale and complex EDA projects, when the software is performing some memory-intensive tasks, such as physical design verification of large-scale circuits and full-chip timing simulation, without sufficient memory support, the program is likely to suddenly close, resulting in the loss of previous work results, and engineers have to start relevant work again, that is, the risk of software crashes increases.

[0006] II. Inaccurate simulation and verification results: Because during the simulation and verification process, a large amount of data needs to be stored in memory, including various parameters of the circuit, signal states, intermediate calculation results, etc. If the memory is insufficient, it may not be able to store these data completely, resulting in the loss or truncation of some data. For example, during the timing simulation of a complex digital circuit, insufficient memory may cause the state data of some key signals at specific moments not to be saved, thereby affecting the accurate judgment of the timing characteristics of the entire circuit, that is, it will lead to data loss or truncation. In addition, some EDA simulation and verification algorithms require sufficient memory to ensure the calculation accuracy. When the memory is insufficient, the algorithm may not be able to perform complete calculations as expected and can only adopt simplified or approximate calculation methods, resulting in a reduction in calculation accuracy. For example, when performing high-precision performance simulation of an analog circuit, due to memory limitations, it may not be able to accurately consider all circuit component parameters and their interactions, resulting in a large deviation between the simulation result and the actual circuit performance, that is, it will lead to a reduction in calculation accuracy.

[0007] III. Project schedule delay: Due to insufficient memory leading to software crashes or inaccurate simulation results, engineers often need to redo some of the work that has already been completed. For example, if a simulation has been run once but the results are unreliable due to memory issues, the simulation needs to be run again, which undoubtedly increases the amount of repetitive work and wastes a lot of time and energy, that is, it leads to an increase in repetitive work. Additionally, as mentioned earlier, insufficient memory can cause the software to run slowly and the operation response to lag, and engineers waste a lot of time waiting for the software to respond and cannot efficiently carry out project work. Moreover, because various problems caused by insufficient memory need to be continuously addressed, such as clearing temporary files and trying to restart the software, it also distracts engineers' attention and further reduces the overall work efficiency, thus resulting in project schedule delays.

[0008] IV. Team collaboration hindrance: When collaborating on an EDA project in a team, multiple members may need to share some project resources, such as a shared design file library, a simulation result database, etc. If the memory is insufficient, these shared resources may not be able to be stored or accessed properly, affecting information sharing and collaborative work among team members. For example, a team member wants to view the latest simulation results uploaded by other members, but due to memory problems, the relevant files cannot be opened smoothly, hindering communication and collaboration within the team. That is, shared resources are restricted. Additionally, when multiple team members operate on the project simultaneously, such as opening design files and running simulations at the same time, the memory needs to support high-concurrency data read and write requests. When the memory is insufficient, there will be difficulties in concurrent operations. Either the operations of some members will be delayed, or error messages will appear in the software, restricting the ability of team members to work simultaneously, and thus affecting the efficiency of team collaboration. That is, concurrent operation difficulties.

[0009] To solve the problem of insufficient memory, traditional technologies mainly include the following solutions:

[0010] I. Hardware upgrade: Increasing physical memory is the most direct and effective method. Purchase memory modules compatible with the computer, such as different types of memory modules like DDR4 and DDR5. It is also possible to configure multi-channel memory. If the motherboard supports it, multi-channel memory can be configured, such as dual-channel or quad-channel. Multi-channel memory technology allows the CPU to read data from multiple memory channels simultaneously, increasing the memory bandwidth and significantly improving the data transfer rate, enhancing the memory performance of EDA simulation. Especially when dealing with large-scale data, the effect is remarkable.

[0011] II. System Optimization: It is possible to optimize the virtual memory settings. Virtual memory is the memory simulated by the operating system using hard disk space. In the system properties, the virtual memory can be set to be between 1.5 times and 3 times the physical memory. Reasonable setting of virtual memory can effectively alleviate the problem of insufficient memory when the physical memory is insufficient, ensuring the smooth progress of EDA simulation. It is also possible to close unnecessary background programs and services because many background programs and services will occupy a large amount of memory resources. Check and close unnecessary background programs such as automatic update programs and cloud storage synchronization programs through the task manager to release memory, reduce memory occupation, and provide more available memory for EDA simulation.

[0012] III. Data Management Optimization: For example, organize data reasonably. Classify and organize the data related to EDA simulation reasonably, and store data of different types and different stages in different folders or storage media respectively, which is convenient for management and quick search, and reduces memory occupation and performance degradation caused by data chaos. Another example is to clean up temporary data in a timely manner. During the EDA simulation process, a large number of temporary data files will be generated, and these temporary data files will occupy valuable memory space. Timely cleaning up the no-longer-needed temporary data files and releasing memory resources can effectively improve memory performance. For example, after the simulation task is completed, the temporary data files can be manually deleted, or the simulation software can be set to automatically clean up the temporary data files when the task ends.

[0013] IV. Adopt Distributed Storage and Computing: For large-scale EDA simulation projects, distributed storage and computing technologies can be adopted. The data is dispersed and stored on multiple storage nodes, and the computing tasks are distributed to multiple computing nodes through the network for parallel processing. In this way, the single-machine memory limit can be broken through, and the overall memory performance and computing efficiency can be improved.

[0014] The above solutions to the problem of insufficient memory have the following disadvantages:

[0015] I. The solution of hardware upgrade is expensive. First of all, the memory modules themselves are not cheap; secondly, the price of computers that support ultra-large-capacity memory is also extremely expensive, and it is very difficult for conventional servers to support hundreds or even thousands of GB of memory.

[0016] II. Optimizing system settings such as virtual memory settings, although useful for alleviating memory tension, comes at a high cost. For example, optimizing the system virtual memory settings (increasing the virtual memory) will make the EDA software run very slowly. Generally, the more the virtual memory increases, the slower the EDA software runs. Especially in the timing analysis stage, it will be unbearably slow.

[0017] III. Optimizing data management is a very necessary means for EDA software to save memory, but it still cannot meet the rapidly growing demand.

[0018] IV. The solutions for distributed storage and computing are expensive and complex to deploy and maintain.

[0019] In summary, how to effectively solve the problem of insufficient EDA simulation memory under the premise of ensuring low cost, not affecting the running speed of EDA software, and without maintenance has become a technical problem that urgently needs to be solved. Summary of the Invention

[0020] In view of this, the purpose of the present invention is to provide a data management method, device, and electronic device applied to EDA software to alleviate the technical problem that the prior art cannot solve the problem of insufficient EDA simulation memory under the premise of ensuring low cost, not affecting the running speed of EDA software, and without maintenance.

[0021] In a first aspect, an embodiment of the present invention provides a data management method applied to EDA software, which is applied to a storage system that unifies physical memory and external memory. The storage system is a component of the EDA software, and the storage system includes: physical memory, external memory, a cache device, an abstract address layer, and an interface. The external memory includes at least one of the following: disk file / disk, database, network, and other devices that can carry data. The physical memory and the external memory correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit. The cache device is a high-speed storage device, and the interface includes: a read-in cache interface, a data exchange to the external interface, a remove cache interface, and a direct read / write interface. The method includes:

[0022] Determine the storage location of the target data required to be accessed by the EDA software according to the access abstract address of the target data, where the access abstract address is the abstract address in the abstract address range corresponding to the target data;

[0023] If the storage location is the physical memory, obtain or write the target data from the physical memory based on the access abstract address;

[0024] If the storage location is the external memory, first access the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly access the target data to be confirmed in the cache device as the target data;

[0025] If it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, access the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-read the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly access the target data in the cache device, or call the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

[0026] Further, the read-in cache interface is used to read data within a first preset abstract address range from the external memory into the cache device;

[0027] The data exchange to the external interface is used to move data within a second preset abstract address range out of the cache device to the external memory;

[0028] The remove cache interface is used to discard data within a third preset abstract address range in the cache device;

[0029] The direct read / write interface is used to directly read and write data within a fourth preset abstract address range in the external memory without passing through the cache device.

[0030] Further, the method further includes:

[0031] Allocate the abstract memory based on the storage system, where the abstract memory includes: the physical memory and the external memory. Build an abstract memory allocator based on the storage system to allocate and manage the abstract memory through the abstract memory allocator for use by the EDA software. When the EDA software creates the abstract memory allocator, it is bound to the preset external memory. The batch management interfaces provided by the abstract memory allocator include: read-in cache management interface, data exchange to external management interface, remove cache management interface, direct read / write management interface, and the batch management interfaces are implemented through the interfaces.

[0032] Further, the method further includes:

[0033] Allocate fixed-size abstract memory blocks based on the storage system, where an object allocator is built based on the storage system to allocate the abstract memory into fixed-size abstract memory blocks for use by the EDA software.

[0034] Further, the method includes:

[0035] Build a data filter based on the storage system. After the EDA software creates the data filter, the EDA software parses the massive data and feeds the parsed massive data to the data filter. The data filter returns the abstract address of each data in the massive data, and writes the parsed massive data into the external storage, so that when the EDA software accesses the data to be accessed in the parsed massive data through the returned abstract address, if the data to be accessed is not in the cache device, the data to be accessed and / or the adjacent data of the data to be accessed are read from the external storage into the cache device, so as to directly read and write the data to be accessed and / or the adjacent data of the data to be accessed in the cache device subsequently.

[0036] Further, feeding the parsed massive data to the data filter, and the data filter returns the abstract address of each data in the massive data, including:

[0037] The data filter determines the abstract address range corresponding to the massive data, maps the file in the external storage used to store the parsed massive data back to the cache device, and obtains the mapped virtual address range;

[0038] Calculate the abstract address offset according to the first abstract address of the abstract address range and the first virtual address of the virtual address range, so as to perform address conversion according to the abstract address offset;

[0039] The EDA software stores the parsed massive data in the EDA memory, feeds the parsed massive data to the data filter, and the data filter writes the parsed massive data into the file in the external storage, and obtains the offset of the parsed massive data relative to the beginning of the file in the file;

[0040] Calculate the virtual address of the parsed massive data according to the offset and the first virtual address of the virtual address range;

[0041] Calculate the abstract address of the parsed massive data according to the offset and the first abstract address of the abstract address range, and return the abstract address to the application layer function of the EDA software, so that the application layer function replaces the original address with the abstract address and releases the parsed massive data in the EDA memory.

[0042] Further, the method further includes:

[0043] Data classification management is performed on data based on the storage system. Specifically, a data classification manager is constructed based on the storage system to read the data used in the current simulation step into the cache device through the data classification manager, and transfer the data not used in the current simulation step to the external memory.

[0044] In a second aspect, an embodiment of the present invention further provides a data management device applied to an EDA software, which is applied to a storage system that unifies physical memory and external memory. The storage system is a component of the EDA software, and the storage system includes: physical memory, external memory, cache device, abstract address layer, and interface. The external memory includes at least one of the following: disk file / disk, database, network, and other devices capable of carrying data. The physical memory and the external memory correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit. The cache device is a high-speed storage device, and the interface includes: read-in cache interface, data exchange to external interface, remove cache interface, direct read / write interface. The device includes:

[0045] A determination unit, configured to determine the storage location of the target data required to be accessed by the EDA software according to the access abstract address of the target data, where the access abstract address is the abstract address corresponding to the target data in the abstract address.

[0046] An acquisition or write unit, configured to, if the storage location is the physical memory, acquire or write the target data from the physical memory based on the access abstract address.

[0047] An acquisition and access unit, configured to, if the storage location is the external memory, first access the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists, and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly access the target data to be confirmed in the cache device as the target data.

[0048] An access unit, configured to, if it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, access the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-read the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly access the target data in the cache device, or call the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

[0049] In a third aspect, an embodiment of the present invention further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the method according to any one of the above first aspects are implemented.

[0050] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium storing machine-executable instructions. When the machine-executable instructions are called and run by a processor, the machine-executable instructions cause the processor to run the method according to any one of the above first aspects.

[0051] In an embodiment of the present invention, a data management method applied to an EDA software is provided, which is applied to a storage system that unifies physical memory and external memory. The storage system is a component of the EDA software and includes: physical memory, external memory, a cache device, an abstract address layer, and an interface. The external memory includes at least one of the following: disk files / disks, databases, networks, and other devices capable of carrying data. The physical memory and the external memory correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit. The cache device is a high-speed storage device, and the interface includes: a read-in cache interface, an interface for data exchange to the outside, a cache removal interface, and a direct read / write interface. The method includes: determining the storage location of the target data required to be accessed by the EDA software according to the access abstract address of the target data, where the access abstract address is the abstract address corresponding to the target data in the abstract address; if the storage location is the physical memory, obtaining or writing the target data from / to the physical memory based on the access abstract address; if the storage location is the external memory, first accessing the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly accessing the target data to be confirmed in the cache device as the target data; if it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, accessing the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-reading the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly accessing the target data in the cache device, or calling the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.As can be seen from the above description, in the data management method for EDA software of the present invention, a storage system that unifies the physical memory and external storage is provided. The target data being used during the operation of the EDA software can be stored in the physical memory / cache device, and the data that is not temporarily used is stored in the external storage, reducing the large-capacity requirement for the storage space of the physical memory / cache device. That is, there is no need to increase the physical memory / cache device by upgrading the hardware. The use of external storage greatly alleviates the defect of limited storage space. Moreover, compared with the traditional hardware upgrade solution, the solution of the present invention greatly reduces the cost because the cost of external storage is very low. Additionally, during implementation, the target data required for the operation of the EDA software is pre-stored in the physical memory / cache device. The data stored in the physical memory / cache device is convenient for reading and writing and does not affect the running speed of the EDA software. Compared with the traditional solution, the running speed of the EDA software is faster. In addition, the customers of the EDA software only need to write programs according to the access abstract address of the target data to be accessed, without knowing the specific process of the storage system querying the target data, that is, without understanding any other technical details, without adding any maintenance and usage burden, and can also achieve data reading and writing by calling interfaces. As can be seen from the above description, the method of the present invention, without changing the supply of the physical memory and cache device, effectively solves the problem of insufficient EDA simulation memory by reducing the physical memory and cache device required for the operation of the EDA software (that is, when the EDA software of the present invention runs, the demand for the physical memory and cache device is reduced), greatly improving the simulation analysis ability of the computer and alleviating the technical problem that the traditional technology cannot solve the problem of insufficient EDA simulation memory on the premise of ensuring low cost, not affecting the running speed of the EDA software, and without maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0053] Figure 1 It is a flowchart of a data management method for EDA software provided by an embodiment of the present invention;

[0054] Figure 2 It is a schematic structural diagram of a storage system provided by an embodiment of the present invention;

[0055] Figure 3 It is a schematic diagram of an application implemented based on the storage system provided by an embodiment of the present invention;

[0056] Figure 4Schematic diagram related to the data filter provided by the embodiment of the present invention;

[0057] Figure 5 Schematic diagram of the data management device applied to EDA software provided by the embodiment of the present invention;

[0058] Figure 6 Schematic diagram of an electronic device provided by the embodiment of the present invention. Detailed implementation manners

[0059] Next, the technical solutions of the present invention will be described clearly and completely in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0060] The traditional technology cannot solve the problem of insufficient EDA simulation memory on the premise of ensuring low cost, not affecting the running speed of EDA software, and without maintenance.

[0061] Based on this, in the data management method of the present invention applied to EDA software, a storage system that unifies physical memory and external memory is provided. The target data being used during the operation of the EDA software can be stored in the physical memory / cache device, and the data that is not temporarily used is stored in the external memory, reducing the large-capacity requirement for the storage space of the physical memory / cache device. That is, there is no need to increase the physical memory / cache device by upgrading the hardware. The use of the external memory greatly alleviates the defect of limited storage space. In addition, compared with the traditional hardware upgrade solution, the solution of the present invention greatly reduces the cost because the cost of the external memory is very low. Moreover, when implemented, the target data required for the operation of the EDA software is pre-stored in the physical memory / cache device. The data stored in the physical memory / cache device is convenient for reading and writing and does not affect the running speed of the EDA software. Compared with the traditional solution, the running speed of the EDA software is faster. In addition, the customers of the EDA software only need to write programs according to the access abstract address of the target data to be accessed, without knowing the specific process of querying the target data by this storage system, that is, without understanding any other technical details, without adding any maintenance and usage burden, and can also implement data reading and writing by calling the interface. Through the above description, it can be seen that the method of the present invention effectively solves the problem of insufficient EDA simulation memory by reducing the physical memory and cache device required for the operation of the EDA software (that is, when the EDA software of the present invention runs, the demand for the physical memory and cache device is reduced) under the condition that the supply of the physical memory and cache device remains unchanged, and greatly improves the simulation analysis ability of the computer.

[0062] To facilitate the understanding of this embodiment, a data management method applied to EDA software disclosed in the embodiments of the present invention will be introduced in detail first.

[0063] Embodiment 1:

[0064] According to the embodiments of the present invention, an embodiment of a data management method applied to EDA software is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0065] Figure 1 is a flowchart of a data management method applied to EDA software according to the embodiments of the present invention. As Figure 1 shown, the method includes the following steps:

[0066] Step S102, determine the storage location of the target data according to the access abstract address of the target data required to be accessed by the EDA software, where the access abstract address is the abstract address corresponding to the target data in the abstract address;

[0067] In the embodiments of the present invention, the above data management method applied to EDA software can be applied to a storage system that unifies memory and external storage. This storage system that unifies memory and external storage (hereinafter simply referred to as the storage system) is a component of the EDA software. As Figure 2 shown, the storage system includes: physical memory, external storage, cache device, abstract address layer, and interface. The external storage includes at least one of the following: disk file / disk, database, network, and other devices that can carry data. And the physical memory and the external storage correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit (for example, the above target data is a data unit). The cache device is a high-speed storage device, and the interface includes: read into cache interface, data exchange to external interface, remove cache interface, direct read and write interface.

[0068] The above physical memory can also be a memory module: The speed of the memory is very fast, but of course the price is also high and the capacity is limited.

[0069] Disk file / disk: The disk includes: storage devices such as solid-state drives and mechanical hard drives. The reading speed of the disk is slow, but the price is very cheap and the capacity is huge, and it can easily reach hundreds of TB.

[0070] Database: The database includes: local database, in-memory database, disk database, network database, etc. It is a program or service that can conveniently and quickly query and read and write data through methods such as key-value.

[0071] Network: Devices connected via a network outside the local computer can also store data. This type of data is accessed via the network, with relatively high latency but convenient sharing.

[0072] Cache device: Usually, a high-speed storage device is used as a cache device. For example, a memory module (DDR4, DDR5, DDR6, SRAM, GDDR (Graphics Double Data Rate), and HBM (High Bandwidth Memory)) is used.

[0073] Abstract address: Generally, an integer within a certain range is taken. For example, it can be taken from 1000 to 200000000000. Each storage device (i.e., physical memory and external memory) has a certain range of integers, and this range of integers is sufficient to represent all the data (i.e., data units) on that storage device. For example, a disk file with a size of 1TB is used as a storage device, and a continuous range of integers containing 1TB integers can be allocated to represent the data of each byte in this disk file; another example is that a disk file with a size of 1TB is used as a storage device, but we process the data in blocks. Assuming each block is 1KB in size, then we need a range of 1G integers to represent the data of each data block (i.e., data unit) in this disk file.

[0074] Interface: An interface for directly operating on the data of each module (including physical memory, cache device, and external memory), with at least 4 interfaces: read into cache interface, data exchange to external interface, remove cache interface, and direct read / write interface. The read into cache interface means reading a certain segment of data into the cache device. The data exchange to external interface means moving a certain segment of data out of the cache device to the external memory. The remove cache interface means discarding a certain segment of data in the cache device. The direct read / write interface means directly reading a certain segment of data without passing through the cache device. For example, if I need to read all the data of a certain segment on a certain device (external memory) into the cache device, then passing the address corresponding to this segment of data to the read into cache interface can achieve the pre-reading of this segment of data into the cache device. For example, if I need to recycle the cache corresponding to a certain segment of data on a certain device (external memory), then passing the address corresponding to this segment of data to the remove cache interface can achieve the recycling of this segment of cache.

[0075] During implementation, after obtaining the access abstract address stored in the EDA software, the storage location of the target data is determined according to this access abstract address through a cache algorithm. The cache algorithm is a strategy for managing the cached data in the cache device, aiming to store and retrieve data as efficiently as possible within the limited cache space to improve system performance; in the cache device, one cache location can correspond to one or more external storage locations; from the abstract address of a target data, the cache location in the cache device can be determined (this cache location can be one or more, specifically determined by the cache algorithm).

[0076] Step S104, if the storage location is physical memory, obtain or write the target data from the physical memory based on the access abstract address;

[0077] Specifically, when the storage location is physical memory, the target data therein can be directly accessed without passing through a cache device. The access includes both reading in data and writing out data.

[0078] Step S106, if the storage location is external memory, first access the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, use the target data to be confirmed in the cache device as the target data for direct access;

[0079] Step S108, if it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, access the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-read the target data corresponding to the access abstract address in the external memory into the cache device, and then directly access the target data in the cache device, or call the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

[0080] It should be noted that: after reading the target data corresponding to the access abstract address in the external memory into the cache device, when the target data is used again later, the above target data can be directly obtained from the cache device. Therefore, if the target data needs to be used multiple times in the current simulation step, it can be read into the cache device; if the target data is only used once, then the direct read / write interface can be called to access the target data corresponding to the access abstract address in the external memory (that is, give the access abstract address to the direct read / write interface, and this interface will read and write the target data corresponding to the access abstract address in the external memory), and it is not stored in the cache device, reducing the use of the precious storage space of the cache device. The above two implementation methods can be implemented according to the actual needs during the EDA software simulation, and the above target methods are set in the code for writing the EDA software.

[0081] In addition, the memory and external memory used through the abstract address are collectively referred to as the abstract memory. Therefore, the abstract memory of the present invention includes: physical memory and external memory.

[0082] In an embodiment of the present invention, a data management method applied to an EDA software is provided, which is applied to a storage system that unifies physical memory and external memory. The storage system is a component of the EDA software, and the storage system includes: physical memory, external memory, a cache device, an abstract address layer, and an interface. The external memory includes at least one of the following: disk files / disks, databases, networks, and other devices capable of carrying data. Moreover, the physical memory and the external memory correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit. The cache device is a high-speed storage device, and the interface includes: a read-in cache interface, a data exchange to the external interface, a cache removal interface, and a direct read / write interface. The method includes: determining the storage location of the target data required to be accessed by the EDA software according to the access abstract address of the target data, where the access abstract address is the abstract address in the abstract address range corresponding to the target data; if the storage location is the physical memory, obtaining or writing the target data from or to the physical memory based on the access abstract address; if the storage location is the external memory, first accessing the to-be-confirmed target data at the cache location corresponding to the storage location from the cache device. If it exists, and the abstract address corresponding to the to-be-confirmed target data is the access abstract address, directly accessing the to-be-confirmed target data in the cache device as the target data; if it does not exist, or if the abstract address corresponding to the to-be-confirmed target data is not the access abstract address, accessing the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-reading the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly accessing the target data in the cache device, or calling the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.As can be seen from the above description, in the data management method applied to EDA software of the present invention, a storage system that unifies the physical memory and external memory is provided. The target data being used during the operation of the EDA software can be stored in the physical memory / cache device, and the data that is not temporarily needed is stored in the external memory, reducing the large-capacity requirement for the storage space of the physical memory / cache device. That is, there is no need to increase the physical memory / cache device by upgrading the hardware. The use of the external memory greatly alleviates the defect of limited storage space. Moreover, compared with the traditional hardware upgrade solution, the solution of the present invention greatly reduces the cost because the cost of the external memory is very low. In addition, during implementation, the target data required for the operation of the EDA software is pre-stored in the physical memory / cache device. The data stored in the physical memory / cache device is convenient to read and write, and does not affect the running speed of the EDA software. Compared with the traditional solution, the running speed of the EDA software is faster. In addition, the customers of the EDA software only need to write programs according to the access abstract address of the target data to be accessed, without knowing the specific process of the storage system querying the target data, that is, without understanding any other technical details, without adding any maintenance and usage burden, and can also realize the reading and writing of data by calling the interface. As can be seen from the above description, the method of the present invention effectively solves the problem of insufficient EDA simulation memory by reducing the physical memory and cache device required for the operation of the EDA software (that is, when the EDA software of the present invention runs, the demand for the physical memory and cache device is reduced) under the condition that the supply of the physical memory and cache device remains unchanged, greatly improving the simulation analysis ability of the computer and alleviating the technical problem that the traditional technology cannot solve the problem of insufficient EDA simulation memory on the premise of ensuring low cost, not affecting the running speed of the EDA software, and without maintenance.

[0083] The above content briefly introduces the data management method applied to EDA software of the present invention. The following will describe the specific content involved in detail.

[0084] In an alternative embodiment of the present invention, a read cache interface is used to read the data within the first preset abstract address range in the external memory into the cache device;

[0085] A data exchange to external interface is used to move the data within the second preset abstract address range out of the cache device to the external memory;

[0086] A remove cache interface is used to discard the data within the third preset abstract address range in the cache device;

[0087] A direct read / write interface is used to directly read and write the data within the fourth preset abstract address range from the external memory without passing through the cache device.

[0088] Specifically, the above first preset abstract address range, second preset abstract address range, third preset abstract address range, and fourth preset abstract address range are the abstract address ranges stored in the EDA software, that is, relevant operations are performed according to the requirements of the EDA software.

[0089] In an alternative embodiment of the present invention, the method further includes:

[0090] Based on the storage system, allocate the abstract memory, where the abstract memory includes physical memory and external memory. Build an abstract memory allocator based on the storage system to allocate and manage the abstract memory through the abstract memory allocator for use by the EDA software. When the EDA software creates the abstract memory allocator, it binds to a preset external memory. The batch management interfaces provided by the abstract memory allocator include: read cache management interface, data exchange to external management interface, remove cache management interface, direct read and write management interface, and the batch management interfaces are implemented through the interfaces.

[0091] Specifically, the present invention realizes multiple applications based on the storage system. One application is the abstract memory allocator, such as Figure 3 shown, which belongs to the functional module on the upper layer of the storage system. When the EDA software creates the abstract memory allocator (i.e., instantiates the abstract memory allocator of the present invention), it can choose to bind to a specific storage device (external memory such as disk, file, database, etc.). The abstract memory allocator can be used to allocate the abstract memory, and the EDA software can directly use the allocated abstract memory. The abstract memory allocator provides at least 4 interfaces: read cache management interface, data exchange to external management interface, remove cache management interface, direct read and write management interface, and these management interfaces are implemented through the interfaces provided on the far right. When the data is moved out to the external memory, the data does not occupy the precious memory space (i.e., the space of the cache device). When the data is in the cache device, the speed of the EDA software using this data is not affected.

[0092] The above-mentioned abstract memory allocator can manage data in batches, facilitating the use of EDA software. For example, if all one million data are to be cleared from the cache device, with the abstract memory allocator, only one cache removal management interface of the abstract memory allocator needs to be called. Since the abstract memory allocator has recorded the information of the allocated abstract addresses (such as how much abstract memory there is, which parts are occupied by which data, and which are unoccupied, etc.), it can call the cache removal interface according to the recorded information, and then clear the cache device. The fact that the abstract memory allocator records a large amount of information enables the EDA software to batch process by calling the cache removal management interface only once. Without the abstract memory allocator, the EDA software needs to call the cache removal interface one million times. In addition, the EDA software needs to record the abstract addresses of each call, that is, it needs to record the allocated abstract addresses, which is equivalent to having the EDA software application layer do the related work of recording the abstract addresses. Obviously, it is extremely inconvenient to use.

[0093] In an alternative embodiment of the present invention, fixed-size abstract memory blocks are allocated based on a storage system. Among them, an object allocator is constructed based on the storage system to allocate the abstract memory into fixed-size abstract memory blocks for the use of EDA software through the object allocator.

[0094] Specifically, the object allocator is similar to the abstract memory allocator, but each time it allocates abstract memory blocks of a fixed size (or an integer multiple of the fixed size).

[0095] In an alternative embodiment of the present invention, the method further includes the following steps:

[0096] A data filter is constructed based on the storage system. After the EDA software creates the data filter, the EDA software parses the massive data and feeds the parsed massive data to the data filter. The data filter returns the abstract address of each data in the massive data and writes the parsed massive data into the external memory. When the EDA software accesses the data to be accessed in the parsed massive data through the returned abstract address, if the data to be accessed is not in the cache device, the data to be accessed and / or the adjacent data of the data to be accessed are read from the external memory into the cache device for subsequent direct reading and writing of the data to be accessed and / or the adjacent data of the data to be accessed in the cache device.

[0097] Among them, feeding the parsed massive data to the data filter, and the data filter returning the abstract address of each data in the massive data specifically includes the following steps:

[0098] (1) The data filter determines the abstract address range corresponding to the massive data, maps the file in the external memory used to store the parsed massive data back to the cache device, and obtains the mapped virtual address range;

[0099] (2) Calculate the abstract address offset based on the first abstract address of the abstract address range and the first virtual address of the virtual address range, so as to perform address conversion according to the abstract address offset;

[0100] (3) The EDA software stores the parsed massive data in the EDA memory, and feeds the parsed massive data to the data filter. The data filter writes the parsed massive data into a file in the external memory, and obtains the offset of the parsed massive data relative to the beginning of the file in the file;

[0101] (4) Calculate the virtual address of the parsed massive data according to the offset and the first virtual address of the virtual address range;

[0102] (5) Calculate the abstract address of the parsed massive data according to the offset and the first abstract address of the abstract address range, and return the abstract address to the application layer function of the EDA software, so that the application layer function replaces the original address with the abstract address and releases the parsed massive data in the EDA memory.

[0103] Specifically, for the data filter, in the case where only a small part of the massive data is used in the EDA software, if the parsed massive data is fed to the data filter in advance, the data filter will put all the parsed massive data on the external memory. When the EDA software uses a certain data (i.e., the data to be accessed), move the data into the cache device, and at the same time, it can be selected (determined when writing the EDA software code) whether to move the adjacent data of the data to be accessed (the so-called adjacent data refers to the data within the preset range of the abstract address of the data to be accessed) into the cache device. Once the data to be accessed is moved into the cache device, the subsequent usage performance will not be damaged. After the program runs for a period of time, the frequently used data (i.e., the data moved into the cache device) in the massive data will reside in the cache device. This tool avoids the waste caused by loading most of the massive data into the cache device but not using most of it.

[0104] When implemented, an EDA software reads and parses massive data, but does not know which data will be used subsequently. Feed the parsed massive data to the data filter one by one. The data filter returns the abstract address (actually an integer) of these parsed massive data. When the subsequent EDA software uses a certain data in the massive data through the abstract address, if it is not in the cache device, read the data from the external memory into the cache device, and directly read and write the data in the cache device subsequently.

[0105] The specific implementation details are as follows: First, the EDA software creates a data filter. The data filter selects a specific range as the abstract address range, noting that it cannot overlap with other abstract address ranges, and it is also recommended not to overlap with the virtual address range (the memory address system inherent in the computer system is called the virtual address) (it is also possible to directly use the virtual address, but then the size is fixed). The file created on the solid-state drive is selected as the external memory. The data filter expands the file on the solid-state drive to the specified size (this size is sufficient to hold the massive data to be processed, and a much larger size can be selected), and then maps this file back to the cache device to obtain the mapped virtual address range (which is also an integer). The first abstract address of the abstract address range is subtracted from the first virtual address of the virtual address range to obtain an abstract address offset. The EDA software stores the parsed massive data in the EDA memory (occupying the high-speed memory space at this time) in a specific format. After feeding the parsed massive data to the data filter one by one, the data filter writes the parsed massive data into the file on the solid-state drive and obtains the offset of the parsed massive data relative to the beginning of the file. From this offset plus the first virtual address of the virtual address range, the virtual address of the parsed massive data can be calculated, and from this offset plus the first abstract address of the abstract address range, the abstract address of the parsed massive data can be calculated. This abstract address is returned to the caller in the EDA software (i.e., the application layer function), and the caller replaces the original address with this abstract address. Subsequently, data is accessed through the abstract address, and at the same time, the parsed massive data in the EDA memory is released (because it has been stored in the external memory and there is no need to occupy the memory space for secondary storage).

[0106] It should be noted that when using the data filter, generally the data moved into the cache device is frequently used data, and it is often locked in the cache device, that is, it is not removed from it; when removing, generally a new file is created in the disk file through the interface, and the data to be removed is placed in this new file, which is equivalent to saving this frequently used data together. When used next time, the data in this new file can be directly written into the cache device at one time, making the usage performance better.

[0107] As Figure 4 shown, the bottom row is the data block to be filtered in the external memory, that is, the massive data is saved to the external memory, and the middle row is the data block read into the cache device (i.e., frequently used data) after a period of use.

[0108] In an alternative embodiment of the present invention, the method further includes the following steps:

[0109] Data classification management is performed on data based on a storage system. Specifically, a data classification manager is constructed based on the storage system to read the data used in the current simulation step into a cache device through the data classification manager, and transfer the data not used in the current simulation step to external storage.

[0110] Specifically, assume that the EDA software processes simulation steps A, B, C, D, and E in sequence, and the data that occupies a very large amount of memory includes 1, 2, 3, 4, 5, 6, 7, 8, and 9. The large data relied on by each simulation step is as follows in the table.

[0111]

[0112] Assume that all this large data is managed by the storage system. Then, before each simulation step starts, transfer the unused data to external storage and transfer the used data to the cache device (which is essentially physical memory. Part of the computer's physical memory is used as the physical memory in the present invention, and part can be used as the cache device). In this way, there is no need to worry that all the large data is placed in the cache device, resulting in insufficient space in the cache device.

[0113] One implementation method is as follows: First, place this large data on files on a solid-state drive. The unified storage framework (i.e., the storage system) maps the data of these files to virtual memory (implemented with the help of mmap in Linux), and each file mapping obtains a virtual address space (starting address and length). Here, we make the abstract address equal to the virtual address. Update the abstract address (virtual address) in the EDA software, that is, the pointer holding the original address is replaced with the new abstract address. And the transfer of data to files or into the cache can be achieved through APIs in Linux (such as mmap, madvice, msync, masync, etc.). When implementing the traditional solution, it is necessary to transfer all the data of 1, 2, 3, 4, 5, 6, 7, 8, and 9 into the cache device, while in the present invention, only the data corresponding to the simulation step needs to be transferred into the cache device. Then, the space of the cache device only needs to meet the maximum space of the data required in each simulation step, rather than the sum of the spaces of the above 1-9 data, greatly reducing the consumption of the cache device space.

[0114] It should be noted that the method of the present invention can also achieve pre-reading and pre-fetching, that is, the data required for the simulation steps is read into the cache device in advance, without affecting the running speed of the EDA simulation; it should also be noted that there is a cache algorithm in the cache device, and the cache algorithm will move the data that has not been used for a long time (the data that has not been used even after reaching the preset time threshold) to the external memory; of course, the data can also be moved to the external memory by means of an interface call (the EDA software calls the relevant interface); in addition, if the format of the external data is regular, it can be directly loaded into the storage system of the present invention, and the storage system of the present invention manages it and assigns an abstract address to it. When loading, the interface for loading external data is called to implement it.

[0115] In addition, it should be noted that when the present invention is implemented, the above-mentioned abstract address can also be a virtual address. In addition, the physical memory can be managed by virtual memory (a concept in Linux) alone and used directly. The physical memory does not use the abstract address; the abstract address can be avoided, and a section of the virtual address can be directly used to represent the external memory; part of the external memory can also be managed in the way of the present invention, and other external memories can be managed in other ways, which all fall within the protection scope of the present invention.

[0116] Comparison and improvement of the present invention with the prior art:

[0117] Compared with the database: The database can store data on the disk or network, but the performance is not good and the latency is large; various databases have corresponding usage methods and cannot be read and written like operating virtual memory, and the usage methods are not unified. Compared with the virtual memory mapping mmap in Linux: The applicable range is relatively narrow, and the data management method is single. For example, data can only be managed according to pages (4k), and it is not flexible to use.

[0118] Improvements:

[0119] 1. The usage methods of the memory and the external memory are unified. Similar to the usage method of the virtual address, the physical memory, hard disk, file, database, and network are unified into one form, that is, used through the abstract address, which greatly reduces the programming complexity;

[0120] 2. It has a simple and easy-to-use storage management API: It can finely manage the actual storage location of the data (cache device or external memory);

[0121] 3. When used in the recommended way (for example, the data is stored continuously (that is, the relevant content of adjacent data), pre-reading and pre-fetching), the physical memory of the EDA software can be significantly reduced, and the performance loss is small. Most of the data can be placed in the external memory, and only the data that needs to be used is placed in the cache device (which occupies physical memory), so the physical memory occupancy can be reduced;

[0122] 4. With snapshot function: The managed data can be packaged and compressed as a whole and decompressed and restored when used next time.

[0123] The present invention has the following technical effects:

[0124] 1. Since most of the data is stored in the external memory, the physical memory usage of the EDA software system can be greatly reduced, enabling the simulation or analysis of larger chip designs with the same amount of physical memory.

[0125] 2. Since the data needed can be prefetched into the cache device in advance, the impact of the system on the performance of the EDA software is very small.

[0126] 3. Since the external storage and memory are unified by the abstract memory, masking the differences of various external storages, the system is easy to use.

[0127] The main key technical points include:

[0128] 1. Mask the differences of external storage (external memory) devices with abstract addresses and read and write in a consistent manner.

[0129] 2. When reading or writing a certain data through an abstract address, if the data is not in the cache device, the data can be automatically read into the cache device.

[0130] In addition, it has the function of directly reading and writing the external memory (implemented through an interface), that is, with the help of an abstract address, without passing through the cache device, and reading and writing data in the original reading and writing mode of the external memory.

[0131] 3. It has the prefetch function: Issue a prefetch instruction in advance to read the data to be read and written into the cache device. When needed, directly use the data in the cache device to improve performance.

[0132] 4. It has the cache write-back function: When issuing an instruction of "moving data out of the cache device to the external storage device", according to the data or data range specified by the instruction, migrate these data in the cache device to the corresponding external device (external memory). The specific method is that if a certain data is rewritten, then write it back to the external memory, and if it is not rewritten, then skip it directly.

[0133] 5. It has the function of discarding specified cache data: The data on the cache device within a specified range can be directly discarded, and the cache device can be vacated for subsequent steps.

[0134] 6. The data on the external memory can be directly loaded into our storage system: When reading or writing a certain data for the first time, automatically read the data into the cache device and use it.

[0135] Embodiment 2:

[0136] An embodiment of the present invention further provides a data management device applied to an EDA software. The data management device applied to the EDA software is mainly used to execute the data management method applied to the EDA software provided in the first embodiment of the present invention. The following is a specific introduction to the data management device applied to the EDA software provided by the embodiment of the present invention.

[0137] Figure 5 is a schematic diagram of a data management device applied to an EDA software according to an embodiment of the present invention. As Figure 5 shown, the device mainly includes: a determination unit 10, an acquisition or writing unit 20, an acquisition and access unit 30, and an access unit 40, where:

[0138] The determination unit is configured to determine the storage location of the target data according to the access abstract address of the target data required to be accessed by the EDA software, where the access abstract address is the abstract address corresponding to the target data in the abstract address;

[0139] The acquisition or writing unit is configured to, if the storage location is physical memory, acquire or write the target data from the physical memory based on the access abstract address;

[0140] The acquisition and access unit is configured to, if the storage location is external memory, first access the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly access the target data to be confirmed in the cache device as the target data;

[0141] The access unit is configured to, if it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, access the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-read the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly access the target data in the cache device, or call the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

[0142] In an embodiment of the present invention, a data management device applied to an EDA software is provided. It is applied to a storage system that unifies physical memory and external memory. The storage system is a component of the EDA software and includes: physical memory, external memory, a cache device, an abstract address layer, and an interface. The external memory includes at least one of the following: disk files / disks, databases, networks, and other devices capable of carrying data. Moreover, the physical memory and the external memory correspond to a preset abstract address range, and each abstract address in the abstract address range corresponds to a data unit. The cache device is a high-speed storage device. The interface includes: a read-in cache interface, an interface for data exchange to the outside, a cache removal interface, and a direct read / write interface. The method includes: determining the storage location of the target data required to be accessed by the EDA software according to the access abstract address of the target data, where the access abstract address is the abstract address in the abstract address range corresponding to the target data; if the storage location is the physical memory, obtaining or writing the target data from or to the physical memory based on the access abstract address; if the storage location is the external memory, first accessing the target data to be confirmed at the cache location corresponding to the storage location from the cache device. If it exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly accessing the target data to be confirmed in the cache device as the target data; if it does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, accessing the target data according to the target method specified by the EDA software, where the target method includes any one of the following: pre-reading the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly accessing the target data in the cache device, or calling the direct read / write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.As can be seen from the above description, in the data management device for EDA software of the present invention, a storage system that unifies physical memory and external memory is provided. The target data being used during the operation of the EDA software can be stored in physical memory / cache devices, and the data that is not currently in use can be stored in external memory, reducing the high-capacity requirement for the storage space of physical memory / cache devices. That is, there is no need to increase the physical memory / cache devices by upgrading the hardware. The use of external memory greatly alleviates the defect of limited storage space. Moreover, compared with the traditional hardware upgrade solution, the solution of the present invention greatly reduces the cost because the cost of external memory is very low. Additionally, during implementation, the target data required for the operation of the EDA software is pre-stored in physical memory / cache devices. The data stored in physical memory / cache devices is convenient to read and write, without affecting the running speed of the EDA software. Compared with the traditional solution, the running speed of the EDA software is faster. Furthermore, the customers of the EDA software only need to write programs according to the access abstract addresses of the target data they need to access, without knowing the specific process of querying the target data in this storage system, that is, without understanding any other technical details, without adding any maintenance and usage burdens, and can also implement data reading and writing by calling interfaces. As can be seen from the above description, under the condition that the supply of physical memory and cache devices remains unchanged, the method of the present invention effectively solves the problem of insufficient EDA simulation memory by reducing the physical memory and cache devices required for the operation of the EDA software (that is, when the EDA software of the present invention is running, the demand for physical memory and cache devices is reduced), greatly improving the simulation analysis ability of the computer and alleviating the technical problem that the traditional technology cannot solve the problem of insufficient EDA simulation memory under the premise of ensuring low cost, not affecting the running speed of the EDA software, and without maintenance.

[0143] Optionally, a read cache interface is used to read data within a first preset abstract address range from external memory into the cache device; a data exchange to external interface is used to move data within a second preset abstract address range out of the cache device to external memory; a remove cache interface is used to discard data within a third preset abstract address range in the cache device; a direct read / write interface is used to directly read and write data within a fourth preset abstract address range in external memory without passing through the cache device.

[0144] Optionally, the device is further configured to: allocate an abstract memory based on the storage system, where the abstract memory includes physical memory and external memory, and construct an abstract memory allocator based on the storage system to allocate and manage the abstract memory for use by the EDA software through the abstract memory allocator. When the EDA software creates the abstract memory allocator, it is bound to the preset external memory. The batch management interfaces provided by the abstract memory allocator include: a read cache management interface, a data exchange to external management interface, a remove cache management interface, and a direct read / write management interface. The batch management interfaces are implemented through interfaces.

[0145] Optionally, the device is further configured to: allocate fixed-size abstract memory blocks based on a storage system, where an object allocator is built based on the storage system to allocate the abstract memory as fixed-size abstract memory blocks for use by the EDA software through the object allocator.

[0146] Optionally, the device is further configured to: build a data filter based on the storage system. After the EDA software creates the data filter, the EDA software parses the massive data and feeds the parsed massive data to the data filter. The data filter returns the abstract address of each data in the massive data and writes the parsed massive data to external storage, so that when the EDA software accesses the data to be accessed in the parsed massive data through the returned abstract address, if the data to be accessed is not in the cache device, the data to be accessed and / or the adjacent data of the data to be accessed are read from external storage into the cache device for subsequent direct reading and writing of the data to be accessed and / or the adjacent data of the data to be accessed in the cache device.

[0147] Optionally, the device is further configured to: the data filter determines the abstract address range corresponding to the massive data, maps the file in the external storage used to store the parsed massive data back to the cache device to obtain the mapped virtual address range; calculates the abstract address offset according to the first abstract address of the abstract address range and the first virtual address of the virtual address range for address conversion; the EDA software stores the parsed massive data in the EDA memory and feeds the parsed massive data to the data filter, and the data filter writes the parsed massive data to a file in the external storage to obtain the offset of the parsed massive data relative to the beginning of the file; calculates the virtual address of the parsed massive data according to the offset and the first virtual address of the virtual address range; calculates the abstract address of the parsed massive data according to the offset and the first abstract address of the abstract address range and returns the abstract address to the application layer function of the EDA software, so that the application layer function replaces the original address with the abstract address and releases the parsed massive data in the EDA memory.

[0148] Optionally, the device is further configured to: perform data classification management on the data based on the storage system, where a data classification manager is built based on the storage system to read the data used in the current simulation step into the cache device and transfer the data not used in the current simulation step to external storage.

[0149] The device provided by the embodiments of the present invention has the same implementation principle and the same technical effects as those of the foregoing method embodiments. For a brief description, for the parts not mentioned in the device embodiments, reference may be made to the corresponding content in the foregoing method embodiments.

[0150] Such as Figure 6As shown in the figure, an electronic device 600 provided by an embodiment of the present application includes: a processor 601, a memory 602, and a bus. The memory 602 stores machine-readable instructions executable by the processor 601. When the electronic device runs, the processor 601 communicates with the memory 602 through the bus. The processor 601 executes the machine-readable instructions to perform the steps of the data management method applied to the EDA software as described above.

[0151] Specifically, the above-mentioned memory 602 and processor 601 can be general-purpose memory and processor, which are not specifically limited here. When the processor 601 runs the computer program stored in the memory 602, it can execute the data management method applied to the EDA software as described above.

[0152] The processor 601 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor 601 or instructions in software form. The above-mentioned processor 601 can be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it can also be a digital signal processor (DSP for short), an application specific integrated circuit (ASIC for short), a field-programmable gate array (FPGA for short), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being completed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a mature storage medium in the art such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers, etc. This storage medium is located in the memory 602, and the processor 601 reads the information in the memory 602 and combines its hardware to complete the steps of the above method.

[0153] Corresponding to the above data management method applied to EDA software, an embodiment of the present application further provides a computer-readable storage medium. The computer-readable storage medium stores machine-executable instructions. When the computer-executable instructions are called and run by a processor, the computer-executable instructions cause the processor to execute the steps of the above data management method applied to EDA software.

[0154] The data management device applied to EDA software provided by the embodiment of the present application may be specific hardware on a device or software or firmware installed on the device. For the device provided by the embodiment of the present application, the implementation principle and the technical effects produced are the same as those of the foregoing method embodiment. For the sake of brief description, for the parts not mentioned in the device embodiment, reference may be made to the corresponding content in the foregoing method embodiment. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the foregoing described systems, devices, and units can all refer to the corresponding processes in the above method embodiment, and will not be repeated here.

[0155] In the embodiments provided by the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there may be other division methods in actual implementation. For another example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection may be through some communication interfaces. The indirect coupling or communication connection of the devices or units may be in an electrical, mechanical, or other form.

[0156] Again, for example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present application. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order from that marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0157] The unit described as a separation component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0158] In addition, each functional unit in the embodiments provided in this application may be integrated into a processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.

[0159] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the data management method applied to EDA software described in each embodiment of this application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM for short), random access memories (RAM for short), magnetic disks, or optical discs that can store program codes.

[0160] It should be noted that: similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0161] Finally, it should be noted that: the above-described embodiments are only specific implementation manners of this application, used to illustrate the technical solution of this application, rather than limiting it. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: any person skilled in the art within the technical scope disclosed in this application can still modify the technical solutions recorded in the foregoing embodiments, or can easily think of changes, or perform equivalent replacements on some of the technical features; and these modifications, changes, or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of this application. All should be covered within the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A data management method applied to EDA software, characterized in that: A storage system applied to unified memory and external storage, the storage system is a component of EDA software, the storage system includes: physical memory, external storage, cache device, abstract address layer and interface, the external storage includes at least one of the following: disk file / disk, database, network and other devices capable of carrying data, and the physical memory and the external storage correspond to a preset abstract address range, each abstract address in the abstract address range corresponds to a data unit, the cache device is a high-speed storage device, the interface includes: read-in cache interface, data exchange to external interface, remove cache interface, direct read and write interface, the method includes: Determine the storage location of the target data according to the access abstract address of the target data that the EDA software needs to access, wherein the access abstract address is an abstract address corresponding to the target data in the abstract address; If the storage location is the physical memory, obtaining or writing the target data from the physical memory based on the access abstract address; If the storage location is the external memory, first access the target data to be confirmed in the cache location corresponding to the storage location from the cache device; if the target data to be confirmed exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly access the target data to be confirmed in the cache device as the target data; If the target data to be confirmed does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, the target data is accessed according to the target method specified by the EDA software, and then the target data is used to execute the current simulation step of the EDA software, wherein the target method includes any one of the following: pre-reading the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly accessing the target data in the cache device, or calling the direct read-write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

2. The method according to claim 1, characterized in that The read-in cache interface is used to read data in a first preset abstract address range from the external memory into the cache device; The data is exchanged to the external interface, and is used to move the data in the second preset abstract address range out of the cache device to the external memory; The cache removal interface is used to discard data in a third preset abstract address range in the cache device; The direct read / write interface is used to directly read and write data in the fourth preset abstract address range of the external memory without passing through the cache device.

3. The method according to claim 1, characterized in that The method further comprises: Abstract memory is allocated based on the storage system, wherein the abstract memory includes: the physical memory and the external memory. An abstract memory allocator is constructed based on the storage system to allocate and manage the abstract memory through the abstract memory allocator for use by the EDA software. When the EDA software creates the abstract memory allocator, it is bound to the preset external memory. The batch management interface provided by the abstract memory allocator includes: a read-in cache management interface, a data exchange to an external management interface, a cache removal management interface, and a direct read and write management interface. The batch management interface is implemented through the interface.

4. The method according to claim 1, characterized in that: The method further comprises: An abstract memory block of a fixed size is allocated based on the storage system, wherein an object allocator is constructed based on the storage system so as to allocate the abstract memory into an abstract memory block of a fixed size through the object allocator for use by the EDA software.

5. The method according to claim 1, characterized in that The method comprises: A data filter is constructed based on the storage system. After the EDA software creates the data filter, the EDA software parses the massive data and feeds the parsed massive data to the data filter. The data filter returns the abstract address of each data in the massive data and writes the parsed massive data into the external memory, so that when the EDA software accesses the data to be accessed in the parsed massive data through the returned abstract address, if the data to be accessed is not in the cache device, the data to be accessed and / or the adjacent data of the data to be accessed are read from the external memory into the cache device, so as to directly read and write the data to be accessed and / or the adjacent data of the data to be accessed in the cache device later.

6. The method according to claim 5, characterized in that The parsed mass data is fed to the data filter, and the data filter returns the abstract address of each data in the mass data, including: The data filter determines an abstract address range corresponding to the mass data, maps the file in the external memory used to store the parsed mass data back to the cache device, and obtains a mapped virtual address range; Calculating an abstract address offset according to a first abstract address in the abstract address range and a first virtual address in the virtual address range, so as to convert an address according to the abstract address offset; The EDA software stores the parsed massive data in the EDA memory, and feeds the parsed massive data to the data filter, and the data filter writes the parsed massive data into the file in the external memory, and obtains the offset of the parsed massive data in the file relative to the beginning of the file; Calculating the virtual address of the parsed mass data according to the offset and the first virtual address of the virtual address range; The abstract address of the parsed massive data is calculated according to the offset and the first abstract address of the abstract address range, and the abstract address is returned to the application layer function of the EDA software, so that the application layer function replaces the original address with the abstract address and releases the parsed massive data in the EDA memory.

7. The method according to claim 1, characterized in that The method further comprises: Data classification management is performed on the data based on the storage system, wherein a data classification manager is constructed based on the storage system so that the data used by the current simulation step is read into the cache device through the data classification manager, and the data not used by the current simulation step is transferred to the external memory.

8. A data management device applied to EDA software, characterized in that: A storage system applied to unified memory and external storage, the storage system is a component of EDA software, the storage system includes: physical memory, external storage, cache device, abstract address layer and interface, the external storage includes at least one of the following: disk file / disk, database, network and other devices capable of carrying data, and the physical memory and the external storage correspond to a preset abstract address range, each abstract address in the abstract address range corresponds to a data unit, the cache device is a high-speed storage device, the interface includes: read-in cache interface, data exchange to external interface, remove cache interface, direct read and write interface, the device includes: a determining unit, configured to determine a storage location of the target data according to an access abstract address of the target data to be accessed by the EDA software, wherein the access abstract address is an abstract address corresponding to the target data in the abstract address; an acquisition or writing unit, configured to acquire or write the target data from the physical memory based on the access abstract address if the storage location is the physical memory; an acquisition and access unit, configured to, if the storage location is the external memory, first access the target data to be confirmed in the cache location corresponding to the storage location from the cache device, and if the target data to be confirmed exists and the abstract address corresponding to the target data to be confirmed is the access abstract address, directly access the target data to be confirmed in the cache device as the target data; An access unit is used to access the target data according to a target method specified by the EDA software if the target data to be confirmed does not exist, or if the abstract address corresponding to the target data to be confirmed is not the access abstract address, and then use the target data to execute the current simulation step of the EDA software, wherein the target method includes any one of the following: pre-reading the target data corresponding to the access abstract address in the external memory into the cache device based on the access abstract address, and then directly accessing the target data in the cache device, or calling the direct read-write interface based on the access abstract address to access the target data corresponding to the access abstract address in the external memory.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions cause the processor to execute the method according to any one of claims 1 to 7.

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