Method for preventing program damage caused by accidental power failure of Flash memory and control circuit thereof

Monitor the power supply voltage of Flash memory through resistor voltage divider and voltage comparator, and quickly switch to write-protected state when power is out, solving the problem of data error writing caused by unexpected power outage of Flash memory and protecting the integrity of the program.

CN119832953APending Publication Date: 2025-04-15INGENIC SEMICON CO LTD
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Patent Information

Application Number
CN202311329529.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-10-13
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

When Flash memory fails unexpectedly, it may cause data error writing, which will damage the program. It is difficult for the prior art to quickly switch to the write-protected state in this case.

Method used

Vref voltage is generated by resistive voltage division, and the voltage comparator is used to monitor the power supply voltage of Flash memory. When the voltage drops below 3V, the voltage comparator sends a low-level signal, triggering the WP pin of Flash memory to enter the write-protect state.

Benefits of technology

When Flash memory fails unexpectedly, quickly switch to write-protected state to prevent incorrect data from being written and the protection program is not corrupted.

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Abstract

The invention provides a method and a circuit for preventing a program from being damaged due to accidental power failure of a Flash memory, and the method comprises the following steps: S1, setting a resistor R1 and a resistor R2 to be connected in series and respectively connected with + 3.3 V and grounded to form resistance voltage division, recording the voltage on the R2 as Vref, calculating a formula: # imgabs0 # Vref, taking a value between 0 < Vref < 3.3 V, taking a resistance value 1K of the resistor R1 and a resistance value 10K of the resistor R2, and substituting the resistance values into the formula to obtain a Vref value 3V; s2, a Vref voltage generated after voltage division of the resistor is set to be connected with a V-end of a voltage comparator, a V + end of the voltage comparator is connected with a power supply FLASH 3.3 V of the flash memory, and the voltage of the FLASH 3.3 V is 3.3 V; s3, the VOUT end of the voltage comparator is connected with a WP pin of the Flash memory, the power supply voltage FLASH3.3 V of the Flash memory is monitored by means of the characteristics of the voltage comparator, and when it is monitored that the voltage of the FLASH3.3 V is reduced from 3.3 V to below 3 V, the VOUT end of the voltage comparator immediately sends a low-level signal to the WP pin of the Flash memory, so that the Flash memory enters a write protection state, wrong data are not written in, and a program is protected.
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Description

Technical Field

[0001] The invention belongs to the technical field of Flash memory processing, and particularly relates to a method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed, and a control circuit thereof. Background Art

[0002] Flash memory stores the system's program. Once the program is damaged or lost, the entire system will crash completely. To prevent program damage, Flash memory manufacturers will provide a write protection pin, Write Protect, or WP for short. Different Flash memory manufacturers provide WP pins that are either low-level valid or high-level valid. Low-level valid means that when the level is low, the Flash memory enters a write-protected state, and write operations to the Flash memory are not allowed. The other is high-level valid, and the processing method is similar. For the usage of the WP pin of Flash memory, take the Flash memory with a low WP level as an example. Use a GPIO to control the WP level. When upgrading the program or writing data to the Flash memory, the GPIO outputs a high level, and the Flash memory can be written. When the write operation is completed, the GPIO outputs a low level, and the Flash memory enters a write-protected state, and data cannot be written. See Figure 1 Example.

[0003] Generally, the nominal working voltage of Flash memory is 3.6-2.7V. The above technical solution has no problem under normal power supply. However, if the Flash memory loses power unexpectedly and the power supply voltage of Flash memory drops below 2.7V, the Flash memory is in an unstable working state. At this time, the data on the data line may be wrong. At this time, the MCU is writing to the Flash memory. The MCU does not know that the Flash memory has lost power and has no time to send a low level to put the Flash memory into a write protection state. As a result, the data written to the Flash memory is wrong, which may cause program damage or loss, resulting in program crash.

[0004] In addition, commonly used technical terms include:

[0005] FLASH MEMORY: Flash memory is also called flash memory, which is a type of memory device. Flash memory is a non-volatile memory that can retain data for a long time without current supply. Its storage characteristics are equivalent to those of a hard disk. This characteristic is the basis for flash memory to become the storage medium for various portable digital devices.

[0006] GPIO: General Purpose Input / Output pin, general purpose input / output pin of the chip. WP: WriteProtect, referred to as WP, low level is effective, that is, when the level is low, the Flash memory enters the write protection state, and the Flash memory is not allowed to be written at this time. Summary of the invention

[0007] In order to solve the above problems, the purpose of this application is to control the WP pin of the Flash memory in a hardware manner, so that when power is unexpectedly lost, the WP pin can be quickly write-protected to prevent erroneous data from being written into the Flash memory.

[0008] Specifically, the present invention provides a method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed, the method comprising the following steps:

[0009] S1, suppose resistors R1 and R2 are connected in series and connected to +3.3V and ground respectively to form a resistor voltage divider, where the voltage on R2 is recorded as Vref. The calculation formula of Vref is as follows

[0010]

[0011] The Vref voltage value can be a value between 0<Vref<3.3V. Take the resistance value of resistor R1 as 1K and the resistance value of R2 as 10K. Substituting into the above formula, the Vref value is 3V.

[0012] S2, assuming that the Vref voltage generated after the resistor voltage division is connected to the V- terminal of a voltage comparator, and the V+ terminal of the voltage comparator is connected to the power supply FLASH_3.3V of the flash memory, and the voltage of FLASH_3.3V is 3.3V;

[0013] S3, the VOUT terminal of the voltage comparator is connected to the WP pin of the Flash memory, abbreviated as WP, and the low level is effective, that is, when the level is low, the Flash memory enters the write protection state, and the writing operation to the Flash memory is not allowed at this time. The characteristics of the voltage comparator are used to monitor the power supply voltage FLASH_3.3V of the Flash memory. When the voltage of FLASH_3.3V is monitored to drop from 3.3V to below 3V, the VOUT terminal of the voltage comparator immediately sends a low level signal to the WP pin of the Flash memory, so that the Flash memory enters the write protection state, prevents erroneous data from being written, and protects the program.

[0014] The characteristics of the voltage comparator further include:

[0015] The voltage comparator compares the sizes of two voltages. When V+>V-, the output terminal VOUT of the voltage comparator is VCC, a high level H; when V+<V-, the output terminal VOUT of the voltage comparator is 0V, a low level L.

[0016] The step S3 further comprises:

[0017] When the power supply of Flash memory is normal, the V+ terminal is FLASH_3.3V, the voltage is 3.3V, and the V- terminal is 3V, that is, V+>V-, the voltage comparator output terminal VOUT is 3.3V, high level H, at this time, the WP of Flash memory is not in the write protection state, and the Flash memory can be written at any time; when the MCU is writing to the Flash memory, the power supply FLASH_3.3V of Flashmemory suddenly loses power unexpectedly, and the FLASH_3.3V of the V+ terminal drops from 3.3V to below 3V. At this time, the voltage of FLASH_3.3V is between 3-2.7V, that is, when V+<V-, the voltage comparator output terminal VOUT is 0V, low level, at this time, the WP of Flash memory is pulled low, and the Flash memory enters the write protection state.

[0018] In the method, the nominal working voltage of Flash is 3.6-2.7V, that is, when the working voltage of Flash is 3.6-2.7V, it is in a stable working state. When FLASH_3.3V drops below 3V, the voltage of FLASH_3.3V is between 3-2.7V, and the WP of Flash memory is pulled down, entering a write protection state and not receiving data on the data line; when FLASH_3.3V drops below 2.7V, Flash memory is already in an unstable working state. At this time, even if the data on the data line is wrong, the Flash memory has entered a write protection state and does not receive the wrong data on the data line, thereby protecting the program from being destroyed.

[0019] The nominal operating voltage of the Flash is 3.6-2.7V.

[0020] The invention also relates to a control circuit for preventing a Flash memory from accidentally losing power and causing a program to be destroyed. The control circuit is applicable to any of the above methods, and the control circuit at least comprises: a resistor R1, another resistor R2, and a voltage comparator, wherein the VOUT end of the voltage comparator is connected to the WP pin of the Flash memory; and the MCU is connected to the Flash memory.

[0021] Therefore, the advantages of the present application are: the method is simple, and the characteristics of the voltage comparator are used to monitor the Flash power supply voltage. When the monitored power supply voltage drops, the voltage comparator immediately sends a low-level signal to put the Flash memory into a write protection state, preventing erroneous data from being written and protecting the program. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of this application, and do not constitute a limitation of the present invention.

[0023] Figure 1 It is a schematic diagram of a Flash memory with WP low level in the prior art.

[0024] Figure 2 is a schematic diagram of a voltage comparator involved in the present application.

[0025] Figure 3 It is a schematic diagram of a specific circuit involved in this application.

[0026] Figure 4 It is a flowchart of the specific method involved. DETAILED DESCRIPTION

[0027] In order to more clearly understand the technical content and advantages of the present invention, the present invention is now further described in detail in conjunction with the accompanying drawings.

[0028] The present application proposes a method for preventing the Flash memory from accidentally losing power and causing the program to be damaged. In the present technical solution, a voltage comparator is used. The function of the voltage comparator is to compare the magnitudes of two voltages. When V+>V-, the voltage comparator outputs VOUT which is VCC, a high level H. When V+<V-, the voltage comparator outputs VOUT which is 0V, a low level L. Figure 2 shown.

[0029] The circuit of the specific technical solution of the present invention is as follows Figure 3 As shown, a Vref voltage is generated by voltage division by resistors R1 and R2. The Vref voltage value can be a value between 0<Vref<3.3V. Generally, the nominal working voltage of Flash is 3.6-2.7V. Then, the Vref value can be set to 3V through resistor voltage division (for protection when the working voltage of Flash drops below 3V). VOUT is connected to the WP pin of Flash memory. According to the principle of comparator, under normal power supply, the V+ terminal is FLASH_3.3V, the V- terminal is 3V, V+>V-, and the voltage comparator output VOUT is 3.3V, high level H. At this time, the WP of Flash memory is not in write protection state, and Flash memory can be written at any time. When the MCU is writing to the Flash memory, an unexpected power outage occurs. When the FLASH_3.3V at the V+ end drops below 3V (the voltage of FLASH_3.3V is between 3-2.7V at this time), when V+<V-, the voltage comparator output VOUT is 0V, a low level. At this time, the WP of the Flash memory is pulled low, and the Flash memory enters the write protection state and does not receive data on the data line. When FLASH_3.3V drops below 2.7V, the Flash memory is already in an unstable working state. At this time, the data on the data line may be wrong, but because the Flash memory has entered the write protection state, it does not receive erroneous data on the data line, protecting the program from being destroyed.

[0030] In summary, if Figure 4 As shown, the method comprises the following steps:

[0031] S1, suppose resistors R1 and R2 are connected in series and connected to +3.3V and ground respectively to form a resistor voltage divider, where the voltage on R2 is recorded as Vref. The calculation formula of Vref is as follows

[0032]

[0033] The Vref voltage value can be a value between 0<Vref<3.3V. Take the resistance value of resistor R1 as 1K and the resistance value of R2 as 10K. Substituting into the above formula, the Vref value is 3V.

[0034] S2, assuming that the Vref voltage generated after the resistor voltage division is connected to the V- terminal of a voltage comparator, and the V+ terminal of the voltage comparator is connected to the power supply FLASH_3.3V of the flash memory, and the voltage of FLASH_3.3V is 3.3V;

[0035] S3, the VOUT terminal of the voltage comparator is connected to the WP pin of the Flash memory (Write Protect, WP for short, low level is valid, that is, when the level is low, the Flash memory enters the write protection state, and the writing operation to the Flash memory is not allowed at this time), and the characteristics of the voltage comparator are used to monitor the power supply voltage FLASH_3.3V of the Flash memory. When the voltage of FLASH_3.3V is monitored to drop from 3.3V to below 3V, the VOUT terminal of the voltage comparator immediately sends a low level signal to the WP pin of the Flash memory, so that the Flash memory enters the write protection state, prevents erroneous data from being written, and protects the program. Furthermore, when the power supply is normal, the V+ terminal is FLASH_3.3V, and the V- terminal is 3V, that is, V+>V-, and the voltage comparator output VOUT is 3.3V, high level H. At this time, the WP of the Flash memory is not in the write protection state, and the Flash memory can be written at any time; when the MCU is writing to the Flash memory, the Flash power supply voltage suddenly loses power unexpectedly, and the FLASH_3.3V of the V+ terminal drops below 3V (the voltage of FLASH_3.3V is between 3-2.7V at this time), that is, V+<V-, the voltage comparator output VOUT is 0V, low level, and the WP of the Flash memory is pulled down, and the Flash memory enters the write protection state and does not receive data on the data line. When FLASH_3.3V drops below 2.7V, the Flash memory is in an unstable working state. At this time, the data on the data line may be wrong, but because the Flash memory has entered the write protection state, it does not receive wrong data on the data line, and the protection program is not destroyed.

[0036] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed, characterized in that: The method comprises the following steps: S1, suppose resistors R1 and R2 are connected in series and connected to +3.3V and ground respectively to form a resistor voltage divider, where the voltage on R2 is recorded as Vref. The calculation formula of Vref is as follows The Vref voltage value can be a value between 0<Vref<3.3V. Take the resistance value of resistor R1 as 1K and the resistance value of R2 as 10K. Substituting into the above formula, the Vref value is 3V. S2, assuming that the Vref voltage generated after the resistor voltage division is connected to the V- terminal of a voltage comparator, and the V+ terminal of the voltage comparator is connected to the power supply FLASH_3.3V of the flash memory, and the voltage of FLASH_3.3V is 3.3V; S3, the VOUT terminal of the voltage comparator is connected to the WP pin of the Flash memory, and the WP low level is effective, that is, when the level is low, the Flash memory enters the write protection state, and the writing operation to the Flash memory is not allowed at this time. The characteristics of the voltage comparator are used to monitor the power supply voltage FLASH_3.3V of the Flash memory. When the voltage of FLASH_3.3V is monitored to drop from 3.3V to below 3V, the VOUT terminal of the voltage comparator immediately sends a low level signal to the WP pin of the Flash memory, so that the Flash memory enters the write protection state, and the erroneous data is not allowed to be written, thereby protecting the program.

2. A method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed according to claim 1, characterized in that: The characteristics of the voltage comparator further include: The voltage comparator compares the sizes of two voltages. When V+>V-, the output terminal VOUT of the voltage comparator is VCC, a high level H; when V+<V-, the output terminal VOUT of the voltage comparator is 0V, a low level L.

3. A method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed according to claim 2, characterized in that: The step S3 further comprises: When the power supply of Flash memory is normal, the V+ terminal is FLASH_3.3V, the voltage is 3.3V, and the V- terminal is 3V, that is, V+>V-, and the output terminal VOUT of the voltage comparator is 3.3V, high level H. At this time, the WP of Flash memory is not in the write protection state, and the Flash memory can be written at any time; when the MCU is writing to the Flash memory, the power supply FLASH_3.3V of the Flash memory suddenly loses power unexpectedly, and the FLASH_3.3V of the V+ terminal drops from 3.3V to below 3V, that is, V+<V-, the output terminal VOUT of the voltage comparator is 0V, low level, and the WP of the Flash memory is pulled low, and the Flash memory enters the write protection state.

4. A method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed according to claim 3, characterized in that: In the method, the nominal working voltage of Flash is 3.6-2.7V, that is, when the working voltage of Flash is 3.6-2.7V, it is in a stable working state. When FLASH_3.3V drops below 3V, the voltage of FLASH_3.3V is between 3-2.7V, and the WP of Flash memory is pulled down, entering a write protection state and not receiving data on the data line; when FLASH_3.3V drops below 2.7V, Flash memory is already in an unstable working state. At this time, even if the data on the data line is wrong, the Flash memory has entered a write protection state and does not receive the wrong data on the data line, thereby protecting the program from being destroyed.

5. A method for preventing a Flash memory from accidentally losing power and causing a program to be destroyed according to claim 1, characterized in that: The nominal operating voltage of the Flash is 3.6-2.7V.

6. A control circuit for preventing a Flash memory from accidentally losing power and causing a program to be destroyed, characterized in that: The control circuit is applicable to the method described in any one of claims 1 to 5 above, and the control circuit at least comprises: A resistor R1, another resistor R2, and a voltage comparator, wherein the VOUT end of the voltage comparator is connected to the WP pin of the Flash memory; and the MCU is connected to the Flash memory.