Packaging method of full-packaging surface-mounted device and full-packaging surface-mounted device

Abstract

The invention provides a packaging method of a full-packaging surface-mounted device and the full-packaging surface-mounted device, the full-packaging surface-mounted device comprises a sub PTC core board, a sub PCB substrate and a sub packaging shell, the sub PTC core board is bonded on the top surface of the sub PCB substrate through a sub insulating layer, the sub packaging shell and the sub PCB substrate are matched to fully package the sub PTC core board, and the sub packaging shell is bonded on the top surface of the sub PCB substrate. Wherein a sub-etching line used for separating a sub-bottom electrode layer into two sub-conductive areas is etched on the sub-bottom electrode layer of the sub-PTC core plate, two sub-bonding wire rods located on the two sides of the sub-etching line are arranged on the bottom face of the sub-PCB substrate, one sub-bonding wire rod is connected with the sub-bottom electrode layer through a plating hole, and the other sub-bonding wire rod is connected with the sub-conductive area through a plating hole. And the other sub welding wire rod is connected with the sub top electrode layer of the sub PTC core plate through the plating hole. According to the invention, preparation and packaging of the full-packaging surface-mounted device can be completed synchronously, the process is simplified, the efficiency is improved, the product yield can be improved, and the full-packaging surface-mounted device can be prevented from being influenced by the environment so as to prolong the service life.

Description

Technical Field

[0001] The invention belongs to the technical field of surface mounting, and in particular relates to a packaging method of a fully encapsulated surface mounting device and the fully encapsulated surface mounting device. Background Art

[0002] Surface mount devices are widely used in small circuit boards, and usually need to meet long-term structural and performance stability. In order to meet the requirements and avoid being affected by external factors such as humidity, temperature, thermal oxidation, etc. during the discharge process, most surface mount devices will add curing glue after welding to encapsulate the surface mount devices or even the entire circuit board. However, encapsulation after welding will increase the process flow of the circuit board and increase the cost of personnel and equipment. Separately encapsulating surface mount devices that are susceptible to environmental influences can reduce the corresponding process flow, improve efficiency and output, and has broad application potential.

[0003] For surface mount devices, the existing batch full package packaging method is mainly: first prepare the finished surface mount devices, then embed the finished surface mount devices into the mold, and then encapsulate the finished surface mount devices. However, the process of encapsulating the finished surface mount devices in the mold is cumbersome, usually requires a long processing cycle, and has low efficiency. Summary of the invention

[0004] In view of the above-mentioned defects of the prior art, the present invention provides a packaging method for a fully encapsulated surface mount device and a fully encapsulated surface mount device, which can achieve simultaneous completion of the preparation and packaging of the fully encapsulated surface mount device, simplify the process and improve efficiency, and can improve product yield, and can avoid the fully encapsulated surface mount device from being affected by the environment, so as to extend the service life.

[0005] The technical solution adopted by the present invention to solve its technical problem is:

[0006] A packaging method for a fully encapsulated surface mount device comprises the following steps:

[0007] S1. Etching a plurality of etching lines on the bottom electrode layer of the PTC core board for isolating the bottom electrode layer into a plurality of conductive areas; and arranging a plurality of pad strips on the bottom surface of the PCB substrate;

[0008] S2, pressing the PTC core board onto the top surface of the PCB substrate to obtain a first semi-finished board;

[0009] S3, setting a plurality of grooves on the PTC core board to obtain a second semi-finished board, wherein each groove divides the PTC core board into a plurality of sub-PTC core boards, each of the etching lines is divided into a plurality of sub-etching lines by the groove, and each of the sub-PTC core boards is distributed with sub-etching lines;

[0010] S4, filling the encapsulation material into each of the grooves, and the encapsulation material is self-leveled and solidified to obtain an encapsulation shell, and the encapsulation shell and the PCB substrate cooperate to fully encapsulate the multiple sub-PTC core boards to obtain a third semi-finished board;

[0011] S5. Turn the third semi-finished board upward, drill a plurality of holes on each of the pad bars and perform electroplating in each hole to form a plated hole, and cut the third semi-finished board along the scribe lines corresponding to the positions of the grooves to obtain a plurality of fully encapsulated surface mount devices, wherein each of the pad bars is divided into a plurality of sub-pad bars by the scribe lines, and each of the fully encapsulated surface mount devices is provided with two sub-pad bars on both sides of the corresponding sub-etching line, wherein one of the sub-pad bars is connected to the sub-bottom electrode layer of the sub-PTC core board through the corresponding plated hole, and the other sub-pad bar is connected to the sub-top electrode layer of the sub-PTC core board through the corresponding plated hole.

[0012] Further,

[0013] In step S1: the PTC core board includes a PTC conductive polymer layer with a positive temperature coefficient and electrode layers attached to the top and bottom surfaces of the PTC conductive polymer layer, and the electrode layer on the bottom surface of the PTC conductive polymer layer serves as the bottom electrode layer of the PTC core board;

[0014] In step S2: the surface area of ​​the PCB substrate in the first semi-finished board is greater than the surface area of ​​the PTC core board, and the PTC core board is located in the middle of the PCB substrate.

[0015] Further,

[0016] In step S1: each of the pad bars and each of the etching lines are arranged horizontally along the longitudinal direction, and there is one more pad bar than the etching line;

[0017] In step S2: during the process of preparing the first semi-finished board, each etching line on the bottom electrode layer in the PTC core board is located between two corresponding adjacent pad strips on the PCB substrate.

[0018] Further,

[0019] In step S1: the electrode layers on the top and bottom surfaces of the PTC conductive polymer layer in the PTC core board are both copper foils;

[0020] In step S2, the PTC core board and the PCB substrate are heat-pressed by a lamination process. Specifically, an insulating layer is provided between the PTC core board and the PCB substrate. During the heat-pressing process, the insulating layer 3 melts and bonds the PTC core board 1 and the PCB substrate 2.

[0021] The insulating layers in step S1 and step S2 are both insulating PP layers.

[0022] Further, in step S3: a plurality of the grooves are horizontally arranged in a criss-cross pattern on the PTC core board, and each of the sub-PTC core boards is provided with a sub-etching line; except for the two outermost pad bars, the total number of the remaining pad bars is equal to the total number of the grooves arranged longitudinally, and the remaining pad bars correspond to the corresponding groove positions arranged longitudinally, respectively.

[0023] Furthermore, step S4 is specifically as follows: a certain amount of encapsulation material with a certain fluidity is filled into each of the grooves to ensure that the encapsulation material fills each of the grooves and covers the top surface of the second semi-finished board, and bubbles are removed from the entire board under a negative pressure state, and after the encapsulation material is self-leveled, the encapsulation material is subjected to high-temperature curing to obtain an encapsulation shell, and the encapsulation shell and the PCB substrate cooperate to fully encapsulate multiple sub-PTC core boards to obtain a third semi-finished board.

[0024] Further, step S5 is specifically as follows: turning the cooled third semi-finished board upward so that the PCB substrate at the bottom faces upward, drilling a row of holes on the two outermost pad strips respectively along the extension direction of the pad strips and electroplating in each hole to form a plated hole, drilling two rows of holes on the remaining pad strips respectively along the extension direction of the pad strips and electroplating in each hole to form a plated hole, and cutting the third semi-finished board along the scribe lines corresponding to the positions of the grooves to obtain a plurality of fully encapsulated surface mount devices, wherein the longitudinally arranged The scribe lines corresponding to the positions of the grooves also correspond to the positions of the center lines between the two columns of plated holes on the corresponding pad strips, wherein each pad strip is divided into a plurality of sub-pad strips by the scribe lines, and each fully encapsulated surface mount device is provided with two sub-pad strips located on both sides of the sub-etching lines on the sub-bottom electrode layer of the corresponding sub-PTC core board, wherein one of the sub-pad strips is connected to the sub-bottom electrode layer of the sub-PTC core board through the corresponding plated hole, and the other sub-pad strip is connected to the sub-top electrode layer of the sub-PTC core board through the corresponding plated hole.

[0025] A fully encapsulated surface mount device is prepared and packaged using the above-mentioned packaging method for fully encapsulated surface mount devices, comprising a sub-PTC core board, a sub-PCB substrate and a sub-encapsulation shell, wherein the sub-PTC core board is bonded to the top surface of the sub-PCB substrate through a sub-insulating layer, and the sub-encapsulation shell and the sub-PCB substrate cooperate to fully encapsulate the sub-PTC core board, wherein a sub-etching line for isolating the sub-bottom electrode layer into two sub-conductive areas is etched on the sub-bottom electrode layer of the sub-PTC core board, and two sub-welding pad strips on both sides of the sub-etching line are arranged on the bottom surface of the sub-PCB substrate, wherein one of the sub-welding pad strips is connected to the sub-bottom electrode layer through a plated hole, and the other of the sub-welding pad strips is connected to the sub-top electrode layer of the sub-PTC core board through a plated hole.

[0026] Furthermore, the sub-PTC core plate includes a sub-PTC conductive polymer layer and a sub-electrode layer attached to the top and bottom surfaces of the sub-PTC conductive polymer layer, the sub-electrode layer on the bottom surface of the sub-PTC conductive polymer layer serves as the sub-bottom electrode layer of the sub-PTC core plate, and the sub-electrode layer on the top surface of the sub-PTC conductive polymer layer serves as the sub-top electrode layer of the sub-PTC core plate.

[0027] Furthermore, the sub-encapsulation shell is obtained by curing the encapsulation material at high temperature.

[0028] Compared with the prior art, the beneficial effects of the present invention are:

[0029] The packaging method of the fully encapsulated surface mount device in the present invention comprises the following steps: S1, etching a plurality of etching lines for isolating the bottom electrode layer into a plurality of conductive areas on the bottom electrode layer of the PTC core board; and arranging a plurality of pad strips on the bottom surface of the PCB substrate; S2, pressing the PTC core board onto the top surface of the PCB substrate to obtain a first semi-finished board; S3, arranging a plurality of grooves on the PTC core board to obtain a second semi-finished board, wherein each groove divides the PTC core board into a plurality of sub-PTC core boards, each etching line is divided into a plurality of sub-etching lines by the groove, and each sub-PTC core board is distributed with sub-etching lines; S4, filling the encapsulation material into each groove, and the encapsulation material is self-leveled and solidified to obtain an encapsulated The shell, the encapsulating shell and the PCB substrate cooperate to fully encapsulate multiple sub-PTC core boards to obtain a third semi-finished board; S5, turn the third semi-finished board upward, drill multiple holes on each solder pad bar and electroplate in each hole to form a plated hole, and cut the third semi-finished board along the scribe lines corresponding to the positions of each groove to obtain multiple fully encapsulated surface mount devices, wherein each solder pad bar is divided into multiple sub-solder pad bars by the scribe line, and each fully encapsulated surface mount device is distributed with two sub-solder pad bars on both sides of the corresponding sub-etching line, wherein one sub-solder pad bar is connected to the sub-bottom electrode layer of the sub-PTC core board through the corresponding plated hole, and the other sub-solder pad bar is connected to the sub-top electrode layer of the sub-PTC core board through the corresponding plated hole. In this way, the method of the present invention can realize the simultaneous completion of the preparation and packaging of multiple fully encapsulated surface mount devices at one time, thereby simplifying the process and improving efficiency. In addition, by utilizing the bottom PCB substrate to encapsulate the bottom of the sub-PTC core board, the encapsulation defect rate can be greatly reduced. Moreover, the sub-PTC core boards in each fully encapsulated surface mount device can be fully encapsulated through the cooperation of the encapsulation shell and the PCB substrate. The sub-PTC core boards in the fully encapsulated surface mount devices are completely isolated from the external environment, thereby avoiding the influence of the external environment, limiting the thermal expansion of the sub-PTC core board, effectively improving the holding current and long-term power-on stability of the sub-PTC core board, and extending the service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a front structural schematic diagram when the PTC core board in the present invention is composed of a single-layer PTC core board;

[0031] Figure 2 for Figure 1 Schematic diagram of the reverse structure;

[0032] Figure 3 It is a schematic diagram of the front structure of the PCB substrate in the present invention;

[0033] Figure 4 for Figure 3 Schematic diagram of the reverse structure;

[0034] Figure 5 for Figure 1 The PTC core board in Figure 3 Schematic diagram of the PCB substrate through the insulation layer lamination process;

[0035] Figure 6 To pass Figure 5 A schematic structural diagram of a first semi-finished plate obtained by laminating during the laminating process;

[0036] Figure 7 To pass Figure 6 A schematic structural diagram of a second semi-finished board obtained from the first semi-finished board in FIG.

[0037] Figure 8 For Figure 7 A schematic diagram of the structure in which each groove in the second semi-finished plate is filled with encapsulation material;

[0038] Fig. 9 To pass Figure 8 A schematic structural diagram of a third semi-finished board obtained from the second semi-finished board in FIG.

[0039] Fig.10 For the general Fig. 9 A schematic diagram of the structure of the third semi-finished board after being turned upward, drilled and electroplated;

[0040] Fig.11 For the general Fig.10 Schematic diagram of the process of the third semi-finished board after the hole is plated and then turned down for scribing;

[0041] Fig.12 To pass Fig.11 A schematic diagram of the front structure of one of the fully encapsulated surface mount devices obtained after the dicing process;

[0042] Fig.13 For along Fig.12 Schematic diagram of the structure after cutting along the A direction;

[0043] Fig.14 for Fig.12 Schematic diagram of the reverse structure;

[0044] Fig.15 For along Fig.14 Schematic diagram of the structure after cutting in the B direction.

[0045] Explanation of the reference numerals in the figure: 1. PTC core board, 101. Electrode layer, 102. PTC conductive polymer layer, 103. Etching line, 2. PCB substrate, 201. Solder pad bar, 3. Insulating layer, 4. First semi-finished board, 5. Second semi-finished board, 501. Groove, 502. Encapsulation material, 6. Third semi-finished board, 601. Encapsulation shell, 602. Plated hole, 603. Scribing line, 7. Fully encapsulated surface mount device, 701. Sub-PTC core board, 70101. Sub-PTC conductive polymer layer, 70102. Sub-etching line, 70103. Sub-electrode layer, 702. Sub-PCB substrate, 703. Sub-encapsulation shell, 704. Sub-solder pad bar. DETAILED DESCRIPTION

[0046] The specific embodiments of the present invention are further described in detail below in conjunction with the accompanying drawings. These embodiments are only used to illustrate the present invention, but not to limit the present invention.

[0047] In the description of the present invention, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0048] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0049] Furthermore, in the description of the present invention, unless otherwise specified, “plurality” means two or more.

[0050] A packaging method for a fully encapsulated surface mount device comprises the following steps:

[0051] S1, etching a plurality of etching lines 103 on the bottom electrode layer of the PTC core board 1 for isolating the bottom electrode layer into a plurality of conductive regions, Figure 1 and Figure 2 ,in Figure 1 Only one etching line 103 is shown; and a plurality of pad strips 201 are arranged on the bottom surface of the PCB substrate 2, see Figure 3 and Figure 4 ;

[0052] The PTC core plate 1 includes a PTC conductive polymer layer 102 with a positive temperature coefficient and an electrode layer 101 attached to the top and bottom surfaces of the PTC conductive polymer layer 102. The electrode layer 101 on the bottom surface of the PTC conductive polymer layer 102 serves as the bottom electrode layer of the PTC core plate 1.

[0053] S2, pressing the PTC core board 1 onto the top surface of the PCB substrate 2 to obtain the first semi-finished board 4, Figure 5 and Figure 6 ;

[0054] Among them, the surface area of ​​the PCB substrate 2 in the first semi-finished board 4 is larger than the surface area of ​​the PTC core board 1, and the PTC core board 1 is located in the middle of the PCB substrate 2;

[0055] S3, multiple grooves 501 are arranged on the PTC core board 1 to obtain a second semi-finished board 5. Figure 7 , wherein each groove 501 divides the PTC core board 1 into a plurality of sub-PTC core boards 701, each etching line 103 is divided into a plurality of sub-etching lines 70102 by the groove 501, and each sub-PTC core board 701 is evenly distributed with sub-etching lines 70102; wherein Figure 7 The insulating layer 3 between the PTC core board 1 and the PCB substrate 2 is not shown;

[0056] S4, such as Figure 8 As shown, each groove 501 is filled with encapsulating material 502, and the encapsulating material 502 is self-leveled and solidified to obtain an encapsulating shell 601. The encapsulating shell 601 and the PCB substrate 2 cooperate to fully encapsulate multiple sub-PTC core boards 701 to obtain a third semi-finished board 6. Fig. 9 ;

[0057] S5, turning the third semi-finished board 6 upward, drilling a plurality of holes on each pad bar 201 and electroplating in each hole to form a plated hole 602, see Fig.10 ,like Fig.11 As shown, the third semi-finished board 6 is cut along the cut lines 603 corresponding to the positions of the grooves 501 to obtain a plurality of fully encapsulated surface mount devices, wherein each pad strip 201 is divided into a plurality of sub-pad strips 704 by the cut line 603, as shown in FIG. Figure 12-Figure 15As shown, each fully encapsulated surface mount device is provided with two sub-solder pad strips 704 located on both sides of the corresponding sub-etching line 70102, wherein one sub-solder pad strip 704 is connected to the sub-bottom electrode layer of the sub-PTC core board 701 through the corresponding plated hole 602, and the other sub-solder pad strip 704 is connected to the sub-top electrode layer of the sub-PTC core board 701 through the corresponding plated hole 602.

[0058] The six surfaces of the fully encapsulated surface mount device are all encapsulated, and the two sub-pad strips 704 are exposed. The PCB substrate 2 at the bottom of the second semi-finished board 5 not only provides support strength for the PTC core board 1 with the groove 501 structure on the upper part, but also serves as an encapsulation layer at the bottom of each fully encapsulated surface mount device.

[0059] In this way, the method of the present invention can realize the simultaneous completion of the preparation and packaging of multiple fully encapsulated surface mount devices at one time, thereby simplifying the process and improving efficiency. In addition, by utilizing the bottom PCB substrate 2 to encapsulate the bottom of the sub-PTC core board 701, the encapsulation defect rate can be greatly reduced. Moreover, the sub-PTC core board 701 in each fully encapsulated surface mount device can be fully encapsulated through the cooperation of the encapsulation shell 601 and the PCB substrate 2. The sub-PTC core board 701 in the fully encapsulated surface mount device is completely isolated from the external environment, thereby avoiding the influence of the external environment, limiting the thermal expansion of the sub-PTC core board 701, effectively improving the holding current and long-term power-on stability of the sub-PTC core board 701, and extending the service life.

[0060] In one embodiment,

[0061] In step S1: each pad bar 201 and each etching line 103 are arranged horizontally in the longitudinal direction, each pad bar 201 passes through both ends of the PCB substrate 2, and there is one more pad bar 201 than the etching line 103, and the multiple etching lines 103 on the bottom electrode layer of the PTC core board 1 are evenly distributed, and the multiple pad bars 201 on the PCB substrate 2 are evenly distributed;

[0062] In step S2: during the process of preparing the first semi-finished board 4, each etching line 103 on the bottom electrode layer in the PTC core board 1 is located between two corresponding adjacent pad strips 201 on the PCB substrate 2;

[0063] In step S3: a plurality of grooves 501 are arranged horizontally on the PTC core board 1 in a crisscross manner, and a sub-etching line 70102 is distributed on each sub-PTC core board 701; except for the two outermost pad strips 201, the total number of the remaining pad strips 201 is equal to the total number of the grooves 501 arranged longitudinally, and the remaining pad strips 201 correspond to the positions of the corresponding grooves 501 arranged longitudinally respectively;

[0064] Step S5 is specifically as follows: the cooled third semi-finished board 6 is turned upward so that the bottom PCB substrate 2 faces upward, and a row of holes are drilled downward along the extension direction of the pad strips 201 on the two outermost pad strips 201 respectively, and each hole is electroplated to form a plated hole 602, and two rows of holes are drilled downward along the extension direction of the pad strips 201 on the remaining pad strips 201 respectively, and each hole is electroplated to form a plated hole 602; the third semi-finished board 6 after the plated hole 602 is turned downward, and the third semi-finished board 6 is cut along the scribe lines 603 corresponding to the positions of the grooves 501, to obtain a plurality of fully encapsulated surface mount devices, wherein the grooves arranged longitudinally are arranged at the bottom of the third semi-finished board 6, and the surface mount devices are formed. The scribe line 603 corresponding to the position 501 also corresponds to the center dividing line position between the two columns of plated holes 602 on the corresponding pad bar 201, wherein each pad bar 201 is divided into multiple sub-pad bars 704 by the scribe line 603, and each fully encapsulated surface mount device is provided with two sub-pad bars 704 located on both sides of the sub-etching line 70102 on the sub-bottom electrode layer of the corresponding sub-PTC core board 701, wherein one of the sub-pad bars 704 is connected to the sub-bottom electrode layer of the sub-PTC core board 701 through the corresponding plated hole 602, and the other sub-pad bar 704 is connected to the sub-top electrode layer of the corresponding sub-PTC core board 701 through the corresponding plated hole 602.

[0065] In one embodiment, in step S1: the electrode layers 101 on the top and bottom surfaces of the PTC conductive polymer layer 102 in the PTC core board are both copper foils; in step S2, the PTC core board 1 and the PCB substrate 2 are heat-pressed by a lamination process, specifically, an insulating layer 3 is provided between the PTC core board 1 and the PCB substrate 2, and during the heat-pressing process, the insulating layer 3 melts and bonds the PTC core board 1 and the PCB substrate 2; the material of the insulating layer 3 in step S1 and step S2 is both polypropylene.

[0066] In one embodiment, step S4 is specifically as follows: a certain amount of encapsulating material 502 with a certain fluidity is filled into each groove 501, ensuring that the encapsulating material 502 fills each groove 501 and covers the top surface of the second semi-finished board 5, and the bubbles are removed from the entire board under a negative pressure state, and after the encapsulating material 502 is self-leveled, the encapsulating material 502 is subjected to high-temperature curing to obtain an encapsulating shell 601, and the encapsulating shell 601 and the PCB substrate 2 cooperate to fully encapsulate multiple sub-PTC core boards 701 to obtain a third semi-finished board 6.

[0067] In the present invention, the PCB substrate 2 is an epoxy resin substrate or an epoxy fiber substrate, and the material of the encapsulating shell 601 is one of curable epoxy resin, polyurethane resin, phenolic resin, ketone-alcohol resin or silicone resin.

[0068] like Figure 12-Figure 15As shown, a fully encapsulated surface mount device is prepared and packaged using the above-mentioned packaging method for fully encapsulated surface mount devices, including a sub-PTC core board 701, a sub-PCB substrate 702 and a sub-encapsulation shell 703, the sub-PTC core board 701 is bonded to the top surface of the sub-PCB substrate 702 through a sub-insulating layer, the sub-encapsulation shell 703 and the sub-PCB substrate 702 cooperate to fully encapsulate the sub-PTC core board 701, wherein a sub-etching line 70102 for isolating the sub-bottom electrode layer into two sub-conductive areas is etched on the sub-bottom electrode layer of the sub-PTC core board 701, and two sub-welding pad strips 704 are arranged on the bottom surface of the sub-PCB substrate 702 on both sides of the sub-etching line 70102, wherein one sub-welding pad strip 704 is connected to the sub-bottom electrode layer through a plated hole 602, and the other sub-welding pad strip 704 is connected to the sub-top electrode layer of the sub-PTC core board 701 through the plated hole 602.

[0069] In this way, by setting the sub-etching line 70102, it is possible to prevent a short circuit caused by the current only passing through the sub-bottom electrode layer but not through the PTC conductive polymer layer 102 in the sub-PCB substrate 702 after the two sub-pad strips 704 are powered on.

[0070] In one embodiment, the sub-PTC core board 701 includes a sub-PTC conductive polymer layer 70101 with a positive temperature coefficient and a sub-electrode layer 70103 attached to the top and bottom surfaces of the sub-PTC conductive polymer layer 70101. The sub-electrode layer 70103 on the bottom surface of the sub-PTC conductive polymer layer 70101 serves as the sub-bottom electrode layer of the sub-PTC core board 701, and the sub-electrode layer 70103 on the top surface of the sub-PTC conductive polymer layer 70101 serves as the sub-top electrode layer of the sub-PTC core board 701.

[0071] In one embodiment, the sub-encapsulation shell 703 is obtained by curing the encapsulation material 502 at a high temperature.

[0072] The two sub-pad strips 704 at the bottom of the fully encapsulated surface mount device are used for soldering on the customer's circuit board.

[0073] In the present invention, encapsulation material 502 and encapsulation process are introduced in the preparation process of fully encapsulated surface mount devices, so that the fully encapsulated surface mount devices can be fully encapsulated while being prepared. The present invention first simplifies the preparation process of part of the original surface mount devices, and introduces a relatively simple encapsulation process on this basis, so that the packaging method of the fully encapsulated surface mount device of the present invention does not increase the processing difficulty of the fully encapsulated surface mount device. Compared with the post-encapsulation process of the finished surface mount device in the background technology, it is simpler and more efficient, and the bottom PCB substrate 2 is used to encapsulate the bottom of the sub-PTC core board 701, which can greatly reduce the encapsulation defect rate and reduce costs, and has process and economic feasibility.

[0074] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and substitutions can be made without departing from the technical principles of the present invention. These improvements and substitutions should also be regarded as the scope of protection of the present invention.

Claims

1. A packaging method for a fully encapsulated surface mount device, characterized in that: The following steps are involved: S1, etching a plurality of etching lines (103) on the bottom electrode layer of the PTC core board (1); and arranging a plurality of pad strips (201) on the bottom surface of the PCB substrate (2); S2, pressing the PTC core board (1) onto the top surface of the PCB substrate (2) to obtain a first semi-finished board (4); S3, arranging a plurality of grooves (501) on the PTC core board (1) to obtain a second semi-finished board (5), wherein each groove (501) divides the PTC core board (1) into a plurality of sub-PTC core boards (701), each etching line (103) is divided into a plurality of sub-etching lines (70102) by the groove (501), and each sub-PTC core board (701) is evenly distributed with the sub-etching lines (70102); S4, filling the encapsulation material (502) into each of the grooves (501) and curing after self-leveling to obtain an encapsulation shell (601), wherein the encapsulation shell (601) and the PCB substrate (2) cooperate to fully encapsulate the plurality of sub-PTC core boards (701), thereby obtaining a third semi-finished board (6); S5. Drill holes on each of the pad strips (201) and perform electroplating to form plated holes (602), and cut the third semi-finished board (6) along the scribing lines (603) corresponding to the positions of the grooves (501) to obtain a plurality of fully encapsulated surface mount devices, wherein each of the pad strips (201) is divided into a plurality of sub-pad strips (704) by the scribing lines (603), and each of the fully encapsulated surface mount devices is provided with two sub-pad strips (704) located on both sides of the corresponding sub-etching lines (70102), wherein one of the sub-pad strips (704) is connected to the sub-bottom electrode layer of the sub-PTC core board (701) through the corresponding plated hole (602), and the other sub-pad strip (704) is connected to the sub-top electrode layer of the sub-PTC core board (701) through the corresponding plated hole (602).

2. A packaging method for a fully encapsulated surface mount device according to claim 1, characterized in that: In step S1: the PTC core board (1) comprises a PTC conductive polymer layer (102) with a positive temperature coefficient and electrode layers (101) attached to the top and bottom surfaces of the PTC conductive polymer layer (102), and the electrode layer (101) on the bottom surface of the PTC conductive polymer layer (102) serves as the bottom electrode layer of the PTC core board (1); In step S2: the surface area of ​​the PCB substrate (2) in the first semi-finished board (4) is greater than the surface area of ​​the PTC core board (1), and the PTC core board (1) is located in the middle of the PCB substrate (2).

3. A packaging method for a fully encapsulated surface mount device according to claim 2, characterized in that: In step S1: each of the pad bars (201) and each of the etching lines (103) are arranged horizontally along the longitudinal direction, and there is one more pad bar (201) than etching line (103); In step S2: during the process of preparing the first semi-finished board (4), each etching line (103) on the bottom electrode layer in the PTC core board (1) is located between two corresponding adjacent pad strips (201) on the PCB substrate (2).

4. The packaging method of a fully encapsulated surface mount device according to claim 2, characterized in that: In step S1: the electrode layers (101) on the top and bottom surfaces of the PTC conductive polymer layer (102) are both copper foils; In step S2, the PTC core board (1) and the PCB substrate (2) are heat-pressed by a lamination process. Specifically, an insulating layer (3) is provided between the PTC core board (1) and the PCB substrate (2). During the heat-pressing process, the insulating layer (3) melts and bonds the PTC core board (1) and the PCB substrate (2). The insulating layer (3) in step S1 and step S2 is an insulating PP layer.

5. The packaging method of a fully encapsulated surface mount device according to claim 3, characterized in that: In step S3: a plurality of the grooves (501) are horizontally arranged in a crisscross pattern on the PTC core board (1), and each of the sub-PTC core boards (701) is provided with a sub-etching line (70102); except for the two outermost pad strips (201), the total number of the remaining pad strips (201) is equal to the total number of the grooves (501) arranged longitudinally, and the remaining pad strips (201) respectively correspond to the positions of the corresponding grooves (501) arranged longitudinally.

6. The packaging method of a fully encapsulated surface mount device according to claim 1, characterized in that: Step S4 specifically includes: filling a certain amount of encapsulating material (502) with a certain fluidity into each of the grooves (501), ensuring that the encapsulating material (502) fills each of the grooves (501) and covers the top surface of the second semi-finished board (5), and removing bubbles from the entire board under negative pressure. After the encapsulating material (502) is self-leveling, the encapsulating material (502) is cured at high temperature to obtain an encapsulating shell (601). The encapsulating shell (601) and the PCB substrate (2) cooperate to fully encapsulate the multiple sub-PTC core boards (701) to obtain a third semi-finished board (6).

7. The packaging method of a fully encapsulated surface mount device according to claim 5, characterized in that: Step S5 specifically comprises: turning the cooled third semi-finished board (6) upward so that the PCB substrate (2) at the bottom faces upward, drilling a row of holes on the two outermost pad strips (201) respectively along the extension direction of the pad strips (201) and electroplating in each hole to form a plated hole (602), drilling two rows of holes on the remaining pad strips (201) respectively along the extension direction of the pad strips (201) and electroplating in each hole to form a plated hole (602), and cutting the third semi-finished board (6) along the cutting lines (603) corresponding to the positions of the grooves (501) to obtain a plurality of fully encapsulated surface mount devices, wherein the cutting lines corresponding to the positions of the grooves (501) arranged longitudinally are respectively cut into the third semi-finished board (6) and the surface mount devices are obtained. The line (603) also corresponds to the position of the center line between two columns of plated holes (602) on the corresponding pad bar (201), wherein each of the pad bars (201) is divided into a plurality of sub-pad bars (704) by the scribe line (603), and each of the fully encapsulated surface mount devices is provided with two sub-pad bars (704) located on both sides of the sub-etched line (70102) on the sub-bottom electrode layer of the corresponding sub-PTC core board (701), wherein one of the sub-pad bars (704) is connected to the sub-bottom electrode layer of the sub-PTC core board (701) through the corresponding plated hole (602), and the other sub-pad bar (704) is connected to the sub-top electrode layer of the corresponding sub-PTC core board (701) through the corresponding plated hole (602).

8. A fully encapsulated surface mount device, prepared and packaged using the packaging method of a fully encapsulated surface mount device according to any one of claims 1 to 7, characterized in that: The invention comprises a sub-PTC core board (701), a sub-PCB substrate (702) and a sub-encapsulation shell (703), wherein the sub-PTC core board (701) is bonded to the top surface of the sub-PCB substrate (702) via a sub-insulating layer, and the sub-encapsulation shell (703) and the sub-PCB substrate (702) cooperate to fully encapsulate the sub-PTC core board (701), wherein a sub-etching line (70102) for isolating the sub-bottom electrode layer into two sub-conductive regions is etched on the sub-bottom electrode layer of the sub-PTC core board (701), and two sub-welding pad bars (704) are arranged on the bottom surface of the sub-PCB substrate (702) and are located on both sides of the sub-etching line (70102), wherein one of the sub-welding pad bars (704) is connected to the sub-bottom electrode layer via a plated hole (602), and the other of the sub-welding pad bars (704) is connected to the sub-top electrode layer of the sub-PTC core board (701) via a plated hole (602).

9. A fully encapsulated surface mount device according to claim 8, characterized in that: The sub-PTC core plate (701) comprises a sub-PTC conductive polymer layer (70101) and sub-electrode layers (70103) attached to the top and bottom surfaces of the sub-PTC conductive polymer layer (70101); the sub-electrode layer (70103) on the bottom surface of the sub-PTC conductive polymer layer (70101) serves as the sub-bottom electrode layer of the sub-PTC core plate (701), and the sub-electrode layer (70103) on the top surface of the sub-PTC conductive polymer layer (70101) serves as the sub-top electrode layer of the sub-PTC core plate (701).

10. A fully encapsulated surface mount device according to claim 8, characterized in that: The sub-encapsulation shell (703) is obtained by curing the encapsulation material (502) at high temperature.

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