Packaging structure with electromagnetic shielding and packaging method

Abstract

The invention provides an electromagnetic shielding structure packaging method, which comprises the following steps of: 1, forming a rewiring layer on a temporary slide glass, and reserving a shielding layer connecting port on the rewiring layer; 2, one or more first chips are installed on the front face of the rewiring layer; step 3, performing a wafer plastic package process on the front surface of the rewiring layer to form a plastic package layer; step 4, cutting the plastic package layer at the corresponding wafer cutting channel position until the shielding layer connecting port is exposed; step 5, forming an electromagnetic shielding layer at the plastic sealing surface and the slot; step 6, debonding the temporary slide glass, and reballing on the back surface of the rewiring layer; step 7, installing one or more second chips on the back surface of the rewiring layer; and step 8, cutting the rewiring layer to form a plurality of chip packaging bodies. The invention further provides a corresponding electromagnetic shielding structure, miniaturization of the radio frequency chip shielding cover is achieved, the communication distance between devices is reduced, and wafer-level high-density system-level packaging is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit packaging, and in particular to a packaging structure and a packaging method with electromagnetic shielding. Background Art

[0002] In the contemporary communications industry, high-frequency RF chips have gradually replaced the original low-frequency products. As a result, the electromagnetic interference problem between RF chips, between RF chips and other functional chips, and between RF system-level modules and other RF system-level modules has also become a problem that needs to be solved.

[0003] RF devices are developing towards high density, and multiple RF chips need to be integrated in a limited packaging space to achieve heterogeneous integration of multiple functional chips, and to achieve smaller size, higher integration density, higher and more complete performance by integrating chips and components side by side, stacked or on both sides, and to achieve wafer-level high-density system-level packaging (SIP). For RF system-level packaging, electromagnetic shielding technology is required to avoid electromagnetic interference between devices.

[0004] Currently, a commonly used technology is to add a metal shielding cover, but since the metal shielding cover is large in size, it is not conducive to miniaturization. Summary of the invention

[0005] The present invention provides an electromagnetic shielding structure and a packaging method, which have solved the electromagnetic interference problem between devices in the current radio frequency system-level packaging.

[0006] In order to solve the above technical problems, the present invention provides a packaging method with an electromagnetic shielding structure, which is characterized by comprising:

[0007] Step 1, forming a redistribution layer on a temporary carrier, wherein the redistribution layer reserves a shielding layer connection port;

[0008] Step 2, mounting one or more first chips on the front side of the redistribution layer;

[0009] Step 3, performing a wafer plastic sealing process on the front side of the redistribution layer to form a plastic sealing layer;

[0010] Step 4, cutting the plastic sealing layer at the corresponding wafer cutting line position until the shielding layer connection port is exposed;

[0011] Step 5, forming an electromagnetic shielding layer on the plastic cover and the slot;

[0012] Step 6, debonding the temporary carrier and planting balls on the back of the redistribution layer;

[0013] Step 7, mounting one or more second chips on the back side of the redistribution layer;

[0014] Step 8, cutting the redistribution layer to form a plurality of chip packages.

[0015] In one embodiment of the present invention, the method for generating a redistribution layer in step 1 includes:

[0016] Forming a plurality of dielectric layers on the temporary carrier by a chemical vapor deposition process or a physical vapor deposition process, and patterning the dielectric layers;

[0017] Forming a metal layer on the surface of the dielectric layer by a sputtering process, a physical vapor deposition process, a chemical vapor deposition process, an evaporation process, an electroplating process or a chemical plating process, and etching the metal layer to form a patterned metal wiring layer;

[0018] The material of the metal wiring layer includes one or a combination of two or more of copper, aluminum, nickel, gold, silver and titanium.

[0019] In one embodiment of the present invention, step 7 further includes:

[0020] Performing patch and underfill processes on the back side of the first rewiring layer to form an underfill layer;

[0021] The material of the bottom filling layer includes a composite resin material.

[0022] In one embodiment of the present invention, in step 3, the distance between the top surface of the plastic encapsulation layer and the top surface of the chip is 100 μm to 200 μm.

[0023] The present invention also provides a packaging structure with electromagnetic shielding, characterized in that it comprises:

[0024] A redistribution layer, wherein the front side of the redistribution layer has a shielding layer connection port;

[0025] One or more first chips, wherein the one or more first chips are arranged on a front side of the redistribution layer;

[0026] A plastic sealing layer, which plastic seals the front surface of the multiple wiring layer and the one or more first chips, and exposes the shielding layer connection port;

[0027] One or more second chips, wherein the one or more second chips are arranged on the back side of the redistribution layer;

[0028] The shielding layer covers the plastic sealing layer and the shielding layer connection port.

[0029] In one embodiment of the present invention, the redistribution layer includes a plurality of dielectric layers and a metal wiring layer;

[0030] wherein a plurality of dielectric layers are formed on the temporary carrier by a chemical vapor deposition process or a physical vapor deposition process, and patterned;

[0031] The metal wiring layer is formed on the surface of the dielectric layer by sputtering, physical vapor deposition, chemical vapor deposition, evaporation, electroplating or chemical plating, and the metal layer is etched.

[0032] In another embodiment of the present invention, the shielding layer is a metal layer deposited on the connection between the plastic packaging layer and the shielding layer by sputtering or electroplating process.

[0033] In another embodiment of the present invention, the shielding layer is made of copper.

[0034] In another embodiment of the present invention, the second chips are all subjected to underfill processing to form an underfill layer;

[0035] The material of the bottom filling layer includes a composite resin material.

[0036] In another embodiment of the present invention, the first chip includes: a radio frequency chip, a filter, a power amplifier, a low-power transmission module, and a baseband chip;

[0037] The second chip includes: passive components, passive chips, active chips, storage modules, and logic chips.

[0038] The present invention forms an electromagnetic shielding layer on the surface of the plastic packaging layer through a metal sputtering process or an electroplating process; the electromagnetic shielding layer of the metal is formed on the side wall and the front of the chip package by sputtering, thereby improving the yield of the chip package.

[0039] The present invention has the following beneficial effects:

[0040] a. It can realize the miniaturization of the RF chip shielding cover and the complete bonding with the device, solve the electromagnetic compatibility problem between the internal devices of the high-density module packaging and the problem of system heat dissipation.

[0041] b. Double-sided mounting can reduce the communication distance between devices and has better high-frequency signal transmission performance.

[0042] c. Smaller size, higher integration density, higher and more complete performance, achieving wafer-level high-density system-in-package (SIP). BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of a packaging structure with electromagnetic shielding in one embodiment of the present invention is shown;

[0044] Figure 2It shows a schematic diagram of making a redistribution layer in step 1 of a method for packaging an electromagnetic shielding structure in one embodiment of the present invention;

[0045] Figure 3 A schematic diagram of front mounting in step 2 of a method for packaging an electromagnetic shielding structure in one embodiment of the present invention is shown;

[0046] Figure 4 A schematic diagram of plastic encapsulation processing in step 3 of an electromagnetic shielding structure encapsulation method according to an embodiment of the present invention is shown;

[0047] Figure 5 A schematic diagram of half-cutting in step 4 of a method for packaging an electromagnetic shielding structure in one embodiment of the present invention is shown;

[0048] Figure 6 A schematic diagram of preparing an electromagnetic shielding layer in step 5 of a method for packaging an electromagnetic shielding structure in one embodiment of the present invention is shown;

[0049] Figure 7 It shows a schematic diagram of backside ball planting after debonding in step 6 of the electromagnetic shielding structure packaging method according to an embodiment of the present invention;

[0050] Figure 8 It shows a schematic diagram of mounting a second chip on the back side in step 7 of the electromagnetic shielding structure packaging method according to an embodiment of the present invention;

[0051] Fig. 9 A schematic diagram showing the bottom filling of the second chip in the electromagnetic shielding structure packaging method according to an embodiment of the present invention is shown;

[0052] As shown in the figure: 100 - redistribution layer; 101 - shielding layer connection port; 102 - first chip; 103 - second chip; 104 - temporary carrier; 105 - plastic sealing layer; 106 - shielding layer; 107 - bottom filling layer. DETAILED DESCRIPTION

[0053] In the following description, the present invention is described with reference to various embodiments. However, those skilled in the art will recognize that various embodiments may be implemented without one or more specific details or with other replacement and / or additional methods, materials or components. In other cases, well-known structures, materials or operations are not shown or described in detail to avoid obscuring the inventive point of the present invention. Similarly, for the purpose of explanation, specific quantities, materials and configurations are set forth to provide a comprehensive understanding of embodiments of the present invention. However, the present invention is not limited to these specific details.

[0054] In addition, it should be understood that the embodiments shown in the drawings are illustrative representations and are not necessarily drawn to the correct scale. In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than explicitly or implicitly indicating that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0055] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as expressing or implying relative importance. In this specification, reference to "one embodiment" or "the embodiment" means that a particular feature, structure or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present invention. The phrase "in one embodiment" appearing in various places in this specification does not necessarily refer to the same embodiment.

[0056] In order to solve the electromagnetic interference problem between devices in the current radio frequency system-level packaging, the core idea of ​​the present invention is to provide an electromagnetic shielding structure and a packaging method.

[0057] In order to realize the above idea, the present invention provides an electromagnetic shielding structure packaging method, which is characterized by comprising:

[0058] Step 1, forming a redistribution layer on a temporary carrier, wherein a shielding layer connection port is reserved on the redistribution layer;

[0059] Step 2, mounting one or more first chips on the front side of the redistribution layer;

[0060] Step 3, performing a wafer plastic sealing process on the front side of the redistribution layer to form a plastic sealing layer;

[0061] Step 4, cutting the plastic sealing layer at the corresponding wafer cutting line position until the shielding layer connection port is exposed;

[0062] Step 5, forming an electromagnetic shielding layer on the plastic cover and the slot;

[0063] Step 6, debonding the temporary carrier and planting balls on the back of the redistribution layer;

[0064] Step 7, mounting one or more second chips on the back side of the redistribution layer;

[0065] Step 8: cutting the redistribution layer to form a plurality of chip packages.

[0066] In one embodiment of the present invention, Figure 2As shown, step 1 generates a redistribution layer 100 on a temporary carrier 104, wherein the redistribution layer includes a plurality of dielectric layers and a metal wiring layer. The plurality of dielectric layers are formed on the temporary carrier by chemical vapor deposition or physical vapor deposition, and are patterned; the metal wiring layer is formed on the surface of the dielectric layer by sputtering, physical vapor deposition, chemical vapor deposition, evaporation, electroplating or chemical plating, and the metal layer is etched. The material of the metal wiring layer includes one or a combination of two or more of copper, aluminum, nickel, gold, silver and titanium. A shielding layer connection port 101 is reserved on the redistribution layer 100 for the subsequent installation of the shielding layer 106.

[0067] In another embodiment of the present invention, Figure 3 As shown, in step 2, one or more first chips 102 are mounted on the front of the redistribution layer 100. The first chip 102 includes a radio frequency chip, a filter, a power amplifier, a low-power transmission module, a baseband chip, etc. The first chip 102 can be mounted on the front of the redistribution layer 100 by wire bonding, flip-chip welding, etc., and is electrically connected to the redistribution layer 100.

[0068] In another embodiment of the present invention, Figure 4 As shown, in step 3, the front side of the redistribution layer 100 is plastic-encapsulated to wrap the first chip 102. In another embodiment of the present invention, in step 3, the distance between the top surface of the plastic encapsulation layer and the top surface of the chip is 100 μm to 200 μm.

[0069] In another embodiment of the present invention, Figure 5 As shown, in step 4, the plastic encapsulation layer 105 is cut at the corresponding wafer cutting line position, but not completely cut, but until the shielding layer connection port 101 is exposed, and the shielding layer connection port 101 is exposed to facilitate the subsequent formation of the shielding layer 106.

[0070] In another embodiment of the present invention, Figure 6 As shown, in step 5, a shielding layer 106 is formed on the surface of the plastic cover and the slot by a metal sputtering process or an electroplating process to isolate electromagnetic interference between components in the package. In this embodiment, the material of the shielding layer 106 is copper. Obviously, the material of the shielding layer 106 can be replaced by any material with electromagnetic shielding function.

[0071] In another embodiment of the present invention, Figure 7 As shown, in step 6, the redistribution layer 100 is debonded from the temporary carrier 104 and turned upside down so as to implant balls on the back side for subsequent device connection.

[0072] In another embodiment of the present invention, Figure 8 As shown, in step 7, one or more second chips 103 are mounted on the back side of the redistribution layer 100, and as shown in FIG. Fig. 9 As shown, the back chip is subjected to an underfill process to form a bottom filling layer 107, and the material of the bottom filling layer 107 includes a composite resin material. The second chip 103 includes a passive component chip, an active chip, a storage module, a logic chip, etc. The second chip 103 can be mounted on the back of the redistribution layer 100 by flip-chip welding or the like, and is electrically connected to the redistribution layer 100.

[0073] This embodiment also provides a packaging structure with electromagnetic shielding, characterized in that it includes:

[0074] A redistribution layer, wherein the front side of the redistribution layer has a shielding layer connection port;

[0075] One or more first chips, wherein the one or more first chips are arranged on a front side of the redistribution layer;

[0076] A plastic sealing layer, which plastic seals the front surface of the multiple wiring layer and the one or more first chips, and exposes the shielding layer connection port;

[0077] One or more second chips, wherein the one or more second chips are arranged on the back side of the redistribution layer;

[0078] The shielding layer covers the plastic sealing layer and the shielding layer connection port.

[0079] In one embodiment of the present invention, the redistribution layer 100 includes a plurality of dielectric layers and a metal wiring layer;

[0080] wherein a plurality of dielectric layers are formed on the temporary carrier by a chemical vapor deposition process or a physical vapor deposition process, and patterned;

[0081] The metal wiring layer is formed on the surface of the dielectric layer by sputtering, physical vapor deposition, chemical vapor deposition, evaporation, electroplating or chemical plating, and the metal layer is etched.

[0082] In another embodiment of the present invention, the shielding layer 106 is a metal layer deposited on the plastic packaging layer 105 and the shielding layer connection port 101 by sputtering or electroplating process, and the shielding layer 106 is used to provide electromagnetic protection for the first chip 102 .

[0083] In another embodiment of the present invention, the material of the shielding layer 106 is copper. Obviously, the material of the shielding layer 106 can be replaced by any material having an electromagnetic shielding function.

[0084] In another embodiment of the present invention, the second chips 103 are all subjected to underfill processing to form an underfill layer;

[0085] The material of the bottom filling layer includes a composite resin material.

[0086] In another embodiment of the present invention, the first chip includes: a radio frequency chip, a filter, a power amplifier, a low-power transmission module, and a baseband chip;

[0087] The second chip includes: passive components, passive chips, active chips, storage modules, and logic chips.

[0088] In summary, the present invention has the following beneficial effects:

[0089] a. It can realize the miniaturization of the RF chip shielding cover and the complete bonding with the device, solve the electromagnetic compatibility problem between the internal devices of the high-density module packaging and the problem of system heat dissipation.

[0090] b. Double-sided mounting can reduce the communication distance between devices and has better high-frequency signal transmission performance.

[0091] c. Smaller size, higher integration density, higher and more complete performance, achieving wafer-level high-density system-in-package (SIP).

[0092] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0093] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A packaging method with an electromagnetic shielding structure, characterized in that: include: Step 1, forming a redistribution layer on a temporary carrier, wherein the redistribution layer reserves a shielding layer connection port; Step 2, mounting one or more first chips on the front side of the redistribution layer; Step 3, performing a wafer plastic sealing process on the front side of the redistribution layer to form a plastic sealing layer; Step 4, cutting the plastic sealing layer at the corresponding wafer cutting line position until the shielding layer connection port is exposed; Step 5, forming an electromagnetic shielding layer on the plastic cover and the slot; Step 6, debonding the temporary carrier and planting balls on the back of the redistribution layer; Step 7, mounting one or more second chips on the back side of the redistribution layer; Step 8, cutting the redistribution layer to form a plurality of chip packages.

2. The packaging method with an electromagnetic shielding structure according to claim 1, characterized in that: The method for generating a redistribution layer in step 1 comprises: Forming a plurality of dielectric layers on the temporary carrier by a chemical vapor deposition process or a physical vapor deposition process, and patterning the dielectric layers; Forming a metal layer on the surface of the dielectric layer by a sputtering process, a physical vapor deposition process, a chemical vapor deposition process, an evaporation process, an electroplating process or a chemical plating process, and etching the metal layer to form a patterned metal wiring layer; The material of the metal wiring layer includes one or a combination of two or more of copper, aluminum, nickel, gold, silver and titanium.

3. The packaging method with an electromagnetic shielding structure according to claim 1, characterized in that: The step 7 also includes: Performing patch and underfill processes on the back side of the first rewiring layer to form an underfill layer; The material of the bottom filling layer includes a composite resin material.

4. The packaging method with an electromagnetic shielding structure according to claim 1, characterized in that: In the step 3, the distance between the top surface of the plastic encapsulation layer and the top surface of the chip is 100 μm to 200 μm.

5. A packaging structure with electromagnetic shielding, characterized in that: include: A redistribution layer, wherein the front side of the redistribution layer has a shielding layer connection port; One or more first chips, wherein the one or more first chips are arranged on a front side of the redistribution layer; A plastic sealing layer, which plastic seals the front surface of the multiple wiring layer and the one or more first chips, and exposes the shielding layer connection port; One or more second chips, wherein the one or more second chips are arranged on the back side of the redistribution layer; The shielding layer covers the plastic sealing layer and the shielding layer connection port.

6. The packaging structure with electromagnetic shielding as claimed in claim 5, characterized in that: The redistribution layer includes a plurality of dielectric layers and a metal wiring layer; wherein a plurality of dielectric layers are formed on the temporary carrier by a chemical vapor deposition process or a physical vapor deposition process, and patterned; The metal wiring layer is formed on the surface of the dielectric layer by sputtering, physical vapor deposition, chemical vapor deposition, evaporation, electroplating or chemical plating, and the metal layer is etched.

7. The packaging structure with electromagnetic shielding according to claim 5, characterized in that: The shielding layer is a metal layer deposited on the connection between the plastic packaging layer and the shielding layer by sputtering or electroplating process.

8. The packaging structure with electromagnetic shielding according to claim 5, characterized in that: The shielding layer is made of copper.

9. The packaging structure with electromagnetic shielding according to claim 5, characterized in that: The second chips are all subjected to underfill processing to form an underfill layer; The material of the bottom filling layer includes a composite resin material.

10. The packaging structure with electromagnetic shielding according to claim 5, characterized in that: The first chip includes: a radio frequency chip, a filter, a power amplifier, a low-power transmission module, and a baseband chip; The second chip includes: passive components, passive chips, active chips, storage modules, and logic chips.

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