Driving signal conditioning circuit for use of multiple parallel MOSFETs

Abstract

The invention provides a driving signal conditioning circuit for multi-parallel use of MOSFETs, and belongs to the technical field of power electronics. According to the invention, multi-path current detection is adopted to monitor the current of each MOSFET in real time, and the phase difference is calculated; the phase of the synchronous signal is adjusted by tracking the PWM frequency through the PLL, and a phase compensation signal is output to control an MOSFET switch; and meanwhile, the phase offset is dynamically adjusted by adopting PID closed-loop control, so that the switching synchronization is ensured. Compared with a traditional scheme that the current sharing effect is poor due to device difference and circuit stray, the current sharing problem of the multi-tube parallel MOSFET is solved, accurate synchronization of MOSFET switches is achieved, and current unevenness is reduced; current sharing is achieved through dynamic phase compensation, and the risk of single-tube overcurrent is reduced; accurate resistor matching is not needed, and flexibility is higher; pID closed-loop control adapts to various working conditions, long-term stable current sharing is guaranteed, and efficiency and reliability are improved. The invention is suitable for high-power applications such as a switching power supply.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a driving signal conditioning circuit for using multiple MOSFETs in parallel. Background Art

[0002] In the field of power electronics, in order to meet the growing power demand, multi-transistor parallel MOSFET has become a common solution. Although MOSFET itself has a positive temperature coefficient characteristic, it can achieve automatic current balance to a certain extent and achieve stable operation through thermal balance, but with the increase in the number of parallel connections, the current sharing problem becomes particularly prominent due to the topology of the drive circuit, power circuit and the influence of line stray sense. These factors will cause the conduction time and switching speed of each branch MOSFET to be inconsistent, resulting in serious current imbalance, threatening the reliability and performance of the system.

[0003] At present, most manufacturers use gate current-sharing resistors to achieve current balancing of parallel MOSFETs. This method uses a negative feedback mechanism to slow down the turn-on speed of the MOSFET that is turned on first and accelerate the turn-on of the MOSFET that is turned on later, which can improve the current-sharing problem caused by MOSFET parameter differences to a certain extent. However, this method has obvious limitations. For example, it is difficult to select the resistance value of the gate current-sharing resistor to take into account the consistency of different MOSFETs. For MOSFETs of different batches or models, it is difficult to ensure consistent current-sharing effects during mass production.

[0004] These shortcomings make traditional current sharing technology unable to meet the needs of high-power and high-reliability applications, so a more effective and flexible current sharing solution is needed. Summary of the invention

[0005] The invention overcomes the shortcomings of the prior art and provides a driving signal conditioning circuit for using multiple MOSFETs in parallel.

[0006] To achieve the above object, the technical solution adopted by the present invention is: a MOSFET multiple parallel use drive signal conditioning circuit, comprising:

[0007] PWM signal source, the PWM signal source is a microcontroller or other integrated circuit with PWM output function, which can provide a PWM signal with a resolution of not less than 12 bits, configurable duty cycle, frequency and dead time;

[0008] A processing circuit is connected to the PWM signal source, and is used to receive the PWM signal and generate a driving signal with phase compensation to control the switching actions of a plurality of parallel MOSFETs; the processing circuit includes a processor and a PLL circuit;

[0009] A plurality of detection circuits, each detection circuit is used to monitor the current of the MOSFET on the corresponding parallel circuit, and convert the voltage signal representing the current magnitude into a pulse voltage signal, and output it to the processing circuit, the rising edge or falling edge of the pulse voltage signal represents the turn-on or turn-off moment of the corresponding MOSFET;

[0010] The processor is used to receive pulse voltage signals from a plurality of detection circuits, calculate the delay difference of each MOSFET relative to an ideal synchronous state by detecting the relative time of the rising edge or falling edge of each pulse voltage signal relative to a reference signal, and calculate the phase difference of each MOSFET based on the delay difference;

[0011] The PLL circuit is used to track and lock the frequency of the PWM signal source, generate a reference signal with the same frequency as the PWM signal, and adjust the phase of the reference signal according to the received phase difference information to generate a signal with phase compensation; the signal with phase compensation is used as the driving signal of the MOSFET.

[0012] In a preferred embodiment of the present invention, the output end of the PWM signal source is connected to the PWM signal input end of the processing circuit through a wire or a connector, using an impedance matching method with a characteristic impedance of 45-55 ohms.

[0013] In a preferred embodiment of the present invention, the drive signal output end of the processing circuit is connected to the gates of several parallel MOSFETs through a wire or a PCB trace, using a low-impedance trace with a trace impedance of less than 10 ohms.

[0014] In a preferred embodiment of the present invention, the current sensor in each detection circuit is connected in series to the source current path of a parallel circuit among several parallel MOSFETs, and the output end of the detection circuit is connected to the pulse voltage signal input end of the processor through a wire or a PCB trace.

[0015] In a preferred embodiment of the present invention, the sources of the parallel MOSFET circuits are connected to each other through a miscellaneous inductance element, which is an inductor with an inductance value between 1nH and 100nH, and is connected between the sources of the MOSFETs through a wire or a PCB trace.

[0016] In a preferred embodiment of the present invention, the processor also includes a PID controller for dynamically calculating and adjusting the compensation phase amount according to the phase difference, and outputting the adjusted phase offset to the PLL circuit. The PID controller communicates data with the PLL circuit through a data channel inside the processor.

[0017] In a preferred embodiment of the present invention, the PID controller is used to adjust the phase offset of the compensation signal so that the switching moments of all MOSFETs are close to an ideal synchronous state.

[0018] In a preferred embodiment of the present invention, the PWM signal source outputs a plurality of PWM signals, each PWM signal is connected to a different PWM signal input pin of the processor via a wire or a connector, and corresponds to controlling a different parallel MOSFET circuit.

[0019] In a preferred embodiment of the present invention, the detection circuit includes a current sensor for converting a current signal into a voltage signal, and a signal conversion circuit for converting a voltage signal into a pulse voltage signal; the current sensor is a resistor or a current transformer with an accuracy higher than 0.5%; the signal conversion circuit is used to convert a voltage signal representing the current magnitude into a pulse voltage signal, and the rising edge / falling edge of the pulse voltage signal represents the on / off moment of the MOSFET.

[0020] In a preferred embodiment of the present invention, the current sensor is a precision resistor with a low resistance value, the resistor is connected in series with the source of the corresponding MOSFET, and the signal conversion circuit is connected to both ends of the resistor through a wire or a PCB trace.

[0021] The present invention solves the defects existing in the background technology and has the following beneficial effects:

[0022] (1) The present invention adopts dynamic phase compensation technology based on multi-channel current detection and PID closed-loop control algorithm, and calculates the phase deviation of each MOSFET relative to the ideal synchronization state by real-time monitoring of the current information of each MOSFET. Based on this, the phase of the driving signal of each MOSFET is dynamically adjusted, so that the switching moment of all MOSFETs is as close to the ideal synchronization state as possible. At the same time, the phase compensation amount is dynamically adjusted and optimized by the PID controller to ensure that the compensation signal output time is consistent and the output current is synchronized, thereby fundamentally solving the problem of output current equalization of parallel MOSFETs.

[0023] (2) The present invention uses two current detection circuits to monitor the current of each parallel MOSFET in real time. The processor calculates the phase difference of each MOSFET based on the detected current information, and realizes the phase adjustment of the drive signal through the PLL circuit. The traditional multi-tube parallel current sharing method usually adopts open-loop methods such as current sharing resistors, which is difficult to deal with the influence of MOSFET parameter differences and line strays, and cannot achieve dynamic adjustment. The present invention can accurately control the switching time of each MOSFET through closed-loop control and dynamic adjustment. Compared with the traditional method of using current sharing resistors, the present invention does not need to accurately select and match resistors, avoids the problem of poor current sharing effect caused by resistor accuracy error, and solves the problem of large differences in current sharing effect of MOSFETs of different batches or models in mass production. The present invention can still ensure the synchronous switching of MOSFET under dynamic load conditions, thereby reducing switching losses, improving circuit efficiency, and significantly improving the reliability and stability of the system.

[0024] (3) The present invention utilizes a PID controller to dynamically adjust the compensation phase amount according to the calculated phase difference, and outputs the phase offset to the PLL circuit to achieve real-time phase compensation of the drive signal. Due to the differences in the parameters of the MOSFET itself, as well as the differences in the drive circuit and the power circuit, the switching times of each MOSFET are inconsistent, which in turn affects the current distribution of the parallel MOSFET. The present invention achieves dynamic adjustment of the drive signal through PID control, overcomes the influence of these differences, and thus achieves uniform distribution of current in each branch. Compared with the traditional passive current balancing scheme that relies on current balancing resistors, the dynamic current balancing scheme provided by the present invention can adaptively adjust the drive signal of each MOSFET, thereby maintaining a good current balancing effect under various working conditions, and is more applicable. By reducing the current imbalance between MOSFETs, the present invention can improve the overall performance and long-term stability of the parallel circuit, reduce the temperature and loss of the MOSFET, thereby extending the service life of the MOSFET, and improving the power conversion efficiency.

[0025] (4) The present invention detects the MOSFET current in real time and calculates the phase difference, and based on this, uses a PID controller to dynamically adjust the phase compensation amount. The present invention can adjust the switching moment of the MOSFET to a state close to the ideal synchronization state, thereby achieving coordinated switching actions of each MOSFET, thereby reducing transient current imbalance caused by switching time differences. On this basis, the output current is evenly distributed by dynamically adjusting the phase of the drive signal, so that the present invention can not only efficiently control the switching moment of the MOSFET, but also ensure the even distribution of the current of each branch, solve the problem of current sharing of multiple tubes in parallel, and significantly improve the reliability and efficiency of the entire circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 The present invention is a schematic diagram of a structure of a driving signal conditioning circuit for using multiple MOSFETs in parallel. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the specific embodiments disclosed below.

[0030] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the scope of protection of the present application. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the invention, unless otherwise specified, "multiple" means two or more.

[0031] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood by specific circumstances.

[0032] like Figure 1 As shown, this embodiment provides a driving signal conditioning circuit for multiple MOSFETs connected in parallel, including:

[0033] PWM signal source, the PWM signal source is a microcontroller or other integrated circuit with PWM output function, which can provide a PWM signal with a resolution of not less than 12 bits, configurable duty cycle, frequency and dead time;

[0034] A processing circuit is connected to the PWM signal source, and is used to receive the PWM signal and generate a driving signal with phase compensation to control the switching action of two parallel MOSFETs; the processing circuit includes a processor and a phase adjustment circuit;

[0035] Two detection circuits, each detection circuit is used to monitor the current of the MOSFET on the corresponding parallel circuit, and convert the voltage signal representing the current magnitude into a pulse voltage signal, and output it to the processing circuit. The rising edge / falling edge of the pulse voltage signal represents the turn-on / turn-off moment of the corresponding MOSFET;

[0036] The processor is used to receive the pulse voltage signals from the two detection circuits, calculate the delay difference of each MOSFET relative to the ideal synchronization state by detecting the relative time of the rising edge / falling edge of each pulse voltage signal relative to the reference signal, and calculate the phase difference of each MOSFET based on the delay difference;

[0037] The phase adjustment circuit is used to track and lock the frequency of the PWM signal source, generate a reference signal with the same frequency as the PWM signal, and adjust the phase of the reference signal according to the received phase difference information to generate a signal with phase compensation; the signal with phase compensation is used as the driving signal of the MOSFET.

[0038] Among them, the phase adjustment circuit is a PLL circuit. The PLL circuit (phase-locked loop circuit) is used to track and lock the frequency from the PWM signal source and generate a reference signal with the same frequency as the original PWM signal. This reference signal is then adjusted according to the phase difference information calculated by the processor to generate a drive signal with phase compensation. The specific process is as follows:

[0039] The PLL circuit first receives the input signal from the PWM signal source, and synchronizes its output frequency with the frequency of the PWM signal source through components such as the internal phase detector and voltage-controlled oscillator (VCO);

[0040] The phase detector in the PLL circuit compares the phase of the input PWM signal with the phase of the signal generated by the PLL itself. Any difference in phase will be converted into an error voltage;

[0041] After the processor calculates the phase difference of each MOSFET relative to the ideal synchronous state, it transmits the phase difference information to the PLL circuit; the phase adjustment module in the PLL circuit adjusts the phase of the reference signal it generates according to the received phase difference information, thereby changing the phase of the output signal;

[0042] The phase-adjusted signals are then processed by the drive circuit to generate the final drive signals; these drive signals will have the same frequency as the original PWM signal, but different phases to compensate for the phase difference caused by the time delay between the MOSFETs.

[0043] The PWM signal source uses an integrated circuit such as a microcontroller, which can generate a high-precision PWM signal (resolution not less than 12 bits). This signal serves as the clock reference for the entire system, and the configurable duty cycle and frequency meet different application requirements. The setting of the dead time effectively prevents the bridge arm MOSFET from being directly connected. The processing circuit receives the PWM signal, dynamically adjusts the phase of the drive signal according to the current detection feedback, and realizes current sharing through closed-loop control. The processor uses a digital signal processor (DSP) or a microcontroller (MCU) to perform phase difference calculation and PID control algorithm. The PLL circuit uses phase-locked loop technology to track the PWM signal frequency and generate a synchronization signal, and adjusts the phase of the synchronization signal according to the phase difference information. The two detection circuits use a precision resistor or current transformer connected in series to the source of the MOSFET to convert the MOSFET current into a pulse voltage signal, whose rising edge or falling edge represents the on / off moment of the MOSFET. In addition, the processing circuit also includes a drive circuit for amplifying the phase-adjustable signal output by the PLL circuit to the voltage and current required for the MOSFET gate drive.

[0044] It should be noted that in the MOSFET multi-parallel drive circuit, the ideal synchronization state is the state in which all parallel MOSFETs complete the switching action at the same time. The PLL circuit generates a reference signal with the same frequency as the PWM signal according to the input PWM signal. The reference signal does not come from the switching action of any single MOSFET, but serves as a reference for the synchronous switching action of all MOSFETs. The processor calculates the phase deviation of each MOSFET by measuring the time difference between the actual switching action time of each MOSFET and the reference signal. Finally, the phase adjustment circuit adjusts the phase of the drive signal according to these deviations, striving to synchronize the switching action of all MOSFETs with the reference signal, thereby achieving the balance of the parallel MOSFET current.

[0045] Furthermore, the output end of the PWM signal source is connected to the PWM signal input end of the processing circuit through a wire or a connector, using an impedance matching method with a characteristic impedance of 45-55 ohms. Impedance matching uses a connection method with a characteristic impedance of 45-55 ohms, which can reduce signal reflection and ensure that the PWM signal is transmitted to the input end of the processing circuit with low distortion, thereby ensuring that the processing circuit accurately recognizes and processes the PWM signal. Impedance matching improves the efficiency and reliability of signal transmission.

[0046] Furthermore, the drive signal output end of the processing circuit is connected to the gates of the two parallel MOSFETs through a wire or PCB routing, using a low-impedance routing method with a routing impedance of less than 10 ohms. Low-impedance routing (routing impedance less than 10 ohms) can effectively reduce the loss of the drive signal during transmission and reduce signal distortion. At the same time, reducing impedance also improves the driving capability, ensuring that the MOSFET gate can obtain sufficient charging and discharging current, thereby achieving fast switching operation and reducing switching losses.

[0047] Furthermore, the current sensor in each detection circuit is connected in series to the source current path of one of the two parallel MOSFETs, and the output of the detection circuit is connected to the pulse voltage signal input of the processor through a wire or a PCB trace. Connecting the current sensor in series to the MOSFET source ensures that the current flowing through the MOSFET can be accurately measured. The output of the current sensor is connected to the processor through a wire or a PCB trace, and the detected current information is transmitted to the processor in the form of a pulse voltage. The processor can calculate the switching moment of the MOSFET through the rising edge or falling edge of the pulse, and can reflect the current size through the amplitude of the pulse.

[0048] Furthermore, the sources of the parallel MOSFET circuits are connected to each other through a stray inductance element, which is an inductance with an inductance value between 1nH and 100nH, and is connected between the sources of the MOSFETs through a wire or a PCB trace. Stray inductance elements (inductance with an inductance value between 1nH and 100nH) are added between the sources of the parallel MOSFETs, and the characteristic of the inductance hindering the rapid change of current is utilized to reduce the current imbalance caused by parasitic inductance. The stray inductance element is connected between the sources of the MOSFETs through a wire or a PCB trace to achieve impedance adjustment of the parallel branches, thereby improving current sharing.

[0049] Furthermore, the processor also includes a PID controller, which is used to dynamically calculate and adjust the compensation phase amount according to the phase difference, and output the adjusted phase offset to the PLL circuit. The PID controller communicates data with the PLL circuit through the data channel inside the processor. The PID controller dynamically calculates and adjusts the compensation phase amount according to the phase difference. It calculates the appropriate phase compensation amount by comprehensively considering the current phase difference, accumulated error and the rate of change of the phase difference through three links: proportional, integral and differential. The PID controller communicates data with the PLL circuit through the data channel inside the processor, and outputs the calculated phase offset to the PLL circuit to achieve closed-loop control.

[0050] Furthermore, the PID controller is used to adjust the phase offset of the compensation signal so that the switching moments of all MOSFETs are close to the ideal synchronous state. The PID controller adjusts the phase offset of the compensation signal to make the switching moments of all parallel MOSFETs as close to the ideal synchronous state as possible, thereby achieving balanced current distribution of parallel MOSFETs and improving the performance of the entire circuit. PID control ensures that the switching action of the MOSFET has good consistency, thereby reducing losses and improving efficiency.

[0051] Furthermore, the PWM signal source outputs two PWM signals, each PWM signal is connected to a different PWM signal input pin of the processor through a wire or a connector, and controls different parallel MOSFET circuits respectively. The PWM signal source outputs two PWM signals, so that the system can support independent control of multiple groups of parallel MOSFETs, providing higher flexibility and scalability. Each PWM signal is connected to a different PWM signal input pin of the processor through a wire or a connector, and can control different parallel MOSFET circuits respectively, reducing the complexity of control.

[0052] Furthermore, the detection circuit includes a current sensor for converting a current signal into a voltage signal, and a signal conversion circuit for converting a voltage signal into a pulse voltage signal; the current sensor is a resistor or a current transformer with an accuracy higher than 0.5%; the signal conversion circuit is used to convert a voltage signal representing the current magnitude into a pulse voltage signal, and the rising edge / falling edge of the pulse voltage signal represents the on / off moment of the MOSFET. The current sensor (resistor or current transformer with an accuracy higher than 0.5%) is responsible for converting the MOSFET current into a measurable voltage signal. The signal conversion circuit converts the voltage signal output by the sensor into a pulse signal, and the rising edge or falling edge of the pulse signal accurately represents the on or off moment of the MOSFET, and the amplitude of the pulse reflects the magnitude of the current, providing key feedback information for the processor.

[0053] Furthermore, the current sensor is a precision resistor with low resistance, the resistor is connected in series with the source of the corresponding MOSFET, and the signal conversion circuit is connected to both ends of the resistor through a wire or a PCB trace. The use of a precision resistor with low resistance as a current sensor is to reduce the loss introduced by the resistor itself and to ensure the accuracy of current detection. The precision resistor is connected in series with the source of the MOSFET to ensure the accuracy of current measurement. The signal conversion circuit is connected to both ends of the resistor through a wire or a PCB trace, and is used to obtain the voltage signal at both ends of the resistor and convert it into a pulse voltage signal.

[0054] When N MOSFETs are connected in parallel in the circuit, they are denoted as M1, M2, ..., M N The pulse voltage signal represented by the current waveform of each MOSFET is v PWM,i(t) , where i = 1, 2, ..., N represents the i-th MOSFET. The delay time of the i-th MOSFET relative to the ideal synchronous state is Δt i , if a MOSFET responds slowly, then Δt i Greater than 0; if a MOSFET responds faster, then Δt i Less than 0.

[0055] In order to make the switching behavior of all MOSFETs more synchronous, the processor uses the delay difference Δt i , calculate the phase difference of each MOSFET gate drive signal Use the formula Where Δt i is the delay time of the i-th MOSFET relative to the ideal synchronous state, and T is the PWM period. Converting the delay difference in the time domain into the phase difference in the phase domain makes the subsequent phase compensation more intuitive and accurate. The phase difference information is used as the input of the PID controller to calculate the corresponding phase compensation amount.

[0056] Furthermore, the PID controller is used to calculate the phase adjustment amount, using the formula Among them, Δφ i (k) is the phase adjustment amount of the i-th MOSFET at the k-th sampling moment; K P is the proportional gain, which is used to control the influence of the current error; K i is the integral gain, used to eliminate the cumulative error; K d is the differential gain, which is used to suppress the rate of change of the error. Adjust the phase according to the current delay difference to ensure fast response; Accumulate the past delay difference, eliminate the accumulated error, and ensure long-term stability; through the differential term Adjust according to the rate of change of the delay difference to suppress rapid changes. Rapid response is achieved through the proportional term, steady-state error is eliminated through the integral term, overshoot and oscillation are suppressed through the differential term, and precise phase control is finally achieved. Through the dynamic adjustment of the PID algorithm, it can adapt to various working conditions and ensure the stability and reliability of current sharing.

[0058] By using PID control and dynamically adjusting the phase offset of the compensation signal, the switching time of all parallel MOSFETs can be made as close to the ideal synchronization state as possible, thereby achieving uniform current distribution of parallel MOSFETs and improving the overall performance of the circuit. PID control ensures that the output time of the compensation signal is consistent, thereby further realizing dynamic adjustment and optimization of the phase compensation amount to ensure the synchronization of all MOSFETs. Through the dynamic adjustment and optimization of PID control, the system can quickly respond to load changes, maintain good current sharing characteristics, reduce MOSFET switching losses, and improve system reliability and efficiency.

[0059] The above is based on the ideal embodiment of the present invention. Through the above description, relevant personnel can make various changes and modifications without departing from the technical concept of the present invention. The technical scope of the present invention is not limited to the content in the specification, and the technical scope must be determined according to the scope of the claims.

Claims

1. A driving signal conditioning circuit for multiple MOSFETs in parallel, characterized in that: include: A PWM signal source, used for providing an adjustable PWM signal; A processing circuit connected to the PWM signal source, used to receive the PWM signal and generate a driving signal with phase compensation to control the switching actions of a plurality of parallel MOSFETs; the processing circuit includes a processor and a phase adjustment circuit; A plurality of detection circuits, each detection circuit is used to monitor the current of the MOSFET on the corresponding parallel circuit, and convert the current information into a pulse signal for indicating the switching moment, and output it to the processing circuit; The processor is used to receive the pulse signals of the plurality of detection circuits, determine the delay difference of each MOSFET relative to the synchronous state based on the pulse signals, and calculate the phase difference; The phase adjustment circuit is used to generate a signal with phase compensation according to the phase difference information as a driving signal of the MOSFET.

2. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The output end of the PWM signal source is connected to the PWM signal input end of the processing circuit through a wire or a connector, using an impedance matching method with a characteristic impedance of 45-55 ohms.

3. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The driving signal output end of the processing circuit is connected to the gates of the plurality of parallel MOSFETs through a wire or a PCB routing, using a low-impedance routing method with a routing impedance lower than 10 ohms.

4. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The current sensor in each detection circuit is connected in series to the source current path of a parallel circuit of the plurality of parallel MOSFETs, and the output end of the detection circuit is connected to the pulse voltage signal input end of the processor through a wire or a PCB trace.

5. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The sources of the parallel MOSFET circuits are connected to each other through a miscellaneous inductance element. The miscellaneous inductance element is an inductance with an inductance value between 1nH and 100nH, and is connected between the sources of the MOSFETs through a wire or a PCB trace.

6. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The processor also includes a PID controller for dynamically calculating and adjusting the compensation phase amount according to the phase difference, and outputting the adjusted phase offset to the phase adjustment circuit. The PID controller communicates data with the phase adjustment circuit through a data channel inside the processor.

7. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 6, characterized in that: The PID controller is used to adjust the phase offset of the compensation signal so that the switching moments of all MOSFETs are close to an ideal synchronous state.

8. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The PWM signal source outputs a plurality of PWM signals, each of which is connected to a different PWM signal input pin of the processor via a wire or a connector, and corresponds to controlling a different parallel MOSFET circuit.

9. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 1, characterized in that: The detection circuit includes a current sensor for converting a current signal into a voltage signal, and a signal conversion circuit for converting the voltage signal into a pulse voltage signal; the current sensor is a resistor or a current transformer with an accuracy higher than 0.5%; the signal conversion circuit is used to convert a voltage signal representing the current magnitude into a pulse voltage signal, and the rising edge / falling edge of the pulse voltage signal represents the on / off moment of the MOSFET.

10. The MOSFET multiple parallel use driving signal conditioning circuit according to claim 9, characterized in that: The current sensor is a precision resistor with low resistance, the resistor is connected in series with the source of the corresponding MOSFET, and the signal conversion circuit is connected to both ends of the resistor through a wire or a PCB trace.

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