Unblocking method and device of pulse width modulation wave, unblocking equipment and storage medium

Abstract

The invention provides a pulse width modulation wave deblocking method and device, deblocking equipment and a storage medium, and the method comprises the steps: obtaining the initial chip information of a plurality of cores, and determining the target chip information according to the initial chip information of the plurality of cores; according to the target chip information, determining whether to deblock the pulse width modulation wave; when the deblocking pulse width modulation wave is determined, the deblocking pulse width modulation wave and multiple cores do not need to perform inter-core communication, and only the initial chip information needs to be provided for the deblocking equipment; the deblocking device receives the initial chip information of the plurality of cores and determines whether to deblock the pulse width modulation wave according to the initial chip information of the plurality of cores, so that inter-core communication required for transmitting the chip information among the plurality of cores is avoided, the business volume of the inter-core communication is reduced, the load of the cores is reduced, each core can more quickly provide the initial chip information to the deblocking device, and the deblocking efficiency is improved. Therefore, the deblocking device can quickly determine whether to deblock the pulse width modulation wave according to the initial chip information provided by each core, and the deblocking real-time performance of the pulse width modulation wave is improved.

Description

Technical Field

[0001] The present invention relates to the field of pulse width modulation technology, and in particular to a method, device, unpacking equipment and storage medium for unpacking a pulse width modulation wave. Background Art

[0002] At present, to unseal a pulse-width modulation (PWM) wave, multiple cores mainly send chip information to the only core with unseal authority through inter-core communication. The core with unseal authority determines whether to unseal the PWM wave according to the chip information.

[0003] However, with the increase in the number of multi-cores and the amount of core business, the inter-core communication between the core with the unblocking authority and other cores becomes increasingly complex. The load of the core with the unblocking authority is large, and the inter-core communication time is long, resulting in a long unblocking time for the PWM wave and poor real-time unblocking of the PWM wave. Therefore, how to improve the real-time unblocking of the PWM wave is an urgent problem to be solved. Summary of the invention

[0004] The present invention provides a pulse width modulation wave unsealing method, device, unsealing equipment and storage medium, which can solve the problem of poor real-time unsealing of PWM waves.

[0005] According to a first aspect of the present invention, a method for unpacking a pulse width modulation wave is provided, the method being applied to an unpacking device, the method comprising:

[0006] Receive initial chip information of multiple cores;

[0007] Determining target chip information according to the initial chip information of the plurality of cores;

[0008] Determining whether to unblock the pulse width modulation wave according to the target chip information;

[0009] When it is determined to unblock the pulse width modulation wave, unblock the pulse width modulation wave;

[0010] When it is determined not to unpack the pulse width modulation wave, a step of receiving initial chip information of a plurality of cores is triggered.

[0011] According to a second aspect of the present invention, there is provided a pulse width modulation wave unpacking device, the device being configured in an unpacking device, the device comprising:

[0012] An information receiving module, used for receiving initial chip information of multiple cores;

[0013] An information determination module, configured to determine target chip information according to the initial chip information of the plurality of cores;

[0014] A judgment module, used for determining whether to unblock the pulse width modulation wave according to the target chip information;

[0015] A wave unsealing module, used for unsealing the pulse width modulation wave when it is determined to unseale the pulse width modulation wave;

[0016] The trigger module is used to trigger the step of receiving initial chip information of multiple cores when it is determined that the pulse width modulation wave is not to be unsealed.

[0017] According to a third aspect of the present invention, there is provided a deblocking device, comprising a processor and a memory.

[0018] The memory is used to store codes and related data;

[0019] The processor is used to execute the code in the memory to implement the pulse width modulation wave unpacking method as described in any one of the embodiments of the present invention.

[0020] According to a fourth aspect of the present invention, there is provided a storage medium storing a computer program, which, when executed by a processor, implements a method for unpacking a pulse width modulation wave as described in any one of the embodiments of the present invention.

[0021] In an embodiment of the present invention, initial chip information of multiple cores is obtained, target chip information is determined according to the initial chip information of the multiple cores; whether to unblock the pulse width modulated wave is determined according to the target chip information; when it is determined to unblock the pulse width modulated wave, the pulse width modulated wave is unblocked. The unblocking method of the pulse width modulated wave provided by the present invention is applied to an unblocking device, and there is no need for inter-core communication between multiple cores. Each core only needs to provide initial chip information to the unblocking device, and then the unblocking device receives the initial chip information of multiple cores, determines the target chip information according to the initial chip information of multiple cores, determines whether to unblock the pulse width modulated wave according to the target chip information, and when it is determined to unblock the pulse width modulated wave, the unblocking device unblocks the pulse width modulated wave, thereby avoiding the inter-core communication required for transmitting chip information between multiple cores, reducing the traffic volume of inter-core communication, reducing the load of the core, and each core can provide the initial chip information to the unblocking device more quickly, thereby improving the speed of providing the initial chip information of each core, and then the unblocking device can also determine whether to unblock the pulse width modulated wave more quickly according to the initial chip information provided by each core, thereby reducing the unblocking time of the pulse width modulated wave, and improving the real-time unblocking of the pulse width modulated wave. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 It is a flow chart of a method for unpacking a pulse width modulation wave provided by an embodiment of the present invention;

[0024] Figure 2 is another flow chart of the method for unpacking a pulse width modulation wave provided by an embodiment of the present invention;

[0025] Figure 3 It is a structural schematic diagram of a pulse width modulation wave unpacking device provided by an embodiment of the present invention;

[0026] Figure 4 It is a schematic diagram of the structure of the deblocking device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0029] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0030] Figure 1 The present invention provides a flow chart of a pulse width modulation wave unpacking method. The method can be performed by a pulse width modulation wave unpacking device, which can be implemented in software and / or hardware. In a specific embodiment, the device can be integrated in an unpacking device, which can be, for example, an electronic device including a configurable logic block (CLB), a pulse width modulator, etc. The following embodiments will be described by taking the device integrated in the unpacking device as an example. Figure 1 , the method may specifically include the following steps:

[0031] Step 101, receiving initial chip information of multiple cores.

[0032] The initial chip information can be understood as the status information of the chip.

[0033] For example, when the unpacking device is a pulse width modulator, the multiple cores may provide their own initial chip information to the pulse width modulator, and then the pulse width modulator receives the initial chip information of the multiple cores.

[0034] Step 102, determining target chip information according to initial chip information of multiple cores.

[0035] The target chip information may be understood as the chip information of the core used to determine whether to unblock the PWM wave.

[0036] When determining whether to unblock the PWM wave, it is not determined based on the initial chip information of all cores, but only based on the chip information of the core used to determine whether to unblock the PWM wave. Therefore, in an optional implementation, the target core identifier can be determined based on the core identifier and the preset core identifier, and then the initial chip information carrying the target core identifier in the initial chip information of multiple cores is determined as the target chip information. Among them, the target core identifier can be understood as the identifier of the core corresponding to the chip information used to determine whether to unblock the PWM wave. The preset core identifier can be understood as the identifier of the core corresponding to the preset chip information for determining whether to unblock the PWM wave; in an embodiment of the present invention, the preset core identifier can be stored in the unblocking device in advance, and then when determining whether to unblock the PWM wave, the unblocking device determines the target chip information according to the core identifier and the preset core identifier, and determines whether to unblock the pulse width modulation wave according to the target chip information. There is no need for the core to determine the target chip information according to the core identifier and the preset core identifier, and determine whether to unblock the pulse width modulation wave according to the target chip information, thereby avoiding inter-core communication between multiple cores, reducing the traffic volume of inter-core communication, and reducing the load of the core. Each core can provide the initial chip information to the unblocking device more quickly, thereby improving the speed of providing the initial chip information of each core, and then the unblocking device can also determine whether to unblock the pulse width modulation wave more quickly according to the initial chip information provided by each core, thereby reducing the unblocking time of the pulse width modulation wave and improving the real-time unblocking of the pulse width modulation wave.

[0037] Specifically, the nuclear identifier is matched with the preset nuclear identifier to obtain an identifier matching result; when the identifier matching result is a successful match, the nuclear identifier that successfully matches the preset nuclear identifier is determined as the target nuclear identifier.

[0038] For example, the initial chip information S sent by core A is received. A 1. Initial chip information S sent by core B B 2 and the initial chip information S sent by core C C 3; S A 1 The nuclear identifier carried is A, S B1 The nuclear identifier carried is B, S C 1 carries a core identifier C. The preset core identifiers include A. The core identifiers (A, B, C) and the preset core identifier (A) can be matched, and the identification matching result is a successful match; when the identification matching result is a successful match, the core identifier (A) that successfully matches the preset core identifier is determined as the target core identifier (A). Finally, the initial chip information (S) carrying the target core identifier in the initial chip information of multiple cores is A 1), determine the target chip information.

[0039] Step 103, determine whether to unblock the pulse width modulation wave according to the target chip information, if so, execute step 104, if not, return to execute step 101.

[0040] The target chip information may include multiple chip status values, and the multiple chip status values ​​may be understood as parameters of multiple chips.

[0041] In an optional implementation, whether to unblock the pulse width modulation wave can be determined based on multiple chip status values ​​and preset value intervals corresponding to each chip status value. In this way, the unblocking device can determine whether to unblock the pulse width modulation wave more quickly based on multiple chip status values ​​and preset value intervals corresponding to each chip status value, thereby reducing the unblocking time of the PWM wave and improving the real-time unblocking of the PWM wave.

[0042] If the PWM wave is to be unpacked, each state value of the chip needs to belong to the corresponding value interval. Therefore, specifically, it can be determined whether multiple chip state values ​​belong to the corresponding preset value interval; when it is determined that multiple chip state values ​​all belong to the corresponding preset value interval, the pulse width modulation wave is unpacked. When it is determined that any chip state value does not belong to the corresponding preset value interval, the step of receiving the initial chip information of multiple cores is triggered.

[0043] For example, the target chip information (S A1) The multiple chip status values ​​included are: M1, M2 and M3; the preset value interval corresponding to M1 is [D11, D12], the preset value interval corresponding to M2 is [D21, D22], and the preset value interval corresponding to M3 is [D31, D32]. M1 can be compared with the left endpoint D11 and the right endpoint D12 of the preset numerical interval [D11, D12]. When D11≤M1≤D12, it is determined that M1 belongs to the corresponding preset numerical interval [D11, D12]. M2 can be compared with the left endpoint D21 and the right endpoint D22 of the preset numerical interval [D21, D22]. When D21≤M2≤D22, it is determined that M2 belongs to the corresponding preset numerical interval [D21, D22]. M3 can be compared with the left endpoint D31 and the right endpoint D32 of the preset numerical interval [D31, D32]. When D31≤M3≤D32, it is determined that M3 belongs to the corresponding preset numerical interval [D31, D32]. When M1, M2, and M3 all belong to the corresponding preset numerical interval, it is determined that multiple chip state values ​​all belong to the corresponding preset numerical interval, and the pulse width modulation wave is unsealed.

[0044] Step 104, unpacking the pulse width modulation wave.

[0045] In the embodiment of the present invention, there is no need for inter-core communication between multiple cores. Each core only needs to provide initial chip information to the unsealing device, and then the unsealing device receives the initial chip information of multiple cores, determines the target chip information according to the initial chip information of the multiple cores, and determines whether to unseale the pulse width modulated wave according to the target chip information. When determining to unseale the pulse width modulated wave, the unsealing device unseales the pulse width modulated wave, thereby avoiding the inter-core communication required for transmitting chip information between multiple cores, reducing the traffic volume of inter-core communication, and reducing the load of the core. Each core can provide the initial chip information to the unsealing device more quickly, thereby improving the speed of providing the initial chip information of each core. Furthermore, the unsealing device can also determine whether to unseale the pulse width modulated wave more quickly according to the initial chip information provided by each core, thereby reducing the unsealing time of the pulse width modulated wave and improving the real-time unsealing of the pulse width modulated wave.

[0046] In some embodiments, after the pulse width modulation wave is unsealed, an unsealing log can be generated and sent to the user end, so that the technician can determine whether the PWM wave is unsealed successfully based on the unsealing log. If the unsealing of the PWM wave fails, the technician can determine the reason for the failure to unseale the PWM wave based on the unsealing log, so that the technician can manually intervene in the unsealing of the PWM wave in time, thereby increasing the flexibility of the unsealing method of the PWM wave.

[0047] The following further describes the method for unpacking a pulse width modulation wave provided by an embodiment of the present invention. Figure 2 As shown, Figure 2 FIG. 4 is another flow chart of the method for unpacking a pulse width modulation wave provided by an embodiment of the present invention, which may specifically include the following steps:

[0048] Step 201, receiving initial chip information of multiple cores.

[0049] Step 202, determining a target nuclear identifier according to the nuclear identifier and a preset nuclear identifier.

[0050] Step 203 : determining the initial chip information carrying the target core identifier in the initial chip information of the multiple cores as the target chip information.

[0051] Step 204 , determining whether the plurality of chip status values ​​belong to the corresponding preset value interval, if so, executing step 205 ; if not, returning to executing step 201 .

[0052] Among them, the multiple chip state values ​​may include but are not limited to temperature values, voltage values ​​and current values, and the preset value intervals may include but are not limited to temperature value intervals corresponding to the temperature values, voltage value intervals corresponding to the voltage values ​​and current value intervals corresponding to the current values. The temperature value can be understood as the temperature value of the chip, the voltage value can be understood as the voltage value of the chip, and the current value can be understood as the current value of the chip.

[0053] In an optional implementation, it is possible to determine whether the temperature value belongs to a temperature value interval, whether the voltage value belongs to a voltage value interval, and whether the current value belongs to a current value interval. When it is determined that the temperature value belongs to the temperature value interval, the voltage value belongs to the voltage value interval, and the current value belongs to the current value interval, it is determined whether multiple chip state values ​​belong to a preset value interval.

[0054] For example, the target chip information (S A 1) The multiple chip state values ​​included are: M1, M2 and M3; M1 is a voltage value, M2 is a temperature value, and M3 is a current value. The preset value interval corresponding to M1 is [D11, D12], the preset value interval corresponding to M2 is [D21, D22], and the preset value interval corresponding to M3 is [D31, D32]. M1 can be compared with the left endpoint D11 and the right endpoint D12 of the preset value interval [D11, D12]. When D11≤M1≤D12, it is determined that M1 belongs to the corresponding preset value interval [D11, D12], that is, it is determined that the voltage value belongs to the voltage value interval. The method for determining whether the temperature value belongs to the temperature value interval and determining whether the current value belongs to the current value interval is the same as the method for determining whether the voltage value belongs to the voltage value interval, and will not be repeated. When M1, M2, and M3 all belong to the corresponding preset value interval, it is determined that the multiple chip state values ​​all belong to the corresponding preset value interval, and the pulse width modulation wave is unsealed.

[0055] Step 205, unblocking the pulse width modulation wave.

[0056] Step 206: Generate an unsealing log and send the unsealing log to the user end.

[0057] After executing step 206 , the process returns to executing step 201 .

[0058] In the embodiment of the present invention, there is no need for inter-core communication between multiple cores. Each core only needs to provide initial chip information to the unsealing device, and then the unsealing device receives the initial chip information of multiple cores, determines the target chip information according to the initial chip information of the multiple cores, and determines whether to unseale the pulse width modulated wave according to the target chip information. When determining to unseale the pulse width modulated wave, the unsealing device unseales the pulse width modulated wave, thereby avoiding the inter-core communication required for transmitting chip information between multiple cores, reducing the traffic volume of inter-core communication, and reducing the load of the core. Each core can provide the initial chip information to the unsealing device more quickly, thereby improving the speed of providing the initial chip information of each core. Furthermore, the unsealing device can also determine whether to unseale the pulse width modulated wave more quickly according to the initial chip information provided by each core, thereby reducing the unsealing time of the pulse width modulated wave and improving the real-time unsealing of the pulse width modulated wave.

[0059] Figure 3 1 is a schematic diagram of a structure of a pulse width modulation wave unpacking device provided in an embodiment of the present invention. The device is suitable for executing a pulse width modulation wave unpacking method provided in an embodiment of the present invention. The device is configured in an unpacking device. Figure 3 As shown, the device may specifically include:

[0060] The information receiving module 301 is used to receive initial chip information of multiple cores;

[0061] An information determination module 302, configured to determine target chip information according to the initial chip information of the plurality of cores;

[0062] A judgment module 303 is used to determine whether to unblock the pulse width modulation wave according to the target chip information;

[0063] A wave unpacking module 304, configured to unpack the pulse width modulation wave when it is determined to unpack the pulse width modulation wave;

[0064] The trigger module 305 is used to trigger the step of receiving initial chip information of multiple cores when it is determined that the pulse width modulation wave is not to be unsealed.

[0065] Optionally, the initial chip information of each core carries a core identifier, and the information determination module 302 is specifically used to:

[0066] Determining a target nuclear identifier according to the nuclear identifier and a preset nuclear identifier;

[0067] The initial chip information carrying the target core identifier in the initial chip information of the multiple cores is determined as the target chip information.

[0068] Optionally, the information determination module 302 determines the target nuclear identifier according to the nuclear identifier and the preset nuclear identifier, including:

[0069] Performing identification matching between the core identification and the preset core identification to obtain an identification matching result;

[0070] When the identification matching result is a successful match, the nuclear identification that successfully matches the preset nuclear identification is determined as the target nuclear identification.

[0071] Optionally, the target chip information includes a plurality of chip status values, and the judgment module 303 is specifically used to:

[0072] Whether to unblock the pulse width modulation wave is determined according to the plurality of chip status values ​​and the preset value interval corresponding to each chip status value.

[0073] Optionally, the judgment module 303 determines whether to unblock the pulse width modulation wave according to the plurality of chip status values ​​and a preset value interval corresponding to each chip status value, including:

[0074] Determining whether the plurality of chip status values ​​belong to corresponding preset value intervals;

[0075] When it is determined that the plurality of chip status values ​​all belong to the corresponding preset value intervals, the pulse width modulation wave is unsealed.

[0076] Optionally, the multiple chip state values ​​include a temperature value, a voltage value, and a current value, the preset value interval includes a temperature value interval corresponding to the temperature value, a voltage value interval corresponding to the voltage value, and a current value interval corresponding to the current value, and the judgment module 303 determines whether the multiple chip state values ​​belong to the preset value interval, including:

[0077] Determine whether the temperature value belongs to the temperature value interval, whether the voltage value belongs to the voltage value interval, and whether the current value belongs to the current value interval.

[0078] Furthermore, the device also includes:

[0079] The log generation module is used to generate an unblocking log and send the unblocking log to the user end.

[0080] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example for illustration. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the functional modules described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0081] The PWM wave unsealing device provided by the embodiment of the present invention does not need to perform inter-core communication between multiple cores. Each core only needs to provide initial chip information to the unsealing device, and then the unsealing device receives the initial chip information of multiple cores, determines the target chip information according to the initial chip information of the multiple cores, and determines whether to unseale the PWM wave according to the target chip information. When determining to unseale the PWM wave, the unsealing device unseales the PWM wave, thereby avoiding the inter-core communication required for transmitting chip information between multiple cores, reducing the business volume of inter-core communication, and reducing the load of the core. Each core can provide the initial chip information to the unsealing device more quickly, thereby improving the speed of providing the initial chip information of each core. Furthermore, the unsealing device can also determine whether to unseale the PWM wave more quickly according to the initial chip information provided by each core, thereby reducing the unsealing time of the PWM wave and improving the real-time unsealing of the PWM wave.

[0082] Figure 4 It is a schematic diagram of the structure of the deblocking device provided by an embodiment of the present invention.

[0083] Please refer to Figure 4 , a deblocking device 50 is provided, comprising:

[0084] a processor 51; and

[0085] A memory 52, used to store executable instructions of the processor;

[0086] The processor 51 is configured to execute the above-mentioned method by executing the executable instructions.

[0087] The processor 51 can communicate with the memory 52 via a bus 53 .

[0088] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the above-mentioned method is implemented.

[0089] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, disk or optical disk and other media that can store program codes.

[0090] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for unpacking a pulse width modulation wave, characterized in that: The method is applied to an unblocking device, and the method includes: Receive initial chip information of multiple cores; Determining target chip information according to the initial chip information of the multiple cores; Determining whether to unblock the pulse width modulation wave according to the target chip information; When it is determined to unblock the pulse width modulation wave, unblock the pulse width modulation wave; When it is determined that the pulse width modulation wave is not to be unsealed, the step of receiving initial chip information of a plurality of cores is triggered.

2. The method according to claim 1, characterized in that The initial chip information of each core carries a core identifier, and determining the target chip information based on the initial chip information of the multiple cores includes: determining a target nuclear identifier based on the nuclear identifier and a preset nuclear identifier; The initial chip information carrying the target core identifier in the initial chip information of the multiple cores is determined as the target chip information.

3. The method according to claim 2, characterized in that Determining the target nuclear identifier according to the nuclear identifier and the preset nuclear identifier includes: Performing identity matching on the core identity and the preset core identity to obtain an identity matching result; When the identification matching result is a successful match, the nuclear identification that successfully matches the preset nuclear identification is determined as the target nuclear identification.

4. The method according to claim 1, wherein The target chip information includes a plurality of chip status values, and determining whether to unblock the pulse width modulation wave according to the target chip information includes: Whether to unblock the pulse width modulation wave is determined according to the multiple chip status values ​​and the preset value interval corresponding to each chip status value.

5. The method according to claim 4, characterized in that The determining whether to unblock the pulse width modulation wave according to the plurality of chip status values ​​and the preset value interval corresponding to each chip status value includes: Determining whether the plurality of chip status values ​​belong to corresponding preset value intervals; When it is determined that the plurality of chip status values ​​all belong to the corresponding preset value ranges, the pulse width modulation wave is unsealed.

6. The method according to claim 5, characterized in that The multiple chip status values ​​include a temperature value, a voltage value, and a current value, the preset value interval includes a temperature value interval corresponding to the temperature value, a voltage value interval corresponding to the voltage value, and a current value interval corresponding to the current value, and determining whether the multiple chip status values ​​belong to the preset value interval includes: Determine whether the temperature value belongs to the temperature value interval, whether the voltage value belongs to the voltage value interval, and whether the current value belongs to the current value interval.

7. The method according to claim 1, characterized in that The method further comprises: Generate an unsealing log and send the unsealing log to the user end.

8. A pulse width modulation wave unpacking device, characterized in that: The device is configured in a deblocking device, and includes: An information receiving module, used for receiving initial chip information of multiple cores; an information determining module, configured to determine target chip information based on the initial chip information of the plurality of cores; A judgment module, configured to determine whether to unblock the pulse width modulation wave according to the target chip information; a wave unpacking module, configured to unpack the pulse width modulation wave when it is determined that the pulse width modulation wave is to be unpacked; The trigger module is used to trigger the step of receiving initial chip information of multiple cores when it is determined that the pulse width modulation wave is not to be unsealed.

9. An unblocking device, characterized in that: Including processor and memory, The memory is used to store codes and related data; The processor is used to execute the code in the memory to implement the pulse width modulation wave unpacking method according to any one of claims 1 to 7.

10. A storage medium storing a computer program, wherein when the program is executed by a processor, the method for depacketizing a pulse width modulation wave according to any one of claims 1 to 7 is implemented.

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