Data encryption method and related equipment
By using parallel computing methods of FIFO structure and butterfly computing layer in homomorphic encryption technology, the problems of large amount of data calculation and long time in existing homomorphic encryption technology are solved, and more efficient data transmission and optimization of computing resources are achieved.
Patent Information
- Application Number
- CN202411971602.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-15
AI Technical Summary
The existing homomorphic encryption technology has a large amount of data calculation and a long calculation time, which is not conducive to data transmission, making the data transmission inefficient.
The data to be encrypted is stored in the RAM data storage unit through the FIFO structure, and the calculation structure is determined based on the bit data of the data to be encrypted, including the number of layers of the butterfly calculation layer and the number of butterfly operator subunits, a preset butterfly operation unit is constructed, and parallel butterfly calculation is performed.
It effectively reduces the computing time and improves data throughput, and is suitable for modulus reduction operations of large-modulus and multi-modulus values, reducing the consumption of computing resources and calculation time.
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Figure CN119834969A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of data security technology, and in particular to a data encryption method and related equipment. Background Art
[0002] In the Internet era, data security is becoming increasingly important, so homomorphic encryption technology has received widespread attention and application. Homomorphic encryption algorithm is a public key encryption system, which usually includes four algorithms: key generation algorithm, encryption algorithm, decryption algorithm, and homomorphic calculation algorithm. The key generation algorithm generates public key and private key according to the security factor; the encryption algorithm generates ciphertext according to the public key; the decryption algorithm decrypts the plaintext according to the private key and ciphertext; the homomorphic calculation algorithm refers to the homomorphic addition and homomorphic multiplication calculations on the ciphertext. The schemes proposed in the early stage of homomorphic encryption development were single homomorphic encryption schemes, including schemes that can only perform homomorphic addition operations, such as the Paillier algorithm, and schemes that can only perform homomorphic multiplication operations, such as the Elgamal algorithm. Later, Gentry proposed a fully homomorphic encryption scheme that supports any number of additions and multiplications.
[0003] Since 2009, three generations of fully homomorphic encryption schemes have emerged after years of development: the first generation is based on ideal lattices[5], the second generation is based on fault-tolerant learning problems, and the third generation is also based on fault-tolerant learning problems, but uses an approximate eigenvector method. Currently, homomorphic encryption technology has a large amount of data calculation and a long operation time, which is not conducive to data transmission and makes data transmission inefficient. Summary of the invention
[0004] Based on this, it is necessary to propose a data encryption method and related equipment to address the problems of large data calculation amount and long operation time in the existing technology, which is not conducive to data transmission and makes data transmission inefficient.
[0005] In a first aspect, a data encryption method is provided, the method comprising:
[0006] The data to be encrypted is stored in the RAM data storage unit through the FIFO structure;
[0007] Obtaining the bit number data of the data to be encrypted, and determining a calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation;
[0008] Constructing a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers;
[0009] Based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit, a parallel butterfly calculation is performed on the data to be encrypted stored in the RAM data storage unit.
[0010] Optionally, the step of performing parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit includes:
[0011] Input the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtain the first computing data according to the first primitive root value in the preset primitive root value;
[0012] The first calculation data is stored in a first register corresponding to the first butterfly operator unit through a FIFO structure;
[0013] Inputting the first calculation data in the first register into the second butterfly calculation layer in the preset butterfly operation unit, and obtaining the second calculation data according to the second primitive root value in the preset primitive root value;
[0014] The second calculation data is stored in a second register corresponding to the second butterfly operator unit through a FIFO structure until the data to be encrypted passes through all butterfly operator units in the preset butterfly operator unit to complete the parallel butterfly calculation for the data to be encrypted.
[0015] Optionally, the method further includes:
[0016] Acquire the operation status data of each butterfly operation subunit in the preset butterfly operation unit;
[0017] When the running state of the butterfly operator subunit is a waiting state for indicating completion of the current calculation, the butterfly operator subunit is used as a target operator unit;
[0018] Determine the previous butterfly operation subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and use the previous butterfly operation subunit of the target operation unit as the data source unit;
[0019] The data source result of the data source unit is obtained in a data source register corresponding to the data source unit, and the data source result is input into the target operation unit until the data source register is empty.
[0020] Optionally, the step of determining a previous butterfly operator subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and taking the previous butterfly operator subunit of the target operation unit as a data source unit, further includes:
[0021] When the target operation unit is the first butterfly operation subunit in the operation process data of the preset butterfly operation unit, the RAM data storage unit is used as the data source register, the data to be encrypted is used as the data source result, and the data source result is input into the target operation unit until the data source register is empty.
[0022] Optionally, the step of inputting the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtaining the first computing data according to the first primitive root value in the preset primitive root values includes:
[0023] Performing a bit-removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit-removal result;
[0024] Input the data to be encrypted and the bit-removal result stored in the RAM data storage unit into the first multiplexer and the second multiplexer of the first butterfly operator unit respectively to obtain a first multiplexing result and a second multiplexing result;
[0025] Performing a modular multiplication operation on the second multiplexing result according to a first primitive root value in the preset primitive root values to obtain a modular multiplication result;
[0026] Performing a Montgomery reduction operation on the modular multiplication result to obtain a reduced result;
[0027] First calculation data is obtained based on the reduction result and the first multiplexing result.
[0028] Optionally, the step of obtaining first calculation data based on the reduction result, the first multiplexing result and the second multiplexing result includes:
[0029] Performing a modular addition operation on the first multiplexing result and the reduction result to obtain a modular addition result;
[0030] Performing a modular reduction operation on the first multiplexing result and the reduction result to obtain a modular reduction result;
[0031] Inputting the modular addition result and the first multiplexing result into the third multiplexer of the first butterfly operator subunit to obtain a third multiplexing result;
[0032] Inputting the modular subtraction result and the reduction result into the fourth multiplexer of the first butterfly operator subunit to obtain a fourth multiplexing result;
[0033] The third multiplexing result and the fourth multiplexing result are used as the first calculation data.
[0034] Optionally, the step of performing a bit removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit removal result includes:
[0035] Performing a modular addition operation on the data to be encrypted stored in the RAM data storage unit to obtain first initial data;
[0036] Performing a modular addition operation on the initial data and (q+1) / 2 to obtain second initial data, wherein q is a prime number;
[0037] The first initial data and the second initial data are input into a bitwise removal multiplexer to obtain a bitwise removal result.
[0038] On the other hand, the present application provides a data encryption device, the device comprising:
[0039] A data acquisition module, used for storing the data to be encrypted into the RAM data storage unit through a FIFO structure;
[0040] A determination module, used to obtain the bit number data of the data to be encrypted, and determine the calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation;
[0041] A construction module, used to construct a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers;
[0042] The calculation module is used to perform parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit.
[0043] In a third aspect, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned data encryption method when executing the computer program.
[0044] In a fourth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above-mentioned data encryption method are implemented.
[0045] The present application stores the data to be encrypted in a RAM data storage unit through a FIFO structure; obtains the bit number data of the data to be encrypted, and determines the calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; constructs a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers; performs parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit. By constructing a preset butterfly operation unit, the operation time can be effectively reduced, the data throughput can be improved, and it is suitable for modular reduction operations of large modulus values and multiple modulus values, and multiplication operations and shift operations are used to complete modular multiplication and reduction operations, which effectively reduces the consumption of computing resources and reduces the calculation time. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0047] in:
[0048] Figure 1 A flowchart of a data encryption method in one embodiment;
[0049] Figure 2 is a calculation flow chart of a data encryption method in one embodiment;
[0050] Figure 3 It is a structural schematic diagram of a butterfly operator unit in yet another data encryption method in an embodiment;
[0051] Figure 4 is a structural block diagram of a data encryption device in one embodiment;
[0052] Figure 5 is a structural block diagram of a computer device in one embodiment;
[0053] Figure 6 It is a structural block diagram of a computer device in another embodiment. DETAILED DESCRIPTION
[0054] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0055] The present invention is described in detail below through specific embodiments.
[0056] See also Figure 1 As shown, Figure 1 A schematic diagram of a data encryption method provided by an embodiment of the present invention includes the following steps:
[0057] S101, storing the data to be encrypted into a RAM data storage unit through a FIFO structure;
[0058] Exemplarily, the FIFO structure is a first-in-first-out structure, and the process of storing the data to be encrypted into the RAM data storage unit through the FIFO structure is to make the data to be encrypted first-in-first-out when being transmitted.
[0059] S102, obtaining the bit number data of the data to be encrypted, and determining a calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each butterfly calculation layer;
[0060] S103, constructing a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers;
[0061] Exemplarily, a butterfly computing layer is constructed based on the butterfly computing subunits, and then a parallel computing structure is constructed, that is, the preset butterfly computing unit has parallel computing capabilities.
[0062] S104, performing parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit.
[0063] The data to be encrypted is stored in a RAM data storage unit through a FIFO structure; the bit number data of the data to be encrypted is obtained, and the calculation structure for the data to be encrypted is determined based on the bit number data, the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; a preset butterfly operation unit corresponding to the data to be encrypted is constructed based on the number and the number of layers; based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit, a parallel butterfly calculation is performed on the data to be encrypted stored in the RAM data storage unit. By constructing a preset butterfly operation unit, the operation time can be effectively reduced, the data throughput can be improved, and it is suitable for modular reduction operations of large modulus values and multiple modulus values, and multiplication operations and shift operations are used to complete modular multiplication and reduction operations, which effectively reduces the consumption of computing resources and reduces the calculation time.
[0064] In a possible implementation, the step of performing parallel butterfly calculations on the to-be-encrypted data storage stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit includes:
[0065] Input the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtain the first computing data according to the first primitive root value in the preset primitive root value;
[0066] The first calculation data is stored in a first register corresponding to the first butterfly operator unit through a FIFO structure;
[0067] Inputting the first calculation data in the first register into the second butterfly calculation layer in the preset butterfly operation unit, and obtaining the second calculation data according to the second primitive root value in the preset primitive root value;
[0068] The second calculation data is stored in a second register corresponding to the second butterfly operator unit through a FIFO structure until the data to be encrypted passes through all butterfly operator units in the preset butterfly operator unit to complete the parallel butterfly calculation for the data to be encrypted.
[0069] For example, Figure 2 As shown, after the data to be encrypted passes through a layer of butterfly operation, the output data (first calculation data) is stored in the corresponding register after each layer of operation according to the position at the time of output, and then the butterfly operation unit in the next layer reads the data from the output data of the previous layer for further operation, until the data to be encrypted passes through all the butterfly operation sub-units in the preset butterfly operation unit, completing the parallel butterfly calculation for the data to be encrypted.
[0070] In a possible implementation, the method further includes:
[0071] Acquire the operation status data of each butterfly operation subunit in the preset butterfly operation unit;
[0072] When the running state of the butterfly operator subunit is a waiting state for indicating completion of the current calculation, the butterfly operator subunit is used as a target operator unit;
[0073] Determine the previous butterfly operation subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and use the previous butterfly operation subunit of the target operation unit as the data source unit;
[0074] The data source result of the data source unit is obtained in a data source register corresponding to the data source unit, and the data source result is input into the target operation unit until the data source register is empty.
[0075] Exemplarily, the calculation processes between the butterfly operator units are independent of each other, that is, the butterfly operator unit is not affected by other butterfly operator units. When the butterfly operator unit completes the current calculation process, regardless of whether other butterfly operator units have completed corresponding calculations, the butterfly operator unit continues to perform the next step of the current calculation process.
[0076] In a possible implementation manner, the step of determining a previous butterfly operator subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and using the previous butterfly operator subunit of the target operation unit as a data source unit, further includes:
[0077] When the target operation unit is the first butterfly operation subunit in the operation process data of the preset butterfly operation unit, the RAM data storage unit is used as the data source register, the data to be encrypted is used as the data source result, and the data source result is input into the target operation unit until the data source register is empty.
[0078] In a possible implementation manner, the step of inputting the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtaining the first computing data according to the first primitive root value in the preset primitive root value includes:
[0079] Performing a bit-removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit-removal result;
[0080] Input the data to be encrypted and the bit-removal result stored in the RAM data storage unit into the first multiplexer and the second multiplexer of the first butterfly operator unit respectively to obtain a first multiplexing result and a second multiplexing result;
[0081] Performing a modular multiplication operation on the second multiplexing result according to a first primitive root value in the preset primitive root values to obtain a modular multiplication result;
[0082] Performing a Montgomery reduction operation on the modular multiplication result to obtain a reduced result;
[0083] First calculation data is obtained based on the reduction result and the first multiplexing result.
[0084] In a possible implementation, the step of obtaining first calculation data based on the reduction result, the first multiplexing result, and the second multiplexing result includes:
[0085] Performing a modular addition operation on the first multiplexing result and the reduction result to obtain a modular addition result;
[0086] Performing a modular reduction operation on the first multiplexing result and the reduction result to obtain a modular reduction result;
[0087] Inputting the modular addition result and the first multiplexing result into the third multiplexer of the first butterfly operator subunit to obtain a third multiplexing result;
[0088] Inputting the modular subtraction result and the reduction result into the fourth multiplexer of the first butterfly operator subunit to obtain a fourth multiplexing result;
[0089] The third multiplexing result and the fourth multiplexing result are used as the first calculation data.
[0090] In a possible implementation, the step of performing a bit removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit removal result includes:
[0091] Performing a modular addition operation on the data to be encrypted stored in the RAM data storage unit to obtain first initial data;
[0092] Performing a modular addition operation on the initial data and (q+1) / 2 to obtain second initial data, wherein q is a prime number;
[0093] The first initial data and the second initial data are input into a bitwise removal multiplexer to obtain a bitwise removal result.
[0094] For example, Figure 3As shown, the preset butterfly operation unit supports two input structures: Cooley-Tukey (CT) sequential input and Gentlemen-Sande (GS) reverse input. When the value of the chip select signal (sel value) is 1, the preset butterfly operation unit performs a forward NTT operation. When the sel value is 0, the preset butterfly operation unit performs a reverse NTT operation. Specifically, when performing a forward NTT operation, data is input from ports a and b respectively, and then the value of the primitive root w is read from the ROM. At this time, A=a+b·wmodq, B=a–b·wmodq. When performing a reverse NTT operation, A=(a+b) / 2modq, B=(a+b)·w / 2modq. The preset butterfly operation unit uses a shift operation to replace a division operation. When the prime number q is determined, and Equivalent, so if the input is an even number, Directly convert to x>>1, the input is an odd number is converted to Convert to x>>1; the reduction calculation unit completes the reduction operation after the modular addition / modular subtraction / modular multiplication / shift operation.
[0095] For example, the address reading setting of the butterfly operator unit is to first store the input data in RAM1 in reverse order, and then the butterfly operator unit reads data from three input interfaces and writes data from two output interfaces. The three read interfaces are respectively denoted as x1(), x2(), and x3(), and the two write interfaces are denoted as X1() and X2(). The number of input data is generally a power of 2, and missing bits are filled with 0, so 2 N It takes N rounds of butterfly operations to perform butterfly operations on data. In each butterfly operation, x1() and x2() read the data to be butterfly operated from the data memory RAM1, and x3() reads the pre-stored primitive root value from RAM2. The calculated data is then written from the write data ports X1() and X2() to the address corresponding to x1() and x2(). In N rounds of butterfly operations, x1() and x2() need to follow the following address selection rules: x1() = t + k·2 n , where n represents the level of butterfly operation, t and k represent counters, t starts from 0, and t<2 n-1 , first t and k are set to 0, so the value of x1() in each layer starts from 0, then t+1, if t+1<2 n-1 , then let t1=t+1, x1()=t1+k·2 n On the contrary, let t = 0, k1 = k + 1, then x1() = t + k1 · 2 nThen add 1 to t, and repeat the above operation, finally ensuring that x1() does not exceed the maximum number of input data. The read address of x2() is x1()+2 n-1 Therefore, every time x1() reads an address data, x2() reads the data of the corresponding address according to the corresponding relationship.
[0096] Exemplarily, the Montgomery reduction algorithm can complete the modulo operation only through simple shift and multiplication operations. The Montgomery reduction circuit includes a multiplier, an adder and a modulo subtraction module for converting the base into the Montgomery reduction form.
[0097] On the other hand, Figure 4 As shown, the present application provides a data encryption device, the device comprising:
[0098] The data acquisition module 201 is used to store the data to be encrypted into the RAM data storage unit through the FIFO structure;
[0099] A determination module 202 is used to obtain the bit number data of the data to be encrypted, and determine a calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation;
[0100] A construction module 203, configured to construct a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers;
[0101] The calculation module 204 is used to perform parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit.
[0102] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 5 As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile and / or volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external client via a network connection. When the computer program is executed by the processor, it implements a function or step on the server side of a data encryption method.
[0103] In one embodiment, a computer device is provided. The computer device may be a client, and its internal structure diagram may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external server through a network connection. When the computer program is executed by the processor, it implements the functions or steps of a client side of a data encryption method.
[0104] In one embodiment, a computer device is proposed, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: storing the data to be encrypted in a RAM data storage unit through a FIFO structure; obtaining the bit storage data of the data to be encrypted, and determining a calculation structure for the data to be encrypted based on the bit storage data, wherein the calculation structure comprises the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; constructing a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers; and performing parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit.
[0105] In one embodiment, a computer-readable storage medium is proposed, which stores a computer program. When the computer program is executed by a processor, the following steps are implemented: storing the data to be encrypted in a RAM data storage unit through a FIFO structure; obtaining the bit storage data of the data to be encrypted, and determining the calculation structure for the data to be encrypted based on the bit storage data, the calculation structure including the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; constructing a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers; and performing parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit.
[0106] It should be noted that the above functions or steps that can be implemented by the computer-readable storage medium or computer device can refer to the relevant descriptions on the server side and the client side in the aforementioned method embodiment. To avoid repetition, they will not be described one by one here.
[0107] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
[0108] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0109] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. A data encryption method, characterized in that: The method comprises: The data to be encrypted is stored in the RAM data storage unit through the FIFO structure; Obtaining the bit number data of the data to be encrypted, and determining a calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; Constructing a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers; Based on the preset butterfly operation unit and the preset primitive root value in the RAM data storage unit, a parallel butterfly calculation is performed on the data to be encrypted stored in the RAM data storage unit.
2. The data encryption method according to claim 1, characterized in that: The step of performing parallel butterfly calculation on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit comprises: Input the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtain the first computing data according to the first primitive root value in the preset primitive root value; The first calculation data is stored in a first register corresponding to the first butterfly operator unit through a FIFO structure; Inputting the first calculation data in the first register into the second butterfly calculation layer in the preset butterfly operation unit, and obtaining the second calculation data according to the second primitive root value in the preset primitive root value; The second calculation data is stored in a second register corresponding to the second butterfly operator unit through a FIFO structure until the data to be encrypted passes through all butterfly operator units in the preset butterfly operator unit to complete the parallel butterfly calculation for the data to be encrypted.
3. The data encryption method according to claim 1, characterized in that: The method further comprises: Acquire the operation status data of each butterfly operation subunit in the preset butterfly operation unit; When the running state of the butterfly operator subunit is a waiting state for indicating completion of the current calculation, the butterfly operator subunit is used as a target operator unit; Determine the previous butterfly operation subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and use the previous butterfly operation subunit of the target operation unit as the data source unit; A data source result of the data source unit is obtained in a data source register corresponding to the data source unit, and the data source result is input into the target operation unit until the data source register is empty.
4. The data encryption method according to claim 3, characterized in that: The step of determining the previous butterfly operator subunit of the target operation unit based on the operation process data of the preset butterfly operation unit, and taking the previous butterfly operator subunit of the target operation unit as the data source unit, further includes: When the target operation unit is the first butterfly operation subunit in the operation process data of the preset butterfly operation unit, the RAM data storage unit is used as the data source register, the data to be encrypted is used as the data source result, and the data source result is input into the target operation unit until the data source register is empty.
5. The data encryption method according to claim 2, characterized in that: The step of inputting the data to be encrypted stored in the RAM data storage unit into the first butterfly operator unit of the first butterfly computing layer in the preset butterfly computing unit, and obtaining the first computing data according to the first primitive root value in the preset primitive root values, comprises: Performing a bit-removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit-removal result; Input the to-be-encrypted data stored in the RAM data storage unit and the bit-removal result into the first multiplexer and the second multiplexer of the first butterfly operator unit respectively, to obtain a first multiplexing result and a second multiplexing result; Performing a modular multiplication operation on the second multiplexing result according to a first primitive root value in the preset primitive root values to obtain a modular multiplication result; Performing a Montgomery reduction operation on the modular multiplication result to obtain a reduced result; First calculation data is obtained based on the reduction result and the first multiplexing result.
6. The data encryption method according to claim 5, characterized in that: The step of obtaining first calculation data based on the reduction result, the first multiplexing result and the second multiplexing result comprises: Performing a modular addition operation on the first multiplexing result and the reduction result to obtain a modular addition result; Performing a modular reduction operation on the first multiplexing result and the reduction result to obtain a modular reduction result; Inputting the modular addition result and the first multiplexing result into the third multiplexer of the first butterfly operator subunit to obtain a third multiplexing result; Inputting the modular subtraction result and the reduction result into the fourth multiplexer of the first butterfly operator subunit to obtain a fourth multiplexing result; The third multiplexing result and the fourth multiplexing result are used as the first calculation data.
7. The data encryption method according to claim 5, characterized in that: The step of performing a bit removal operation on the data to be encrypted stored in the RAM data storage unit to obtain a bit removal result includes: Performing a modular addition operation on the data to be encrypted stored in the RAM data storage unit to obtain first initial data; Performing a modular addition operation on the initial data and (q+1) / 2 to obtain second initial data, wherein q is a prime number; The first initial data and the second initial data are input into a bitwise removal multiplexer to obtain a bitwise removal result.
8. A data encryption device, characterized in that: The device comprises: A data acquisition module, used for storing the data to be encrypted into the RAM data storage unit through a FIFO structure; A determination module, used to obtain the bit number data of the data to be encrypted, and determine the calculation structure for the data to be encrypted based on the bit number data, wherein the calculation structure includes the number of butterfly calculation layers and the number of butterfly operator units required for each layer of butterfly calculation; A construction module, used to construct a preset butterfly operation unit corresponding to the data to be encrypted based on the number and the number of layers; The calculation module is used to perform parallel butterfly calculations on the data to be encrypted stored in the RAM data storage unit based on the preset butterfly calculation unit and the preset primitive root value in the RAM data storage unit.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the data encryption method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the data encryption method according to any one of claims 1 to 7 are implemented.