Semiconductor structure and forming method thereof
By increasing the contact area between the control gate structure and the floating gate structure in the semiconductor structure, the problem of high voltage value in the existing flash memory during the write operation is solved, and the performance is improved and the risk of dielectric layer aging is reduced.
CN119835940APending Publication Date: 2025-04-15SEMICON MFG INT (SHANGHAI) CORP
Patent Information
- Application Number
- CN202311322479.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-12
- Publication Date
- 2025-04-15
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Figure CN119835940A_ABST
Abstract
The invention discloses a semiconductor structure and a forming method thereof. The split-gate structure is separated from the top of the substrate, the split-gate structure comprises floating gate structures and control gate structures, the floating gate structures are distributed in a matrix along a first direction and a second direction, the first direction is vertical to the second direction, the control gate structures extend along the second direction and stretch across the floating gate structures, and the control gate structures are distributed in a matrix along the first direction and the second direction. The control gate structure covers the top and the side wall of the floating gate structure; and the selection gate structures are located between the adjacent split gate structures and cover the substrate, and the selection gate structures cover the side walls of the split gate structures. The voltage value applied to the control gate structure is reduced, so that the aging probability of the dielectric layer between the control gate structure and the floating gate structure can be reduced, and the performance of the semiconductor structure is further improved.
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Citation Information
Patent Citations
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