Manufacturing method of groove structure
By performing two pretreatment of sulfur hexafluoride plasma and chlorine on the trench structure of the semiconductor substrate, the problem of uncontrollable deformation and treatment of the trench shape in the prior art is solved, and the stability and yield of the device are improved.
Patent Information
- Application Number
- CN202311317154.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-11
- Publication Date
- 2025-04-15
AI Technical Summary
When pretreatment of wafer surfaces, the pretreatment process is low in controllability, resulting in graphic deformation of epitaxial trenches, affecting the stability of subsequent epitaxial processes and product yield.
By providing a semiconductor substrate to be processed, including a semiconductor substrate and a spacing-formed gate structure, a trench structure is formed in the semiconductor substrate between adjacent gate structures, and the trench structure is pretreated twice by combining sulfur hexafluoride plasma and chlorine gas.
Effectively improve the pattern deformation problem of the trench structure, improve the roughness of the trench structure surface, improve the controllability of the trench treatment process, and enhance the reliability and yield of the device.
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Figure CN119835992A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for manufacturing a trench structure. Background Art
[0002] At present, stress technology is widely used to improve the carrier mobility in the channel region of semiconductor devices. For CMOS, a stress layer is usually formed on its substrate to improve the carrier mobility in the channel region of the corresponding device, wherein the tensile stress layer is used to improve the electron mobility in the NMOS channel region, and the compressive stress layer is used to improve the hole mobility in the PMOS channel region. In addition, in order to improve the carrier mobility in the PMOS channel region, a groove is made in the part of the PMOS device where the source / drain region is to be formed, and the technology of epitaxially embedding silicon germanium in the groove has become a hot topic of wide concern.
[0003] In order to ensure the quality of embedded silicon germanium epitaxy and avoid defects on the surface of epitaxial grooves, the wafer surface is generally pretreated before epitaxy. However, the controllability of the pretreatment process is low when the wafer surface is pretreated in the existing process, which often causes the pattern of the epitaxial groove to be deformed, thereby affecting the stability of the subsequent epitaxial process and the yield of the product. Summary of the invention
[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for manufacturing a groove structure to improve the groove shape deformation problem caused by the existing pretreatment process and improve the controllability of the pretreatment process.
[0005] In order to achieve the above-mentioned object and other related objects, the present invention provides a method for manufacturing a groove structure, which specifically comprises the following steps:
[0006] A semiconductor substrate to be processed is provided, the semiconductor substrate comprising a semiconductor substrate and gate structures spaced apart and formed above a surface of the semiconductor substrate, a trench structure being formed in the semiconductor substrate between adjacent gate structures;
[0007] Passing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure;
[0008] Chlorine gas is introduced to pre-treat the groove structure for the second time.
[0009] Optionally, the step of providing a semiconductor substrate to be processed includes:
[0010] Providing a semiconductor substrate;
[0011] forming a gate material layer over a surface of a semiconductor substrate;
[0012] Etching the gate material layer to form a gate structure disposed at intervals above the surface of the semiconductor substrate;
[0013] The semiconductor substrate between adjacent gate structures is etched to form a trench structure, wherein the trench structure is a sigma trench.
[0014] Optionally, the step of etching the semiconductor substrate between adjacent gate structures to form a trench structure includes:
[0015] Etching the semiconductor substrate between adjacent gate structures by dry etching to form a U-shaped groove in the semiconductor substrate between the adjacent gate structures;
[0016] A U-shaped groove is etched by wet etching to form a groove structure.
[0017] Optionally, before the step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure, the method further comprises:
[0018] The natural oxide layer in the trench is removed by dry etching.
[0019] Optionally, after the step of introducing chlorine gas to pre-treat the groove structure for the second time, the method further comprises:
[0020] The first preprocessing and the second preprocessing steps are performed cyclically 1 to 50 times.
[0021] Optionally, the step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure includes:
[0022] The sulfur hexafluoride plasma treatment time is controlled to be 1 to 50 seconds.
[0023] Optionally, the step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure includes:
[0024] The gas flow rate of sulfur hexafluoride is controlled to be 1-50 sccm, and the radio frequency power supply power is controlled to be 60-500W.
[0025] Optionally, in the step of introducing chlorine gas to pre-treat the groove structure for the second time, the step further includes:
[0026] The chlorine treatment time is controlled to be 1 to 50 seconds.
[0027] Optionally, in the step of introducing chlorine gas to pre-treat the groove structure for the second time, the step further includes:
[0028] The gas flow rate of chlorine gas is controlled to be 1 to 50 sccm.
[0029] Optionally, after the step of introducing chlorine gas to pre-treat the groove structure for the second time, the method further comprises:
[0030] Silicon germanium epitaxial growth is performed in the trench structure after the second pretreatment to form a silicon germanium epitaxial layer.
[0031] Compared with the prior art, the method for manufacturing the groove structure of the present invention has at least the following beneficial effects:
[0032] The groove processing method of the present invention comprises providing a semiconductor substrate to be processed, the semiconductor substrate comprising a semiconductor substrate and a gate structure formed at intervals above the surface of the semiconductor substrate, a groove structure is formed in the semiconductor substrate between adjacent gate structures, sulfur hexafluoride plasma is introduced to perform a first pretreatment on the groove structure, and chlorine gas is introduced to perform a second pretreatment on the groove structure. Thus, the present invention processes the surface of the groove structure by combining sulfur hexafluoride plasma and chlorine gas, and on the premise of ensuring the removal effect of residual pollutants on the surface of the groove structure, the pattern deformation problem of the groove structure can be effectively improved, and the roughness of the surface of the groove structure can be improved, so as to ensure the controllability of the groove processing process and improve the reliability and yield of the device.
[0033] Furthermore, the groove processing method of the present invention also includes cyclically performing a first pre-processing and a second pre-processing process on the groove structure, and the number of cycles is 1 to 50 times to meet the requirements of different products and processes. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 is a flowchart of the steps of the method for manufacturing the groove structure described in an embodiment of the present invention;
[0035] Figure 2 A schematic diagram of the structure of a semiconductor substrate provided in an embodiment of the present invention;
[0036] Figure 3 It is a schematic diagram of a structure after a gate structure and a spacer layer are formed on the surface of a semiconductor substrate in an embodiment of the present invention;
[0037] Figure 4 Schematic diagram of the structure after a U-shaped groove is formed in a semiconductor substrate in an embodiment of the present invention;
[0038] Figure 5 A schematic diagram of a structure in which a U-shaped groove is etched to form a groove structure in an embodiment of the present invention;
[0039] Figure 6 It is a schematic structural diagram of the groove structure after the first pretreatment in Example 1 or Comparative Example 1 of the present invention;
[0040] Figure 7 Schematic diagram of the structure after the second pretreatment of the groove structure in an embodiment of the present invention;
[0041] Figure 8 It is a schematic diagram of a structure in which an epitaxial layer is formed in a trench structure after the second pretreatment in an embodiment of the present invention;
[0042] Fig. 9 It is a schematic diagram of the structure after the groove structure is processed by the groove processing method described in comparative example 1 of the present invention.
[0043] List of reference numerals:
[0044] 100 Semiconductor Substrate
[0045] 101 Gate Oxide
[0046] 200 Gate Structure
[0047] 300 Side wall layer
[0048] 400 U-shaped groove
[0049] 500 Groove Structure
[0050] 600 epitaxial layer DETAILED DESCRIPTION
[0051] The following specific embodiments illustrate the embodiments of the present invention, and those familiar with the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0052] It should be noted that the diagrams provided in the embodiments of the present invention are only used to illustrate the basic concept of the present invention in a schematic manner. Although the diagrams only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of each component can be changed at will during actual implementation, and the layout of the components may also be more complex. The structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions that can be implemented in this application, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size should still fall within the scope of the technical content disclosed in this application without affecting the effects and purposes that can be achieved by the present invention.
[0053] This embodiment provides a method for manufacturing a trench structure. Figure 1 , the manufacturing method of the groove structure comprises the following steps:
[0054] S101: providing a semiconductor substrate to be processed, the semiconductor substrate comprising a semiconductor substrate and gate structures spaced apart and formed above a surface of the semiconductor substrate, a trench structure being formed in the semiconductor substrate between adjacent gate structures;
[0055] Reference Figure 2 , a semiconductor substrate 100 is provided. Optionally, the semiconductor substrate 100 may be a silicon substrate, such as one of single crystal silicon, polycrystalline silicon or amorphous silicon, or may be silicon on insulator (SOI), or may be a silicon germanium compound. In the present embodiment, the constituent material of the semiconductor substrate 100 is single crystal silicon. An isolation structure and various well structures are formed in the semiconductor substrate 100, which are omitted in the figure for simplicity. As an example, the isolation structure is a shallow trench isolation (STI) structure or a local oxide silicon (LOCOS) isolation structure. For PMOS, the well structure is an N well, and before forming the gate structure 200, a small dose of phosphorus can be implanted into the entire N well to adjust the threshold voltage of the PMOS.
[0056] Optionally, refer to Figure 2 Before forming the gate structure 200 on the surface of the semiconductor substrate 100 , the method further includes forming a gate oxide layer 101 on the surface of the semiconductor substrate 100 , wherein the gate oxide layer 101 is a silicon dioxide layer.
[0057] Reference Figure 3 , a gate structure 200 with intervals is formed on the gate oxide layer 101 of the semiconductor substrate 100. Specifically, a gate material layer can be first formed above the gate oxide layer 101, and the gate material layer can be etched to form a gate structure 200 with intervals above the surface of the semiconductor substrate 100. In this embodiment, the gate structure 200 is a polysilicon layer. In other embodiments, the gate structure 200 can also include a gate dielectric layer, a gate material layer and a gate hard mask layer stacked from bottom to top. Optionally, the gate dielectric layer includes an oxide layer, such as a silicon dioxide layer. The gate material layer includes one or more of a polysilicon layer, a metal layer, a conductive metal nitride layer, a conductive metal oxide layer and a metal silicide layer. Among them, the metal layer can be composed of tungsten, nickel or titanium; the conductive metal nitride layer includes a titanium nitride layer. The metal silicide layer includes a titanium silicide layer. The gate hard mask layer can be borophosphosilicate glass (BPSG), a silicon nitride layer or a silicon oxynitride layer.
[0058] Optionally, refer to Figure 3, a sidewall layer 300 is also formed on the semiconductor substrate 100 and is located on the top and both sides of the gate structure 200. Specifically, a sidewall material layer can be formed on the surface of the gate structure 200 and the surface of the semiconductor substrate 100 between adjacent gate structures 200, and the sidewall material layer on the surface of the semiconductor substrate 100 is etched away, and the sidewall material layer on the surface of the gate structure 200 is retained to form the sidewall layer 300. The sidewall layer 300 is used to protect the gate structure 200, isolate the gate from the source / drain region, and can also be used as an etching mask layer for subsequent wet etching of the U-shaped groove. Optionally, the sidewall layer 300 is composed of oxide, nitride, or a combination of the two. In the present embodiment, the sidewall layer 300 is a silicon nitride layer.
[0059] Reference Figure 5 A trench structure 500 is formed in the semiconductor substrate 100 between adjacent gate structures 200. In order to improve the carrier mobility of the PMOS, the trench structure 500 in this embodiment is a Sigma trench.
[0060] Also refer to Figure 4 and Figure 5 The trench structure 500 can firstly be etched by anisotropic dry etching on the surface of the semiconductor substrate 100 between adjacent gate structures to form a U-shaped trench 400, and then the U-shaped trench 400 can be wet-etched to form the sigma-shaped trench structure 500 in this embodiment. When the wet etching process is adopted, the etchant of the wet etching can be used to etch the U-shaped trench at different crystal directions of the constituent material of the semiconductor substrate 100 at different rates, and the sigma trench in this embodiment can be expanded and etched. In this embodiment, the wet etching solution is a tetramethylammonium hydroxide (TMAH) solution, the temperature is 30°C to 60°C, and the duration is determined according to the desired size of the trench structure 500, generally 100S to 300S.
[0061] Reference Figure 5 , using the trench processing method in the prior art to process the trench structure 500 in this embodiment will cause the cross-sectional width D of the trench structure 500 to be over-etched, that is, an etching load appears below the sidewall layer 300, and the open end of the trench structure 500 is easily etched to the bottom of the gate structure 200, which in turn causes the subsequent epitaxial shape and structure to fail to meet the preset requirements, and the operation is uncontrollable, which is not conducive to the reliability and yield of the subsequently formed device. In order to solve the above technical problems existing in the prior art, this embodiment adopts the following steps S102 to S103 to pre-process the trench structure 500 in this embodiment, in order to improve the pattern deformation of the trench structure 500 and improve the reliability and yield of the device.
[0062] S102: introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure;
[0063] Specifically, continue to refer to Figure 5 , the semiconductor substrate with the above-mentioned groove structure 500 can be placed in a processing chamber. After the groove structure 500 is formed, the surface of the groove structure 500 is easy to react with the oxygen in the environment to form a natural oxide layer (not shown in the figure). In order to expose more Si active bonds on the surface of the groove structure 500, so that the subsequent single crystal silicon germanium epitaxial layer is easier to grow and has fewer defects, the natural oxide layer needs to be removed before epitaxy. Therefore, before pre-treating the groove structure 500, it also includes a step of removing the natural oxide layer formed on the surface of the groove structure 500. For example, a gas containing fluorine and amino groups can be introduced into the chamber to remove the natural oxide layer on the surface of the groove structure 500.
[0064] Reference Figure 6 After removing the natural oxide layer, sulfur hexafluoride plasma is introduced into the chamber to perform the first pretreatment on the groove structure 500. In this embodiment, the sulfur hexafluoride plasma treatment time is controlled to be 1 to 50 seconds, the sulfur hexafluoride gas flow rate is 1 to 50 sccm, and the radio frequency power supply power is 60 to 500 W. The first pretreatment is performed on the groove structure 500 to remove the byproducts or contaminants generated in the step of wet etching the groove structure 500, and the byproducts generated in the step of the natural oxide layer can also be removed. After this pretreatment, the groove structure 500 generally has slight graphic deformation. Figure 6 As shown, the opening end of the trench structure 500 , that is, the lower end of the spacer layer 300 , is slightly over-etched, and the two sidewalls of the opening end are offset toward the gate structure 200 by a distance D1 .
[0065] S103: introducing chlorine gas to perform a second pretreatment on the groove structure;
[0066] After step S102, refer to Figure 7 , chlorine gas is introduced into the chamber to perform a second pretreatment on the groove structure 500. After the sulfur hexafluoride plasma treatment, various ion residues such as F / O / N will remain in the groove structure 500, resulting in poor roughness. These ion residues and poor roughness will affect the subsequent epitaxial growth. This embodiment introduces chlorine gas into the chamber to improve the defects left by the sulfur hexafluoride treatment, that is, to remove residual ion contamination, and improve the surface roughness, so that the surface roughening effect of the groove structure 500 is more uniform, reducing the dislocation defects of subsequent epitaxy and improving the epitaxial quality. In this embodiment, the chlorine treatment time is controlled to be 1 to 50S, and the gas flow rate of chlorine gas is 1 to 50sccm. The deformation degree of the groove structure 500 after this pretreatment is not large. Figure 7As shown, the two side walls of the opening end of the trench structure 500 are respectively offset toward the gate structure 200 by a distance D2, and the values of D1 and D2 are not much different.
[0067] In an optional embodiment, in order to ensure the pretreatment effect on the groove structure 500, the first pretreatment and the second pretreatment may be cycled for 1 to 50 times to meet the requirements of different products and processes.
[0068] In this embodiment, after the second pretreatment step of introducing chlorine gas to the trench structure, the method further includes step S104: forming an epitaxial layer in the trench structure after the second pretreatment.
[0069] Reference Figure 8 After the trench structure 500 is pretreated, an epitaxial layer 600 may be formed in the pretreated trench structure 500. Specifically, the epitaxial layer 600 may be formed by a selective epitaxial growth process, so that the epitaxial layer 600 completely fills the trench structure 500 and is higher than the trench structure 500 to a certain height. In the present embodiment, the epitaxial layer 600 may be a silicon germanium layer, the germanium content (germanium atomic percentage) in the silicon germanium layer is 10% to 20%, and the silicon germanium layer may be doped with boron. The selective epitaxial growth process may be one of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition or molecular beam epitaxy.
[0070] The method for manufacturing the groove structure of the present invention is described in detail below in conjunction with specific embodiments.
[0071] Example 1
[0072] In obtaining Figure 5 After the trench structure 500 is formed, sulfur hexafluoride plasma treatment is first introduced to perform a first pretreatment on the trench structure 500. The sulfur hexafluoride gas flow rate is controlled to be 5 sccm, the RF power is 100 W, and the sulfur hexafluoride plasma treatment time is 10 s. Figure 6 The trench structure 500 is shown. Figure 6 As shown, both sides of the opening end of the groove structure 500 are extended inward by D1, and the value of D1 is In order to improve the surface roughness and contaminants of the groove structure 500 after the sulfur hexafluoride plasma treatment, chlorine plasma is continuously introduced to perform a second pretreatment on the groove structure 500. The gas flow rate of the chlorine gas is controlled to be 5 sccm, and the treatment time of the chlorine gas is 10 s. The above process is repeated 6 times to obtain the following Figure 7 The trench structure 500 is shown. Figure 7 As shown in FIG. 1 , after being processed in this embodiment, both sides of the opening end of the groove structure 500 are expanded inward by D2, and the value of D2 is It can be seen that the deformation degree of the groove structure 500 after being processed in this embodiment is relatively small.
[0073] Comparative Example 1
[0074] In obtaining Figure 5 After the trench structure 500 shown in FIG. 1 is formed, sulfur hexafluoride plasma treatment is first introduced to perform the first pretreatment on the trench structure 500. The sulfur hexafluoride gas flow rate is controlled to be 5 sccm, and the RF power is 100 W. The sulfur hexafluoride plasma treatment time is controlled to be 10 s, and the following is obtained: Figure 6 The trench structure 500 is shown. Figure 6 As shown, both sides of the opening end of the groove structure 500 are extended inward by D1, and the value of D1 is In order to improve the surface roughness and contaminants of the groove structure 500 after the sulfur hexafluoride plasma treatment, chlorine plasma is continuously introduced to perform a second pretreatment on the groove structure 500. The gas flow rate of the chlorine plasma is controlled to be 5 sccm, the RF power is 40 W, and the chlorine treatment time is 10 s. Finally, the groove structure 500 is obtained as shown in FIG. Fig. 9 As shown. Fig. 9 As shown, after the comparative example is processed, the two sides of the opening end of the groove structure 500 are respectively expanded inward by D3, and the value of D3 is It can be seen that the deformation degree of the groove structure 500 after being processed in this comparative example is relatively large.
[0075] The roughness and element content of the surface of the groove structure after being treated by Example 1 and Comparative Example 1 are shown in Table 1 below.
[0076] Table 1
[0077] Atomic Force Microscopy (AFM) - Roughness Comparative Example 1 Example 1 Ra(nm) 0.0750 0.0644 Rq(nm) 0.0945 0.0814 Secondary Ion Mass Spectrometry (SIMS) - Element Content Comparative Example 1 Example 1 C 3.0E+02 3.0E+02 O 1.8E+01 1.5E+01 F 7.0E+00 7.0E+00 Cl 5.0E+00 8.5E+00
[0078] As shown in Table 1, the surface of the groove structure treated by Example 1 and Comparative Example 1 was observed by atomic force microscopy, and it was found that the values of the arithmetic mean roughness (Ra) and the root mean square roughness (Rq) in Example 1 were both smaller than the values of the arithmetic mean roughness (Ra) and the root mean square roughness (Rq) in Comparative Example 1. It can be seen that the roughness value in Example 1 is smaller, and the surface of the groove structure is smoother, which is beneficial to the improvement of epitaxial quality. The content of each element on the surface of the groove structure treated by Example 1 and Comparative Example 1 was tested by secondary ion mass spectrometry, and it was found that the content of C, O, F and Cl elements on the surface of the groove structure treated by Example 1 was not much different. It can be further seen that Example 1 of the present invention can effectively improve the graphic deformation of the groove structure without reducing the original performance (that is, the removal of pollutants on the surface of the groove structure is good), and the roughness of the surface of the groove structure is also well improved, which is beneficial to reduce epitaxial dislocation defects and improve the quality of epitaxy.
[0079] In summary, the groove processing method of the present invention includes providing a semiconductor substrate to be processed, the semiconductor substrate includes a semiconductor substrate and a gate structure formed at intervals above the surface of the semiconductor substrate, a groove structure is formed in the semiconductor substrate between adjacent gate structures, sulfur hexafluoride plasma is introduced to perform a first pretreatment on the groove structure, and chlorine gas is introduced to perform a second pretreatment on the groove structure. Therefore, the present invention treats the surface of the groove structure by combining sulfur hexafluoride plasma and chlorine gas, and on the premise of ensuring the removal effect of residual pollutants on the surface of the groove structure, it can effectively improve the graphic deformation problem of the groove structure, and at the same time improve the roughness of the surface of the groove structure, ensure the controllability of the groove processing process, and improve the reliability and yield of the device.
[0080] Furthermore, the groove processing method of the present invention also includes cyclically performing a first pre-processing and a second pre-processing process on the groove structure, and the number of cycles is 1 to 50 times to meet the requirements of different products and processes.
[0081] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for manufacturing a groove structure, characterized in that: The following steps are involved: A semiconductor substrate to be processed is provided, wherein the semiconductor substrate comprises a semiconductor substrate and a gate structure formed above a surface of the semiconductor substrate at intervals, and a trench structure is formed in the semiconductor substrate between adjacent gate structures; Passing sulfur hexafluoride plasma to perform a first pretreatment on the groove structure; Chlorine gas is introduced to perform a second pretreatment on the groove structure.
2. The method for manufacturing a groove structure according to claim 1, characterized in that: The step of providing a semiconductor substrate to be processed includes: Providing a semiconductor substrate; forming a gate material layer above the surface of the semiconductor substrate; Etching the gate material layer to form a gate structure disposed at intervals above the surface of the semiconductor substrate; The semiconductor substrate between adjacent gate structures is etched to form the trench structure, which is a sigma trench.
3. The method for manufacturing a groove structure according to claim 2, characterized in that: The step of etching the semiconductor substrate between adjacent gate structures to form the trench structure includes: Etching the semiconductor substrate between adjacent gate structures by dry etching to form a U-shaped groove in the semiconductor substrate between the adjacent gate structures; The U-shaped groove is etched by wet etching to form the groove structure.
4. The method for manufacturing a groove structure according to claim 1 or 3, characterized in that: Before the step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure, the method comprises: The natural oxide layer in the groove structure is removed by dry etching.
5. The method for manufacturing a groove structure according to claim 1 or 3, characterized in that: After the step of introducing chlorine gas to pre-treat the groove structure for the second time, the method further comprises: The first preprocessing and the second preprocessing steps are sequentially and cyclically performed 1 to 50 times.
6. The method for manufacturing a groove structure according to claim 1 or 3, characterized in that: The step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure includes: The sulfur hexafluoride plasma treatment time is controlled to be 1 to 50 seconds.
7. The method for manufacturing a groove structure according to claim 6, characterized in that: The step of introducing sulfur hexafluoride plasma to perform a first pretreatment on the trench structure includes: The gas flow rate of sulfur hexafluoride is controlled to be 1-50 sccm, and the radio frequency power supply power is controlled to be 60-500W.
8. The method for manufacturing a groove structure according to claim 1 or 3, characterized in that: The step of introducing chlorine gas to pre-treat the groove structure for the second time also includes: The chlorine treatment time is controlled to be 1 to 50 seconds.
9. The method for manufacturing a groove structure according to claim 8, characterized in that: The step of introducing chlorine gas to pre-treat the groove structure for the second time also includes: The gas flow rate of chlorine gas is controlled to be 1 to 50 sccm.
10. The method for manufacturing a groove structure according to any one of claims 1 to 9, characterized in that: After the step of introducing chlorine gas to pre-treat the groove structure for the second time, the method further comprises: Silicon germanium epitaxial growth is performed in the trench structure after the second pretreatment to form a silicon germanium epitaxial layer.