A display panel, a manufacturing method and a display device

Abstract

The application discloses a display panel, a preparation method and a display device. The display panel comprises a substrate and a plurality of light-emitting elements on one side of the substrate. The light-emitting elements comprise a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer and a third electrode which are stacked. The first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer and the third electrode at least partially overlap in the orthographic projection of the substrate. The display state of the display panel comprises a first display state and a second display state. In the first display state, the voltage received by the second electrode is greater than the voltage received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light. In the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light. The double-pixel light-emitting mode is used to switch the pixel light-emitting mode between single-layer light-emitting and series light-emitting, thereby realizing high and low gray scale brightness adjustment, and meanwhile, high efficiency, long service life and low gray scale display effect can be considered.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel, a manufacturing method, and a display device. Background Technology

[0002] The market demand for organic light-emitting diode (OLED) display panels has expanded from small-sized mobile phones to medium-sized ones, such as tablets and automotive displays. The demand for medium-sized OLEDs is growing rapidly, which has led to the development of Tandem OLED (Tandem Organic Light-Emitting Diode) display panels.

[0003] Tandem devices typically offer significantly improved luminous efficiency and extended lifespan. However, due to their increased efficiency, tandem devices require a significantly lower driving current for the same display brightness. This is particularly problematic for low-brightness, low-grayscale displays. The reduced driving current amplifies differences in the characteristics of identical thin-film transistors (TFTs), leading to decreased brightness in low-grayscale displays. Furthermore, the severe lateral leakage current in tandem devices results in significant leakage crosstalk in low-grayscale displays, impacting the color gamut and overall display quality. Summary of the Invention

[0004] To address the aforementioned issues, this invention provides a display panel, a manufacturing method, and a display device. By utilizing a dual-pixel light-emitting method, the pixel light-emitting mode can be adjusted between single-layer light-emitting and series light-emitting, thereby achieving both high and low grayscale brightness adjustment while also ensuring high efficiency, long lifespan, and low grayscale display effect.

[0005] To address the aforementioned technical problems, embodiments of this application provide a display panel, comprising:

[0006] Substrate;

[0007] Multiple light-emitting elements are located on one side of the substrate. Each light-emitting element includes a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer, and a third electrode stacked together. The first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer, and the third electrode at least partially overlap in their orthogonal projections onto the substrate. The display panel has a first display state and a second display state.

[0008] In the first display state, the voltage received by the second electrode is greater than the voltage received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light;

[0009] In the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light.

[0010] Based on the same inventive concept, in a second aspect, embodiments of this application also provide a method for preparing a display panel, used to prepare the display panel provided in the first aspect, the method comprising:

[0011] Provide substrates;

[0012] A first electrode and a first light-emitting layer are formed on one side of the substrate.

[0013] A first photomask is provided, and a second electrode is formed on the side of the first light-emitting layer away from the substrate using the first photomask;

[0014] A second light-emitting layer is formed on the side of the second electrode away from the substrate.

[0015] The third electrode is formed on the side of the second light-emitting layer away from the substrate using the first mask.

[0016] Thirdly, embodiments of this application also provide a display device, including the display panel provided in the first aspect.

[0017] The display panel provided in this application uses series-connected light-emitting elements. The light-emitting mode of the elements can be switched according to the display brightness. In the first display state, by controlling the voltage received by the second electrode of the light-emitting element to be greater than the voltage received by the third electrode, the series-connected light-emitting layer emits light, meeting the needs of high-brightness display. In the second display state, by controlling the voltage received by the second electrode to be equal to the voltage received by the third electrode, a single-layer light-emitting layer emits light. Compared to the prior art Tandem OLED device, which uses a smaller driving current to drive the series-connected light-emitting layer for low grayscale brightness display, this application embodiment can use a larger driving current to drive the single-layer light-emitting layer, achieving high and low brightness DBV light emission adjustment, improving the display brightness of low grayscale, and simultaneously improving the problem in the prior art where the difference in the characteristics of the same thin-film transistor caused by the smaller driving current is amplified, leading to a deterioration in low grayscale display brightness. Thus, this application can achieve precise adjustment of low grayscale display brightness and improve the problem of low grayscale "brightness leakage," ensuring the display effect and color gamut of low grayscale, thereby meeting the application scenarios of low grayscale brightness display. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application;

[0019] Figure 2 yes Figure 1A schematic diagram of the cross-sectional structure of a display panel along the AA' direction;

[0020] Figure 3 yes Figure 1 Voltage diagrams of the electrodes of the provided light-emitting element in the first and second display states;

[0021] Figure 4 This is a schematic diagram of the cross-sectional structure of another light-emitting element provided in an embodiment of this application;

[0022] Figure 5 yes Figure 1 Voltage diagram of the electrodes of the provided light-emitting element in the third display state;

[0023] Figure 6 This is a schematic diagram of a power bus for a display panel provided in an embodiment of this application;

[0024] Figure 7 yes Figure 1 A schematic diagram of the cross-sectional structure of another type of display panel along the AA' direction;

[0025] Figure 8 yes Figure 1 A schematic diagram of the cross-sectional structure of another type of display panel along the AA' direction;

[0026] Figure 9 yes Figure 1 A schematic diagram of the cross-sectional structure of another type of display panel along the AA' direction;

[0027] Figure 10 This is a flowchart of a method for manufacturing a display panel according to an embodiment of this application;

[0028] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0029] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0030] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application. Figure 2 yes Figure 1 A schematic diagram of a cross-sectional structure of a display panel along the AA' direction. Figure 3 yes Figure 1 The voltage diagrams of the electrodes of the provided light-emitting element in the first and second display states are provided for reference. Figures 1-3An embodiment of this application provides a display panel 200 including a substrate 20 and a plurality of light-emitting elements 40 located on one side of the substrate 20. The light-emitting element 40 includes a first electrode 41, a first light-emitting layer 42, a second electrode 43, a second light-emitting layer 44 and a third electrode 45 stacked together; the first electrode 41, the first light-emitting layer 42, the second electrode 43, the second light-emitting layer 44 and the third electrode 45 at least partially overlap in their orthogonal projections onto the substrate 20.

[0031] Specifically, refer to Figure 1 As shown, the display panel 200 can be an organic light-emitting diode display (OLED), an active-matrix organic light-emitting diode display (AMOLED), etc. This application embodiment does not limit the specific light-emitting type of the display panel. The display area AA (Active Area) can display images normally, and the non-display area NA at least partially surrounds the display area AA, used for setting signal traces and protecting the display area AA, etc.

[0032] refer to Figure 2 The substrate 20 is made of rigid materials such as glass or silicon wafers, or flexible materials such as ultra-thin glass, metal foil or polymer plastics. The flexible or rigid substrate 20 can block oxygen and moisture, and prevent moisture or impurities from diffusing into the display panel through the substrate 20.

[0033] The light-emitting element 40 has a Tandem OLED structure, which can be understood as a high-efficiency OLED device structure formed by connecting and stacking multiple traditional OLED devices in series through a connecting layer. (Reference) Figure 2Taking a light-emitting element 40 consisting of two light-emitting units connected in series as an example, the first electrode 41, the first light-emitting layer 42, and the second electrode 43 can form the first light-emitting unit, and the second electrode 43, the second light-emitting layer 44, and the third electrode 45 can form the second light-emitting unit. The first electrode 41 serves as the anode of the first light-emitting unit, and the second electrode 43 serves as the cathode of the first light-emitting unit. Simultaneously, the second electrode 43 can also serve as the anode of the second light-emitting unit, and the third electrode 45 serves as the cathode of the second light-emitting unit. The materials of the second electrode 43 and the third electrode 45 include, but are not limited to, one or more of silver, indium tin oxide, indium zinc oxide, or magnesium-silver alloys. For example, silver (Ag) is chosen for the second electrode 43, as this metal provides good carrier injection performance as the anode and cathode of the light-emitting element 40. The material of the first electrode 41 can be a metallic material or a transparent conductive material, such as ITO (indium tin oxide), IZO (indium zinc oxide), ITO / Ag / ITO, etc. The materials of the first light-emitting layer 42 and the second light-emitting layer 44 can be low-molecular-weight or high-molecular-weight organic materials.

[0034] The display panel 200 has at least two display states: a first display state and a second display state. The first display state uses tandem illumination, and the second display state uses single-layer illumination. (Reference) Figure 3 Specifically:

[0035] refer to Figure 2 and Figure 3 In Figure (a), in the first display state, the voltage PV2 received by the second electrode 43 is greater than the voltage PV3 received by the third electrode 45, causing the first light-emitting layer 42 and the second light-emitting layer 44 to emit light. Specifically, the light-emitting element 40 operates in series emission mode, providing different voltages to the first electrode 41, the second electrode 43, and the third electrode 45 respectively, and controlling PV2 > PV3 to create a potential difference between the first electrode 41 and the second electrode 43, and between the second electrode 43 and the third electrode 45. Holes are injected into the first light-emitting layer 42 by the first electrode 41, electrons are injected into the first light-emitting layer 42 by the second electrode 43, and electrons are injected into the second light-emitting layer 44 by the third electrode 45. Electrons and holes recombine in the first light-emitting layer 42 and the second light-emitting layer 44 respectively to form excited excitons. The excited excitons decay and release energy in the form of light. The first light-emitting layer 42 and the second light-emitting layer 44 emit light simultaneously, and the light-emitting element 40 has high display brightness, which can meet the application scenarios of high-brightness displays.

[0036] refer to Figure 2 and Figure 3In Figure (b), in the second display state, the voltage received by the second electrode 43 is equal to the voltage received by the third electrode 45, and the first light-emitting layer 42 emits light. Specifically, the light-emitting element 40 operates in a single-layer light-emitting mode, providing the same voltage to the second electrode 43 and the third electrode 45, and controlling PV2 = PV3, so the potential difference between the second electrode 43 and the third electrode 45 is 0. Different voltages are provided to the first electrode 41 and the second electrode 43, creating a potential difference between the first electrode 41 and the second electrode 43. Holes are injected into the first light-emitting layer 42 by the first electrode 41, and electrons are injected into the first light-emitting layer 42 by the second electrode 43. Electrons and holes recombine in the first light-emitting layer 42 to form excited excitons. The excited excitons decay and release energy in the form of light, so only the first light-emitting layer 42 emits light, and the second light-emitting layer 44 does not emit light. Compared to existing Tandem OLED devices that use a smaller driving current to drive the series-emitting layers for low grayscale brightness display, this application embodiment, based on the low grayscale luminance, can use a larger driving current to drive only the first emitting layer 42 to emit light, achieving high and low brightness DBV (Dynamic Backlight Volume) luminance adjustment. The larger driving current is beneficial for improving the display brightness of low grayscale, while also mitigating the problem in existing technologies where the smaller driving current amplifies differences in the characteristics of the same thin-film transistors, leading to a deterioration in low grayscale display brightness. Thus, this application can also achieve precise adjustment of low grayscale display brightness and improve the problem of low grayscale "brightness leakage," thereby ensuring the display effect and color gamut of low grayscale displays and meeting the application scenarios of low grayscale brightness displays.

[0037] DBV is a dynamic backlight adjustment technology that can automatically adjust the screen brightness according to the ambient light to reduce eye fatigue and save power.

[0038] The display panel 200 of this application utilizes a dual-pixel series connection method. Based on different DBV display brightness, it selects different pixel light emission modes and switches between single-layer light emission and series light emission. This can achieve high and low brightness DBV light emission adjustment. This setting can take into account the high efficiency, long life and low grayscale display effect of the light emission element, and meet the display effect in different application scenarios.

[0039] To further explain the light-emitting principle of the light-emitting element provided in the embodiments of this application, Figure 4 This is a schematic cross-sectional view of another light-emitting element provided in an embodiment of this application, for reference. Figure 4In this embodiment, the light-emitting element 20 can be formed by multiple conventional light-emitting units connected in series and stacked through a charge generation layer CGL. Specifically, the light-emitting element 20 includes, in sequence, an anode (first electrode 41), a first hole injection layer HIL1, a first hole transport layer HTL1, a first compensation layer Prime1, a first light-emitting layer EML1 (42), a first hole blocking layer HBL1, a first electron transport layer ETL1, an N-type charge generation layer NCGL, a first cathode Cathode1 (second electrode 43), a P-type charge generation layer PCGL, a second hole transport layer HTL2, a second compensation layer Prime2, a second light-emitting layer EML2 (44), a second hole blocking layer HBL2, a second electron transport layer ETL2, a first electron injection layer EIL, a second cathode Cathode2 (third electrode 45), a cover plate CPL, and a second electron injection layer LiF (Lithium Fluoride). LiF is used to improve the efficiency of electron injection. The N-type charge generation layer NCGL is used to generate electrons, and the P-type charge generation layer PCGL is used to generate holes. The hole blocking layer (HBL) is used to block holes from passing through the light-emitting layer (EML) into the electron transport layer (ETL), so that holes and electrons combine in the light-emitting layer (EML) to form excited excitons. The excited excitons decay and release energy in the form of light, and the light-emitting layer (EML) emits light.

[0040] When the light-emitting unit 10 emits light in a tandem manner, the light-emitting principle is as follows: a certain voltage is applied to the first cathode Cathode1 (second electrode 43), the second cathode Cathode2 (second electrode 45), and the anode Anode (first electrode 41), respectively, and the voltage received by the first cathode Cathode1 (second electrode 43) is greater than the voltage received by the second cathode Cathode2 (second electrode 45). Holes from the anode Anode are injected into the first hole transport layer HTL1 through the first hole injection layer HIL1, and electrons generated by the N-type charge generation layer NCGL are injected into the first electron transport layer ETL1 and pass through the first hole blocking layer HBL1. Holes and electrons migrate to the first light-emitting layer EML1 through the first hole transport layer HTL1 and the first electron transport layer ETL1, respectively, and form excitons in the first light-emitting layer EML1. The excitons excite the light-emitting molecules in the first light-emitting layer EML1 to emit light. Simultaneously, holes generated by the P-type charge generation layer PCGL are injected into the second light-emitting layer EML2 through the second hole transport layer HTL2. Electrons in the second cathode Cathode2 (third electrode 45) are injected into the second light-emitting layer EML2 from the first electron injection layer EIL, the second electron transport layer ETL2, and the second hole blocking layer HBL2, and excitons are formed in the second light-emitting layer EML2. The excitons excite the light-emitting molecules in the second light-emitting layer EML2 to emit light, which can meet the application scenarios of high brightness display.

[0041] When the light-emitting unit 10 emits light in a Single (single-layer) mode, the light-emitting principle is as follows: the same voltage is applied to the first cathode Cathode1 and the second cathode Cathode2, and the second light-emitting layer EML2 does not emit light. A certain voltage is applied to the first cathode Cathode1 (second electrode 45) and the anode (first electrode 41). Holes from the anode are injected into the first hole transport layer HTL1 through the first hole injection layer HIL1, and electrons generated by the N-type charge generation layer NCGL are injected into the first electron transport layer ETL1 and pass through the first hole blocking layer HBL1. Holes and electrons migrate to the first light-emitting layer EML1 through the first hole transport layer HTL1 and the first electron transport layer ETL1, respectively, and form excitons in the first light-emitting layer EML1. The excitons excite the light-emitting molecules in the first light-emitting layer EML1 to emit light, which can meet the application scenarios of low grayscale brightness display.

[0042] Among them, reference Figure 4 The light-emitting element 20 includes red sub-pixels, green sub-pixels, and blue sub-pixels. The first compensation layer Prime1 and the second compensation layer Prime2, at corresponding positions in each sub-pixel, respectively include a red first compensation layer R-Prime1, a blue first compensation layer B-Prime1, a green first compensation layer G-Prime1, a red second compensation layer R-Prime2, a blue second compensation layer B-Prime2, and a green second compensation layer G-Prime2, which are used to adjust the cavity length of each sub-pixel, thereby adjusting the optical performance. The first light-emitting layer EML1 and the second light-emitting layer EML2, at corresponding positions in each sub-pixel, respectively include a red first light-emitting layer R-EML1, a blue first light-emitting layer B-EML1, a green first light-emitting layer G-EML1, a red second light-emitting layer R-EML2, a blue second light-emitting layer B-EML2, and a green second light-emitting layer G-EML2. The compensation layer Prime and the light-emitting layer EML are stacked.

[0043] It should be noted that the display device provided in this embodiment also includes other film layers, such as pixel limiting layer 50, thin film encapsulation layer (not shown in the figure), etc., which work together to realize the display function of the display device. Those skilled in the art, based on their familiarity with the structure and function of the display panel, can clearly understand the structure and function of each film layer. The embodiments of this application will not show them one by one.

[0044] Based on the above embodiments, refer to Figure 3In the first display state and the second display state, the voltage PV2 received by the second electrode 43 is different from the voltage PV1 received by the first electrode 41. That is, PV2 ≠ PV1. In other words, when the light-emitting element 40 switches between single-layer light emission and series light emission in the pixel light emission mode, it is also necessary to ensure that there is a potential difference between the second electrode 43 and the first electrode 41 so that holes and electrons can migrate to the light-emitting layer.

[0045] Based on the above embodiments, refer to Figure 2 and Figure 5 The display panel 200 also includes a third display state. The third display state is another Single (single-layer) light emission mode, that is, only the second light emission layer 44 emits light.

[0046] refer to Figure 2 and Figure 5 In the third display state, the voltage PV2 received by the second electrode 43 is equal to the voltage PV1 received by the first electrode 41, and the voltage PV2 received by the second electrode 43 is different from the voltage PV3 received by the third electrode 45. The second light-emitting layer 44 emits light, that is, PV2 = PV1, PV2 ≠ PV3.

[0047] For details, please refer to Figure 2 and Figure 4 In some display scenarios where the brightness is between low grayscale and high, the second light-emitting layer 44 on the top layer can be controlled to emit light by controlling the second electrode 43 to have the same potential as the first electrode 41, so as to meet various display brightness requirements.

[0048] Figure 6 This is a schematic diagram of a power bus for a display panel provided in an embodiment of this application. Based on the above embodiment, refer to... Figure 6 The display panel 200 also includes a positive power bus. 正 First negative power bus BUS1 负 Second negative power bus BUS2 负 The first electrode 41 is connected to the positive power bus BUS. 正 Electrical connection, the second electrode 43 is connected to the first negative power supply bus BUS1 负 Electrical connection, the third electrode 45 is connected to the second negative power supply bus BUS2 负 Electrical connection.

[0049] For details, please refer to Figure 6 In this embodiment, multiple positive power buses (BUS) can be configured to surround the display area AA. 正 First negative power bus BUS1 负 Second negative power bus BUS2 负 Multiple power bus edges Figure 6The bonding area NA', extending in the Y direction to the display panel 200, is electrically connected to the power chip (POWER IC) (not shown). After the display panel 200 is packaged, the bonding area NA' can bend to the back of the display area AA, which is beneficial for achieving a narrow bezel design. Each power bus can output a corresponding voltage signal to the light-emitting element. For example, the positive power bus BUS... 正 Configured to output an anode reference voltage to the first electrode 41 of the light-emitting element 20, the first negative power supply bus BUS1 负 Configured to output a cathode reference voltage to the second electrode 43 of the light-emitting element 20, the second negative power supply bus BUS2 负 The device is configured to output a cathode reference voltage to the third electrode 45 of the light-emitting element 20. This allows the light-emitting element 20 to switch between a first display state, a second display state, and a third display state, meeting the display requirements for different brightness levels.

[0050] Based on the above embodiments, continue to refer to Figure 1 , Figure 2 and Figure 6 The display panel 200 also includes a driving circuit layer 30, which includes a second electrode signal line PVEE1 and a third electrode signal line PVEE2. The second electrode signal line PVEE1 is connected to the second electrode 43 and the first negative power bus BUS1, respectively. 负 Electrical connection, with at least a portion of the second electrode signal line PVEE1 located in the non-display area NA. The third electrode signal line PVEE2 is connected to the third electrode 45 and the second negative power bus BUS2, respectively. 负 Electrical connection, at least part of the third electrode signal line PVEE2 is located in the non-display area NA.

[0051] For details, please refer to Figure 2 The display panel 200 also includes a driving circuit layer 30 located between the substrate 20 and multiple light-emitting elements 40. The driving circuit layer 30 includes pixel circuits, which can be 2T1C, 4T1C, 7T1C, 7T2C, 8T1C, 8T2C, etc. The pixel circuits include multiple thin-film transistors (TFTs), storage capacitors (not shown), and metal traces, etc. (not shown in the figure). The second electrode signal line PVEE1 and the third electrode signal line PVEE2 are located in any one or multiple metal film layers within the driving circuit layer 30. For example, before the second electrode 43 and the third electrode 45 are formed into films, holes can be drilled in the display panel 200 using a laser process, and connecting metal can be filled into the holes to form a first metal pillar P1 and a second metal pillar P2, thus connecting the second electrode 43, the first metal pillar P1, the second electrode signal line PVEE1, and the first negative power bus BUS1. 负Electrical connections: third electrode 45, second metal post P2, third electrode signal line PVEE2, and second negative power bus BUS2. 负 Electrical connection. This configuration helps reduce the impedance of the second electrode 43 and the third electrode 45 (cathode), thereby improving the efficiency of voltage signal transmission.

[0052] Furthermore, placing at least a portion of the second electrode signal line PVEE1 and the third electrode signal line PVEE2 in the non-display area NA is beneficial for achieving a narrow bezel design.

[0053] Figure 7 yes Figure 1 A schematic diagram of the cross-sectional structure of another type of display panel along the AA' direction. Figure 8 yes Figure 1 A schematic diagram of the cross-sectional structure of another type of display panel along the AA' direction. Figure 9 yes Figure 1 A schematic diagram of the cross-sectional structure of another display panel along the AA' direction.

[0054] Based on the above embodiments, continue to refer to Figure 1 , Figure 2 , Figures 7-9 The driving circuit layer 30 includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 stacked together. The driving circuit layer 30 includes a pixel circuit, which is electrically connected to the light-emitting element 40. The pixel circuit includes at least one transistor 31, with the gate 313 of the transistor 31 located on the first metal layer M1, and the source 315 and / or drain 316 of the transistor 31 located on the second metal layer M2. The third metal layer M3 serves as the connection electrode layer between the source 315 and drain 316 of the transistor 31 and the light-emitting element 40.

[0055] For example, refer to Figure 1 , Figure 2 , Figures 7-9Taking a top-gate thin-film transistor (TFT) as an example, the structure of the driving circuit layer 30 is described below. The driving circuit layer 30 of the display panel includes an active layer 311 located on one side of the substrate 20, a gate insulating layer 312 on the active layer 311, a gate electrode 313 on the gate insulating layer 312, and an interlayer insulating layer 314 on the gate electrode 313. The metal layer containing the gate electrode 313 is a first metal layer M1, and the interlayer insulating layer can be formed by an inorganic insulating layer such as silicon oxide or silicon nitride. A source electrode 315 and a drain electrode 316 are located on the interlayer insulating layer 314. The source 315 and drain 316 are located in the second metal layer M2. The source 315 and drain 316 are electrically connected to the source region and drain region respectively through contact holes (not shown in the figure). The source 315 and drain 316 can be metals such as Cr, Pt, Ru, Au, Ag, Mo, Al, W, Cu and / or AlNd, or metals or conductive oxides including ITO, GIZO, GZO, IZO (InZnO) or AZO (AlZnO). The passivation layer 317 located on the source 315 and drain 316 of transistor 31 serves to passivate and protect transistor 31. The drain 315 of transistor 31 is electrically connected to the first electrode 41 (anode) of light-emitting element 40 through the third metal layer M3. The driving circuit layer 30 provides a driving voltage to light-emitting element 40 through transistor 31 to drive light-emitting element 40 to emit light.

[0056] Wherein, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 are located in at least one of the second metal layer M2 and the third metal layer M3. In some embodiments, reference Figure 2 The second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be on the same layer as the source 315 and drain 316 of transistor 31. In some embodiments, reference... Figure 7 The second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be on the same layer as the third metal layer M3. In some embodiments, reference... Figure 8 The second electrode signal line PVEE1 can be on the same layer as the source 315 and drain 316 of transistor 31, and the third electrode signal line PVEE2 can be on the same layer as the third metal layer M3. Further embodiments are not shown here. In other words, the embodiments of this application can, based on the existing driving circuit layer 30 circuit design, reasonably set the film layer positions of the second electrode signal line PVEE1 and the third electrode signal line PVEE2 without affecting the pixel circuit structure design, to realize the reception of the voltage signal of the second electrode 43 and the voltage signal of the third electrode 45, ultimately achieving the switching of the pixel emission mode of the display panel.

[0057] Based on the above embodiments, refer to Figure 2 , Figures 7-9The display panel 200 also includes a pixel defining layer 50, which is located on one side of the substrate 20. The pixel defining layer 50 includes a plurality of pixel openings, and the light-emitting element 40 is located within the pixel openings. The pixel defining layer 50 is sandwiched between the anode and cathode of the light-emitting element 20, and can prevent or reduce color mixing between pixels. Optionally, the material of the pixel defining layer 50 may include at least one of organic insulating materials such as polyimide, polyamide, acrylic resin, cyclobutene, and phenolic resin; the pixel defining layer 50 may also include SiO2, SiNx, Al2O3, CuO, etc. x The pixel defining layer 50 may contain at least one of inorganic insulating materials such as Tb4O7, Y2O3, Nb2O5, and Pr2O3; and the pixel defining layer 50 may also have a multilayer structure formed by alternating organic and inorganic insulating materials.

[0058] In some embodiments, reference Figure 2 , Figures 7-8 In areas with a large space between two adjacent light-emitting elements 40, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be positioned on opposite sides of the pixel opening to reduce crosstalk between voltage signals within the light-emitting element 40. For example, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be symmetrically distributed on both sides of the light-emitting element 20.

[0059] In some embodiments, reference Figure 9 In areas with limited space between two adjacent light-emitting elements 40, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be placed on the same side of the pixel opening, saving the film space occupied by the electrode signal lines and reducing crosstalk between voltage signals between two adjacent light-emitting elements 40.

[0060] Based on the above embodiments, refer to Figure 2 , Figures 7-9 The film thickness of the third electrode 45 is set to be greater than or equal to the film thickness of the second electrode 43. Optionally, the film thickness of the second electrode 43 is 10 Å to 100 Å, and the film thickness of the third electrode 45 is 70 Å to 200 Å. In this application, the second electrode 43 can be made of Ag with a relatively thin thickness, and the third electrode 45 can be made of ITO, IZO, ITO / Ag / ITO, etc., which have better transmittance. The film thickness of the second electrode 43 is less than or equal to the thickness of the third electrode 45. This setting is beneficial to improving the electron injection efficiency of the second electrode 43 and the transmittance of the second electrode 43 and the third electrode 45, thereby improving the luminous brightness of the light-emitting element 20.

[0061] Based on the above embodiments, refer to Figure 2 , Figures 7-9An organic layer 60 is also included between the second electrode 43 and the third electrode 45 to avoid electrical contact between the second electrode 43 and the third electrode 45. For example, at least one of organic insulating materials such as polyimide, polyamide, acrylic resin, cyclobutene and phenolic resin is used.

[0062] Based on the same inventive concept, this application also provides a method for manufacturing a display panel, used to manufacture the display panel provided in the above embodiments. Figure 10 This is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application. (Refer to...) Figures 1-10 The method for manufacturing a display panel provided in this application includes:

[0063] S101, Provide a substrate.

[0064] For example, refer to Figure 2 For example, a rigid substrate 20 can be used.

[0065] S102. A first electrode and a first light-emitting layer are prepared on one side of a substrate.

[0066] refer to Figure 2 Before fabricating the light-emitting element 20, a driving circuit layer 30 and a pixel defining layer 50 need to be sequentially fabricated on one side of the rigid substrate 20. Specifically, a second electrode signal line PVEE1 and a third electrode signal line PVEE2 are fabricated in the second metal layer M2 and / or the third metal layer M3 of the driving circuit layer 30. Multiple pixel openings are formed in the pixel defining layer 50, and a first electrode 41 and a first light-emitting layer 42 of the light-emitting element 20 are sequentially fabricated within each pixel opening. The first electrode 41 is electrically connected to the pixel circuit in the driving circuit layer 30, which provides an anode driving voltage to the first electrode 41 of the light-emitting element 20.

[0067] S103. A first mask is provided, and a second electrode is formed on the side of the first light-emitting layer away from the substrate using the first mask.

[0068] For details, please refer to Figure 2 A patterned fabrication process is employed, using a first mask to deposit the second electrode 43 on the side of the first light-emitting layer 42 furthest from the substrate 20. Simultaneously, a laser process is used to create a first metal pillar P1 within the driving circuit layer 30. The second electrode 43 is electrically connected to the second electrode signal line PVEE1 via the first metal pillar P1, and the second electrode signal line PVEE1 is connected to the first negative power bus BUS1 of the display panel 200. 负 Electrical connection. First negative power bus BUS1 负 It is configured to provide a cathode driving voltage to the second electrode 43.

[0069] S104. A second light-emitting layer is formed on the side of the second electrode away from the substrate.

[0070] For details, please refer to Figure 2 A second light-emitting layer 44 is prepared on the side of the second electrode 43 away from the substrate 20.

[0071] S105. A third electrode is formed on the side of the second light-emitting layer away from the substrate using the first mask.

[0072] For details, please refer to Figure 2 The fabrication process again employs a patterned approach, using a first mask to deposit the third electrode 45 a second time on the side of the second light-emitting layer 44 furthest from the substrate 20. Simultaneously, a laser process is used to create a second metal pillar P2 within the driving circuit layer 30, through which the third electrode 45 is connected to the second negative power bus BUS2. 负 Electrical connection, simultaneously connecting the second negative power bus BUS2 负 The second negative power bus BUS2 of the display panel 200 负 Electrical connection, second negative power bus BUS2 负 It is configured to provide a cathode drive voltage to the third electrode 45.

[0073] It should be noted that this application uses a first mask to prepare the second electrode 43 and the third electrode 45 in two evaporation processes, which can ensure the overlap area of ​​the second electrode 43 and the third electrode 45 on the light-emitting layer, while reducing the preparation cost and process difficulty of the light-emitting element 20.

[0074] Furthermore, in this document, "patterning" specifically refers to a non-monolithic structure, that is, a structure formed by first creating a monolithic material layer and then etching out a specific shape during the manufacturing process. The display panel fabrication method provided in this application also includes the fabrication of other film layers, such as preparing an encapsulation layer on the side of the light-emitting element away from the substrate. Multiple film layers work together to achieve normal display of the display panel. Those skilled in the art will clearly understand this based on the prior art, and it will not be elaborated upon here.

[0075] The display panel prepared by the preparation method provided in the embodiments of this application has the technical effects of the technical solutions in any of the above embodiments. The explanations of the same or corresponding structures and terms as those in the above embodiments will not be repeated here.

[0076] Based on the same inventive concept, this application also provides a display device. Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 11As shown, the display device 300 includes the display panel 200 described in any embodiment of the present invention. Therefore, the display device 300 provided in this application has the technical effects of the technical solutions in any of the above embodiments. Explanations of structures and terms that are the same as or corresponding to those in the above embodiments will not be repeated here. The display device 300 provided in this application can be... Figure 11 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet, digital camera, smart bracelet, smart glasses, in-vehicle display, medical device, industrial control equipment, touch interactive terminal, etc. This application embodiment does not make any special limitation in this regard.

[0077] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises: a substrate substrate; a plurality of light-emitting elements on one side of the substrate substrate, the light-emitting elements comprising a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer, and a third electrode arranged in layers; the first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer, and the third electrode at least partially overlap in the orthographic projection of the substrate substrate; the display state of the display panel comprises a first display state and a second display state; in the first display state, the voltage received by the second electrode is greater than the voltage received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light; in the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light.

2. The display panel of claim 1, wherein, In the first display state and the second display state, the voltage received by the second electrode and the voltage received by the first electrode are different.

3. The display panel of claim 1, wherein, The display state of the display panel further comprises a third display state; in the third display state, the voltage received by the second electrode is equal to the voltage received by the first electrode, and the voltage received by the second electrode is different from the voltage received by the third electrode, and the second light-emitting layer emits light.

4. The display panel of claim 1, wherein, The display panel further comprises a positive power bus, a first negative power bus, and a second negative power bus; the first electrode is electrically connected to the positive power bus, the second electrode is electrically connected to the first negative power bus, and the third electrode is electrically connected to the second negative power bus.

5. The display panel of claim 4, wherein, The display panel comprises a display area and a non-display area; the non-display area at least partially surrounds the display area; Further comprising a driving circuit layer, the driving circuit layer comprising a second electrode signal line and a third electrode signal line; the second electrode signal line is electrically connected to the second electrode and the first negative power bus respectively, and at least part of the second electrode signal line is located in the non-display area; the third electrode signal line is electrically connected to the third electrode and the second negative power bus respectively, and at least part of the third electrode signal line is located in the non-display area.

6. The display panel of claim 5, wherein, The driving circuit layer comprises a first metal layer, a second metal layer, and a third metal layer arranged in layers; The driving circuit layer comprises a pixel circuit, and the pixel circuit is electrically connected to the light-emitting element; The pixel circuit comprises at least one transistor, the gate of the transistor is located in the first metal layer, and the source and / or drain of the transistor is located in the second metal layer; the third metal layer is a connection electrode layer between the source and drain of the transistor and the light-emitting element; The second electrode signal line and the third electrode signal line are located in at least one of the second metal layer and the third metal layer.

7. The display panel of claim 5, wherein, Further comprising a pixel definition layer, The pixel definition layer is located on one side of the substrate substrate; the pixel definition layer comprises a plurality of pixel openings; the light-emitting elements are located in the pixel openings; The second electrode signal line and the third electrode signal line are located on the same side of the pixel opening, or the second electrode signal line and the third electrode signal line are located on opposite sides of the pixel opening respectively.

8. The display panel of claim 1, wherein, The film thickness of the third electrode is greater than or equal to the film thickness of the second electrode.

9. The display panel of claim 8, wherein, The film thickness of the second electrode is 10A-100A, and the film thickness of the third electrode is 70A-200A.

10. The display panel of claim 1, wherein, The second electrode and the third electrode further comprise an organic layer.

11. The display panel of claim 1, wherein, The material of the second electrode and the third electrode comprises one or more of silver, indium tin oxide, indium zinc oxide, or magnesium silver alloy.

12. A method for manufacturing a display panel, characterized by, A method for manufacturing the display panel of any one of claims 1-11, the method comprising: providing a substrate base plate; manufacturing a first electrode and a first light emitting layer on one side of the substrate base plate; providing a first mask, and forming a second electrode on the side of the first light emitting layer away from the substrate base plate using the first mask; forming a second light emitting layer on the side of the second electrode away from the substrate base plate; forming the third electrode on the side of the second light emitting layer away from the substrate base plate using the first mask.

13. A display device comprising: A display panel comprising the display panel of any one of claims 1-11.

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