Multi-level curvature compensated bandgap reference voltage circuit and chip

Abstract

Embodiments of this disclosure provide a multi-level curvature-compensated bandgap reference voltage circuit, including: a first-order temperature compensation circuit and a higher-order curvature compensation circuit, wherein the first-order temperature compensation circuit and the higher-order curvature compensation circuit are decoupled and separated, the higher-order curvature compensation circuit is composed of multiple cascaded VBE nonlinear compensation circuits, the first-order temperature compensation circuit is configured to compensate for the linear relationship between VBE and temperature change, and the higher-order curvature compensation circuit is configured to compensate for the nonlinear relationship between VBE and temperature change.

Description

Technical Field

[0001] The embodiments disclosed herein relate to the field of integrated circuit technology, and more specifically, to a multi-level curvature-compensated bandgap reference voltage circuit and chip. Background Technology

[0002] Bandgap reference voltage sources are a core component of modern precision measurement systems, providing a stable reference voltage with minimal temperature drift. Typically, the temperature drift of a bandgap reference voltage is compensated for with first-order compensation. However, due to process variations (such as errors in semiconductor manufacturing) and process variations (such as batch-to-batch production fluctuations), simple first-order compensation cannot achieve very low temperature drift, failing to meet the requirement of below 30 ppm / ℃. Therefore, the residual curvature after first-order compensation becomes the main source of temperature drift, and this curvature is usually dominated by the nonlinearity of the base-emitter voltage (VBE) of the PNP substrate. To reduce this curvature, high-order curvature compensated bandgap reference voltage sources have been proposed in the prior art.

[0003] Figure 1 This is a schematic diagram of a circuit structure for high-order curvature compensation in existing technology. For example... Figure 1 As shown, based on the first-order compensation, by adding resistors R41 and R42, a current source, and a BJT (Q2), the VBE model after higher-order curvature compensation is as follows: Where Vg0 is a temperature-independent constant; Tr is the reference temperature, usually set to 300K (27℃) for testing and application convenience; XTI is a process-related parameter in the BJT characteristics, typically between 2 and 4 in CMOS processes; β describes the order of the BJT's temperature-dependent characteristics. If the BJT (Q2) is biased with a positive temperature coefficient (PTAT) current, then β = 1; if the BJT is biased with a zero temperature coefficient (ZTC) current, then β = 0; similarly, if the BJT is biased with a negative temperature coefficient (NTC) current, then β < 0. In the above formula, the second term is linearly related to temperature, and therefore can be compensated by the first-order positive temperature coefficient voltage generated by ΔVBE, while the third term includes Tln(T / Tr) with respect to temperature nonlinearity. (Refer to...) Figure 1 As shown, Q0 and Q1 are biased by the PTAT current, and Q2 is biased by the ZTC current, where the PTAT current and the ZTC current are equal at temperature Tr. Therefore, the VBE voltages of Q0 and Q2 are respectively:

[0004]

[0005]

[0006] Therefore, the VBE pressure difference between Q0 and Q2 is:

[0007] The current created by this voltage difference at R42 will flow through R1 and R3. Similarly, a similar current will flow through R2 and R3 across R41. Therefore, the final output Vbg_out becomes:

[0008]

[0009] After combining like terms:

[0010]

[0011] The second term is linearly related to temperature T; therefore, adjusting R3 is sufficient to completely cancel out the PTAT voltage generated by ΔVBE. The fourth term is non-linearly related to temperature and can be compensated for by adjusting the ratio of R3 to R41, R3 / R41.

[0012] However, the high-order curvature compensation method is limited by its own structure, making it difficult to achieve ideal results in practical applications. Since R3 determines both the cancellation of linear and nonlinear terms, adjusting the R3 value to cancel linear terms alters the proportion of nonlinear terms, thus failing to optimally cancel nonlinear terms, and vice versa. Therefore, this curvature compensation circuit can only reduce temperature drift to around 12 ppm / ℃, still falling short of the requirement of below 5 ppm / ℃ for high-performance precision measurement systems (such as precision measuring equipment, aerospace, and instrumentation). Summary of the Invention

[0013] The embodiments described herein provide a multi-level curvature-compensated bandgap reference voltage circuit and chip.

[0014] According to a first aspect of this disclosure, a multi-level curvature-compensated bandgap reference voltage circuit is provided, comprising: a first-order temperature compensation circuit and a higher-order curvature compensation circuit, wherein the first-order temperature compensation circuit and the higher-order curvature compensation circuit are decoupled, the higher-order curvature compensation circuit is composed of multiple cascaded VBE nonlinear compensation circuits, the first-order temperature compensation circuit is configured to compensate for the linear relationship between VBE and temperature change, and the higher-order curvature compensation circuit is configured to compensate for the nonlinear relationship between VBE and temperature change.

[0015] In some embodiments of this disclosure, the first-order temperature compensation circuit includes: a first operational amplifier, a first PMOS transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a first PNP transistor, and a second PNP transistor; one end of the fourth resistor is connected to the drain of the first PMOS transistor, and the other end is connected to the second resistor and the third resistor respectively; the output terminal of the first operational amplifier is connected to the gate of the first PMOS transistor, the first input terminal of the first operational amplifier is connected to the common connection terminal of the first resistor and the third resistor, and the second input terminal of the first operational amplifier is connected to the common connection terminal of the second resistor and the first PNP transistor; one end of the first resistor is connected to the third resistor, and the other end is connected to the emitter of the second PNP transistor; one end of the second resistor is connected to the common connection terminal of the third resistor and the fourth resistor, and the other end is connected to the emitter of the first PNP transistor; the base of the first PNP transistor is connected to the base of the second PNP transistor; the bases and collectors of the first PNP transistor and the second PNP transistor are grounded.

[0016] In some embodiments of this disclosure, the first operational amplifier and the first PMOS transistor form negative feedback, making the voltage at the first input terminal of the first operational amplifier equal to the voltage at the second input terminal. The resistance value of the fourth resistor is adjustable, and first-order temperature compensation is achieved by adjusting the resistance value of the fourth resistor.

[0017] In some embodiments of this disclosure, the size ratio of the first PNP tube and the second PNP tube is 1:n, where n is an integer greater than 1.

[0018] In some embodiments of this disclosure, the VBE nonlinear compensation circuit includes: a second operational amplifier, an NMOS transistor, a second PMOS transistor, a third PNP transistor, a fourth PNP transistor, a PTAT current source, a compensation current source, and a bias current source; the PTAT current source is connected to the emitter of the third PNP transistor to provide bias current to the third PNP transistor; the compensation current source is connected to the drain of the NMOS transistor and the gate of the second PMOS transistor to provide bias current to the fourth PNP transistor; the source of the NMOS transistor is connected to the emitter of the fourth PNP transistor, the drain of the second PMOS transistor is connected to the bias current source, and the other end of the bias current source is grounded; the first input terminal of the second operational amplifier is connected to the emitter of the third PNP transistor, the second input terminal of the second operational amplifier is connected to the emitter of the fourth PNP transistor, and the output terminal of the second operational amplifier is connected to the gate of the NMOS transistor; the collectors of the third PNP transistor and the fourth PNP transistor are grounded.

[0019] In some embodiments of this disclosure, the second operational amplifier and the NMOS transistor form a first negative feedback, making the emitter voltages of the third PNP transistor and the fourth PNP transistor equal; the NMOS transistor, the fourth PNP transistor, the PTAT current source, the second PMOS transistor, and the bias current source form a second negative feedback, making the base of the fourth PNP transistor the voltage output terminal.

[0020] In some embodiments of this disclosure, the temperature characteristics of the compensation current source are zero temperature coefficient or negative temperature coefficient. At the reference temperature, the current generated by the PTAT current source and the compensation current source are equal. High-order curvature compensation is achieved by adjusting the temperature characteristics of the compensation current and the number of cascaded VBE nonlinear compensation circuits.

[0021] In some embodiments of this disclosure, the nonlinear compensation amount for each stage of the VBE nonlinear compensation circuit is:

[0022]

[0023] Where VBE(Qa)-VBE(Qb) is the base-emitter voltage difference between the third PNP transistor and the fourth PNP transistor, Tr is the reference temperature, K is the Boltzmann constant, q is the charge constant of the electron, T is the absolute temperature, and γ is the temperature characteristic of the compensation current source.

[0024] Through multi-stage cascading, the output voltage of the bandgap reference voltage source is:

[0025]

[0026] In the formula, Vg0 is a constant independent of temperature, Tr is the reference temperature, K is the Boltzmann constant, q is the charge constant of an electron, T is the absolute temperature, γ is the temperature characteristic of the compensation current source, XTI is a process-related parameter, m is the number of cascaded VBE nonlinear compensation circuits, VBE is the voltage drop between the base and emitter, and ΔVBE is the base-emitter voltage difference between the first PNP transistor and the second PNP transistor.

[0027] According to a second aspect of this disclosure, a chip is provided. The chip includes a multi-stage curvature-compensated bandgap reference voltage circuit according to a first aspect of this disclosure.

[0028] According to a third aspect of this disclosure, an electronic device is provided. The electronic device includes a chip according to a second aspect of this disclosure. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:

[0030] Figure 1 This is a schematic diagram of the circuit structure for high-order curvature compensation in existing technology;

[0031] Figure 2 This is a schematic block diagram of a multi-level curvature-compensated bandgap reference voltage circuit 100 according to an embodiment of the present disclosure.

[0032] Figure 3 This is a schematic block diagram of a first-order temperature compensation circuit 110 according to an embodiment of the present disclosure.

[0033] Figure 4 An exemplary circuit diagram of a VBE nonlinear compensation circuit according to an embodiment of the present disclosure is shown;

[0034] Figure 5 This is a comparison chart of the voltage performance of a first-order temperature compensation circuit and a high-order curvature compensation circuit.

[0035] It should be noted that the elements in the attached diagram are schematic and not drawn to scale. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0037] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0038] The embodiments of this disclosure propose a multi-level curvature-compensated bandgap reference voltage circuit that achieves precise control of temperature changes by combining first-order and higher-order temperature compensation mechanisms, thereby generating a reference voltage with minimal impact from temperature changes (temperature drift less than 5 ppm / ℃).

[0039] Figure 2 This is a schematic block diagram of a multi-level curvature-compensated bandgap reference voltage circuit 100 according to an embodiment of the present disclosure. Figure 2 In the example, the multi-stage curvature-compensated bandgap reference voltage circuit 100 includes a first-order temperature compensation circuit 110 and a higher-order curvature compensation circuit 120. The first-order temperature compensation circuit 110 and the higher-order curvature compensation circuit 120 are decoupled. The higher-order curvature compensation circuit 120 is composed of multiple cascaded VBE nonlinear compensation circuits (VBE nonlinear compensation circuit 1, VBE nonlinear compensation circuit 2, ..., VBE nonlinear compensation circuit m). The first-order temperature compensation circuit 110 is configured to compensate for the linear relationship between VBE and temperature changes, thereby eliminating the linear temperature dependence in the reference voltage, i.e., eliminating reference voltage fluctuations caused by the linear change of VBE with temperature. The higher-order curvature compensation circuit 120 is configured to compensate for the nonlinear relationship between VBE and temperature changes, thereby eliminating nonlinear changes caused by temperature, i.e., compensating for the second or higher-order temperature effects of the base-emitter voltage VBE in different temperature ranges.

[0040] In the circuit design described above, the first-order temperature compensation circuit and the higher-order curvature compensation circuit are separated and decoupled. This means that the first-order compensation circuit and the higher-order compensation circuit handle different temperature-dependent problems separately without interfering with each other, thus avoiding potential mutual influence during the compensation process. The advantage of this decoupled design is that each circuit module focuses on its specific temperature effect, making the overall compensation more accurate and efficient.

[0041] Figure 3 This is a schematic block diagram of a first-order temperature compensation circuit 110 according to an embodiment of the present disclosure. (Refer to...) Figure 3 As shown, the first-order temperature compensation circuit 110 includes: a first operational amplifier A0, a first PMOS transistor Mp0, a first resistor R0, a second resistor R1, a third resistor R2, a fourth resistor R3, a first PNP transistor Q0, and a second PNP transistor Q1. One end of the fourth resistor R3 is connected to the drain of the first PMOS transistor Mp0, and the other end is connected to the second resistor R1 and the third resistor R2 respectively; the output terminal of the first operational amplifier A0 is connected to the gate of the first PMOS transistor Mp0, the first input terminal (positive input terminal) of the first operational amplifier A0 is connected to the common connection terminal of the first resistor R0 and the third resistor R2, and the second input terminal (negative input terminal) of the first operational amplifier A0 is connected to the common connection terminal of the second resistor R1 and the first PNP transistor Q0; one end of the first resistor R0 is connected to the third resistor R2, and the other end is connected to the emitter of the second PNP transistor Q1; one end of the second resistor R1 is connected to the common connection terminal of the third resistor R2 and the fourth resistor R3, and the other end is connected to the emitter of the first PNP transistor Q0; the base of the first PNP transistor Q0 is connected to the base of the second PNP transistor Q1; the bases and collectors of the first PNP transistor Q0 and the second PNP transistor Q1 are grounded.

[0042] The first operational amplifier A0 and the first PMOS transistor Mp0 form negative feedback, making the voltage at the first input terminal of the first operational amplifier A0 equal to the voltage at the second input terminal, that is, V1 = V2. The resistance value of the fourth resistor R3 is adjustable, and first-order temperature compensation can be achieved by adjusting the resistance value of the fourth resistor R3.

[0043] Specifically, since V1 = V2, the current flowing through the first resistor R0 is ΔVBE / R0, where ΔVBE is the base-emitter voltage difference between the first PNP transistor Q0 and the second PNP transistor Q1. Figure 2 In the circuit shown, assuming R1 = R2, the output voltage formula is:

[0044]

[0045] VBE is the base-emitter voltage. Since VBE has a negative temperature coefficient and ΔVBE has a first-order positive temperature coefficient, adjusting R3 can adjust the ratio of the negative temperature coefficient to the positive temperature coefficient, thus making Vbg_out first-order stable with temperature.

[0046] It should be noted that the size ratio of the first PNP transistor Q0 to the second PNP transistor Q1 is 1:n, where n is an integer greater than 1. Therefore, the different current densities of Q1 and Q0 will lead to a difference in their VBE (base-emitter voltage). This difference varies with temperature, and this difference can be used to adjust temperature compensation.

[0047] Figure 4 An exemplary circuit diagram of a VBE nonlinear compensation circuit according to an embodiment of the present disclosure is shown. Figure 4 In the example, the VBE nonlinear compensation circuit includes: a second operational amplifier A1, an NMOS transistor Mn0, a second PMOS transistor Mp1, a third PNP transistor Qa, a fourth PNP transistor Qb, a PTAT current source Iptat, a compensation current source Icor, and a bias current source Ibias. The PTAT current source Iptat provides a temperature-proportional current, while the compensation current source Icor provides a current with a zero temperature coefficient (ZTC) or negative temperature coefficient (NTC) temperature characteristic. The output current of the compensation current source Icor is compared and adjusted with the current change of the PTAT current source as the temperature changes. At the reference temperature, the currents generated by the PTAT current source and the compensation current source are equal. High-order curvature compensation is achieved by adjusting the temperature characteristic of the compensation current and the number of cascaded VBE nonlinear compensation circuits.

[0048] The PTAT current source Iptat is connected to the emitter of the third PNP transistor Qa, providing bias current for Qa. The compensation current source Icor is connected to the drain of the NMOS transistor Mn0 and the gate of the second PMOS transistor Mp1, providing bias current for the fourth PNP transistor Qb. The source of the NMOS transistor Mn0 is connected to the emitter of the fourth PNP transistor Qb, and the drain of the second PMOS transistor Mp1 is connected to the bias current source Ibias and the base of Qb. The other end of the bias current source Ibias is grounded. The first input (positive input) of the second operational amplifier A1 is connected to the emitter of the third PNP transistor Qa, and the second input (negative input) of the second operational amplifier A1 is connected to the emitter of the fourth PNP transistor Qb. The output of the second operational amplifier A1 is connected to the gate of the NMOS transistor Mn0; the collectors of the third PNP transistor Qa and the fourth PNP transistor Qb are grounded.

[0049] exist Figure 4 In the example, the second operational amplifier A1 and the NMOS transistor Mn0 form the first negative feedback, making the emitter voltages of the third PNP transistor Qa and the fourth PNP transistor Qb equal, i.e., Vea = Veb. The source of the NMOS transistor Mn0 is connected to the emitter of the fourth PNP transistor Qb, the drain is connected to the compensation current source, and the gate is controlled by the output of the second operational amplifier A1. The drain of the second PMOS transistor Mp1 is connected to the bias current source and the base of Qb, and the gate is connected to the compensation current source, reducing the output impedance through feedback. Therefore, the NMOS transistor Mn0, the fourth PNP transistor Qb, the compensation current Icor, the second PMOS transistor Mp1, and the bias current source Ibias form the second negative feedback, making the base of the fourth PNP transistor Qb the voltage output terminal Vout, thus stabilizing the output voltage.

[0050] according to Figure 4 In the provided circuit, the VBE values ​​of the third PNP transistor Qa and the fourth PNP transistor Qb are respectively:

[0051]

[0052] Assuming XTI = 4.6, setting m = 3, and γ = -0.2, this means that Qb is biased by a negative temperature coefficient current in this embodiment. Since the emitter voltages of Qa and Qb are equal, the VBE voltage difference between Qa and Qb will be reflected in Vout-Vin, i.e.:

[0053]

[0054] Where VBE(Qa)-VBE(Qb) is the base-emitter voltage difference between the third and fourth PNP transistors, which is the single-stage VBE nonlinear compensation amount. Tr is the reference temperature, K is the Boltzmann constant, q is the electron charge constant, T is the absolute temperature, and γ is the temperature characteristic of the compensation current source.

[0055] Through multi-stage cascading, the final bandgap reference voltage source output voltage is:

[0056]

[0057] After sorting, we get:

[0058]

[0059] In the formula, Vg0 is a constant independent of temperature, Tr is the reference temperature, K is the Boltzmann constant, q is the charge constant of an electron, T is the absolute temperature, γ is the temperature characteristic of the compensation current source, XTI is a process-related parameter, m is the number of cascaded VBE nonlinear compensation circuits, VBE is the voltage drop between the base and emitter, and ΔVBE is the base-emitter voltage difference between the first PNP transistor and the second PNP transistor.

[0060] Compared to changing R3, this embodiment uses m(1-γ)*KT / q*lnT to cancel the nonlinear term in the above equation, so that R3 can be used only to cancel the linear term without affecting the nonlinear term. Therefore, by adjusting the values ​​of m, γ, and R3 individually, the reference source obtains the optimal output.

[0061] Figure 5 This is a comparison chart of the voltage performance of a first-order temperature compensation circuit and a higher-order curvature compensation circuit. Figure 5 In the example, the dashed line shows the relationship between the output voltage of the first-order compensated reference source and temperature change, while the solid line shows the relationship between the output voltage of the multi-level curvature compensated reference source and temperature change. Comparing the dashed and solid lines, the performance of the reference source provided in this embodiment is significantly improved.

[0062] Embodiments of this disclosure also provide a chip. The chip includes a multi-stage curvature-compensated bandgap reference voltage circuit according to embodiments of this disclosure. This chip is, for example, a chip used to provide a high-precision and high-stability reference voltage.

[0063] Embodiments of this disclosure also provide an electronic device. This electronic device includes a chip according to embodiments of this disclosure. The electronic device is, for example, a high-performance precision measurement system such as a precision measuring device, aerospace equipment, or industrial instrumentation.

[0064] In summary, the multi-stage curvature-compensated bandgap reference voltage circuit according to embodiments of this disclosure includes a first-order temperature compensation circuit that specifically compensates for the linear relationship between VBE and temperature changes, effectively reducing the fundamental error caused by temperature variations. The higher-order curvature compensation circuit, through multiple cascaded VBE nonlinear compensation circuits, compensates for the nonlinear relationship between VBE and temperature changes, thereby significantly reducing higher-order temperature effects (e.g., the nonlinear influence of temperature on the bandgap voltage). This combination of linear and nonlinear compensation techniques enables the circuit to maintain better temperature stability over a wider temperature range, especially in environments with large temperature variations, providing a more accurate reference voltage. Compared to traditional bandgap reference voltage circuits, it better handles complex temperature variation characteristics, providing a more stable and accurate reference voltage, suitable for applications requiring high precision and high stability.

[0065] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0066] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0067] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A multi-stage curvature-compensated bandgap reference voltage circuit, comprising: A first-order temperature compensation circuit and a higher-order curvature compensation circuit are characterized in that the first-order temperature compensation circuit and the higher-order curvature compensation circuit are decoupled. The higher-order curvature compensation circuit is composed of multiple cascaded VBE nonlinear compensation circuits. The first-order temperature compensation circuit is configured to compensate for the linear relationship between VBE and temperature change, and the higher-order curvature compensation circuit is configured to compensate for the nonlinear relationship between VBE and temperature change. The VBE nonlinear compensation circuit includes: a second operational amplifier, an NMOS transistor, a second PMOS transistor, a third PNP transistor, a fourth PNP transistor, a PTAT current source, a compensation current source, and a bias current source. The PTAT current source is connected to the emitter of the third PNP transistor and is used for... A bias current is provided for the third PNP transistor; the compensation current source is connected to the drain of the NMOS transistor and the gate of the second PMOS transistor, respectively, to provide a bias current for the fourth PNP transistor; the source of the NMOS transistor is connected to the emitter of the fourth PNP transistor, the drain of the second PMOS transistor is connected to the bias current source, and the other end of the bias current source is grounded; the first input terminal of the second operational amplifier is connected to the emitter of the third PNP transistor, the second input terminal of the second operational amplifier is connected to the emitter of the fourth PNP transistor, and the output terminal of the second operational amplifier is connected to the gate of the NMOS transistor; the collectors of the third PNP transistor and the fourth PNP transistor are grounded.

2. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 1, characterized in that, The first-order temperature compensation circuit includes: a first operational amplifier, a first PMOS transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a first PNP transistor, and a second PNP transistor; one end of the fourth resistor is connected to the drain of the first PMOS transistor, and the other end is connected to the second resistor and the third resistor respectively; the output terminal of the first operational amplifier is connected to the gate of the first PMOS transistor, the first input terminal of the first operational amplifier is connected to the common connection terminal of the first resistor and the third resistor, and the second input terminal of the first operational amplifier is connected to the common connection terminal of the second resistor and the first PNP transistor; one end of the first resistor is connected to the third resistor, and the other end is connected to the emitter of the second PNP transistor; one end of the second resistor is connected to the common connection terminal of the third resistor and the fourth resistor, and the other end is connected to the emitter of the first PNP transistor; the base of the first PNP transistor is connected to the base of the second PNP transistor; the bases and collectors of the first PNP transistor and the second PNP transistor are grounded.

3. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 2, characterized in that, The first operational amplifier and the first PMOS transistor form negative feedback, making the voltage at the first input terminal of the first operational amplifier equal to the voltage at the second input terminal. The resistance value of the fourth resistor is adjustable, and first-order temperature compensation is achieved by adjusting the resistance value of the fourth resistor.

4. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 2, characterized in that, The size ratio of the first PNP tube to the second PNP tube is 1:n, where n is an integer greater than 1.

5. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 1, characterized in that, The second operational amplifier and the NMOS transistor form a first negative feedback, making the emitter voltages of the third PNP transistor and the fourth PNP transistor equal; the NMOS transistor, the fourth PNP transistor, the PTAT current source, the second PMOS transistor and the bias current source form a second negative feedback, making the base of the fourth PNP transistor the voltage output terminal.

6. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 1, characterized in that, The temperature characteristics of the compensation current source are zero or negative temperature coefficient. At the reference temperature, the current generated by the PTAT current source and the compensation current source are equal. High-order curvature compensation is achieved by adjusting the temperature characteristics of the compensation current and the number of cascaded VBE nonlinear compensation circuits.

7. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 1, characterized in that, The nonlinear compensation amount of the VBE nonlinear compensation circuit at each stage is: ； in, Tr is the base-emitter voltage difference between the third and fourth PNP transistors, K is the Boltzmann constant, q is the electron charge constant, and T is the absolute temperature. It is the temperature characteristic of the compensation current source.

8. The multi-stage curvature-compensated bandgap reference voltage circuit according to claim 2, characterized in that, Through multi-stage cascading, the output voltage of the bandgap reference voltage circuit is: ； In the formula, Vg0 is a constant independent of temperature, Tr is the reference temperature, K is the Boltzmann constant, q is the charge constant of the electron, and T is the absolute temperature. This represents the temperature characteristics of the compensation current source, XTI is a process-related parameter, m is the number of cascaded VBE nonlinear compensation circuits, and VBE is the voltage drop between the base and emitter. VBE is the base-emitter voltage difference between the first PNP transistor and the second PNP transistor, R1 is the second resistor, and R3 is the fourth resistor.

9. A chip, characterized in that, Includes a bandgap reference voltage circuit with multi-stage curvature compensation as described in any one of claims 1-8.

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