Fault-tolerant method for non-redundancy fault reconstruction of spaceborne computer

Abstract

The invention belongs to the technical field of satellite computer fault tolerance, and particularly relates to a fault tolerance method for non-redundancy fault reconstruction of a satellite-borne computer with multiple heterogeneous components cooperating on a satellite. On-satellite tasks are cooperatively completed through on-satellite components such as a remote control telemetering responder, various sensors, an execution mechanism and an expansion mechanism by mining residual computing resources, memories and storage capacities of the components, work of an on-satellite computer is replaced, and reconstruction of the on-satellite computer is achieved under the condition that no extra hardware redundancy exists. Aiming at the conditions of faults, failures and the like of the satellite-borne computer of a microsatellite, the fault-tolerant method for non-redundant fault reconstruction of the satellite-borne computer for mining potential resources of the satellite, provided by the invention, has the beneficial effects that on-satellite tasks are distributed to satellite components for cooperative operation by mining potential calculation, memory and storage resources of various components; in an emergency, basic functions of a satellite can be maintained, and a rescue type redundancy-free reconstruction fault-tolerant method under the condition that a satellite-borne computer has a fault is realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of satellite computer fault tolerance, and specifically is a fault-tolerant method for non-redundant fault reconstruction of a satellite-borne computer by mining potential satellite resources and coordinating multiple heterogeneous components on the satellite. Background Art

[0002] The single-satellite performance, functional density, agile maneuverability and satellite life of micro-satellites have been greatly improved, and there are successful operation cases in both military and civilian fields, indicating that micro-satellites have entered the stage of equipment and practical application from testing and technical verification. The onboard computer is responsible for the central control and data management of the satellite, managing the hardware resources of the entire electrical system, and mainly completing many functions such as uplink remote control commands, downlink telemetry data, attitude and orbit control, thermal control, mission management, equipment management, time management, power supply and distribution management, health management, bus management and data management.

[0003] Fault-tolerant technology is an important technical approach to ensure the reliability of spacecraft control computers. Its concept is that the failure of a component or subsystem does not cause the failure of the entire system. The most basic idea is to use low-reliability components to achieve a high-reliability system. During the flight mission, the satellite is exposed to a complex and harsh space environment. These space environments will cause damage effects such as total dose effect, single-particle latch, single-particle upset, and single-particle burnout on the computer, which puts high demands on the reliability of the computer. In order to meet the characteristics of low cost and short development cycle of micro-satellites, on-board computers tend to use Standard commercial off the shelf (COTS) devices. Compared with aerospace-grade devices, COTS devices have higher processing performance, smaller size and power consumption, and lower cost, but poor reliability. The total radiation dose that can be tolerated in the space environment is generally less than 10Krads. Fault-tolerant technology can enhance the reliability of spacecraft, reduce maintenance costs, and increase the life of spacecraft. It is of great significance to ensure the safe and stable operation of spacecraft and has become a research focus in the aerospace field.

[0004] In view of the actual operation status of micro-satellites, the fault tolerance measures of their onboard computers have the following characteristics:

[0005] (1) Classic computer hardware fault tolerance and reconstruction technology is implemented by adding redundant backup measures of additional hardware resources, which increases the complexity of the system and is contrary to the requirements of microsatellites for mass, volume, and cost.

[0006] The classic computer hardware fault tolerance structure is divided into module-level redundancy and system-level redundancy, and the backup methods include dual-machine cold backup, hot backup, triple-module redundancy, multi-machine homogeneous + heterogeneous, and hybrid fault tolerance, etc. However, these fault tolerance methods not only require the addition of equal hardware modules, but also require the addition of arbitration control, clock and data synchronization circuits, resulting in greater requirements for the power consumption, mass, and volume of the entire satellite system, greatly increasing system complexity and launch costs.

[0007] (2) The development of microsatellite topology architecture, bus network, component electronic structure and construction specifications requires that the satellite have design margins to enable multi-machine collaborative computer fault tolerance and reconstruction to have development potential and possibility.

[0008] 1) The electronic structure, composition and macroscopic working mechanism of various satellite components are very similar to those of onboard computers. Most of them are a complete "input command-signal sampling-computation processing-execution output" hardware architecture, which is composed of basic hardware units such as processors, memory, bus interfaces, and secondary power supplies. They can be regarded as an independent and complete small system. The components ultimately realize system functions and communications through software program operation. Similar hardware platforms provide an electronic basis for the reconstruction of computers by components.

[0009] 2) At present, the satellite system topology has developed into a distributed network architecture in which various components independently process calculations. The nodes of each component exchange data through a bus network (such as CAN, SpaceWire, 1553B and I2C bus, etc.), and there is no coupling relationship between them. Although the bus network generally adopts a one-master-multiple-slave architecture in software design, with the computer as the host and other components as slaves, the nodes are physically equal, and the information sent by any node can be obtained by all other nodes, and the information sent by any node can also be obtained, and there is link redundancy.

[0010] 3) The design threshold of satellite systems and components is higher than the actual demand, generally reaching more than 1.5 times according to engineering requirements, so that the system has a design margin and the components are in a non-saturated working condition, that is, there are potential computing and storage resources that can be tapped, so that the satellite has development potential.

[0011] (3) The ground system can no longer repair or replenish the satellite's own material and energy. Software is the only part of a satellite that can be modified in orbit after launch.

[0012] In view of the need for fault tolerance of onboard computers of micro-satellites, under the constraints of mass, volume, and cost, a fault-tolerant method without additional hardware resources is urgently needed. This method can deeply tap the limited resources on board, utilize the existing electronic structure of components and the satellite system topology architecture, and realize a fault-tolerant method for non-redundant fault reconstruction of onboard computers. Summary of the invention

[0013] The purpose of the present invention is to avoid the shortcomings of the prior art and propose a fault-tolerant method for reconfiguring a satellite-borne computer without redundant faults by mining the potential resources of the satellite. The method uses on-board components such as remote control and telemetry transponders, various sensors, actuators, deployment mechanisms, etc. to mine the remaining computing resources, memory, and storage capacity of these components to collaboratively complete on-board tasks, replace the work of the on-board computer, and realize the reconstruction of the on-board computer without additional hardware redundancy.

[0014] To achieve the above object, the technical solution adopted by the present invention is a fault-tolerant method for non-redundant fault reconstruction of a satellite-borne computer, comprising the following steps:

[0015] The first step is to characterize the onboard hardware resources and model the onboard software tasks.

[0016] On-board hardware resource characterization and modeling include characterization of design component computing resources, memory resources, and storage resources, and proposal of component models and bus communication models;

[0017] Satellite software task modeling refers to the establishment of a task model for satellite software tasks, including task benchmark calculation time, memory resources, storage resource occupancy, and bus data transmission and reception;

[0018] The second step is task scheduling and allocation method, including:

[0019] (1) Establishing a task scheduling model refers to proposing a task scheduling model that satisfies the dependencies between tasks and avoids bus communication time conflicts;

[0020] (2) Task priority value calculation refers to the calculation of scheduling weights and task priorities based on task characteristics before allocating and scheduling tasks, and completing task sorting;

[0021] (3) Task scheduling attribute description, proposing the plug-in strategy of the task scheduling process and the description of task scheduling attributes;

[0022] (4) Task allocation constraints and algorithms: Task allocation constraints including memory resources and storage resources of components are proposed, the scheduling length is used as the task allocation target, and a task allocation algorithm is proposed to complete task allocation;

[0023] The third step is to develop a fault-tolerant method for multi-machine collaborative onboard computer reconstruction.

[0024] The execution time and communication time interval of the tasks assigned to each component are determined based on the task scheduling model and allocation method. After each component completes time synchronization, it completes task execution and data communication according to its own time, realizes the satellite service software function, completes the reconstruction of the onboard computer, and realizes a fault-tolerant method without redundant fault reconstruction.

[0025] Furthermore, in the first step, the hardware resources on the satellite are characterized and modeled, the computing resources, memory resources, and storage resources of the design components are characterized, and a component model and a bus communication model are proposed, including:

[0026] Define the component set as p = {p1, p2, ... p m}, component p x The resources include computing resources C x 、Memory resources M x , storage resources S x The node of the component p x It can be expressed by the following formula:

[0027] p x ={C x ,M x ,S x},

[0028] (1) Computing resources,

[0029] When evaluating the theoretical computing performance of a component, the main consideration is the processor's main frequency, which is expressed as,

[0030] C th,x =f x ,

[0031] where f x For the component p x Processor frequency, C th,x is the theoretical calculated performance of component i;

[0032] The computing resources of a component are expressed by the ratio of the theoretical computing performance of the component to the original onboard computer. x The computing resources C x It can be expressed as,

[0033]

[0034] Among them, C x For the component p x The computing resources, C th,x , C th,A They are respectively x Theoretical computing performance with onboard computers;

[0035] (2) Memory resources

[0036] The memory resources of a component are represented by the RAM memory capacity. Excluding the memory space occupied by its own tasks, the memory resources that the component can provide are expressed as,

[0037]

[0038] Among them, M x For the component p x Memory resources, For the component p x Memory capacity, For the component p x The occupied memory capacity;

[0039] (3) Storage resources

[0040] Similar to memory resources, the remaining storage capacity of Flash is used to represent the storage resources of the components, expressed as,

[0041]

[0042] Among them, S x For the component p x storage resources, For the component p x Total storage capacity, For the component p x Occupied storage capacity;

[0043] The satellite upper components complete the data communication between the single machines through the bus. Taking the CAN bus as the research object, the bus occupancy time for data transmission through the bus can be expressed as:

[0044]

[0045] Among them, t bus is the bus occupancy time of the data transmission process, Q is the bus transmission rate, n frame is the CAN message frame length; t er To correct the error, add t to prevent the time synchronization of multiple components from causing errors or other reasons that may lead to CAN message transmission time conflicts. er make corrections;

[0046] For CAN extended frame single frame message, n frame is a constant, the bus transmission rate Q and the error correction time t er After the bus occupancy time is determined, let the transmission time be μ = n frame / Q+t er , then the number of communications is k cm When , the bus occupancy time can be expressed as,

[0047] TBS(k cm ) = k cm μ,

[0048] Among them, k cmTBS(k is the number of CAN extended frame communications. cm ) is the number of communication lines k cm The bus occupancy time, μ is the transmission time of a single frame message of the CAN extended frame;

[0049] Furthermore, in the satellite service software task modeling described in the first step, a task model including task benchmark calculation time, memory resources, storage resource occupancy and bus data transmission and reception is established for the satellite service software task, specifically including:

[0050] During the execution of onboard tasks, there is a demand for memory and storage resources, which occupies the processor to complete the task calculation. In addition to calculation, the task execution may generate data communication with other components, which is hereinafter referred to as data communication. At the same time, there is inter-task communication between the assigned tasks, which generates bus occupancy, which is hereinafter referred to as inter-task communication.

[0051] In order to clarify the allocation and execution of tasks, determine the resource consumption and bus occupancy during communication, the following definitions are given:

[0052] Definition 1. Satellite service: A function in the satellite service software is called satellite service, such as telemetry, remote control, thermal control, health management, and attitude control.

[0053] Definition 2. Task: A task unit assigned to a component for execution, consisting of one or more of the three parts: data communication, inter-task communication, and task computation.

[0054] The execution of tasks with dependencies needs to consider the priority constraints of tasks and the communication volume between tasks. A task may have multiple predecessors, and the task can only start to execute after all the communication between the predecessors and the task is completed, which is called pred(v i ) is task v i The direct predecessor set, succ(v i ) is task v i The direct successor set of ;

[0055] Define the task set V = {v1,v2,…,v n}, each task is represented by the following set,

[0056]

[0057] Among them, resource requirements in are the memory resource requirements and storage resource requirements of the task respectively; the benchmark calculation time It represents the time required to complete the calculation of the task when running in the onboard computer;

[0058] Data Communications TC i=comm(v i ) represents a target component set for data communication, The amount of data sent for data. The amount of data received for the returned data; Task v i In the component p x When executing, there is p y ∈TC i , that is, p y For task v i The data communication target component, then task v i Towards component p y The amount of data sent is expressed as DTT (v i ,p y ), task v i Pair of components y The amount of received return data is expressed as DTR (v i ,p y ); use proc(v i ) indicates the execution of task v i Components, such as proc(v i )∈TC i , that is, the data communication target is to execute task v i When the components are connected, the communication data does not need to occupy the bus transmission, and the communication data volume can be ignored, which is expressed as,

[0059] DTT i ,proc(v i )]=DTR[v i ,proc(v i )]=0,

[0060] Inter-task communication TT i =succ(v i ) is the target task set of communication, indicating that the task v i The set of successor tasks of is the set of data volume for communication; if task v j ∈succ(v i ), that is, task v j Yes i The amount of task synchronization communication data is expressed as DTS(v i ,v j );

[0061] Mission v i Located in the component p x The task completion time TFN(v i ,p x) includes data communication time and task calculation time, expressed as,

[0062] TFN(v i ,p x )=TTR(v i ,p x )+TCL(v i ,p x ),

[0063] Among them, TTR (v i ,p x ) is the data sending time, that is, the component p x The time to communicate data to all components that are not their own targets is expressed as,

[0064]

[0065] Among them, TCL (v i ,p x ) is the calculation time, that is, the component p x Run Task v i The task calculation time is calculated by the benchmark calculation time. The computing resources of the components are obtained and expressed as,

[0066]

[0067] Mission v i In the component p x The execution process is to first receive the inter-task communication of the predecessor task, and then start the sending and receiving process of data communication. The data communication target is p x When the communication volume is 0, the communication volume is DTT (v i ,p y ) and DTR(v i ,p y ) indicates that after completing data communication, task calculation is carried out, and finally inter-task communication is carried out with the subsequent tasks.

[0068] Furthermore, in the second step, a task scheduling model is established, which specifically includes:

[0069] In order to meet the priority constraints during task execution, the task is represented by a directed acyclic graph (DAG) with weighted nodes and edges. A DAG with weighted nodes and edges is a binary group G = <V, E>;

[0070] V=(v1,v2,v3,…,v n ) represents the set of tasks that can be executed on any idle component, and n represents the number of tasks;

[0071] The set of communication edges representing the interdependencies between tasks, e ij Represents task v j The prerequisite for execution is v i Must complete v i With v j Communication between the predecessors; a task with multiple predecessors needs to complete the communication between all predecessors and the task before it can start execution;

[0072] Weight w(v i ) represents task v i The computational cost of is expressed as the benchmark computational time of the task, that is,

[0073]

[0074] Weight Represents task v i The data communication cost is expressed by the amount of data that the task communicates to all target components, that is,

[0075]

[0076] Weight w(e ij ) represents task v i With v j The amount of communication between them is expressed as,

[0077] w(e ij )=DTS(v i ,v j ),

[0078] The target processing system structure of the scheduling system model is represented by an undirected graph G = <P, L>, where P represents a set of m components with a variable number of nodes, and L represents the communication link connecting the components. x represents the xth component, l xy Represents the connection component p x and p y The undirected edges can realize two-way communication.

[0079] Weight w(p x ) reflects the execution speed of the component, expressed in terms of the computing resources of the component, i.e.,

[0080] w(p x )=C x ,

[0081] Weight w(l xy ) reflects the communication speed of the link. Since the components are connected through the bus, the communication rate between any two stand-alone machines is equal, which can be expressed as,

[0082]

[0083] Among them, l bus Represents the CAN bus communication link. Each component is connected to each other through the bus, so L = l bus ;

[0084] Furthermore, the task priority value calculation in the second step specifically includes:

[0085] Before allocating and scheduling tasks, the scheduling weight and task priority are calculated first according to the task characteristics, and the task sorting is completed.

[0086] Mission v i Corresponding data communication weights Calculate the weight w i and communication edge i,j The corresponding scheduling weight d i,j Defined as,

[0087]

[0088] The task priority weights in the DAG model are recursively defined as follows:

[0089]

[0090] Among them, rank(v i ) is the task v i The priority value, succ(v i ) is the task v i The direct successor set of i It is task v i The calculation weight of It is task v i The data communication weight, d i,j is the inter-task communication edge e i,j The scheduling communication weight of each task in the DAG model is recursively calculated by traversing the DAG upward through the export task. exit , whose priority value is,

[0091]

[0092] Among them, rank(v exit ) is the export task v exit The priority value, w exit is the calculation weight of the export task, is the data communication weight of the export task;

[0093] The task priorities are obtained by arranging them in non-ascending order according to their priority values ​​and the tasks are scheduled in sequence.

[0094] Furthermore, the task scheduling attribute description in the second step specifically includes:

[0095] The plug-in strategy is used to complete the scheduling of tasks and data communication start time, using Available(DRT,t,p x ) indicates that the task is in the component p x The optimal start time of the task is that the task takes up a component time of t and the start time is greater than DRT; similarly, use Available(DRT,t,l bus ) indicates that the communication is on bus l bus The optimal start time of the communication is t, and the start time is greater than DRT. The optimal time block of the plug-in strategy scheduling is either between tasks that have been scheduled to the component or after the latest completed task. The specific algorithm is as follows:

[0096] The algorithm input includes data preparation time DRT, occupied time block length t, and the component or bus scheduling table sche_tab, which records the occupied time blocks and idle time blocks of the components or buses. The algorithm steps are as follows: when sche_tab is empty, the optimal start time is output as 0; when sche_tab is not empty, the idle time blocks are traversed to find the idle time block with the earliest start time not less than DRT and satisfying the occupied time block length t, and the optimal start time is output; otherwise, the end time of the latest completed task is output as the optimal start time;

[0097] Definition of EST(v i ,p x ) is task v i In the component p x The earliest execution start time, EFT(v i ,p x ) is task v i In the component p x The earliest execution completion time on the task DAG model, the relationship between the earliest execution completion time of any task and the earliest start execution time of the task is as follows:

[0098]

[0099] Entry Task v entry Excluding the data communication part, its earliest start execution time is defined as,

[0100] EST(v entry ,p x )=0,

[0101] Definition of LST(e i,j ,l bus ) is the edge e i,j In the communication link bus The start communication time, LFT(e i,j ,l bus ) is the completion time of the communication. The start time of the communication edge is limited by whether its source node has been completed, that is, the scheduling edge e i,j During bus communication, task v must be guaranteed i The execution is completed, so the communication edge i,j In the communication link bus The start communication time and the completion communication time of are defined as,

[0102]

[0103] Among them, Available[EFT(v i ),DTS(v i ,v j )·μ,l bus ] indicates that in the communication link l bus Finished edge i,j communication and the start time is greater than EFT(v i ) is the earliest communication time. Due to the insertion strategy, this time block is the earliest communication time block that the communication link can provide. i,j ) / w(l bus ) indicates the completion of edge e i,j The bus occupancy time of the communication,

[0104] At the same time, task v j ∈V is dispatched to the component p x ∈P, its earliest executable time is limited by all its predecessor nodes pred(v j ) to complete the data transmission, is called the data ready time (DRT), which satisfies

[0105]

[0106] During the task execution, the data communication sending and receiving processes need to be completed through the bus. j ,p x ) is task v j In the component p x The bus occupancy time of data communication is expressed as,

[0107]

[0108] Define MST(v j ,px ) is task v j In the component p x The start time of runtime data communication, MFT(v j ,p x ) is the communication completion time, and the start time of data communication is limited by the data preparation completion time DRT(v j ,p x ), so the start time and completion time of data communication are expressed as,

[0109]

[0110] Mission v j The earliest start time EST(v j ,p x ) is greater than the data communication completion time MFT(v j ,p x ), it is a feasible task scheduling scheme. In addition, the execution of the task is also constrained by the execution of the component itself. The plug-in strategy is used to find the best time block that satisfies the task execution on the component, so that the earliest start execution time of the task is satisfied.

[0111] EST(v j ,p x )=Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ],

[0112] Among them, Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ] is able to satisfy the task v j In the component p x and the start time is greater than or equal to MFT(v j ,p x )’s optimal time block;

[0113] Accordingly, task v j In the component p x The earliest completion time EFT(v j ,p x ) is obtained by the following task earliest completion time algorithm: Based on the insertion strategy, the predecessor task pred(v j ) and the task v jFor each communication edge, obtain the start communication time LST and the end communication time LFT of the communication edge on the bus; calculate the task v j Dispatching to component p x Data preparation time DRT(v j ,p x ); Based on the plug-in strategy, schedule task v j The start time of data communication on the bus is MST (v j ,p x ) and the end communication time MFT(v j ,p x ); Based on the plug-in strategy, schedule task v j In the component p x The earliest start time of the run EST(v j ,p x ) and the earliest execution completion time EFT(v j ,p x ); Output task v j In the component p x The earliest completion time EFT(v j ,p x ) and other task attributes.

[0114] Furthermore, the on-board task allocation constraints and algorithms in the second step specifically include:

[0115] The following constraints apply when allocating tasks: some components provide more memory resources than the task requires; some components provide more storage resources than the task requires;

[0116] The constraints of the proposed task allocation scheme are:

[0117]

[0118] The steps of the task allocation algorithm are as follows:

[0119] (1) Calculate the average computational cost and average communication cost of each task;

[0120] (2) Starting from the exit task, recursively calculate the priority of each task;

[0121] (3) Sort all tasks in non-ascending order according to their priority to obtain the task priority;

[0122] (4) Repeat the following steps until all tasks are scheduled:

[0123] 1) Select the first task from the task list;

[0124] 2) traverse the components that satisfy the task allocation constraints to calculate the earliest completion time of the task scheduled onto the bus based on the inserted scheduling strategy;

[0125] 3) Schedule the tasks to the components with the earliest completion time, and complete the bus occupancy scheduling for inter-task communication and data communication.

[0126] Furthermore, the fault-tolerant method for reconfiguring a satellite computer in cooperation with multiple machines in the third step means that after the on-board task scheduling is completed, the execution unit of each task, the start time interval, the time interval of inter-task communication and data communication are determined, and each component completes the assigned task at the corresponding time according to its own time, realizes the satellite service software function, and realizes the fault-tolerant method for reconfiguring a satellite computer in cooperation with multiple machines without redundant faults, which specifically includes:

[0127] (1) Time synchronization of multiple components. At the beginning of each task cycle, the selected component collects the local time through the HAL_GetTick() function and sends a broadcast frame through the CAN bus. After receiving the time synchronization instruction, other components modify the local time uwTick variable to ensure the time synchronization of each component.

[0128] (2) The multi-machine collaborative satellite service software function is realized, and all tasks are run periodically. cycle represents the task cycle, t x,cycle Display component p x In the task cycle T cycle The task scheduling running time within is 0≤t x,cycle ≤T cycle When each component receives the synchronization instruction, it records the received time as the initial time of the task cycle t start During the task cycle, the local time t is collected through the HAL_GetTick() function x , the local time minus the initial time of the task cycle is the task scheduling running time, that is,

[0129] t x,cycle =t x -t start ,

[0130] The execution time interval and communication time interval of the tasks assigned to each component have been determined. According to the current task scheduling running time of the component, task execution or task communication starts when the corresponding time arrives, and finally a fault-tolerant method for reconstructing redundant onboard computers with multi-machine collaboration is realized.

[0131] The beneficial effects of the present invention are as follows: the present invention provides a fault-tolerant method for non-redundant fault reconstruction of an onboard computer. In view of the faults and failures of onboard computers of micro-satellites, the proposed onboard computer non-redundant fault fault tolerance and reconstruction method for mining potential satellite resources has the beneficial effects of mining the potential computing, memory and storage resources of various components, allocating onboard tasks to satellite components for coordinated operation, maintaining the basic functions of the satellite in an emergency, and realizing a rescue-type non-redundant fault-tolerant reconstruction fault-tolerant method in the event of an onboard computer failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0132] Figure 1 It is a schematic diagram of the process of the present invention;

[0133] Figure 2 It is a schematic diagram of the task execution flow of the present invention;

[0134] Figure 3 It is a schematic diagram of task scheduling attributes of the present invention;

[0135] Figure 4 It is a schematic diagram of the task scheduling execution time of the present invention;

[0136] Figure 5 It is the execution flow chart of the multi-machine collaboration unit component of the present invention. DETAILED DESCRIPTION

[0137] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0138] To achieve the above purpose, Figure 1 As shown, the technical solution adopted by the present invention is a fault-tolerant method for non-redundant fault reconstruction of a satellite-borne computer, comprising the following steps:

[0139] The first step is to characterize the onboard hardware resources and model the onboard software tasks.

[0140] On-board hardware resource characterization and modeling include characterization of design component computing resources, memory resources, and storage resources, and proposal of component models and bus communication models;

[0141] Satellite software task modeling refers to the establishment of a task model for satellite software tasks, including task benchmark calculation time, memory resources, storage resource occupancy, and bus data transmission and reception;

[0142] The second step is the scheduling and allocation of onboard tasks, including:

[0143] (1) Establishing a task scheduling model refers to proposing a task scheduling model that satisfies the dependencies between tasks and avoids bus communication time conflicts;

[0144] (2) Task priority value calculation refers to the calculation of scheduling weights and task priorities based on task characteristics before allocating and scheduling tasks, and completing task sorting;

[0145] (3) Task scheduling attribute description, proposing the plug-in strategy of the task scheduling process and the description of task scheduling attributes;

[0146] (4) On-board task allocation constraints and algorithms: propose task allocation constraints including component memory resources and storage resources, take the scheduling length as the task allocation target, and propose a task allocation algorithm to complete task allocation;

[0147] The third step is to develop a fault-tolerant method for multi-machine collaborative onboard computer reconstruction.

[0148] The execution time and communication time interval of the tasks assigned to each component are determined based on the task scheduling model and allocation method. After each component completes time synchronization, it completes task execution and data communication according to its own time, realizes the satellite service software function, completes the reconstruction of the onboard computer, and realizes a fault-tolerant method without redundant fault reconstruction.

[0149] Furthermore, in the first step, the hardware resources on the satellite are characterized and modeled, the computing resources, memory resources, and storage resources of the design components are characterized, and a component model and a bus communication model are proposed, including:

[0150] Define the component set as p = {p1, p2, ... p m}, component p x The resources include computing resources C x 、Memory resources M x , storage resources S x The node of the component p x It can be expressed by the following formula:

[0151] p x ={C x ,M x ,S x},

[0152] (1) Computing resources,

[0153] When evaluating the theoretical computing performance of a component, the main consideration is the processor's main frequency, which is expressed as,

[0154] C th,x =f x ,

[0155] where f x For the component p x Processor frequency, C th,x is the theoretical calculated performance of component i;

[0156] The computing resources of a component are expressed by the ratio of the theoretical computing performance of the component to the original onboard computer. x The computing resources C x It can be expressed as,

[0157]

[0158] Among them, C x For the component p x The computing resources, C th,x , C th,A They are respectively x Theoretical computing performance with onboard computers;

[0159] (2) Memory resources

[0160] The memory resources of a component are represented by the RAM memory capacity. Excluding the memory space occupied by its own tasks, the memory resources that the component can provide are expressed as,

[0161]

[0162] Among them, M x For the component p x Memory resources, For the component p x Memory capacity, For the component p x The occupied memory capacity;

[0163] (3) Storage resources

[0164] Similar to memory resources, the remaining storage capacity of Flash is used to represent the storage resources of the components, expressed as,

[0165]

[0166] Among them, S x For the component p x storage resources, For the component p x Total storage capacity, For the component p x Occupied storage capacity;

[0167] The satellite upper components complete the data communication between the single machines through the bus. Taking the CAN bus as the research object, the bus occupancy time for data transmission through the bus can be expressed as:

[0168]

[0169] Among them, t busis the bus occupancy time of the data transmission process, Q is the bus transmission rate, n frame is the CAN message frame length; t er To correct the error, add t to prevent the time synchronization of multiple components from causing errors or other reasons that may lead to CAN message transmission time conflicts. er make corrections;

[0170] For CAN extended frame single frame message, n frame is a constant, the bus transmission rate Q and the error correction time t er After the bus occupancy time is determined, let the transmission time be μ = n frame / Q+t er , then the number of communications is k cm When , the bus occupancy time can be expressed as,

[0171] TBS(k cm ) = k cm μ,

[0172] Among them, k cm TBS(k is the number of CAN extended frame communications. cm ) is the number of communication lines k cm The bus occupancy time, μ is the transmission time of a single frame message of the CAN extended frame;

[0173] Furthermore, in the satellite service software task modeling described in the first step, a task model including task benchmark calculation time, memory resources, storage resource occupancy and bus data transmission and reception is established for the satellite service software task, specifically including:

[0174] During the execution of onboard tasks, there is a demand for memory and storage resources, which occupies the processor to complete the task calculation. In addition to calculation, the task execution may generate data communication with other components, which is hereinafter referred to as data communication. At the same time, there is inter-task communication between the assigned tasks, which generates bus occupancy, which is hereinafter referred to as inter-task communication.

[0175] In order to clarify the allocation and execution of tasks, determine the resource consumption and bus occupancy during communication, the following definitions are given:

[0176] Definition 1. Satellite service: A function in the satellite service software is called satellite service, such as telemetry, remote control, thermal control, health management, and attitude control.

[0177] Definition 2. Task: A task unit assigned to a component for execution, consisting of one or more of the three parts: data communication, inter-task communication, and task computation.

[0178] The execution of tasks with dependencies needs to consider the priority constraints of tasks and the communication volume between tasks. A task may have multiple predecessors, and the task can only start to execute after all the communication between the predecessors and the task is completed, which is called pred(v i ) is task v i The direct predecessor set, succ(v i ) is task v i The direct successor set of ;

[0179] Define the task set V = {v1,v2,…,v n}, each task is represented by the following set,

[0180]

[0181] Among them, resource requirements in are the memory resource requirements and storage resource requirements of the task respectively; the benchmark calculation time It represents the time required to complete the calculation of the task when running in the onboard computer;

[0182] Data Communications TC i =comm(v i ) represents a target component set for data communication, The amount of data sent for data. The amount of data received for the returned data; Task v i In the component p x When executing, there is p y ∈TC i , that is, p y For task v i The data communication target component, then task v i Towards component p y The amount of data sent is expressed as DTT (v i ,p y ), task v i Pair of components y The amount of received return data is expressed as DTR (v i ,p y ); use proc(v i ) indicates the execution of task v i Components, such as proc(v i )∈TC i , that is, the data communication target is to execute task v i When the components are connected, the communication data does not need to occupy the bus transmission, and the communication data volume can be ignored, which is expressed as,

[0183] DTTi ,proc(v i )]=DTR[v i ,proc(v i )]=0,

[0184] Inter-task communication TT i =succ(v i ) is the target task set of communication, indicating that the task v i The set of successor tasks of is the set of data volume for communication; if task v j ∈succ(v i ), that is, task v j Yes i The amount of task synchronization communication data is expressed as DTS(v i ,v j );

[0185] Mission v i Located in the component p x The task completion time TFN(v i ,p x ) includes data communication time and task calculation time, expressed as,

[0186] TFN(v i ,p x )=TTR(v i ,p x )+TCL(v i ,p x ),

[0187] Among them, TTR (v i ,p x ) is the data sending time, that is, the component p x The time to communicate data to all components that are not their own targets is expressed as,

[0188]

[0189] Among them, TCL (v i ,p x ) is the calculation time, that is, the component p x Run Task v i The task calculation time is calculated by the benchmark calculation time. The computing resources of the components are obtained and expressed as,

[0190]

[0191] like Figure 2 The task v is described as follows iIn the component p x The execution process first receives the inter-task communication of the predecessor task, and then starts the sending and receiving process of data communication. The data communication target is p x When the communication volume is 0, the communication volume is DTT (v i ,p y ) and DTR(v i ,p y ) indicates that after completing data communication, task calculation is carried out, and finally inter-task communication is carried out with the subsequent tasks.

[0192] Furthermore, in the second step, a task scheduling model is established, which specifically includes:

[0193] In order to meet the priority constraints during task execution, the task is represented by a directed acyclic graph (DAG) with weighted nodes and edges. A DAG with weighted nodes and edges is a binary group G = <V, E>;

[0194] V=(v1,v2,v3,…,v n ) represents the set of tasks that can be executed on any idle component, and n represents the number of tasks;

[0195] The set of communication edges representing the interdependencies between tasks, e ij Represents task v j The prerequisite for execution is v i Must complete v i With v j Communication between the predecessors; a task with multiple predecessors needs to complete the communication between all predecessors and the task before it can start execution;

[0196] Weight w(v i ) represents task v i The computational cost of is expressed as the benchmark computational time of the task, that is,

[0197]

[0198] Weight Represents task v i The data communication cost is expressed by the amount of data that the task communicates to all target components, that is,

[0199]

[0200] Weight w(e ij ) represents task v i With v j The amount of communication between them is expressed as,

[0201] w(eij )=DTS(v i ,v j ),

[0202] The target processing system structure of the scheduling system model is represented by an undirected graph G = <P, L>, where P represents a set of m components with a variable number of nodes, and L represents the communication link connecting the components. x represents the xth component, l xy Represents the connection component p x and p y The undirected edges can realize two-way communication.

[0203] Weight w(p x ) reflects the execution speed of the component, expressed in terms of the computing resources of the component, i.e.,

[0204] w(p x )=C x ,

[0205] Weight w(l xy ) reflects the communication speed of the link. Since the components are connected through the bus, the communication rate between any two stand-alone machines is equal, which can be expressed as,

[0206]

[0207] Among them, l bus Represents the CAN bus communication link. Each component is connected to each other through the bus, so L = l bus ;

[0208] Furthermore, the task priority value calculation in the second step specifically includes:

[0209] Before allocating and scheduling tasks, the scheduling weight and task priority are calculated first according to the task characteristics, and the task sorting is completed.

[0210] Mission v i Corresponding data communication weights Calculate the weight w i and communication edge i,j The corresponding scheduling weight d i,j Defined as,

[0211]

[0212] The task priority weights in the DAG model are recursively defined as follows:

[0213]

[0214] Among them, rank(v i ) is the task vi The priority value, succ(v i ) is the task v i The direct successor set of i It is task v i The calculation weight of It is task v i The data communication weight, d i,j is the inter-task communication edge e i,j The scheduling communication weight of each task in the DAG model is recursively calculated by traversing the DAG upward through the export task. exit , whose priority value is,

[0215]

[0216] Among them, rank(v exit ) is the export task v exit The priority value, w exit is the calculation weight of the export task, is the data communication weight of the export task;

[0217] The task priorities are obtained by arranging them in non-ascending order according to their priority values ​​and the tasks are scheduled in sequence.

[0218] Furthermore, the task scheduling attribute description in the second step specifically includes:

[0219] The plug-in strategy is used to complete the scheduling of tasks and data communication start time, using Available(DRT,t,p x ) indicates that the task is in the component p x The optimal start time of the task is that the task takes up a component time of t and the start time is greater than DRT; similarly, use Available(DRT,t,l bus ) indicates that the communication is on bus l bus The optimal start time of the communication is t, and the start time is greater than DRT. The optimal time block of the plug-in strategy scheduling is either between tasks that have been scheduled to the component or after the latest completed task. The specific algorithm is as follows:

[0220] The algorithm input includes data preparation time DRT, occupied time block length t, and the component or bus scheduling table sche_tab, which records the occupied time blocks and idle time blocks of the components or buses. The algorithm steps are as follows: when sche_tab is empty, the optimal start time is output as 0; when sche_tab is not empty, the idle time blocks are traversed to find the idle time block with the earliest start time not less than DRT and satisfying the occupied time block length t, and the optimal start time is output; otherwise, the end time of the latest completed task is output as the optimal start time;

[0221] Definition of EST(v i ,p x ) is task v i In the component p x The earliest execution start time, EFT(v i ,p x ) is task v i In the component p x The earliest execution completion time on the task DAG model, the relationship between the earliest execution completion time of any task and the earliest start execution time of the task is as follows:

[0222] EFT(v i ,p x )=EST(v i ,p x )+w(v i ) / w(p x )

[0223] =EST(v i ,p x )+TCL(v i ,p x ),

[0224] Entry Task v entry Excluding the data communication part, its earliest start execution time is defined as,

[0225] EST(v entry ,p x )=0,

[0226] Definition of LST(e i,j ,l bus ) is the edge e i,j In the communication link bus The start communication time, LFT(e i,j ,l bus ) is the completion time of the communication. The start time of the communication edge is limited by whether its source node has been completed, that is, the scheduling edge e i,j During bus communication, task v must be guaranteed i The execution is completed, so the communication edgei,j In the communication link bus The start communication time and the completion communication time of are defined as,

[0227]

[0228] Among them, Available[EFT(v i ),DTS(v i ,v j )·μ,l bus ] indicates that in the communication link l bus Finished edge i,j communication and the start time is greater than EFT(v i ) is the earliest communication time. Due to the insertion strategy, this time block is the earliest communication time block that the communication link can provide. i,j ) / w(l bus ) indicates the completion of edge e i,j The bus occupancy time of the communication,

[0229] At the same time, task v j ∈V is dispatched to the component p x ∈P, its earliest executable time is limited by all its predecessor nodes pred(v j ) to complete the data transmission, is called the data ready time (DRT), which satisfies

[0230]

[0231] During the task execution, the data communication sending and receiving processes need to be completed through the bus. j ,p x ) is task v j In the component p x The bus occupancy time of data communication is expressed as,

[0232]

[0233] Define MST(v j ,p x ) is task v j In the component p x The start time of runtime data communication, MFT(v j ,p x ) is the communication completion time, and the start time of data communication is limited by the data preparation completion time DRT(v j ,p x ), so the start time and completion time of data communication are expressed as,

[0234] MST(v j ,p x )=Available[DRT(v j ,p x ),TTR(v j ,p x ),l bus ]

[0235] MFT(v j ,p x )=MST(v j ,p x )+TTR(v j ,p x ),

[0236] Mission v j The earliest start time EST(v j ,p x ) is greater than the data communication completion time MFT(v j ,p x ), it is a feasible task scheduling scheme. In addition, the execution of the task is also constrained by the execution of the component itself. The plug-in strategy is used to find the best time block that satisfies the task execution on the component, so that the earliest start execution time of the task is satisfied.

[0237] EST(v j ,p x )=Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ],

[0238] Among them, Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ] is able to satisfy the task v j In the component p x and the start time is greater than or equal to MFT(v j ,p x ) optimal time block; the task scheduling attributes in the star service execution are as follows Figure 3 shown.

[0239] Accordingly, task v j In the component p x The earliest completion time EFT(v j ,p x) is obtained by the following task earliest completion time algorithm: Based on the insertion strategy, the predecessor task pred(v j ) and the task v j For each communication edge, obtain the start communication time LST and the end communication time LFT of the communication edge on the bus; calculate the task v j Dispatching to component p x Data preparation time DRT(v j ,p x ); Based on the plug-in strategy, schedule task v j The start time of data communication on the bus is MST (v j ,p x ) and the end communication time MFT(v j ,p x ); Based on the plug-in strategy, schedule task v j In the component p x The earliest start time of the run EST(v j ,p x ) and the earliest execution completion time EFT(v j ,p x ); Output task v j In the component p x The earliest completion time EFT(v j ,p x ) and other task attributes.

[0240] Furthermore, the on-board task allocation constraints and algorithms in the second step specifically include:

[0241] The following constraints apply when allocating tasks: some components provide more memory resources than the task requires; some components provide more storage resources than the task requires;

[0242] The constraints of the proposed task allocation scheme are:

[0243]

[0244] The steps of the task allocation algorithm are as follows:

[0245] (1) Calculate the average computational cost and average communication cost of each task;

[0246] (2) Starting from the exit task, recursively calculate the priority of each task;

[0247] (3) Sort all tasks in non-ascending order according to their priority to obtain the task priority;

[0248] (4) Repeat the following steps until all tasks are scheduled:

[0249] 1) Select the first task from the task list;

[0250] 2) traverse the components that satisfy the task allocation constraints to calculate the earliest completion time of the task scheduled onto the bus based on the inserted scheduling strategy;

[0251] 3) Schedule the tasks to the components with the earliest completion time, and complete the bus occupancy scheduling for inter-task communication and data communication.

[0252] Furthermore, the fault-tolerant method for reconfiguring a satellite computer in cooperation with multiple machines in the third step means that after the on-board task scheduling is completed, the execution unit of each task, the start time interval, the time interval of inter-task communication and data communication are determined, and each component completes the assigned task at the corresponding time according to its own time, realizes the satellite service software function, and realizes the fault-tolerant method for reconfiguring a satellite computer in cooperation with multiple machines without redundant faults, which specifically includes:

[0253] (1) Time synchronization of multiple components. At the beginning of each task cycle, the selected component collects the local time through the HAL_GetTick() function and sends a broadcast frame through the CAN bus. After receiving the time synchronization instruction, other components modify the local time uwTick variable to ensure the time synchronization of each component.

[0254] (2) The multi-machine collaborative satellite service software function is realized, and all tasks are run periodically. cycle represents the task cycle, t x,cycle Display component p x In the task cycle T cycle The task scheduling running time within is 0≤t x,cycle ≤T cycle When each component receives the synchronization instruction, it records the received time as the initial time of the task cycle t start During the task cycle, the local time t is collected through the HAL_GetTick() function x , the local time minus the initial time of the task cycle is the task scheduling running time, that is,

[0255] t x,cycle =t x -t start ,

[0256] The execution time interval and communication time interval of the tasks assigned to each component have been determined. According to the current task scheduling running time of the component, the task execution or task communication starts after the corresponding time is reached. The execution process of the component is as follows: Figure 5As shown, at the beginning of the task cycle, the synchronization host collects the local time and sends a time synchronization instruction; as a synchronization slave, other components receive the time synchronization instruction and modify the local time, thereby completing time synchronization; each component records the initial time of the task cycle, cyclically collects the local time within the task cycle, calculates the task scheduling execution time, and executes task calculation, data communication, and inter-task communication after reaching the corresponding time according to the scheduling plan; after the task cycle ends, time synchronization is restarted and the next cycle is entered, thereby realizing the satellite service software function through multi-machine collaboration, completing the reconstruction of the onboard computer, and realizing a fault-tolerant method for non-redundant fault reconstruction.

[0257] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A fault-tolerant method for non-redundant fault reconstruction of a satellite-borne computer, characterized in that: The following steps are involved: The first step is to characterize the onboard hardware resources and model the onboard software tasks. On-board hardware resource characterization and modeling include characterization of design component computing resources, memory resources, and storage resources, and proposal of component models and bus communication models; Satellite software task modeling refers to the establishment of a task model for satellite software tasks, including task benchmark calculation time, memory resources, storage resource occupancy, and bus data transmission and reception; The second step is task scheduling and allocation methods, including: (1) Establishing a task scheduling model refers to proposing a task scheduling model that satisfies the dependencies between tasks and avoids bus communication time conflicts; (2) Task priority value calculation refers to the calculation of scheduling weights and task priorities based on task characteristics before allocating and scheduling tasks, and completing task sorting; (3) Task scheduling attribute description, proposing the plug-in strategy of the task scheduling process and the description of task scheduling attributes; (4) Task allocation constraints and algorithms: Task allocation constraints including memory resources and storage resources of components are proposed, the scheduling length is used as the task allocation target, and a task allocation algorithm is proposed to complete task allocation; The third step is to develop a fault-tolerant method for multi-machine collaborative onboard computer reconstruction. The execution time and communication time interval of the tasks assigned to each component are determined based on the task scheduling model and allocation method. After each component completes time synchronization, it completes task execution and data communication according to its own time, realizes the satellite service software function, completes the reconstruction of the onboard computer, and realizes a fault-tolerant method without redundant fault reconstruction.

2. A fault-tolerant method for non-redundant fault reconstruction of a satellite computer as claimed in claim 1, characterized in that: In the first step, the hardware resources on the satellite are characterized and modeled, the computing resources, memory resources, and storage resources of the design components are characterized, and the component model and bus communication model are proposed, including: Define the component set as p = {p1, p2, ... p m }, component p x The resources include computing resources C x 、Memory resources M x , storage resources S x The node of the component p x It can be expressed by the following formula: p x ={C x ,M x ,S x }, (1) Computing resources, When evaluating the theoretical computing performance of a component, the main consideration is the processor's main frequency, which is expressed as, C th,x =f x , where f x For the component p x Processor frequency, C th,x is the theoretical calculated performance of component i; The computing resources of a component are expressed by the ratio of the theoretical computing performance of the component to the original onboard computer. x The computing resources C x It can be expressed as, Among them, C x For the component p x The computing resources, C th,x , C th,A They are respectively x Theoretical computing performance with onboard computers; (2) Memory resources The memory resources of a component are represented by the RAM memory capacity. Excluding the memory space occupied by its own tasks, the memory resources that the component can provide are expressed as, Among them, M x For the component p x Memory resources, For the component p x Memory capacity, For the component p x The occupied memory capacity; (3) Storage resources Similar to memory resources, the remaining storage capacity of Flash is used to represent the storage resources of the components, expressed as, Among them, S x For the component p x storage resources, For the component p x Total storage capacity, For the component p x Occupied storage capacity; The satellite upper components complete the data communication between the single machines through the bus. Taking the CAN bus as the research object, the bus occupancy time for data transmission through the bus can be expressed as: Among them, t bus is the bus occupancy time of the data transmission process, Q is the bus transmission rate, n frame is the CAN message frame length; t er To correct the error, add t to prevent the time synchronization of multiple components from causing errors or other reasons that may lead to CAN message transmission time conflicts. er make corrections; For CAN extended frame single frame message, n frame is a constant, the bus transmission rate Q and the error correction time t er After the bus occupancy time is determined, let the transmission time be μ = n frame / Q+t er , then the number of communications is k cm When , the bus occupancy time can be expressed as, TBS(k cm )=k cm ·μ, Among them, k cm TBS(k is the number of CAN extended frame communications. cm ) is the number of communication lines k cm The bus occupancy time is μ, and μ is the transmission time of a single frame message of the CAN extended frame.

3. A fault-tolerant method for non-redundant fault reconstruction of a satellite computer as claimed in claim 1, characterized in that: In the satellite service software task modeling described in the first step, a task model including task benchmark calculation time, memory resources, storage resource occupancy and bus data transmission and reception is established for the satellite service software task, specifically including: During the execution of onboard tasks, there is a demand for memory and storage resources, which occupies the processor to complete the task calculation. In addition to calculation, the task execution may generate data communication with other components, which is hereinafter referred to as data communication. At the same time, there is inter-task communication between the assigned tasks, which generates bus occupancy, which is hereinafter referred to as inter-task communication. In order to clarify the allocation and execution of tasks, determine the resource consumption and bus occupancy during communication, the following definitions are given: Definition 1. Satellite service: A function in the satellite service software is called satellite service, such as telemetry, remote control, thermal control, health management, and attitude control. Definition 2. Task: A task unit assigned to a component for execution, consisting of one or more of the three parts: data communication, inter-task communication, and task computation. The execution of tasks with dependencies needs to consider the priority constraints of tasks and the communication volume between tasks. A task may have multiple predecessors, and the task can only start to execute after all the communication between the predecessors and the task is completed, which is called pred(v i ) is task v i The direct predecessor set, succ(v i ) is task v i The direct successor set of ; Define the task set V = {v1,v2,…,v n }, each task is represented by the following set, Among them, resource requirements in are the memory resource requirements and storage resource requirements of the task respectively; the benchmark calculation time It represents the time required to complete the calculation of the task when running in the onboard computer; Data Communications TC i =comm(v i ) represents a target component set for data communication, The amount of data sent for data. The amount of data received for the returned data; Task v i In the component p x When executing, there is p y ∈TC i , that is, p y For task v i The data communication target component, then task v i Towards component p y The amount of data sent is expressed as DTT (v i ,p y ), task v i Pair of components y The amount of received return data is expressed as DTR (v i ,p y ); use proc(v i ) indicates the execution of task v i Components, such as proc(v i )∈TC i , that is, the data communication target is to execute task v i When the components are connected, the communication data does not need to occupy the bus transmission, and the communication data volume can be ignored, which is expressed as, DTT[v i ,proc(v i )]=DTR[v i ,proc(v i )]=0, Inter-task communication TT i =succ(v i ) is the target task set of the communication, indicating that the task v i The set of successor tasks of is the set of data volume for communication; if task v j ∈succ(v i ), that is, task v j Yes i The amount of task synchronization communication data is expressed as DTS(v i ,v j ); Mission v i Located in the component p x The task completion time TFN(v i ,p x ) includes data communication time and task calculation time, expressed as, TFN(v i ,p x )=TTR(v i ,p x )+TCL(v i ,p x ), Among them, TTR (v i ,p x ) is the data sending time, that is, the component p x The time to communicate data to all components that are not their own targets is expressed as, Among them, TCL (v i ,p x ) is the calculation time, that is, the component p x Run Task v i The task calculation time is calculated by the benchmark calculation time. The computing resources of the components are obtained and expressed as, Mission v i In the component p x The execution process is to first receive the inter-task communication of the predecessor task, and then start the sending and receiving process of data communication. The data communication target is p x When the communication volume is 0, the communication volume is DTT (v i ,p y ) and DTR(v i ,p y ) indicates that after completing data communication, task calculation is carried out, and finally inter-task communication is carried out with the subsequent tasks.

4. A fault-tolerant method for non-redundant fault reconstruction of a satellite computer as claimed in claim 1, characterized in that: The second step is to establish a task scheduling model, which specifically includes: In order to meet the priority constraints during task execution, the task is represented by a directed acyclic graph (DAG) with weighted nodes and edges. A DAG with weighted nodes and edges is a binary group G = <V, E>; V=(v1,v2,v3,…,v n ) represents the set of tasks that can be executed on any idle component, and n represents the number of tasks; The set of communication edges representing the interdependencies between tasks, e ij Represents task v j The prerequisite for execution is v i Must complete v i With v j Communication between the predecessors; a task with multiple predecessors needs to complete the communication between all predecessors and the task before it can start execution; Weight w(v i ) represents task v i The computational cost of is expressed as the benchmark computational time of the task, that is, Weight Represents task v i The data communication cost is expressed by the amount of data that the task communicates to all target components, that is, Weight w(e ij ) represents task v i With v j The amount of communication between them is expressed as, w(e ij )=DTS(v i ,v j ), The target processing system structure of the scheduling system model is represented by an undirected graph G = <P, L>, where P represents a set of m components with a variable number of nodes, and L represents the communication link connecting the components. x represents the xth component, l xy Represents the connection component p x and p y The undirected edges can realize two-way communication. Weight w(p x ) reflects the execution speed of the component, expressed in terms of the computing resources of the component, i.e., w(p x )=C x , Weight w(l xy ) reflects the communication speed of the link. Since all components are connected through the bus, the communication rate between any two stand-alone machines is equal, which can be expressed as, Among them, l bus Represents the CAN bus communication link. Each component is connected to each other through the bus, so L = l bus .

5. The fault-tolerant method for non-redundant fault reconstruction of a satellite computer according to claim 1, characterized in that: The task priority value calculation in the second step specifically includes: Before allocating and scheduling tasks, the scheduling weight and task priority are calculated based on the task characteristics, and the tasks are sorted. Mission v i Corresponding data communication weights Calculate the weight w i and communication edge i,j The corresponding scheduling weight d i,j Defined as, The task priority weights in the DAG model are recursively defined as follows: Among them, rank(v i ) is the task v i The priority value of succ(v i ) is the task v i The direct successor set of i It is task v i The calculation weight of It is task v i The data communication weight, d i,j is the inter-task communication edge e i,j The scheduling communication weight of each task in the DAG model is recursively calculated by traversing the DAG upward through the export task. exit , whose priority value is, Among them, rank(v exit ) is the export task v exit The priority value, w exit is the calculation weight of the export task, is the data communication weight of the export task; The task priorities are obtained by arranging them in non-ascending order according to their priority values ​​and the tasks are scheduled in sequence.

6. A fault-tolerant method for non-redundant fault reconstruction of a satellite computer as claimed in claim 1, characterized in that: The task scheduling attribute description in the second step specifically includes: The plug-in strategy is used to complete the scheduling of tasks and data communication start time, using Available(DRT,t,p x ) indicates that the task is in the component p x The optimal start time of the task is that the task takes up a component time of t and the start time is greater than DRT; similarly, use Available(DRT,t,l bus ) indicates that the communication is on bus l bus The optimal start time of the communication is t, and the start time is greater than DRT. The optimal time block of the plug-in strategy scheduling is either between tasks that have been scheduled to the component or after the latest completed task. The specific algorithm is as follows: The algorithm input includes data preparation time DRT, occupied time block length t, and the component or bus scheduling table sche_tab, which records the occupied time blocks and idle time blocks of the components or buses. The algorithm steps are as follows: when sche_tab is empty, the optimal start time is output as 0; when sche_tab is not empty, the idle time blocks are traversed to find the idle time block with the earliest start time not less than DRT and satisfying the occupied time block length t, and the optimal start time is output; otherwise, the end time of the latest completed task is output as the optimal start time; Definition of EST(v i ,p x ) is task v i In the component p x The earliest execution start time, EFT(v i ,p x ) is task v i In the component p x The earliest execution completion time on the task DAG model, the relationship between the earliest execution completion time of any task and the earliest start execution time of the task is as follows: Entry Task v entry Excluding the data communication part, its earliest start execution time is defined as, IS(v entry ,p x )=0, Definition of LST(e i,j ,l bus ) is the edge e i,j In the communication link bus The start communication time, LFT(e i,j ,l bus ) is the completion time of the communication. The start time of the communication edge is limited by whether its source node has been completed, that is, the scheduling edge e i,j During bus communication, task v must be guaranteed i The execution is completed, so the communication edge i,j In the communication link bus The start communication time and the completion communication time of are defined as, Among them, Available[EFT(v i ),DTS(v i ,v j )·μ,l bus ] indicates that in the communication link l bus Finished edge i,j communication and the start time is greater than EFT(v i ) is the earliest communication time. Due to the insertion strategy, this time block is the earliest communication time block that the communication link can provide. i,j ) / w(l bus ) indicates the completion of edge e i,j The bus occupancy time of the communication, At the same time, task v j ∈V is dispatched to the component p x ∈P, its earliest executable time is limited by all its predecessor nodes pred(v j ) to complete the data transmission, is called the data ready time (DRT), which satisfies During the task execution, the data communication sending and receiving processes need to be completed through the bus. j ,p x ) is task v j In the component p x The bus occupancy time of data communication is expressed as, Define MST(v j ,p x ) is task v j In the component p x The start time of runtime data communication, MFT(v j ,p x ) is the communication completion time, and the start time of data communication is limited by the data preparation completion time DRT(v j ,p x ), so the start time and completion time of data communication are expressed as, Mission v j The earliest start time EST(v j ,p x ) is greater than the data communication completion time MFT(v j ,p x ), it is a feasible task scheduling scheme. In addition, the execution of the task is also constrained by the execution of the component itself. The plug-in strategy is used to find the best time block that satisfies the task execution on the component, so that the earliest start execution time of the task is satisfied. EST(v j ,p x )=Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ], Among them, Available[MFT(v j ,p x ),TCL(v i ,p x ),p x ] is able to satisfy the task v j In the component p x and the start time is greater than or equal to MFT(v j ,p x )’s optimal time block; Accordingly, task v j In the component p x The earliest completion time EFT(v j ,p x ) is obtained by the following task earliest completion time algorithm: Based on the insertion strategy, the predecessor task pred(v j ) and the task v j For each communication edge, obtain the start communication time LST and the end communication time LFT of the communication edge on the bus; calculate the task v j Dispatching to component p x Data preparation time DRT(v j ,p x ); Based on the plug-in strategy, schedule task v j The start time of data communication on the bus is MST (v j ,p x ) and the end communication time MFT(v j ,p x ); Based on the plug-in strategy, schedule task v j In the component p x The earliest start time of the run EST(v j ,p x ) and the earliest execution completion time EFT(v j ,p x ); Output task v j In the component p x The earliest completion time EFT(v j ,p x ) and other task attributes.

7. A fault-tolerant method for non-redundant fault reconstruction of a satellite computer as claimed in claim 1, characterized in that: The on-board task allocation constraints and algorithms in the second step specifically include: The following constraints apply when allocating tasks: some components provide more memory resources than the task requires; some components provide more storage resources than the task requires; The constraints of the proposed task allocation scheme are: The steps of the task allocation algorithm are as follows: (1) Calculate the average computational cost and average communication cost of each task; (2) Starting from the exit task, recursively calculate the priority of each task; (3) Sort all tasks in non-ascending order according to their priority to obtain the task priority; (4) Repeat the following steps until all tasks are scheduled: 1) Select the first task from the task list; 2) traverse the components that satisfy the task allocation constraints to calculate the earliest completion time of the task scheduled onto the bus based on the inserted scheduling strategy; 3) Schedule the tasks to the components with the earliest completion time, and complete the bus occupancy scheduling for inter-task communication and data communication.

8. A fault-tolerant method for non-redundant fault reconstruction of a satellite-borne computer as claimed in claim 1, characterized in that: The fault-tolerant method for reconfiguring the onboard computer of multi-machine collaboration in the third step means that after completing the onboard task scheduling, the execution unit of each task, the start time interval, the time interval of inter-task communication and data communication are all determined, and each component completes the assigned task at the corresponding time according to its own time, realizes the function of the onboard service software, and realizes the fault-tolerant method for reconfiguring the onboard computer without redundant faults, which specifically includes: (1) Time synchronization of multiple components. At the beginning of each task cycle, the selected component collects the local time through the HAL_GetTick() function and sends a broadcast frame through the CAN bus. After receiving the time synchronization instruction, other components modify the local time uwTick variable to ensure the time synchronization of each component. (2) The multi-machine collaborative satellite service software function is realized, and all tasks are run periodically. cycle represents the task cycle, t x,cycle Representation component p x In the task cycle T cycle The task scheduling running time within is 0≤t x,cycle ≤T cycle When each component receives the synchronization instruction, it records the received time as the initial time of the task cycle t start During the task cycle, the local time t is collected through the HAL_GetTick() function x , the local time minus the initial time of the task cycle is the task scheduling running time, that is, t x,cycle =t x -t start , The execution time interval and communication time interval of the tasks assigned to each component have been determined. According to the current task scheduling running time of the component, task execution or task communication starts when the corresponding time arrives, and finally a fault-tolerant method for reconstructing redundant onboard computers with multi-machine collaboration is realized.

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