Method and device for testing durability of RRAM memristor, electronic equipment and medium

Abstract

The invention provides a durability test method and device of an RRAM memristor, electronic equipment and a medium. The method comprises the following steps: acquiring the current state of the RRAM device; based on the current state of the RRAM device, determining the sequence of continuous multiple reset operations and continuous multiple setting operations; the reset operation indicates that the RRAM memristor is erased; the setting operation refers to programming of the RRAM memristor device; determining a resistance interval of the RRAM device by using the gradually increased pulse intensity; the gradually increased pulse intensity comprises initial pulse intensity capable of turning over the current state of the RRAM; and according to the highest resistance state and the lowest resistance state in the resistance interval of the RRAM device, selecting fixed pulse parameters used for durability test, loading continuous and alternate reset operation and setting operation, and carrying out durability test on the RRAM device. In this way, the situation that the durability test fails in advance due to the over-reset or over-set problem can be avoided.

Description

Technical Field

[0001] The present application relates to the field of device testing technology, and in particular to a durability testing method, device, electronic device and medium for an RRAM memristor. Background Art

[0002] The working mechanism of RRAM (Resistive Random-Access Memory, also known as memristor) is generally considered to be the breaking and formation of oxygen vacancy conductive filaments in the resistive material under different polarity electric fields, resulting in the device switching between high resistance and low resistance states, representing the two storage states of '1' and '0' in binary data. The durability of RRAM memristors is generally tested to determine the maximum number of programming cycles that the memory device can withstand.

[0003] However, the durability test of the RRAM memristor device in the related art causes the durability test to fail prematurely. Summary of the invention

[0004] The present application provides a durability testing method, system and computer-readable storage medium for a RRAM memristor.

[0005] The present application provides a durability testing method for a RRAM memristor, comprising: Get the current status of the RRAM device; Based on the current state of the RRAM device, determining the order of the consecutive multiple reset operations and the consecutive multiple set operations; the reset operation represents erasing the RRAM memristor device; the set operation represents programming the RRAM memristor device; Determining a resistance range of the RRAM device using a gradually increasing pulse intensity; the gradually increasing pulse intensity includes an initial pulse intensity capable of flipping a current state of the RRAM; the resistance range of the RRAM device includes a highest resistance state and a lowest resistance state; According to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, a fixed pulse parameter used in the durability test is selected, and a continuous alternating reset operation and a set operation are loaded to perform a durability test on the RRAM device.

[0006] Further, the gradually increasing pulse intensity includes a gradually increasing setting pulse intensity; Correspondingly, the continuous multiple set operations refer to programming the RRAM memristor device multiple times continuously using the gradually increasing set pulse intensity; The gradually increasing manner of the gradually increasing setting pulse intensity includes: fixing the pulse width and fixing the step-increasing pulse height, or fixing the pulse height and fixing the step-increasing pulse width, or fixing both the step-increasing pulse width and the increasing pulse height.

[0007] Furthermore, the current state of the RRAM device includes that the resistance state of the RRAM device is the highest resistance state; with the strengthening of the gradually increasing set pulse intensity each time the RRAM device is loaded, the resistance state of the RRAM device will gradually transition from the highest resistance state to the lowest resistance state.

[0008] Further, the gradually increasing pulse intensity includes a gradually increasing reset pulse intensity; Correspondingly, the continuous multiple reset operations refer to using the gradually increasing reset pulse intensity to continuously erase the RRAM memristor device multiple times; The gradually increasing manner of the gradually increasing reset pulse intensity includes: fixing the pulse width and fixing the step-increasing pulse height, or fixing the pulse height and fixing the step-increasing pulse width, or fixing both the step-increasing pulse width and the increasing pulse height.

[0009] Furthermore, the current state of the RRAM device includes that the resistance state of the RRAM device is the lowest resistance state; with the strengthening of the gradually increasing reset pulse intensity each time the RRAM device is loaded, the resistance state of the RRAM device will gradually transition from the lowest resistance state to the highest resistance state.

[0010] Furthermore, the size of the fixed step is inversely proportional to the display fineness of the durability test.

[0011] Further, the using of the gradually increasing pulse intensity to determine the resistance range of the RRAM device includes: starting from the initial pulse intensity, according to the determined sequence of the reset operation and the set operation, using a combination of the consecutive multiple reset operations and the consecutive multiple set operations to scan the resistance range window of the RRAM device to obtain the highest resistance state of the RRAM device and the lowest resistance state of the RRAM device; and / or, The loading of the continuously alternating reset operation and set operation to perform a durability test on the RRAM device includes: forming a cyclic pulse through a single set pulse and a single reset pulse, loading the cyclic pulse multiple times, performing a durability test on the RRAM device, and recording the high resistance state of the RRAM device and the low resistance state of the RRAM device after each pulse until the RRAM device fails.

[0012] The embodiment of the present application provides a durability testing device for a RRAM memristor, comprising: An acquisition module, used to acquire the current state of the RRAM device; An operation sequence determination module, used to determine the sequence of multiple consecutive reset operations and multiple consecutive set operations based on the current state of the RRAM device; the reset operation represents erasing the RRAM memristor device; the set operation represents programming the RRAM memristor device; A fixed pulse parameter determination module, used to determine the resistance range of the RRAM device using a gradually increasing pulse intensity; the gradually increasing pulse intensity includes an initial pulse intensity capable of flipping the current state of the RRAM; the resistance range of the RRAM device includes a highest resistance state and a lowest resistance state; The durability test module is used to select fixed pulse parameters used in the durability test according to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, load continuous alternating reset operation and set operation, and perform durability test on the RRAM device.

[0013] The present application provides an electronic device, comprising one or more processors, for implementing any of the methods described above.

[0014] The present application provides a computer-readable storage medium having a program stored thereon. When the program is executed by a processor, the method described in any one of the above items is implemented.

[0015] The present application provides a computer program product, comprising a computer program / instruction, which implements any of the above methods when executed by a processor.

[0016] In some embodiments, the durability test method of the RRAM memristor of the present application determines the resistance state interval of the RRAM device by using a gradually increasing pulse intensity before the durability test of the RRAM memristor device. Since the resistance state interval of the RRAM device clarifies the highest resistance state and the lowest resistance state, and then continues to perform the durability test from the highest resistance state and the lowest resistance state, it is possible to balance the reset and set pulse parameters to avoid premature failure of the durability test due to over-reset or over-set problems, which is conducive to obtaining more stable and more accurate durability test results, thereby improving the service life of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1a A schematic diagram showing the endurance failure type of the RRAM memristor device in the related art; Figure 1b Another schematic diagram showing the endurance failure type of the RRAM memristor device in the related art; Figure 2Shown is a flow chart of a durability testing method for an RRAM memristor provided in an embodiment of the present application; Figure 3 Shown Figure 2 A flow chart showing the sequence of determining the sequence of the continuous multiple reset operations and the continuous multiple set operations in the durability test method of the RRAM memristor shown; Figure 4a Shown Figure 2 A flow chart of performing multiple consecutive set operations on an RRAM memristor device in a durability test method of the RRAM memristor shown; Figure 4b Shown Figure 2 A flow chart of a method for performing multiple consecutive reset operations on an RRAM memristor device in a durability testing method of the RRAM memristor shown; Figure 5a Shown Figure 4a The schematic diagram of the continuous multiple set operation pulses shown; Figure 5b Shown Figure 4b The schematic diagram of multiple consecutive reset operation pulses shown; Figure 6 Shown Figure 4a and Figure 4b The resistance state change diagram of the RRAM memristor device subjected to multiple consecutive set operations and multiple consecutive reset operations is shown; Figure 7 Shown Figure 2 Schematic diagram of the RRAM memristor endurance test method of the continuous alternating fixed set pulse and fixed reset pulse; Figure 8 Shown is a schematic structural diagram of a durability testing device for an RRAM memristor provided in an embodiment of the present application; Fig. 9 Shown is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with one or more embodiments of the present specification. Instead, they are merely examples of devices and methods consistent with some aspects of one or more embodiments of the present specification as detailed in the appended claims.

[0019] It should be noted that: in other embodiments, the steps of the corresponding method are not necessarily performed in the order shown and described in this specification. In some other embodiments, the steps included in the method may be more or less than those described in this specification. In addition, a single step described in this specification may be decomposed into multiple steps for description in other embodiments; and multiple steps described in this specification may be combined into a single step for description in other embodiments.

[0020] In order to solve the technical problem that the durability test of the RRAM memristor device in the related art will cause the durability test to fail prematurely, the embodiment of the present application provides a durability test method for an RRAM memristor, by using a gradually increasing pulse intensity before the persistence test of the RRAM memristor device to determine the resistance state range of the RRAM device. Since the resistance state range of the RRAM device clearly defines the highest resistance state and the lowest resistance state, and then the durability test continues from the highest resistance state and the lowest resistance state, the durability test can be avoided from failing prematurely due to over-reset or over-set problems by balancing the reset and set pulse parameters, which is conducive to obtaining more stable and more accurate durability test results, thereby increasing the service life of the device. The detailed analysis is as follows: Figure 1a and Figure 1b Shown are schematic diagrams of the endurance failure types of RRAM memristor devices in the related art.

[0021] As shown Figure 1a and Figure 1b As shown, in the durability test of the RRAM memristor device in the related art, the inappropriate cycle pulse parameters selected may affect the stability of its resistance range window and high and low resistance states, and the unbalanced reset / set pulse conditions may cause premature failure of its high resistance state or low resistance state, thereby producing an erroneous assessment of the durability results of its memristor device.

[0022] In the durability test of RAM memristor devices in the related art, the high resistance state position close to the highest resistance state is used as the starting position of the low resistance state flip. At this time, it is called over-reset, that is, for the device, RESET (reset)> SET (set), which may cause premature failure of the low resistance state.

[0023] In the durability test of RAM memristor devices in the related art, the lower resistance state position close to the lowest resistance state is used as the starting position of the high resistance state flip. At this time, it is called over-set, that is, for RAM memristor devices, SET (set)>RESET (reset), which is easy to cause premature failure of the high resistance state.

[0024] Therefore, the embodiment of the present application uses a gradually increasing pulse intensity to determine the resistance range of the RRAM device, and can determine the highest resistance state and the lowest resistance state in the resistance state of the RRAM device, and then continue to perform the durability test from the highest resistance state and the lowest resistance state, and each window of the subsequent durability test is not easy to shift. In this way, the reset pulse parameters and the set pulse parameters can be balanced to avoid premature failure of the durability test due to over-reset or over-set problems, which is conducive to obtaining more stable and more accurate durability test results, thereby improving the service life of the RRAM memristor device. In this way, there will be no situation such as instability of the conductive filaments caused by excessive resetting or excessive setting, thereby improving the service life of the RRAM memristor device.

[0025] Figure 2 The figure is a flow chart of a durability testing method of an RRAM memristor provided in an embodiment of the present application.

[0026] like Figure 2 As shown, the durability testing method of the RRAM memristor may include but is not limited to the following steps 110 to 140: Step 110, obtaining the current state of the RRAM device. The current state of the RRAM device is used to represent the current resistance state of the RRAM device. These resistance states are high and low, and the current state of the RRAM device is determined and the initial resistance value R0 of the RRAM device is read.

[0027] Step 120, based on the current state of the RRAM device, determine the order of consecutive multiple reset operations and consecutive multiple set operations; the reset operation means erasing the RRAM memristor device; the set operation means programming the RRAM memristor device. The consecutive multiple set operations refer to multiple set operations performed at a short interval each time, which can achieve enhancement. The consecutive multiple reset operations refer to multiple reset operations performed at a short interval each time, which can achieve suppression.

[0028] In the above step 120, the continuous multiple reset operations refer to the continuous use of gradually increasing reset pulse strengths, and the continuous multiple set operations refer to the continuous use of gradually increasing set pulse strengths. The interval time for applying the gradually increasing pulses can be relatively short, and the RRAM device can obtain the highest resistance state or the lowest resistance state of the device more quickly after the high-frequency stimulation.

[0029] This step 120 can determine the order of the continuous multiple reset operations and the continuous multiple set operations. If the current state is the high impedance state of the RRAM device, the continuous multiple set operations are performed first, and then the continuous multiple reset operations are performed; if the device is currently in the low impedance state, the continuous multiple reset operations are performed first, and then the continuous multiple set operations are performed. Thus, the resistance range of the RRAM device is determined through the following step 130.

[0030] Step 130, using a gradually increasing pulse intensity, determining a resistance range of the RRAM device; the gradually increasing pulse intensity includes an initial pulse intensity that can flip the current state of the RRAM; the resistance range of the RRAM device includes a highest resistance state and a lowest resistance state.

[0031] Since the more the resistance state is flipped during the flipping process, the more difficult it is to flip, the resistance range of the RRAM device can be obtained more accurately by continuously increasing the pulse intensity.

[0032] Step 140 , according to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, a fixed pulse parameter used in the durability test is selected, and a continuous alternating reset operation and set operation are loaded to perform a durability test on the RRAM device.

[0033] These fixed pulse parameters may refer to pulse parameters whose values ​​are fixed. For example, the fixed pulse parameters are alternative pulse parameters, and the alternative pulse parameters are different from the gradually increasing pulse intensity. Of course, the fixed pulse parameters may also be any value of the gradually increasing pulse intensity. Since the highest resistance state and the lowest resistance state determined at the beginning are used as references, the fixed pulse parameters selected for the durability test can reproduce this window, so this fixed pulse parameter is selected. Therefore, when the subsequent durability test uses this fixed pulse combination again, the window of high resistance-low resistance change is not easy to tilt and shift each time.

[0034] The fixed pulse parameters used in the above durability test include fixed set pulse parameters and fixed reset pulse parameters. The fixed set pulse parameters can achieve the lowest resistance state of the resistance interval window obtained in the above steps of the device; the fixed reset pulse parameters can achieve the highest resistance state of the resistance interval window obtained in the above steps of the device. Because the formation and breakage of the conductive filaments of the RRAM device are subject to certain randomness due to the process conditions of the resistive material, the operator can set the tolerance error range of the highest resistance state and the lowest resistance state. The specific setting of the tolerance error range usually depends on the specific application requirements, process conditions and required performance level of the RRAM device, and can be set between 1% and 10%. After selecting the fixed pulse parameters used in the durability test, the durability test can be started.

[0035] The above step 140 may further include: forming a cyclic pulse by a single set pulse and a single reset pulse, loading the cyclic pulse multiple times, performing a durability test on the RRAM device, and recording the high resistance state of the RRAM device and the low resistance state of the RRAM device after each pulse until the RRAM device fails.

[0036] Exemplarily, the reset operation and the set operation are continuously alternated, such as the set pulse parameter is A, the reset pulse operation is B, and the durability test is specifically performed ABABABAB-... until the RRAM device fails, and one A+B is a cycle number, and the total cycle number before the RRAM device fails is taken as the durability test result. However, this paper can better determine the starting position of the reset and set by performing steps 110 to 130 before starting the actual durability test.

[0037] During the endurance test, the resistance range of the RRAM device determined by using a gradually increasing pulse intensity can be reproduced by loading a continuous alternating reset operation and a set operation.

[0038] In contrast, the durability test method of the RRAM memristor can also be used in the following manner to determine the failure of the RRAM device: Once the switching ratio of the current cycle is lower than the set minimum switching ratio threshold, it is determined as a durability failure, and the total number of cycles before failure is taken as the durability test result; wherein the switching ratio of the current cycle is the ratio of the high resistance value after a single reset pulse to the low resistance value after a single set pulse.

[0039] Figure 3 Shown Figure 2 The flowchart shown is a flow chart of determining the sequence of consecutive multiple reset operations and consecutive multiple set operations in the durability testing method of the RRAM memristor.

[0040] Combination Figure 2 As shown, the gradually increasing pulse intensity includes a gradually increasing setting pulse intensity; Correspondingly, the continuous multiple set operations refer to programming the RRAM memristor device multiple times in succession using a gradually increasing set pulse intensity; The gradually increasing setting pulse intensity includes gradually increasing the pulse width and the step-increasing pulse height, or gradually increasing the pulse height and the step-increasing pulse width, or simultaneously fixing the step-increasing pulse width and the increasing pulse height.

[0041] In some examples, the gradually changing set pulse intensity can be a fixed voltage, the lower electrode is grounded, and the upper electrode voltage increases from the starting voltage in a fixed step, generally in the range of 0.5V to 2.5V; the gradually increasing pulse intensity in this article can gradually determine the lowest resistance state, thereby improving the accuracy of determining the resistance range of the RRAM device.

[0042] As an embodiment, the current state of the RRAM device includes that the resistance state of the RRAM device is the highest resistance state; with the strengthening of the gradually increasing set pulse intensity each time loading, the resistance state of the RRAM device will gradually transition from the highest resistance state to the lowest resistance state.

[0043] In the embodiment of the present application, a durability test is subsequently performed, starting from the highest resistance state and gradually transitioning to the lowest resistance state, to avoid premature failure of the durability test due to over-reset or over-set problems, which is conducive to obtaining more stable and accurate durability test results.

[0044] As an embodiment, the gradually increasing pulse intensity includes a gradually increasing reset pulse intensity; Correspondingly, the continuous multiple reset operations refer to the continuous multiple erasing of the RRAM memristor device using a gradually increasing reset pulse intensity; The gradually increasing manner of the gradually increasing reset pulse intensity includes: fixing the pulse width and fixing the step-increasing pulse height, or fixing the pulse height and fixing the step-increasing pulse width, or fixing both the step-increasing pulse width and the increasing pulse height.

[0045] In some examples, the intensity of the gradual reset pulse may be fixed in voltage, the upper electrode is grounded, and the voltage of the lower electrode increases from the starting voltage in a fixed step, generally in the range of 0.5V to 2.5V.

[0046] The gradually increasing pulse intensity in this article can gradually determine the highest resistance state, thereby improving the accuracy of determining the resistance range of the RRAM device.

[0047] As an embodiment, the current state of the RRAM device includes that the resistance state of the RRAM device is the lowest resistance state; with the strengthening of the reset pulse intensity that gradually increases with each loading, the resistance state of the RRAM device will gradually transition from the lowest resistance state to the highest resistance state.

[0048] In the embodiment of the present application, a durability test is subsequently performed, starting from the lowest resistance state and gradually transitioning to the highest resistance state, so as to avoid premature failure of the durability test due to over-reset or over-set problems, which is conducive to obtaining more stable and accurate durability test results.

[0049] As an embodiment, the size of the fixed step is inversely proportional to the display fineness of the durability test.

[0050] The fixed step size in this article can be set at the beginning of the durability test and used in subsequent durability tests. When the fixed step size needs to be adjusted, the fixed step size is modified before each durability test and the durability test is performed again.

[0051] The larger the fixed step in this article, the smaller the display fineness. The smaller the fixed step in this article, the larger the display fineness. This is convenient for displaying the current resistance state of the RRAM for endurance testing.

[0052] Continue as Figure 2 As shown, the above step 130 may further include: starting from the initial pulse intensity, according to the determined sequence of the reset operation and the set operation, using a combination of multiple consecutive reset operations and multiple consecutive set operations to scan the resistance range window of the RRAM device to obtain the highest resistance state of the RRAM device and the lowest resistance state of the RRAM device.

[0053] Since the resistance state range of the RRAM device will be affected by the resistive material system and process conditions, the operator can perform multiple set and reset operations on the device before defining the high resistance state and the low resistance state to evaluate the average high resistance state range and the average low resistance state range.

[0054] The combination herein refers to a plurality of consecutive reset operations and a plurality of consecutive set operations or a plurality of consecutive set operations and a plurality of consecutive reset operations. In this way, the specific sequence of the reset operation and the set operation is determined according to the actual situation to determine the highest resistance state of the RRAM device and the lowest resistance state of the RRAM device. In this way, the durability test can be continued from the highest resistance state of the RRAM device and / or the lowest resistance state of the RRAM device.

[0055] Specifically, for example, it is determined that the reset operation is performed multiple times in succession from the lowest resistance state to the highest resistance state. Then, the set operation is performed multiple times in succession from the highest resistance state to the lowest resistance state. Then, the durability test is continued from the lowest resistance state of the RRAM device, and the highest resistance state ± tolerance error range to the lowest resistance state ± tolerance error range are cyclically reproduced in turn, and then the low resistance-high resistance window within the tolerance error range is reproduced.

[0056] Similarly, for example, it is determined that multiple consecutive set operations are performed from the highest resistance state to the lowest resistance state. Then, multiple consecutive reset operations are performed from the lowest resistance state to the highest resistance state. Then, the durability test is continued from the highest resistance state of the RRAM device, and the lowest resistance state ± tolerance error range to the highest resistance state ± tolerance error range is cyclically reproduced, and then the high resistance-low resistance window within the tolerance error range is reproduced.

[0057] In the embodiment of the present application, by balancing the reset and set pulse parameter conditions, premature failure of the durability test due to over-reset or over-set problems is avoided, which is conducive to obtaining more stable and accurate durability test results, thereby improving the service life of the device.

[0058] like Figure 3As shown, the above step 110 can be further implemented by the following first step, and the above step 120 can be implemented by the second step: Step 1: In the first step, the current state of the RRAM device is determined, and the initial resistance value R0 of the RRAM device is read.

[0059] Step 2: If the current resistance state of the RRAM device is low resistance, multiple reset operations are performed first, and then multiple set operations are performed to obtain the lowest resistance state R of the RRAM device. L, min Then, a fixed reset pulse parameter for durability test is selected and used to reset the device from the lowest resistance state R L, min First, reproduce the highest resistance state R obtained previously H, max Then, the fixed setting pulse parameters of the durability test are selected and used to set the maximum resistance state R H, max First, reproduce the lowest resistance R obtained previously. L, min .

[0060] like Figure 3 As shown in FIG. 1 , if the current resistance state of the RRAM device is a high resistance state, multiple consecutive set operations are performed first to obtain the lowest resistance state R of the RRAM device. L, min , and then perform multiple reset operations in succession to obtain the highest resistance state R of the RRAM device H, max .continue Figure 3 As shown, in order to obtain the highest resistance state R of the RRAM device H, max Then, the fixed setting pulse parameters of the durability test are selected and used to H, max First, reproduce the lowest resistance R obtained previously. L, min Then, the fixed reset pulse parameters for the durability test are selected and used to reset the device from the lowest resistance state R L, min First, reproduce the highest resistance state R obtained previously H, max Since the resistance state range of the RRAM device is affected by the resistive material system and process conditions, the operator can perform multiple set and reset operations on the device before defining the high resistance state and the low resistance state to evaluate the average high resistance state range and the average low resistance state range.

[0061] Step 3: Set the minimum switching ratio R for durability failure ratio Until the high-to-low resistance switching ratio of the RRAM device is lower than the set minimum switching ratio, the number of set and reset operation cycles at this time is recorded as the endurance test result. For detailed description, please continue to refer to Figure 3 shown.

[0062] continue Figure 3As shown, the following steps can be used to determine that the high-to-low resistance switching ratio of the RRAM device is lower than the set minimum switching ratio, and record the number of cycles of the set operation and the reset operation at this time. The durability test results may include, but are not limited to, the following first to fourth steps: First, apply a combination of continuous alternating set pulses and reset pulses, and record the resistance value R of the RRAM device after the pulse HRS , R LRS . Second, determine whether it is . Third, if not, return to the first step. Fourth, if so, record the number of cycles n as the durability test result. Among them, is the resistance value of the RRAM device after the reset pulse, and R LRS is the resistance value of the RRAM device after the set pulse, is the ratio of the high resistance state of the device after the reset pulse to the low resistance state of the device after the set pulse.

[0063] Figure 4a As shown Figure 2 is the flowchart of continuously performing multiple set operations on the RRAM memristor device in the durability test method of the RRAM memristor shown Figure 4b As shown Figure 2 is the flowchart of the method for continuously performing multiple reset operations on the RRAM memristor device in the durability test method of the RRAM memristor shown

[0064] It should be noted that: n is used to mark the number of cycles of the durability test; x is used to mark the number of pulses in multiple consecutive set operations or multiple consecutive reset operations; y is used to mark the number of repetitions of the same pulse in multiple consecutive set operations or multiple consecutive reset operations; the constant N is the maximum number of times that the same pulse is allowed to be continuously performed.

[0065] As Figure 4a shown, first, on the premise of x = 0 and y = 0, continue to perform multiple consecutive reset operations: (1). Apply a set (Set) pulse with a fixed pulse width and an initial pulse height.

[0066] (2). The resistance value Rx of the RRAM device, x = x + 1.

[0067] (3). Judge whether < ; if so, execute (4). Apply a set (Set) pulse with a fixed pulse width and a fixed step-increasing pulse height, y = 0, and return to execute step (2); if not, execute (5), y < N, and execute step (6).

[0068] (6) Repeat the current set pulse, y=y+1, and return to step (2).

[0069] Then, obtain the lowest resistance state R of the RRAM device L, min .

[0070] like Figure 4b The example shown is similar to Figure 4a The example shown, compared to Figure 4a The example shown is different in that Figure 4b In the example, under the premise of x=0, y=0, continue to perform multiple consecutive set operations, and replace Figure 4a The example “Set Pulse” shown is a “Reset Pulse” and, ultimately, the highest resistance state R of the RRAM device. H, max .

[0071] Step 2: Perform multiple consecutive set operations on the RRAM device. Multiple consecutive set operations refer to the use of gradually increasing set (Set) pulse strength to program the RRAM memristor device multiple times. The gradually increasing pulse strength used in this embodiment is reflected in the fixed pulse width and the increase of the pulse height in a fixed step. At the beginning, a set pulse with a fixed pulse width and initial pulse height is loaded on the high-resistance RRAM device, and the resistance value of the RRAM device after the pulse is read. When reading the resistance value, multiple readings can be performed to take an average. After the RRAM device is loaded with the set pulse, the resistance state of the RRAM device will change from a high resistance state to a low resistance state. After continuously increasing the strength of the set pulse (continuously increasing the pulse height), the resistance state of the RRAM device will transition from the highest resistance state to the lowest resistance state. If the resistance state of the RRAM device does not change to a lower resistance state after the set pulse is applied, then the current pulse parameters are repeatedly applied until the set maximum number N is reached.

[0072] Figure 5a Shown Figure 4a The schematic diagram of multiple consecutive set operation pulses is shown. Figure 5b Shown Figure 4b The schematic diagram of multiple consecutive reset operation pulses is shown.

[0073] Step 3: If Figure 5a and Figure 5bAs shown, the RRAM device is reset multiple times continuously. The continuous multiple reset operation refers to the use of gradually increasing reset (Reset) pulse strength to program the RRAM memristor device multiple times continuously. The gradually increasing pulse strength used in this embodiment is reflected in the fixed pulse width and the increase of the pulse height in a fixed step. At the beginning, a reset pulse with a fixed pulse width and initial pulse height is loaded on the low-resistance RRAM device, and the resistance value of the RRAM device after the pulse is read. When reading the resistance value, multiple readings can be performed to take the average. After the RRAM device is loaded with the reset pulse, the resistance state of the RRAM device will change from a low resistance state to a high resistance state. After continuously increasing the reset pulse strength (continuously increasing the pulse height), the resistance state of the RRAM device will transition from the lowest resistance state to the highest resistance state. If the resistance state of the RRAM device does not change to a higher resistance state after the reset pulse is applied, then the current pulse parameters are repeatedly applied until the set maximum number N is reached. The voltage polarity direction of the reset pulse and the set pulse is different.

[0074] Step 4: Obtain the resistance range of the RRAM device, and obtain the lowest resistance state R of the RRAM device through the above-mentioned continuous multiple set operations and continuous multiple reset operations. L, min and the highest resistance state R H, max . Figure 6 Shown Figure 4a and Figure 4b The resistance state change diagram shown is a diagram of performing multiple consecutive set operations and multiple consecutive reset operations on the RRAM memristor device.

[0075] Step 5: Select fixed pulse parameters for subsequent durability testing according to the resistance range of the RRAM device. The fixed pulse parameters used in the subsequent durability test include fixed set pulse parameters and fixed reset pulse parameters. The fixed set pulse parameters can achieve the lowest resistance state of the resistance range window obtained in the above steps of the RRAM device; the fixed reset pulse parameters can achieve the highest resistance state of the resistance range window obtained in the above steps of the RRAM device. Because the formation and breakage of the conductive filaments of the RRAM device are subject to certain randomness due to the process conditions of the resistive material, the operator can set the tolerance error range of the highest resistance state and the lowest resistance state. The specific setting of the tolerance error range usually depends on the specific application requirements, process conditions and required performance level of the RRAM device, and can be set between 1% and 10%.

[0076] Step 6: Figure 7As shown, by loading a combination of a single set pulse and a single reset pulse that are continuously alternating, the durability test of the RRAM device is started, and the high and low resistance states after each pulse are recorded. The operator can set a suitable minimum switching ratio for durability test failure according to the application scenario. The switching ratio of the current cycle is the ratio of the high resistance value after a single reset pulse to the low resistance value after a single set pulse. Once the switching ratio of the current cycle is lower than the set minimum switching ratio threshold, it is defined as a durability failure, and the total number of cycles before failure is the durability test result.

[0077] The present application can effectively avoid the problem of premature failure of the durability test caused by excessive resetting or excessive setting, and help to obtain more stable and accurate durability test results, thereby improving the overall service life of the RRAM device.

[0078] Based on the same inventive concept as the above method, the embodiment of the present application also provides a durability testing device for a RRAM memristor, such as Figure 8 As shown, the durability test device of the RRAM memristor may include the following modules: An acquisition module 31 is used to acquire the current state of the RRAM device; An operation sequence determination module 32, used to determine the sequence of the consecutive multiple reset operations and the consecutive multiple set operations based on the current state of the RRAM device; the reset operation represents erasing the RRAM memristor device; the set operation represents programming the RRAM memristor device; A fixed pulse parameter determination module 33, configured to determine the resistance range of the RRAM device using a gradually increasing pulse intensity; the gradually increasing pulse intensity includes an initial pulse intensity capable of flipping the current state of the RRAM; The durability test module 34 is used to select fixed pulse parameters used in the durability test according to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, load continuous alternating reset operations and set operations, and perform durability test on the RRAM device.

[0079] An embodiment of the present application provides an electronic device, including the durability testing device of the RRAM memristor described above.

[0080] The durability test method of the RRAM memristor of the embodiment of the present application is applied to an electronic device. The electronic device may be a PC (Personal Computer) terminal device. The PC terminal device may include, but is not limited to, a desktop computer, a tablet computer or a laptop computer.

[0081] Fig. 9 Shown is a schematic structural diagram of an electronic device 50 provided in an embodiment of the present application.

[0082] like Fig. 9 As shown, the electronic device 50 includes one or more processors 51 for implementing the durability testing method of the RRAM memristor as described above.

[0083] In some embodiments, the electronic device 50 may include a storage medium 59. For example, the computer-readable storage medium may store a program that can be called by the processor 51, and may include a non-volatile storage medium. In some embodiments, the electronic device 50 may include a memory 58 and an interface 57. In some embodiments, the electronic device 50 may also include other hardware according to actual applications.

[0084] The computer-readable storage medium of the embodiment of the present application stores a program thereon, and when the program is executed by the processor 51, it is used to implement the durability testing method of the RRAM memristor described above.

[0085] The present application provides a computer program product, comprising a computer program / instruction, which implements any of the above methods when executed by a processor.

[0086] The present application also provides a computer program, which is stored in a computer-readable storage medium, such as Fig. 9 The storage medium 59 shown in the figure, and when the processor executes the computer program, it causes the processor 51 to execute the method described above.

[0087] The present application may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing program code. Computer-readable storage media include permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer-readable storage media include but are not limited to: phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0088] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

[0089] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the phrase "includes a ..." defines an element, and does not exclude the presence of other identical elements in the process, method, commodity or device including the element.

Claims

1. A durability testing method for a RRAM memristor, characterized in that: include: Get the current status of the RRAM device; Based on the current state of the RRAM device, determining the order of the consecutive multiple reset operations and the consecutive multiple set operations; the reset operation represents erasing the RRAM memristor device; the set operation represents programming the RRAM memristor device; Determining a resistance range of the RRAM device using a gradually increasing pulse strength, wherein the gradually increasing pulse strength includes an initial pulse strength capable of flipping a current state of the RRAM; The resistance range of the RRAM device includes a highest resistance state and a lowest resistance state; According to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, a fixed pulse parameter used in the durability test is selected, and a continuous alternating reset operation and a set operation are loaded to perform a durability test on the RRAM device.

2. The durability testing method of the RRAM memristor according to claim 1, characterized in that: The gradually increasing pulse intensity includes a gradually increasing setting pulse intensity; Correspondingly, the continuous multiple set operations refer to programming the RRAM memristor device multiple times continuously using the gradually increasing set pulse intensity; The gradually increasing manner of the gradually increasing setting pulse intensity includes: fixing the pulse width and fixing the step-increasing pulse height, or fixing the pulse height and fixing the step-increasing pulse width, or fixing both the step-increasing pulse width and the increasing pulse height.

3. The durability testing method of the RRAM memristor according to claim 2, characterized in that: The current state of the RRAM device includes the resistance state of the RRAM device being the highest resistance state; As the intensity of the gradually increasing set pulse increases each time the load is applied, the resistance state of the RRAM device gradually transitions from the highest resistance state to the lowest resistance state.

4. The durability testing method of the RRAM memristor according to claim 1, characterized in that: The gradually increasing pulse intensity includes a gradually increasing reset pulse intensity; Correspondingly, the continuous multiple reset operations refer to using the gradually increasing reset pulse intensity to continuously erase the RRAM memristor device multiple times; The gradually increasing manner of the gradually increasing reset pulse intensity includes: fixing the pulse width and fixing the step-increasing pulse height, or fixing the pulse height and fixing the step-increasing pulse width, or fixing both the step-increasing pulse width and the increasing pulse height.

5. The durability testing method of the RRAM memristor according to claim 4, characterized in that: The current state of the RRAM device includes the resistance state of the RRAM device being the lowest resistance state; As the intensity of the gradually increasing reset pulse increases each time the load is applied, the resistance state of the RRAM device gradually transitions from the lowest resistance state to the highest resistance state.

6. The durability testing method of the RRAM memristor according to any one of claims 2 to 5, characterized in that: The size of the fixed step is inversely proportional to the display fineness of the durability test.

7. The durability testing method of the RRAM memristor according to any one of claims 1 to 5, characterized in that: The step of determining the resistance range of the RRAM device by using the gradually increasing pulse intensity includes: starting from the initial pulse intensity, according to the determined sequence of the reset operation and the set operation, using a combination of the consecutive multiple reset operations and the consecutive multiple set operations to scan the resistance range window of the RRAM device to obtain the highest resistance state of the RRAM device and the lowest resistance state of the RRAM device; and / or, The loading of the continuously alternating reset operation and set operation to perform a durability test on the RRAM device includes: forming a cyclic pulse through a single set pulse and a single reset pulse, loading the cyclic pulse multiple times, performing a durability test on the RRAM device, and recording the high resistance state of the RRAM device and the low resistance state of the RRAM device after each pulse until the RRAM device fails.

8. A durability test device for a RRAM memristor, characterized in that: include: An acquisition module, used to acquire the current state of the RRAM device; An operation sequence determination module, used to determine the sequence of multiple consecutive reset operations and multiple consecutive set operations based on the current state of the RRAM device; the reset operation represents erasing the RRAM memristor device; the set operation represents programming the RRAM memristor device; A fixed pulse parameter determination module, configured to determine a resistance range of the RRAM device using a gradually increasing pulse intensity; the gradually increasing pulse intensity includes an initial pulse intensity capable of flipping a current state of the RRAM; The resistance range of the RRAM device includes a highest resistance state and a lowest resistance state; The durability test module is used to select fixed pulse parameters used in the durability test according to the highest resistance state and the lowest resistance state in the resistance range of the RRAM device, load continuous alternating reset operation and set operation, and perform durability test on the RRAM device.

9. An electronic device, characterized in that: The method comprises one or more processors, and is used to implement the durability testing method of the RRAM memristor according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: A program is stored thereon, and when the program is executed by a processor, the durability testing method of the RRAM memristor according to any one of claims 1 to 7 is implemented.

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