Method for attaching heat sink to semiconductor package and semiconductor package assembly

Abstract

A method for attaching a heat spreader to a semiconductor package is provided. The method includes: providing a semiconductor package, where the semiconductor package includes a package substrate, a semiconductor element mounted on the package substrate, and a mold cover formed on the package substrate and encapsulating the semiconductor element, and where the mold cover includes a laser activatable molding material; removing a portion of a thickness of the mold cover over the semiconductor element by laser ablation to form a cavity in the mold cover and convert the laser activatable molding material at an inner surface of the cavity into a conductive layer; applying a thermal interface material (TIM) in the cavity to form a TIM layer on the conductive layer protruding from the mold cover; and attaching the heat sink to the semiconductor package at least through the TIM layer.

Description

Technical Field

[0001] The present application relates generally to semiconductor technology, and more particularly to a method for attaching a heat sink to a semiconductor package and a semiconductor package assembly. Background Art

[0002] Mold caps are commonly used in semiconductor packaging to protect semiconductor chips from external damage and contamination. However, due to the low thermal conductivity of the molding material of the mold cap, heat cannot be dissipated well from the semiconductor chip to the external environment. Therefore, a thermal interface material (TIM) layer is applied to the outer surface of the mold cap to promote heat dissipation.

[0003] Figure 1 A conventional semiconductor package assembly 10 is shown in which a semiconductor package 12 is assembled with a heat sink 14. A TIM layer 16 is formed between the semiconductor package 12 and the heat sink 14 to facilitate heat dissipation. In addition, a seed layer 17 is plated or sputtered on a mold cap 18 and a semiconductor element 19 of the semiconductor package 12 to allow the TIM layer 16 to be formed. The plating of the seed layer 17 introduces an additional process, which increases the manufacturing cost of the semiconductor package assembly 10. Also, there is a risk that the semiconductor element 19 may be broken due to external damage applied during the grinding process of the mold cap 18, and delamination may occur between the surfaces of the semiconductor element 19 and the mold cap 18 and the TIM layer 16.

[0004] Figure 2 Another conventional semiconductor package assembly 20 is shown in which a semiconductor package 22 is assembled with a heat sink 24. A TIM layer 26 may be formed between the semiconductor package 22 and the heat sink 24. However, there may be a risk that the TIM material 26 is pulled out, and voids 28 may be formed in the TIM layer 26, which may deteriorate heat dissipation from the semiconductor package 22 to the heat sink 24. Also, the shape of the TIM material 26 may not be well controlled, so that it may flow onto a specific element such as a resistor 29 of the semiconductor package 22, thereby causing a short circuit and electrical failure of the semiconductor package assembly 20. In addition, the semiconductor element in the semiconductor package 22 may be cracked due to external pressure and stress applied by the non-uniform TIM material 26.

[0005] Therefore, there is a need for further improvements in methods for attaching heat sinks to semiconductor packages. Summary of the invention

[0006] An object of the present application is to provide a method for attaching a heat sink to a semiconductor package having improved crack prevention advantages.

[0007] According to one aspect of the present application, a method for attaching a heat sink to a semiconductor package is provided. The method includes: providing a semiconductor package, wherein the semiconductor package includes a package substrate, a semiconductor element mounted on the package substrate, and a mold cover formed on the package substrate and encapsulating the semiconductor element, and wherein the mold cover includes a laser-activatable molding material; removing a portion of the thickness of the mold cover above the semiconductor element by laser ablation to form a cavity in the mold cover and converting the laser-activatable molding material at the inner surface of the cavity into a conductive layer; applying a thermal interface material (TIM) in the cavity to form a TIM layer protruding from the mold cover on the conductive layer; and attaching the heat sink to the semiconductor package at least through the TIM layer.

[0008] According to another aspect of the present application, a semiconductor package assembly is provided. The semiconductor package assembly comprises: a semiconductor package, wherein the semiconductor package comprises: a package substrate; a semiconductor element mounted on the package substrate; and a mold cover formed on the package substrate and encapsulating the semiconductor element, wherein the mold cover comprises a laser-activatable molding material, the mold cover comprises a cavity formed above the semiconductor element and having a conductive layer at its inner surface, and the cavity and the conductive layer are formed by laser ablation of the laser-activatable molding material; a thermal interface material (TIM) layer formed in the cavity of the mold cover and protruding from the mold cover; and a heat sink attached to the semiconductor package at least through the TIM layer.

[0009] It should be understood that both the above general description and the following detailed description are exemplary and explanatory only and do not limit the present invention. In addition, the accompanying drawings, which are incorporated in this specification and constitute a part of this specification, illustrate embodiments of the present invention and are used together with the description to explain the principles of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The drawings cited herein form part of the specification. The features shown in the drawings only illustrate some embodiments of the present application, rather than all embodiments of the present application, unless the specific implementation mode clearly indicates otherwise, and the reader of this specification should not make an inference to the contrary.

[0011] Figure 1 A conventional semiconductor package assembly is shown in which a semiconductor package is assembled with a heat sink.

[0012] Figure 2 Another conventional semiconductor package assembly is shown in which a semiconductor package is assembled with a heat sink.

[0013] Figures 3A to 3D A method for attaching a heat sink to a semiconductor package according to an embodiment of the present application is shown.

[0014] Figure 3E Show Figure 3B An enlarged view of a portion of the conductive layer is shown in FIG.

[0015] Figures 4A to 4E A method for attaching a heat sink to a semiconductor package according to another embodiment of the present application is shown.

[0016] The same reference numbers will be used throughout the drawings to refer to the same or like parts. DETAILED DESCRIPTION

[0017] The following detailed description of the exemplary embodiments of the present application refers to the drawings that form a part of this specification. The drawings illustrate specific exemplary embodiments in which the present application can be practiced. The detailed description including the drawings describes these embodiments in sufficient detail to enable a person skilled in the art to practice the present application. A person skilled in the art may further utilize other embodiments of the present application and make logical, mechanical and other changes without departing from the spirit or scope of the present application. Therefore, the reader of the following detailed description should not interpret this specification in a limiting sense, and only the appended claims define the scope of the embodiments of the present application.

[0018] In this application, the use of the singular includes the plural unless specifically stated otherwise. In this application, the use of "or" means "and / or" unless otherwise stated. In addition, the use of the term "comprising" in other forms is not limiting. In addition, terms such as "element" or "component" encompass elements and components that comprise one unit and elements and components that comprise more than one subunit, unless specifically stated otherwise. In addition, the section headings used herein are for organizational purposes only and should not be construed as limiting the subject matter described.

[0019] As used herein, for ease of description, spatially relative terms such as "under", "below", "above", "on", "upper", "lower", "left", "right", "vertical", "horizontal", "side", etc. may be used herein to describe the relationship between an element or feature and another element (or elements) or feature (or features), as shown in the figure. In addition to the orientation depicted in the figure, spatially relative terms are also intended to cover different orientations of the device when in use or operation. The device can be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein can be interpreted accordingly. It should be understood that when an element is referred to as being "connected to" or "coupled to" another element, it can be directly connected to or coupled to the other element, or there can be intermediate elements.

[0020] As previously mentioned, conventional heat sink attachment methods are complex in terms of processing and may produce cracks or voids due to external stresses applied during the attachment process. In order to address at least one of these problems, the inventors of the present application have conceived a method of encapsulating a semiconductor element under a heat sink using a specific type of laser-activatable molding material. The laser-activatable molding material can be removed and activated by a laser to form a cavity in a simple manner to which a seed layer for a thermal interface material (TIM) layer is attached. In this way, the entire attachment process can be significantly simplified.

[0021] Figures 3A to 3D A method for attaching a heat sink to a semiconductor package according to an embodiment of the present application is shown. In an embodiment, the semiconductor package is a strip-type package that can be cut from a semiconductor package strip, and the semiconductor package strip can include one row of semiconductor packages or two or more rows of semiconductor packages. It can be understood that Figures 3A to 3D The embodiment shown in FIG. 1 shows only one semiconductor package, however, other semiconductor packages formed on a semiconductor package strip may be similarly processed.

[0022] like Figure 3A As shown in , a semiconductor package 302 is provided. The semiconductor package 302 includes a package substrate 304 and a semiconductor element 306 mounted on the package substrate 304. For example, the package substrate 304 may include a printed circuit board (PCB), a carrier substrate, a semiconductor substrate with an electrical interconnect, or a ceramic substrate. In some other examples, the package substrate 304 may include a laminated insert, a strip insert, a lead frame or other suitable substrate. Specifically, the package substrate 304 may include one or more insulating layers or passivation layers, one or more conductive vias formed by the insulating layers, and one or more conductive layers formed on or between the insulating layers. The conductive vias and the conductive layers together form various interconnect structures in the package substrate 304. In addition, the interconnect structure may include one or more groups of conductive patterns exposed from the front surface of the package substrate 304. For example, the conductive pattern may take the form of a contact pad or other similar structure. Each group of conductive patterns can be used to establish an electrical connection with an electronic element (e.g., semiconductor element 306) disposed on the package substrate 304. In some embodiments, the semiconductor element 306 may be a semiconductor chip having an exposed surface of a semiconductor material that is relatively fragile. In some other embodiments, the semiconductor element 306 may be a semiconductor package encapsulated by an encapsulation layer or a mold cap.

[0023] The mold cap 308 is formed on the package substrate 304 and can encapsulate the semiconductor element 306 on the package substrate 304. In some embodiments, the mold cap 308 can be partially or entirely made of a polymer composite material, such as an epoxy resin with fillers, epoxy acrylate with fillers, or a polymer with appropriate fillers. The mold cap 308 can protect the semiconductor element 306 from the external environment and damage. In an embodiment, the mold cap 308 contains a laser-activatable molding material at least in its upper portion, and can also contain a laser-activatable molding material in its entirety. For example, the laser-activatable molding material can include a matrix material such as the aforementioned polymer composite material and an additive that can be activated by a laser. The additive, which is usually formed of metal particles, can be opened by a laser to exhibit conductive properties. In some examples, the mold cap 308 can be a laser direct structuring material layer. The laser direct structuring material layer refers to a material layer that is used to achieve a process of selective metallization of a limited area after the substrate containing the additive is "activated" by laser irradiation, which releases a metal "seed" that can promote metal deposition to form a conductive path. In the laser direct structuring process, a laser beam is moved over the molded part to activate the surface at locations where conductive metal paths are desired, thereby "structuring" the molded part. In addition, the matrix material of the mold cap 308, which is typically a polymer composite material, can be removed by laser ablation, and the mold cap 308 can thus be patterned as desired, as will be described in detail below.

[0024] exist Figure 3A In the embodiment shown in , mold cap 308 is formed of a layer of a laser-activatable molding material, however, in some alternative embodiments, mold cap 308 may be formed of two or more layers of molding material, including a top layer of a laser-activatable molding material and other lower layers of a non-laser-activatable molding material. In addition, mold cap 308 has a top surface above the top surface of semiconductor element 306, so that the thickness of mold cap 308 above semiconductor element 306 can be used to form a seed layer for a TIM layer. In some examples, the thickness of mold cap 308 above semiconductor element 306 can be tens of microns to hundreds of microns or even thousands of microns.

[0025] Next, if Figure 3B, the laser beam may be directed to the top surface of the mold cap 308, or specifically, to the area directly above the semiconductor element 306. Initially, the laser beam may have an intensity sufficient to ablate a portion of the mold cap 308 and form a cavity 310 in the mold cap 308. The cavity 310 may remove a portion of the thickness of the mold cap 308 above the semiconductor element 306, but leave a remaining portion of the mold cap 308 covering the semiconductor element 306. The remaining portion of the mold cap 308 covering the semiconductor element 306 may have a thickness of 0.5 microns to 20 microns, or preferably 1 micron to 5 microns, which may protect the top surface of the semiconductor element 306 from potential damage in subsequent processes.

[0026] The cavity 310 in the mold cap 306 is formed to accommodate a TIM material (not shown) for a heat sink. Therefore, the depth of the cavity 310 depends on the amount of TIM material to be filled therein. In some embodiments, the depth of the cavity 310 may be in the range of 5 microns to 500 microns or even greater. In addition, in some preferred embodiments, the cavity 310 in the mold cap 308 may extend across the entire semiconductor element 306, that is, the projection of the semiconductor element 306 on the package substrate 304 may be completely within the range of the projection of the cavity 310 on the package substrate 304. In this way, a better heat conduction path can be formed by the TIM material filled in the cavity 310.

[0027] After forming the cavity 310, the laser beam may be adjusted, for example, its intensity. The adjusted laser beam may not further ablate or remove the molding material of the mold cap 306, but is sufficient to convert the laser-activatable molding material at the inner surface of the cavity 310 into the conductive layer 312. As previously described, after being activated, the laser-activatable molding material can release metal "seeds" that can promote metal deposition to form a conductive path. Reference Figure 3E , showing an enlarged view of a portion of the conductive layer 312. The metal particles 313 distributed within the conductive layer 312 can be opened by laser irradiation to destroy their outer shells and expose their inner metal cores. In some embodiments, the thickness of the conductive layer 312 can be 100 nanometers to 10 micrometers, or preferably 200 nanometers to 2 micrometers.

[0028] Next, if Figure 3C, the TIM material may be applied in the cavity 310 of the mold cap 308 to form a TIM layer 314 on the conductive layer 312. Due to the presence of the conductive layer 312, the TIM material may be easily attached to the mold cap 308 and deposited therein. In some embodiments, the TIM layer 314 may protrude from the mold cap 308, that is, the top surface of the TIM layer 314 may be higher than the top surface of the mold cap 308. In this way, the cavity 310 may be completely filled with the TIM material, thereby avoiding the formation of voids or other similar defects between the mold cap 308 and the heat sink to be attached due to insufficient TIM material.

[0029] The TIM layer 314 is used to enhance the thermal coupling between the heating device and the heat dissipation device. Specifically, at each contact interface, there is an interfacial thermal resistance that hinders heat dissipation, and in the case of continuous overheating and large thermal stress at the contact interface, the electronic performance and device life will drop sharply. The TIM layer 314 can reduce the interfacial thermal resistance between the layers, enhance the thermal management performance, and meet application requirements, such as low thermal stress, low elastic modulus or viscosity, flexibility and reusability between materials with different thermal expansion coefficients. In some embodiments, the TIM material can be a thermally conductive, applicable material, preferably a thermal grease, a thermal adhesive, a thermal gap filler, a liquid metal and a solder paste. In an embodiment, the TIM material is an epoxy plastic, which can be used to easily bond to metals, ceramics, most plastics and a variety of other materials. In another embodiment, the TIM material contains a solder paste having a thermal conductivity better than that of a typical thermal interface material. Preferably, the solder paste is an Ag-In solder alloy. Specifically, the TIM material can be a solder preform, i.e., a solid, flat, manufactured shape solder, and a flux can be applied to coat the solder preform.

[0030] After laser processing and applying TIM, heat sink 316 can be attached to semiconductor package 302 through TIM layer 314. Heat sink 316 is generally made of a highly thermally conductive metal material for effective heat dissipation. In an embodiment, heat sink 316 can work together with TIM layer 314 to provide better heat dissipation for semiconductor element 306. Heat sink 316 is preferably made of copper, aluminum and copper-tungsten alloy. It is understood that other suitable materials can be used to form heat sink 316. In addition, although a portion of the molding material of mold cap 308 remains between TIM layer 314 and semiconductor element 306, the thickness of the remaining portion of the molding material is not large, for example, 0.5 microns to 20 microns. Therefore, the remaining portion of the molding material does not generally hinder heat transfer from semiconductor element 306 to heat sink 316.

[0031] It is understood that the heat sink 316 is generally larger than the TIM layer 314. Therefore, the heat sink 316 may extend laterally from the TIM layer 314, such as Figure 3DThus, some adhesive material masses 318 may be formed on the mold cap 308 that is not covered by the TIM layer 314 and fill in the gap between the heat sink 316 and the mold cap 308. The adhesive material 318 may improve the attachment of the heat sink 316 to the semiconductor package 302 without affecting the heat transfer from the semiconductor element 306 to the heat sink 316.

[0032] exist Figures 3A to 3D After the various steps shown in FIG. 1 , a semiconductor package assembly combining a semiconductor package and a heat sink can be obtained.

[0033] Figures 4A to 4E A method for attaching a heat sink to a semiconductor package according to another embodiment of the present application is shown. In an embodiment, the semiconductor package is a unit type package that has been cut from a semiconductor package strip.

[0034] like Figure 4A As shown in FIG. 4 , a semiconductor package 402 is provided. The semiconductor package 402 includes a package substrate 404 and a semiconductor element 406 mounted thereon. It is understood that other elements may also be mounted on the package substrate 404.

[0035] Next, if Figure 4B As shown in FIG. 4 , a mold cap 408 is formed on the package substrate 404 and can encapsulate the semiconductor element 406 on the package substrate 404. The shape and size of the mold cap 408 can be determined according to the semiconductor element 406. For example, in FIG. Figure 4B In the embodiment shown in , mold cap 408 can be formed into a truncated pyramid. However, in some other embodiments, mold cap 408 can also be formed into a rectangular parallelepiped, a truncated cone, or any other suitable shape. In some embodiments, mold cap 408 can be made partially or entirely of a polymer composite material, such as an epoxy resin with filler, an epoxy acrylate with filler, or a polymer with a suitable filler. The matrix material of mold cap 408, which is usually a polymer composite, can be removed by laser ablation, and thus mold cap 408 can be patterned as needed, as described in detail below.

[0036] In addition, mold cap 408 includes a laser-activatable molding material at least in its upper portion. In some examples, mold cap 408 can be a laser directly structured material layer. The laser-activatable molding material can include a metal "seed" that can promote metal deposition to form a conductive path, i.e., act as a seed layer for metal deposition. It can be appreciated that in some embodiments, mold cap 408 can be made of a laser-activatable molding material.

[0037] Next, if Figure 4C, the laser beam may be directed to the top surface of the mold cap 408, or specifically, to the area directly above the semiconductor element 406. The laser beam may have an intensity sufficient to ablate a portion of the mold cap 408 and form a cavity 410 in the mold cap 408. The cavity 410 may remove a portion of the thickness of the mold cap 408 above the semiconductor element 406, but leave the remaining portion of the mold cap 408 covering the semiconductor element 406. After the cavity 410 is formed, the intensity of the laser beam may be adjusted to avoid further ablation of the molding material of the mold cap 406. However, the laser beam is sufficient to convert the laser-activatable molding material at the inner surface of the cavity 410 into a conductive layer 412, i.e., the conductive layer later acts as a seed layer.

[0038] Next, if Figure 4D As shown in FIG. 4 , TIM material may be applied in cavity 410 of mold cap 408 to form TIM layer 414 on conductive layer 412. Due to the presence of conductive layer 412, TIM material may be easily attached to and deposited in mold cap 408. In some embodiments, TIM layer 414 may protrude from mold cap 408.

[0039] Next, if Figure 4E As shown in FIG. 4 , a heat sink 416 can be attached to the semiconductor package 402 through the TIM layer 414. The heat sink 416 can work together with the TIM layer 414 to provide better heat dissipation for the semiconductor element 406. Although a portion of the molding material of the mold cap 408 remains between the TIM layer 414 and the semiconductor element 406, the thickness of the remaining portion of the molding material is not large, for example, 0.5 microns to 20 microns. Therefore, the remaining portion of the molding material generally does not hinder the heat transfer from the semiconductor element 406 to the heat sink 416.

[0040] Since the semiconductor element 406 and the mold cap 408 may occupy only a portion of the footprint on the package substrate 404, the remaining portion of the package substrate 404 not covered by the mold cap 408 may be used to attach the heat sink 416 to the package substrate 404. For example, the heat sink 416 may have a support wall extending downwardly to the package substrate 404, such as Figure 4E . Thus, some adhesive material masses 418 may be formed on the package substrate 404 that is not covered by the mold cover 408. The support wall of the heat sink 416 may be attached to the package substrate 404 by the adhesive material 418. The adhesive material 418 may improve the attachment of the heat sink 416 to the semiconductor package 402 without affecting the heat transfer from the semiconductor element 406 to the heat sink 416.

[0041] exist Figures 4A to 4E After the various steps shown in FIG. 1 , a semiconductor package assembly combining a semiconductor package and a heat sink can be obtained.

[0042] If available from Figures 3A to 3D as well as Figures 4A to 4E As can be seen from the method shown in , by laser activating a laser-activatable molding material and converting such molding material into a conductive material, the method according to an embodiment of the present application can avoid a complex metal plating process of a seed layer. Furthermore, the range and position of the activated molding material can be accurately controlled, especially in an area that is not directly above the semiconductor element. Furthermore, a thermal path between the heat sink and the semiconductor element can be formed through the TIM layer, which enables the semiconductor package assembly formed in this way to have improved heat dissipation performance.

[0043] The discussion herein includes many illustrative figures showing methods for attaching a heat sink to a semiconductor package and various portions of a semiconductor package assembly formed using such methods. For clarity of illustration, such figures do not show all aspects of each example semiconductor package. Any example package provided herein may share any or all features with any or all other packages provided herein.

[0044] Various embodiments have been described herein with reference to the accompanying drawings. However, it will be apparent that various modifications and variations may be made thereto, and additional embodiments may be implemented, without departing from the broader scope of the invention as set forth in the appended claims. In addition, other embodiments will be apparent to those skilled in the art by consideration of the specification and practice of one or more embodiments of the invention disclosed herein. Therefore, it is intended that the present application and the examples herein be considered merely exemplary, with the true scope and spirit of the invention being indicated by the list of the appended exemplary claims.

Claims

1. A method for attaching a heat sink to a semiconductor package, characterized in that The method comprises: A semiconductor package is provided, wherein the semiconductor package comprises a package substrate, a semiconductor element mounted on the package substrate, and a mold cover formed on the package substrate and encapsulating the semiconductor element, and wherein the mold cover comprises a laser-activatable molding material; removing a portion of the thickness of the mold cap above the semiconductor element by laser ablation to form a cavity in the mold cap and convert the laser-activatable molding material at the inner surface of the cavity into a conductive layer; applying a thermal interface material in the cavity to form a thermal interface material layer on the conductive layer that protrudes from the mold cover; and The heat sink is attached to the semiconductor package via at least the thermal interface material layer.

2. The method according to claim 1, characterized in that: The cavity in the mold cap extends across the entire semiconductor device.

3. The method according to claim 1, characterized in that The semiconductor package is a strip-type package, and wherein attaching the heat sink to the semiconductor package at least through the thermal interface material layer further comprises: applying an adhesive material to the mold cover; and The heat sink is attached to the mold cover via the thermal interface material layer and the adhesive material.

4. The method according to claim 1, characterized in that The semiconductor package is a unit type package, and wherein attaching the heat sink to the semiconductor package at least through the thermal interface material layer further comprises: applying an adhesive material on the packaging substrate; and The heat sink is attached to the mold cover through the thermal interface material layer, and the heat sink is attached to the package substrate through the adhesive material.

5. The method according to claim 1, characterized in that The laser-activatable molding material comprises a matrix material and an additive of metal particles which can be opened by means of a laser.

6. A semiconductor package assembly, characterized in that: The semiconductor package assembly comprises: A semiconductor package, wherein the semiconductor package comprises: Package substrate; a semiconductor element mounted on the packaging substrate; and a mold cap formed on the package substrate and encapsulating the semiconductor element, wherein the mold cap comprises a laser-activatable molding material, the mold cap comprises a cavity formed above the semiconductor element and having a conductive layer at an inner surface thereof, and the cavity and the conductive layer are formed by laser ablation of the laser-activatable molding material; a thermal interface material layer formed in the cavity of the mold cover and protruding from the mold cover; and A heat sink is attached to the semiconductor package at least through the thermal interface material layer.

7. The semiconductor package assembly according to claim 6, wherein: The cavity in the mold cap extends across the entire semiconductor device.

8. The semiconductor package assembly according to claim 6, wherein: The cavity is formed such that a portion of the thickness of the mold cover remains above the semiconductor element, and the thermal interface material layer does not directly contact the semiconductor element.

9. The semiconductor package assembly according to claim 6, wherein: The semiconductor package is a strip type package, and the semiconductor package further includes an adhesive material on the mold cover, the heat sink being attached to the semiconductor package by the adhesive material.

10. The semiconductor package assembly according to claim 6, wherein: The semiconductor package is a unit type package, and the semiconductor package further includes an adhesive material on the package substrate, the heat sink being attached to the semiconductor package by the adhesive material.

11. The semiconductor package assembly according to claim 6, wherein: The laser-activatable molding material comprises a matrix material and an additive of metal particles which can be opened by means of a laser.

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