A schedulable virtual oscillator control method based on a consistency algorithm adaptive virtual resistance

Abstract

The application belongs to the field of inverter network type control, and discloses a schedulable virtual oscillator control method based on a consistent algorithm adaptive virtual resistance. a 、 β Two-phase output voltage, coordinate transformation is carried out on the output voltage to obtain u d3 、 q3 ; reactive power Q1 on the inverter side and reactive power Q2 on the load side are input into reactive power distribution control to obtain distribution error uQ1, and then virtual impedance correction term deltaQ1 is obtained, deltaQ1 is input into adaptive virtual impedance to obtain dynamic impedance L V1 and R V1 , i d , i q are multiplied by L V1 and R V1 to obtain virtual voltage u d2 and u q2 ; u d2 is subtracted from u d3 to obtain u d4 , u q2 is subtracted from u q3 to obtain u q4 , u d4 and u q4 are input into voltage and current double closed loop to obtain a pwm signal. The application can solve the problem that the dynamic stability of the existing virtual oscillator is strictly required for line parameter ratio, can guarantee power quality when the line resistance and inductance ratio changes, reduces the design difficulty, and increases the dynamic stability of the system.

Description

Technical Field

[0001] This invention belongs to the field of inverter grid-based control technology, specifically relating to a schedulable virtual oscillator control method based on a consensus algorithm-adaptive virtual resistor. Background Technology

[0002] Virtual oscillator control is a newly emerging grid-based control method for inverters in recent years. Compared with existing grid-based control methods such as droop control and virtual synchronous machine control, it has advantages in dynamic response speed and stability under large disturbances. The basic idea of ​​dispatchable virtual oscillator control (dVOC) is to minimize the voltage rating and the voltage amplitude and phase error measured by synchronous feedback, and to operate at the rated angular frequency in steady state. By introducing the rated instantaneous power and voltage into the virtual oscillator, VOC has the ability to dispatch power, outputting stable voltage and current, implicitly exhibiting droop-like characteristics. Dispatchable virtual oscillator control can provide a limiting circle rotating at a constant angular frequency in steady state, thereby generating an ideal sinusoidal reference voltage.

[0003] Existing virtual oscillator designs lack universality. Currently, the main limitations on the development of virtual oscillator control technology lie in three aspects: power dispatch capability, anti-interference and stable operation capability, and practical application capability. This invention primarily addresses the anti-interference and stable operation capability, providing ideas for improving dynamic stability, and presenting simulation design and verification. Currently, the factor with the greatest impact on VOC dynamic stability is the line impedance ratio. When the system topology is complex and line parameters vary, a more stringent design and precise limitation of the line impedance ratio are required to ensure synchronous and stable operation of the inverter. When the external resistive-inductive load or changes in the inductance and resistance parameters of the line cause a change in the overall line impedance ratio, the virtual oscillator line parameters need to be redesigned, increasing the workload of virtual oscillator design in the system and significantly reducing universality in application, making it difficult to guarantee the output power quality and dynamic stability. Summary of the Invention

[0004] This invention provides a schedulable virtual oscillator control method based on a consensus algorithm and adaptive virtual resistance. It can solve the problem that the dynamic stability of existing virtual oscillators is subject to strict requirements on the line parameter ratio. Even when the line resistance-inductance ratio changes, it can still maintain the stability of the overall system, ensure the quality of output power, reduce the design difficulty of virtual oscillators in application, and increase the reliability and dynamic stability of the system.

[0005] The present invention also provides a computer device.

[0006] The present invention also provides a computer-readable storage medium.

[0007] This invention is achieved through the following technical solution:

[0008] A control method for a schedulable virtual oscillator based on an adaptive virtual resistance using a consensus algorithm, the control method comprising the following steps:

[0009] Step 1: Convert the voltage u on the output side of the inverter. abc and current i abc Perform dq coordinate transformation to obtain u d1 u q1 and i d i q For the load side current i abc1 Perform dq coordinate transformation to obtain i d1 i q1 ;

[0010] Step 2: Connect the i-axis output of the inverter from Step 1. d i q and u d1 u q1 Power calculations are performed to obtain active power P1 and reactive power Q1;

[0011] Step 3: Transfer the u on the load side of Step 1 d1 u q1 and i d1 i q1 Power calculations are performed to obtain active power P2 and reactive power Q2;

[0012] Step 4: Input the active power P1 and reactive power Q1 obtained in Step 2 into the schedulable virtual oscillator to obtain the corresponding output u. a and u β Two-phase output voltage;

[0013] Step 5: Apply the u obtained in Step 4 a and u β u is obtained by performing a dq coordinate transformation on the two-phase output voltage. d3 u q3 ;

[0014] Step 6: Reactive power Q1 and Q2 enter the reactive power distribution control loop to obtain reactive power distribution error uQ1;

[0015] Step 7: Input the reactive power distribution error uQ1 obtained in Step 6 into the PI controller to obtain the virtual impedance correction term δQ1;

[0016] Step 8: Input the virtual impedance correction term δQ1 obtained in Step 7 into the adaptive virtual impedance circuit to update the dynamic virtual impedance and obtain L. V1 and R V1 i d i qWith the dynamic impedance L of the adaptive virtual impedance output V1 and R V1 Multiply to obtain the virtual voltage u d2 and u q2 ;

[0017] Step 9: Take the u obtained in step 8 d2 with u d3 Subtracting gives u d4 u q3 with u q2 Subtracting gives u q4 , will u d4 and u q4 The signal is input to a voltage-current double-closed circuit to obtain a PWM signal.

[0018] Furthermore, the specific steps for obtaining active power P1 and reactive power Q1 in step 2 and obtaining active power P2 and reactive power Q2 in step 3 are as follows:

[0019]

[0020] Inverter output port voltage vector

[0021] Furthermore, step 4 specifically involves the inverter output port voltage vector u i =[u i α u i β ] T The measured current value i at the inverter output port i =[i i α i i β ] T ω0 is the nominal grid frequency, substituting it into the equation

[0022]

[0023] Where ω0Ju i The standard equation of the harmonic oscillator in rectangular coordinates, K i u i -R(k)i i For the phase error term, Φ(u) i )u i For the amplitude error term, the R(k) matrix is ​​a two-dimensional rotation matrix, J = R(π / 2), η is the power regulation parameter, and α is the voltage regulation parameter;

[0024]

[0025] Where the operator ||·|| is the Euclidean norm, η>0, α>0 and 0≤k≤π are design parameters, and P i * Q i * and u i * These are the set values ​​for active power, reactive power, and voltage amplitude, respectively; k is a parameter for adjusting the resistance and inductance of the circuit. When k = 0, it corresponds to a resistive circuit, and when k = π / 2, it corresponds to an inductive circuit.

[0026] Furthermore, after simplification using polar coordinates, the dVOC equation exhibits the following nonlinear droop characteristic:

[0027]

[0028] When k = π / 2, the final dVOC droop equation is obtained:

[0029]

[0030] When k = 0, the resistance droop characteristic of VOC is generated.

[0031] Furthermore, step 5 specifically involves, when When the line impedance ratio is stable, ||u i ||≈u i * When the voltage deviation is small, a more intuitive droop equation can be obtained.

[0032]

[0033] Substituting the above equation into the aβ coordinate system yields the following equation;

[0034]

[0035] u m =Au α -ωu β (16)

[0036] u n =Au β +ωu α (17)

[0037] Where η is the power adjustment parameter, A is the voltage gain parameter, ω is the output frequency, α is the voltage adjustment parameter, and u ref As the reference voltage, u m After integration, we get u α u n After integration, we get u β u α and uβ The two-phase voltages output as a virtual oscillator in the αβ coordinate system. For u α and u β The output voltage u is obtained after performing dq coordinate transformation. d3 and u q3 .

[0038] Furthermore, step 6 specifically involves determining the reactive power allocation error uQ according to the consistency control protocol. i It is an auxiliary control that can realize reactive power distribution, and requires synchronizing the state variables of all nodes in the system to an undefined common uQ1.

[0039]

[0040] The distribution error uQ1 between the two reactive powers is obtained from the above formula;

[0041] Specifically, step 7 involves feeding uQ1 back to a proportional-integral controller to obtain the virtual impedance correction term δQ1:

[0042]

[0043] Among them, K uq and K iq These are the proportional and integral coefficients of the proportional-integral controller, and the reactive power distribution error u. Q1 The relationship with the virtual impedance correction term δQ1 can be established using a PI regulator.

[0044] Furthermore, step 8 specifically involves obtaining reactive power distribution information of adjacent ports through a distributed communication network, obtaining the distribution error, and then calculating the virtual inductance of the adaptive virtual impedance according to the following formula:

[0045] L v1 =L v1 * -k ql ·δQ1 (20)

[0046] Among them, L v1 The adaptive virtual inductance L is obtained through reactive power distribution error. v1 * The virtual inductance, k, is set up to ensure that the equivalent impedance of the line is inductive. ql It is the proportional gain coefficient used to adjust the virtual inductance;

[0047] The adaptive virtual resistor constructed according to the following formula can provide a certain damping effect for the microgrid system.

[0048] R v1 =R v1 * -kqr ·δQ1 (21)

[0049] Among them, R v1 The adaptive virtual resistance R is obtained through reactive power distribution error adjustment. v1 * For static virtual resistance, k qr Adjust the proportional gain coefficient of the virtual resistor;

[0050] Adaptive virtual impedance adjustment of line impedance is achieved in the inverter control system through the output voltage drop. The virtual resistance R obtained using the above method... v1 and virtual inductance L v1 In the synchronous reference coordinate system, the inverter output current i d and i q Multiply by the angular frequency ω to calculate the voltage drop across the virtual impedance.

[0051] The voltage drop across the virtual impedance can be obtained using the following formula:

[0052] u d2 =i d R v1 -i q ωL v1 (twenty two)

[0053] u q2 =i q R v1 +i d ωL v1 (twenty three)

[0054] Furthermore, step 9 specifically involves u d2 and u q2 For the virtual voltage components on the dq axis:

[0055] u d4 =u d3 -u d2 (twenty four)

[0056] u q4 =u q3 -u q2 (25)

[0057] will u d4 and u q4 After the input voltage and current are closed in a double loop, a PWM modulated wave is obtained.

[0058] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the method described above.

[0059] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described above.

[0060] The beneficial effects of this invention are:

[0061] This invention enhances the dynamic stability of the schedulable virtual oscillator by introducing an adaptive virtual impedance based on a consensus algorithm into the control loop. This enables the virtual oscillator to operate synchronously and stably even when the system topology is complex and the line parameters are varied. It also increases the adaptability of the virtual oscillator to changes in line parameter ratios and reduces the requirements for precise and strict constraints on line parameters. Attached Figure Description

[0062] Figure 1 This is a structural diagram of the three-phase inverter controlled by the present invention.

[0063] Figure 2 The circuit diagram of this invention is used for black start of an isolated microgrid with two inverters.

[0064] Figure 3 The frequency response diagram is shown for the output of an isolated microgrid with two inverters during black start-up without the application of this invention.

[0065] Figure 4 The frequency response diagram of the output when the present invention is used during black start of an isolated microgrid with two inverters.

[0066] Figure 5 The diagram shows the power characteristics of an isolated microgrid with two inverters during black start-up without the application of this invention.

[0067] Figure 6 The power characteristic diagram is shown when the present invention is used during black start of an isolated microgrid with two inverters.

[0068] Figure 7 The diagram shows the power characteristics of an isolated microgrid with two inverters during black start-up without the application of this invention.

[0069] Figure 8 The power characteristic diagram is shown when the present invention is used during black start of an isolated microgrid with two inverters.

[0070] Figure 9 The diagram shows the voltage and current output characteristics of the first inverter during black start operation of two inverters using this invention.

[0071] Figure 10 The diagram shows the voltage and current output characteristics of the second inverter during black start operation of two inverters using the present invention.

[0072] Figure 11The diagram shows the power output characteristics of the first inverter during black start operation of two inverters using this invention.

[0073] Figure 12 The diagram shows the power output characteristics of the second inverter during black start operation of two inverters using the present invention.

[0074] Figure 13 The inverter circuit diagram of this invention is used for black start of an isolated microgrid with two inverters.

[0075] Figure 14 The voltage and current output characteristics of the first inverter are shown in the diagram when the line resistance-inductance ratio changes and the inverter of this invention is running in black start mode.

[0076] Figure 15 The voltage and current output characteristics of the second inverter are shown in the diagram when the line resistance-inductance ratio changes and the inverter of this invention is running in black start mode.

[0077] Figure 16 The diagram shows the power output characteristics of the first inverter when the line resistance-inductance ratio changes and the inverter of this invention is running in black-start mode.

[0078] Figure 17 When the line resistance-inductance ratio changes, the power output characteristic diagram of the second inverter is shown when the inverter of this invention is running in black start mode. Detailed Implementation

[0079] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of this application with unnecessary detail.

[0080] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0081] It should also be understood that the terminology used in this application specification is for the purpose of describing particular embodiments only and is not intended to limit the application. As used in this application specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0082] The following is in conjunction with the appendix to this application specification. Figure 1-17The technical solutions in the embodiments of this application are clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0083] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0084] Implementation Method 1

[0085] This embodiment provides a schedulable virtual oscillator control method based on a consensus algorithm and adaptive virtual resistance. The control method includes the following steps:

[0086] Step 1: Convert the voltage u on the output side of the inverter. abc and current i abc Perform dq coordinate transformation to obtain u d1 u q1 and i d i q For the load side current i abc1 Perform dq coordinate transformation to obtain i d1 i q1 ;

[0087] Step 2: Connect the i-th inverter output side from Step 1 d i q and u d1 u q1 Power calculations are performed to obtain active power P1 and reactive power Q1;

[0088] Step 3: Transfer the u on the load side of Step 1 d1 u q1 and i d1 i q1 Power calculations are performed to obtain active power P2 and reactive power Q2;

[0089] Step 4: Input the active power P1 and reactive power Q1 obtained in Step 2 into the schedulable virtual oscillator to obtain the corresponding output u. a and u β Two-phase output voltage;

[0090] Step 5: Apply the u obtained in Step 4 a and u β u is obtained by performing a dq coordinate transformation on the two-phase output voltage. d3 uq3 ;

[0091] Step 6: Reactive power Q1 and Q2 enter the reactive power distribution control loop to obtain reactive power distribution error uQ1;

[0092] Step 7: Input the reactive power distribution error uQ1 obtained in Step 6 into the PI controller to obtain the virtual impedance correction term δQ1;

[0093] Step 8: Input the virtual impedance correction term δQ1 obtained in Step 7 into the adaptive virtual impedance circuit to update the dynamic virtual impedance and obtain L. V1 and R V1 i d i q With the dynamic impedance L of the adaptive virtual impedance output V1 and R V1 Multiply to obtain the virtual voltage u d2 and u q2 ;

[0094] Step 9: Take the u obtained in step 8 d2 with u d3 Subtracting gives u d4 u q3 with u q2 Subtracting gives u q4 , will u d4 and u q4 The signal is input to a voltage-current double-closed circuit to obtain a PWM signal.

[0095] Furthermore, the specific steps for obtaining active power P1 and reactive power Q1 in step 2 and obtaining active power P2 and reactive power Q2 in step 3 are as follows:

[0096]

[0097]

[0098] Inverter output port voltage vector u i =[u i α u i β ] T (in the αβ coordinate system).

[0099] Furthermore, step 4 specifically involves the inverter output port voltage vector u i =[u i α u i β ] T (In the αβ coordinate system), the measured current i at the inverter output port i =[ii α i i β] T (In the αβ coordinate system), ω0 is the nominal grid frequency. Substituting into the equation...

[0100]

[0101] Where R(k) matrix is ​​a two-dimensional rotation matrix, J = R(π / 2), η is the power regulation parameter, and α is the voltage regulation parameter;

[0102]

[0103] Where the operator ‖·‖ is the Euclidean norm, η>0, α>0 and 0≤k≤π are design parameters, and P i * Q i * and u i * These are the set values ​​for active power, reactive power, and voltage amplitude, respectively; k is a parameter for adjusting the resistance and inductance of the circuit. When k = 0, it corresponds to a resistive circuit, and when k = π / 2, it corresponds to an inductive circuit.

[0104] Furthermore, after simplification using polar coordinates, the dVOC equation exhibits the following nonlinear droop characteristic:

[0105]

[0106] When k = π / 2, the final dVOC droop equation is obtained:

[0107]

[0108] When k = 0, the resistance droop characteristic of VOC is generated.

[0109] Furthermore, step 5 specifically involves, when When the line impedance ratio is stable, ||u i ||≈u i * When the voltage deviation is small, a more intuitive droop equation can be obtained.

[0110]

[0111] Substituting the above equation into the aβ coordinate system, we obtain the following equation;

[0112]

[0113] u m =Au α -ωu β (16)

[0114] u n =Au β +ωu α (17)

[0115] Where η is the power adjustment parameter, A is the voltage gain parameter, ω is the output frequency, α is the voltage adjustment parameter, and u ref As the reference voltage, u m After integration, we get u α u n After integration, we get u β u α and u β The two-phase voltages output as a virtual oscillator in the αβ coordinate system. For u α and u β The output voltage u is obtained after performing dq coordinate transformation. d3 and u q3 .

[0116] Furthermore, step 6 specifically involves determining the reactive power allocation error uQ according to the consistency control protocol. i It is an auxiliary control that can realize reactive power distribution, and requires synchronizing the state variables of all nodes in the system to an undefined common uQ1.

[0117]

[0118] The distribution error uQ1 between the two reactive powers is obtained from the above formula;

[0119] Specifically, step 7 involves feeding uQ1 back to a proportional-integral controller to obtain the virtual impedance correction term δQ1:

[0120]

[0121] Among them, K uq and K iq These are the proportional and integral coefficients of the proportional-integral controller, and the reactive power distribution error u. Q1 The relationship with the virtual impedance correction term δQ1 can be established using a PI regulator.

[0122] Furthermore, step 8 specifically involves obtaining reactive power distribution information of adjacent ports through a distributed communication network, obtaining the distribution error, and then calculating the virtual inductance of the adaptive virtual impedance according to the following formula:

[0123] L v1 =L v1 * -k ql ·δQ1 (20)

[0124] Among them, Lv1 The adaptive virtual inductance L is obtained through reactive power distribution error. v1 * The virtual inductance, k, is set up to ensure that the equivalent impedance of the line is inductive. ql It is the proportional gain coefficient used to adjust the virtual inductance;

[0125] The adaptive virtual resistor constructed according to the following formula can provide a certain damping effect for the microgrid system.

[0126] R v1 =R v1 * -k qr ·δQ1 (21)

[0127] Among them, R v1 The adaptive virtual resistance R is obtained through reactive power distribution error adjustment. v1 * For static virtual resistance, k qr Adjust the proportional gain coefficient of the virtual resistor;

[0128] Adaptive virtual impedance adjustment of line impedance is achieved in the inverter control system through the output voltage drop. The virtual resistance R obtained using the above method... v1 and virtual inductance L v1 In the synchronous reference coordinate system, the inverter output current i d and i q Multiply by the angular frequency ω to calculate the voltage drop across the virtual impedance.

[0129] The voltage drop across the virtual impedance can be obtained using the following formula:

[0130] u d2 =i d R v1 -i q ωL v1 (twenty two)

[0131] u q2 =i q R v1 +i d ωL v1 (twenty three)

[0132] Furthermore, step 9 specifically involves u d2 and u q2 For the virtual voltage components on the dq axis:

[0133] u d4 =u d3 -u d2 (twenty four)

[0134] u q4 =u q3 -u q2 (25)

[0135] will u d4 and u q4 After the input voltage and current are closed in a double loop, a PWM modulated wave is obtained.

[0136] The effectiveness of the proposed virtual oscillator control strategy is verified through specific examples below:

[0137] Figure 2 The main circuit parameters shown are as follows: U dc =700V, L1=50mH, L2=50mH, R1=1Ω,

[0138] R2=1Ω,C1=600uF,C2=600uf,ω n =314rad / s, the resistance of load 1 is 5Ω and the inductance is 1.5mH, the resistance of load 2 is 5Ω and the inductance is 1.5mH, and the switches S1, S2 and S3 are closed after 0.5s.

[0139] Figure 3 For a black start of an isolated microgrid with two inverters, without the present invention, the output frequency response diagram shows that the frequency reaches 50Hz at 0.6s. Figure 4 When performing a black start on an isolated microgrid with two inverters, the output frequency response diagram of this invention was used. The frequency reached 50.025Hz at 0.05s and entered a steady state, with fluctuations of less than 0.03Hz, meeting the standard of frequency fluctuation less than 0.2Hz. This demonstrates the excellent dynamic response of this invention in terms of frequency response.

[0140] Figure 5 The diagram shows the active and reactive power characteristics of the inverter output without this invention.

[0141] Figure 6 The diagram shows the active and reactive power characteristics of the inverter output when using this invention.

[0142] Figure 7 and Figure 8 The diagram shows the output power characteristic and its magnified view. The diagram shows that the fluctuation of active and reactive power output by the inverter without the present invention is greater than the fluctuation of output power when the present invention is adopted. The inverter with the present invention has better output power performance and can output more stable power quality.

[0143] Figure 9 After the first inverter undergoes a black start, it can output a stable three-phase sinusoidal voltage and a three-phase sinusoidal current.

[0144] Figure 10 The stable three-phase sinusoidal voltage and three-phase sinusoidal current output after black start of the second inverter 0.5s later.

[0145] Figure 11 The diagram shows the stable active and reactive power characteristics of the first inverter after black start.

[0146] Figure 12 The diagram shows the stable active and reactive power characteristics of the second inverter after black start.

[0147] Figure 13 The circuit diagram shows the main circuit parameters U for changing the line parameters (changing the line resistance-inductance ratio). dc =700V, L1=30mH, L2=50mH, R1=1Ω, C1=600uF, R2=1Ω, C2=600uF, ω n =314rad / s, the resistance of load 1 is 5Ω and the inductance is 1.5mH, the resistance of load 2 is 5Ω and the inductance is 1.5mH, and the switches S1, S2 and S3 are closed after 0.5s.

[0148] Figure 14 When the line inductance parameters change, after the two inverters start up, the first inverter outputs a stable three-phase sinusoidal voltage and a stable three-phase sinusoidal current.

[0149] Figure 15 When the line inductance parameters change, after the two inverters start up, the second inverter outputs a stable three-phase sinusoidal voltage and a stable three-phase sinusoidal current.

[0150] Figure 16 When the line inductance parameters change, after the black start of the two inverters, the first inverter outputs stable active and reactive power.

[0151] Figure 17 When the line inductance parameters change, after a black start of both inverters, the second inverter outputs stable active and reactive power.

[0152] Implementation Method 2

[0153] When using this invention for black start of an isolated microgrid with two inverters, the specific solution is as follows:

[0154] Inverter 1 is connected to one end of inductor L1, the other end of inductor L1 is connected to one end of resistor R1, the other end of resistor R1 is connected to one end of switch S1 and one end of capacitor C1 respectively, the other end of capacitor C1 is grounded, and the other end of switch S1 is connected to one end of resistive-inductive load 1 and one end of switch S2 respectively.

[0155] Inverter 2 is connected to one end of inductor L2, the other end of inductor L2 is connected to one end of resistor R2, the other end of resistor R2 is connected to one end of switch S3 and one end of capacitor C2, the other end of capacitor C2 is grounded, and the other end of switch S3 is connected to the inductive load 2 and the other end of switch S2.

[0156] Implementation Method 3

[0157] This invention provides an electronic device including a memory, a processor, and a computer program stored in the memory and executable on the processor. The memory stores software programs and modules, and the processor executes various functional applications and data processing by running the software programs and modules stored in the memory. The memory and processor are connected via a bus. Specifically, the processor implements any step in Embodiment 1 by running the computer program stored in the memory.

[0158] It should be understood that, in the embodiments of the present invention, the processor may be a Central Processing Unit (CPU), but it may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0159] Memory may include read-only memory, flash memory, and random access memory, and provides instructions and data to the processor. Some or all of the memory may also include non-volatile random access memory.

[0160] As can be seen from the above, the electronic device provided by the embodiments of the present invention can realize the schedulable virtual oscillator control based on the consensus algorithm adaptive virtual resistance as described in Embodiment 1 by running a computer program. It can solve the problem that the dynamic stability of existing virtual oscillators requires strict line parameter ratios. Even when the line resistance-inductance ratio parameter changes, it can still maintain the stability of the overall system, ensure the quality of output power, reduce the design difficulty of virtual oscillators in application, and increase the reliability and dynamic stability of the system.

[0161] It should be understood that if the integrated modules / units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods described above can also be implemented by a computer program instructing related hardware. This computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content contained in the computer-readable storage medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction.

[0162] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0163] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the above device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this invention. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0164] It should be noted that the methods and detailed examples provided in the above embodiments can be incorporated into the apparatus and devices provided in the embodiments for mutual reference, and will not be repeated here.

[0165] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0166] In the embodiments provided by this invention, it should be understood that the disclosed apparatus / terminal devices and methods can be implemented in other ways. For example, the apparatus / device embodiments described above are merely illustrative. For instance, the division of modules or units described above is merely a logical functional division, and in actual implementation, it can be divided in other ways. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0167] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A schedulable virtual oscillator control method based on a consensus algorithm and adaptive virtual resistance, characterized in that, The control method includes the following steps: Step 1: Convert the voltage u on the output side of the inverter. abc and current i abc Perform dq coordinate transformation to obtain u d1 u q1 and i d i q For the load side current i abc1 Perform dq coordinate transformation to obtain i d1 i q1 ; Step 2: Connect the i-axis output of the inverter from Step 1. d i q and u d1 u q1 Power calculations are performed to obtain active power P1 and reactive power Q1; Step 3: Take u from step 1 d1 u q1 and load-side i d1 i q1 Power calculations are performed to obtain active power P2 and reactive power Q2. Step 4: Input the active power P1 and reactive power Q1 obtained in Step 2 into the schedulable virtual oscillator to obtain the corresponding output u. α and u β Two-phase output voltage; Step 5: Apply the u obtained in Step 4 α and u β u is obtained by performing a dq coordinate transformation on the two-phase output voltage. d3 u q3 ; Step 6: Reactive power Q1 and Q2 enter the reactive power distribution control loop to obtain reactive power distribution error uQ1; Step 7: Input the reactive power distribution error uQ1 obtained in Step 6 into the PI controller to obtain the virtual impedance correction term δQ1; Step 8: Input the virtual impedance correction term δQ1 obtained in Step 7 into the adaptive virtual impedance circuit to update the dynamic virtual impedance and obtain L. V1 and R V1 i d i q With the dynamic impedance L of the adaptive virtual impedance output V1 and R V1 Multiply to obtain the virtual voltage u d2 and u q2 ; Step 9: Take the u obtained in step 8 d2 with u d3 Subtracting gives u d4 u q3 with u q2 Subtracting gives u q4 , will u d4 and u q4 The signal is input to a voltage-current double-closed circuit to obtain a PWM signal.

2. The schedulable virtual oscillator control method according to claim 1, characterized in that, The specific steps for obtaining active power P1 and reactive power Q1 in step 2 and obtaining active power P2 and reactive power Q2 in step 3 are as follows: Inverter output port voltage vector u i =[u i α u i β ] T .

3. The schedulable virtual oscillator control method according to claim 1, characterized in that, Step 4 specifically involves adjusting the inverter output port voltage vector u. i =[u i α u i β ] T The current measurement value i at the inverter output port i =[i i α i i + ] T ω0 is the nominal grid frequency, substituting it into the equation Among them, ω0Ju i The standard equation of the harmonic oscillator in rectangular coordinates, K i u i -R(k)i i For the phase error term, Φ(u) i )u i For the amplitude error term, the R(k) matrix is ​​a two-dimensional rotation matrix, J=R(π / 2), η is the power regulation parameter, and α is the voltage regulation parameter; Where the operator ||·|| is the Euclidean norm, η>0, α>0 and 0≤k≤π are design parameters, and P i * Q i * and u i * These are the set values ​​for active power, reactive power, and voltage amplitude, respectively; k is a parameter for adjusting the resistance and inductance of the circuit. When k = 0, it corresponds to a resistive circuit, and when k = π / 2, it corresponds to an inductive circuit.

4. The schedulable virtual oscillator control method according to claim 3, characterized in that, After simplification using polar coordinates, the dVOC equation exhibits the following nonlinear drooping characteristic: When k = π / 2, the final dVOC droop equation is obtained: When k = 0, the resistance droop characteristic of VOC is generated.

5. The schedulable virtual oscillator control method according to claim 4, characterized in that, Specifically, step 5 involves the following steps: when When the line impedance ratio is stable, ||u i ||≈u i * When the voltage deviation is very small, a more intuitive droop equation can be obtained: Substituting the above equation into the aβ coordinate system yields the following equation; in m =Au α -ωu β (16) in n =Au β +ωu α (17) Where η is the power adjustment parameter, A is the voltage gain parameter, ω is the output frequency, α is the voltage adjustment parameter, and u ref As the reference voltage, u m After integration, we get u α u n After integration, we get u β ;u α and u β As a virtual oscillator, the two-phase voltage output in the αβ coordinate system; for u α and u β The output voltage u is obtained after performing dq coordinate transformation. d3 and u q3 .

6. The schedulable virtual oscillator control method according to claim 1, characterized in that, Specifically, step 6 involves, according to the consistency control protocol, uQ i It is an auxiliary control to realize reactive power distribution. It requires synchronizing the state variables of all nodes in the system to an undefined common uQ1 to obtain the distribution error uQ1 of the two reactive power. Specifically, step 7 involves feeding uQ1 back to a proportional-integral controller to obtain the virtual impedance correction term δQ1: Among them, K uq and K iq These are the proportional and integral coefficients of the proportional-integral controller. The relationship between the reactive power distribution error uQ1 and the virtual impedance correction term δQ1 is established through the PI regulator.

7. The schedulable virtual oscillator control method according to claim 4, characterized in that, Step 8 specifically involves obtaining reactive power distribution information from adjacent ports through a distributed communication network, obtaining the distribution error, and then calculating the virtual inductance of the adaptive virtual impedance using the following formula: L v1 =L v1 * -k ql ·δQ1 (20) Among them, L v1 The adaptive virtual inductance L is obtained through reactive power distribution error. v1 * The virtual inductance, k, is set up to ensure that the equivalent impedance of the line is inductive. ql It is the proportional gain coefficient used to adjust the virtual inductance; The adaptive virtual resistor constructed according to the following formula can provide a certain damping effect for the microgrid system. R v1 =R v1 * -k qr ·δQ1 (21) Among them, R v1 The adaptive virtual resistance R is obtained through reactive power distribution error adjustment. v1 * For static virtual resistance, k qr Adjust the proportional gain coefficient of the virtual resistor; Adaptive virtual impedance adjustment of line impedance is achieved in the inverter control system through the output voltage drop. The virtual resistance R obtained using the above method... v1 and virtual inductance L v1 In the synchronous reference coordinate system, the inverter output current i d and i q Multiply by the angular frequency ω to calculate the voltage drop across the virtual impedance; The voltage drop across the virtual impedance is obtained by the following formula: u d2 =i d R v1 -i q ωL v1 (22) u q2 =i q R v1 +i d ωL v1 (23)。 8. The schedulable virtual oscillator control method according to claim 7, characterized in that, Step 9 specifically involves, u d2 and u q2 For the virtual voltage components on the dq axis: in d4 =in d3 -in d2 (24) in q4 =in q3 -in q2 (25) will u d4 and u q4 After the input voltage and current are closed in a double loop, a PWM modulated wave is obtained.

9. A computer device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method as described in any one of claims 1-8.

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