Amplitude self-adaptive characteristic current generation system and method

Abstract

The invention discloses an amplitude self-adaptive characteristic current generating system, which comprises a rectifying unit, a power MOS (Metal Oxide Semiconductor) tube and current limiting unit, an MOS tube driving unit, a first signal conditioning and isolating unit, a second signal conditioning and isolating unit, a processor unit and a communication unit, the output end of the processor unit is electrically connected with the input end of the first signal conditioning and isolating unit and the input end of the second signal conditioning and isolating unit, and the output end of the first signal conditioning and isolating unit is electrically connected with the input end of the MOS tube driving unit. The output end of the MOS tube driving unit and the output end of the second signal conditioning and isolating unit are electrically connected with the input end of the power MOS tube and current limiting unit, the power MOS tube and current limiting unit is electrically connected with the rectifying unit, and the output end of the rectifying unit is electrically connected with the input end of the MOS tube driving unit. The technical problem that the identification success rate and the power consumption and the service life of a sending system product cannot be considered at the same time due to the fact that an existing characteristic current generating system is provided with single characteristic current with fixed amplitude is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of distribution network topology identification, and in particular to an amplitude adaptive characteristic current generation system and method. Background Art

[0002] Topology recognition technology is a necessary technical foundation for promoting the construction of digital distribution networks. Topology recognition technology includes big data method and signal injection method. Big data method has high requirements for the power grid, requiring that the load of each user should not be too light, the line topology should not be too complex, and the recognition result needs multiple iterations, often taking days or even weeks to output the correct result; signal injection method has low requirements for the power grid, fast recognition speed and high accuracy. Among them, the power frequency distortion method in the signal injection method controls the switching load on the power frequency power line to generate a characteristic current of tens of amperes, which has a large impact on the power grid and has been rarely used. Now it is commonly used to inject a small characteristic current of a square wave envelope. Given that the larger the transmission current, the higher the power consumption of the transmission module and the greater the temperature rise, the existing characteristic current generation system injects a current of a fixed amplitude, which is the minimum value in the line standard. With the increasing application of distributed power sources and the increasing amplitude of current noise generated by electrical equipment, the success rate of topology recognition with a single amplitude characteristic current transmission mode has a downward trend, and the false alarm rate has an upward trend. The mode of sending characteristic current with fixed amplitude has the disadvantage of narrow adaptability. If the characteristic current is fixed at a smaller amplitude, the recognition success rate will be reduced when the same frequency interference is serious or distributed power supply is put into use. If the characteristic current is fixed at a larger amplitude, the recognition success rate can be improved, but there is a problem of high power consumption, which leads to high heat generation and shortened product life. In the existing topology recognition system, the recognition device is bound to a communication unit, and the sending device is bound to a communication unit. The recognition process is that the communication unit of the recognition device notifies the communication unit of the sending device to let the sending device send the characteristic current. The recognition device determines whether the sending device is in the area or branch where the recognition device is located based on whether the characteristic current is received. If the recognition device does not recognize the characteristic current after notifying the sending device to send the characteristic current, it will initiate a second notification. If the second notification can be recognized, it is judged that the sending device is in the area or branch where the recognition device is located, otherwise it is judged that the sending device is not in the area or branch where the recognition device is located. The interval between the two notifications is between a few minutes or three or four hours. Therefore, it is urgent to propose an amplitude adaptive characteristic current generating system and method to solve the technical problem that the existing characteristic current generating system is configured with a single fixed amplitude characteristic current, resulting in the inability to balance the recognition success rate with the power consumption and life of the sending system product. Summary of the invention

[0003] The main purpose of the present invention is to propose an amplitude adaptive characteristic current generating system and method, aiming to solve the technical problem that the existing characteristic current generating system is configured with a single fixed amplitude characteristic current, resulting in the inability to balance the recognition success rate with the power consumption and life of the sending system product.

[0004] To achieve the above object, the present invention provides an amplitude adaptive characteristic current generating system, wherein the amplitude adaptive characteristic current generating system comprises:

[0005] Rectification unit, power MOS tube and current limiting unit, MOS tube driving unit, first signal conditioning and isolation unit, second signal conditioning and isolation unit, processor unit and communication unit;

[0006] The output end of the communication unit is electrically connected to the input end of the processor unit through a wire, the output end of the processor unit is electrically connected to the input end of the first signal conditioning and isolation unit and the second signal conditioning and isolation unit through a wire, the output end of the first signal conditioning and isolation unit is electrically connected to the input end of the MOS tube driving unit through a wire, the output end of the MOS tube driving unit and the second signal conditioning and isolation unit are electrically connected to the input end of the power MOS tube and the current limiting unit through a wire, the power MOS tube and the current limiting unit are electrically connected to the rectifier unit through a wire, the output end of the rectifier unit is electrically connected to the input end of the MOS tube driving unit, and the rectifier unit is electrically connected to the AC line interface through a wire.

[0007] In one of the preferred solutions, the second signal conditioning and isolation unit includes a relay U1, a transistor V3 and a resistor R8;

[0008] The base of the transistor V3 is connected to the processor unit; the collector of the transistor V3 is connected to the 2nd pin of the relay U1, the 1st pin of the relay U1 is connected to the resistor R8, the other end of the resistor R8 is connected to the DC power supply, the 3rd pin of the relay U1 is connected to the power MOS tube and the current limiting unit, the 4th pin of the relay U1 is respectively connected to the MOS tube driving unit and the power MOS tube and the current limiting unit; the emitter of the transistor V3 is grounded.

[0009] In one of the preferred solutions, the power MOS tube and the current limiting unit include a MOS tube Q1, a resistor R4, a resistor R5, a resistor R6, a voltage regulator diode VD1 and a capacitor C5; the drain of the MOS tube Q1 is respectively connected to the rectifying unit and the resistor R6, the gate of the MOS tube Q1 is respectively connected to the other end of the resistor R6, the cathode of the voltage regulator diode VD1 and the capacitor C5, the source of the MOS tube Q1 is respectively connected to the MOS tube driving unit, the resistor R4 and the resistor R5, the other end of the resistor R4 is respectively connected to the MOS tube driving circuit and the second signal conditioning and isolation unit, the other end of the resistor R5 is connected to the second signal conditioning and isolation unit; the anode of the voltage regulator diode VD1 and the other end of the capacitor C5 are grounded.

[0010] In one of the preferred schemes, the MOS tube driving unit includes a switch chip D3, a resistor R3 and a capacitor C1; pins 1, 2 and 4 of the switch chip D3 are grounded; pins 3 and 8 of the switch chip D3 are connected to the resistor R3, the other end of the resistor R3 is respectively connected to the capacitor C1 and the power MOS tube and the current limiting unit, and the other end of the capacitor C1 is grounded; pin 5 of the switch chip D3 is connected to the first signal conditioning and isolation unit; pins 6 and 7 of the switch chip D3 are respectively connected to the second signal conditioning and isolation unit and the power MOS tube and the current limiting unit.

[0011] In one preferred solution, when the common contact and the normally open contact of the relay U1 are open, the built-in switch of the switch chip D3 and the resistor R4 form a series circuit, and the minimum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0012] I low =(V z -V Q1gs(th) ) / R4

[0013] Among them, I low is the minimum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs ( th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, and R4 is the resistance value of the resistor R4.

[0014] In one preferred solution, when the common contact and the normally open contact of the relay U1 are short-circuited, the maximum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0015]

[0016] Among them, I high is the maximum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V zis the clamping voltage of the Zener diode VD1, V Q1gs(th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, R4 is the resistance value of the resistor R4, and R5 is the resistance value of the resistor R5.

[0017] In one of the preferred schemes, the first signal conditioning and isolation unit includes a capacitor C2, a resistor R9, a MOS tube V1, a resistor R7, an optocoupler isolator D2 and a resistor R2; one end of the capacitor C2 is connected to the processor unit, the other end of the capacitor C2 is respectively connected to the resistor R9 and the gate of the MOS tube V1, the drain of the MOS tube V1 is connected to the 2nd pin of the optocoupler isolator D2, the 1st pin of the optocoupler isolator D2 is connected to the resistor R7, the other end of the resistor R7 is connected to the power supply end, and the 4th pin of the optocoupler isolator D2 is respectively connected to the resistor R2 and the MOS tube driving circuit; the 3rd pin of the optocoupler isolator D2, the other end of the resistor R9 and the source of the MOS tube V1 are grounded.

[0018] In one of the preferred solutions, the communication unit establishes a communication channel between the processor unit or the external identification device through a power line carrier, micro-power wireless and public wireless communication.

[0019] A method for generating a characteristic current generating system with adaptive amplitude includes the following steps:

[0020] S1, the processing unit receives the instruction of the external identification device according to the communication unit, outputs the PWM signal of the specified frequency, duty cycle and duration at the specified time, and outputs the current amplitude control signal;

[0021] S2, the first signal conditioning and isolation unit receives the PWM signal, performs DC isolation processing, converts the PWM signal from a weak current system to a strong current system, and outputs a PWM signal of the strong current system;

[0022] S3, the second signal conditioning and isolation unit receives the current amplitude control signal, and converts the current amplitude control signal into a switch signal of the strong current system through the level signal of the weak current system;

[0023] S4, the MOS tube driving unit outputs the PWM signal to the power MOS tube and the current limiting unit, and converts it into a driving signal to drive the power MOS tube to turn on and off;

[0024] S5, the power MOS tube and the current limiting unit receive the current amplitude control signal and the drive signal, and output a characteristic current signal with adjustable amplitude and periodic changes on the power line of the distribution network;

[0025] S6. The rectifier unit converts the AC power supply of the distribution network into pulsating DC and outputs it to the power MOS tube, the current limiting unit and the MOS tube driving unit, and converts the characteristic current signal generated by the power MOS tube and the current limiting unit to the distribution network.

[0026] In the above technical solution of the present invention, the amplitude adaptive characteristic current generation system includes: a rectifier unit, a power MOS tube and a current limiting unit, a MOS tube driving unit, a first signal conditioning and isolation unit, a second signal conditioning and isolation unit, a processor unit and a communication unit; the output end of the communication unit is electrically connected to the input end of the processor unit through a wire, the output end of the processor unit is electrically connected to the input end of the first signal conditioning and isolation unit and the input end of the second signal conditioning and isolation unit through a wire, the output end of the first signal conditioning and isolation unit is electrically connected to the input end of the MOS tube driving unit through a wire, the output end of the MOS tube driving unit and the second signal conditioning and isolation unit is electrically connected to the input end of the power MOS tube and the current limiting unit through a wire, the power MOS tube and the current limiting unit are electrically connected to the rectifier unit through a wire, the output end of the rectifier unit is electrically connected to the input end of the MOS tube driving unit, and the rectifier unit is electrically connected to the AC line interface through a wire. The present invention solves the technical problem that the existing characteristic current generation system is configured with a single fixed amplitude characteristic current, resulting in the inability to balance the recognition success rate with the power consumption and life of the sending system product.

[0027] In the present invention, the current amplitude control signal output by the processing unit is conditioned by the second signal conditioning and isolation unit, and output to the power MOS tube and the current limiting unit for current amplitude switching, so as to accurately control the current values ​​of the minimum amplitude characteristic current and the maximum amplitude characteristic current flowing through the drain and source of the MOS tube Q1, and the characteristic current is sent with a small amplitude by default. If the time from the last sending is less than the first time threshold, the characteristic current is sent with a larger amplitude, thereby solving the problem of low success rate in identifying substations with large current co-frequency noise or distributed power sources, and shortened product life due to high power consumption in the substation. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0029] Figure 1 This is a first schematic diagram of an amplitude adaptive characteristic current generating system according to an embodiment of the present invention;

[0030] Figure 2 A second schematic diagram of an amplitude adaptive characteristic current generating system according to an embodiment of the present invention;

[0031] Figure 3 A schematic diagram of a characteristic current generating method with adaptive amplitude according to an embodiment of the present invention.

[0032] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with the implementation methods and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] In addition, in the present invention, the descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0035] Furthermore, the technical solutions between the various embodiments of the present invention may be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in the field. When the combination of technical solutions is mutually contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0036] See also Figure 1-Figure 3 According to one aspect of the present invention, the present invention provides an amplitude adaptive characteristic current generating system, wherein the amplitude adaptive characteristic current generating system comprises:

[0037] Rectification unit, power MOS tube and current limiting unit, MOS tube driving unit, first signal conditioning and isolation unit, second signal conditioning and isolation unit, processor unit and communication unit;

[0038] The output end of the communication unit is electrically connected to the input end of the processor unit through a wire, the output end of the processor unit is electrically connected to the input end of the first signal conditioning and isolation unit and the second signal conditioning and isolation unit through a wire, the output end of the first signal conditioning and isolation unit is electrically connected to the input end of the MOS tube driving unit through a wire, the output end of the MOS tube driving unit and the second signal conditioning and isolation unit are electrically connected to the input end of the power MOS tube and the current limiting unit through a wire, the power MOS tube and the current limiting unit are electrically connected to the rectifier unit through a wire, the output end of the rectifier unit is electrically connected to the input end of the MOS tube driving unit, and the rectifier unit is electrically connected to the AC line interface through a wire.

[0039] Specifically, in this embodiment, after the amplitude adaptive characteristic current generating system is started, it enters a state of monitoring notification of the identification device. After receiving the instruction to send the characteristic current from the identification device, it first obtains the time interval with the last sending. If the time interval from the last sending is greater than the first time threshold, the characteristic current is sent with the minimum amplitude. If the time interval from the last sending is less than or equal to the first time threshold, the characteristic current is sent with the maximum amplitude. After sending, it returns to the monitoring state. In the present invention, the first time threshold is 4 hours, which is not specifically limited in the present invention and can be set according to needs.

[0040] Specifically, in this embodiment, the processor unit sends out a PWM signal according to the instruction of the identification device, and sends out a current amplitude control signal according to whether it belongs to the characteristic current retransmission. The first signal conditioning and isolation unit receives the PWM signal sent by the processor unit, and outputs it to the MOS tube driving unit after signal conditioning and optical coupling isolation. The MOS tube driving unit drives the power MOS tube and the current limiting unit according to the PWM signal of the first signal conditioning and isolation unit. The current amplitude control signal sent by the processor unit passes through the second signal conditioning and isolation unit and is input into the power MOS tube and the current limiting unit. The power MOS tube and the current limiting unit generate a characteristic current with adjustable amplitude according to the PWM signal and the current amplitude control signal of the MOS tube driving unit. The rectifier unit converts the AC voltage of the distribution network into a pulsating DC voltage, and provides it to the MOS tube driving unit and the power MOS tube and the current limiting unit. At the same time, the characteristic current generated by the power MOS tube and the current limiting unit is input into the distribution network.

[0041] Specifically, in this embodiment, the AC line interface is a 220V distribution network interface, including two contacts respectively connected to the live wire and the neutral wire of the distribution network. The AC line interface is both the power input interface of the entire circuit and the characteristic current output interface.

[0042] Specifically, in this embodiment, the rectifier unit is used to convert the AC 220V power supply into a pulsating DC power supply to the power MOS tube, the current limiting unit and the MOS tube driving unit, and at the same time convert the DC characteristic current generated by the power MOS tube and the current limiting unit to the AC 220V power distribution network; the rectifier unit includes a resistor R1 and a rectifier bridge stack BR1; one end of the resistor R1 is connected to the live wire contact, the other end of the resistor R1 is connected to the 2nd pin of the rectifier bridge stack BR1, the 1st pin of the rectifier bridge stack BR1 is connected to the neutral line node, the 3rd pin of the rectifier bridge stack BR1 is connected to the power MOS tube and the current limiting unit, and the 4th pin of the rectifier bridge stack BR1 is connected to the strong ground; the resistor R1 is used to limit current and protect the subsequent circuit, and the rectifier bridge stack BR1 is used to realize the conversion between AC voltage and pulsating DC voltage, as well as the transmission of current.

[0043] Specifically, in the present embodiment, the processor unit is used to output a pulse width modulation signal, i.e., a PWM signal, of a specified frequency, duty cycle, and duration at a specified time according to an instruction of an external identification device received by the communication unit, and output a current amplitude control signal according to a time interval with a previous transmission; the processor unit includes a processor D1, a crystal oscillator XL1, a capacitor C3, a capacitor C4, and a DC power supply VDD; a pin 11 of the processor D1 is connected to a second signal conditioning and isolation unit, and controls the second signal conditioning and isolation unit by generating a current amplitude control signal; a pin 12 of the processor D1 is connected to a first signal conditioning and isolation unit, and controls the first signal conditioning and isolation unit by generating a PWM signal of a specific frequency; a pin 13 of the processor unit D1 is connected to a DC power supply VDD, a pin 33 of the processor D1 is respectively connected to a capacitor C3 and a crystal oscillator XL1, and a pin 34 ... a pin 35 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 36 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 37 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 38 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 39 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 40 of the processor D1 is connected to a second signal conditioning and isolation unit, and a pin 41 of the processor D1 is connected to a second signal conditioning and isolation The pins are connected to capacitor C4 and crystal oscillator XL1 respectively, and the other ends of the crystal oscillator XL1, capacitor C3 and capacitor C4 are grounded; the DC power supply VDD is a DC 3.3V input, which meets the normal working requirements of the processor D1 and the voltage and current required for the conduction of the optocoupler isolator D2; the PWM signal and current amplitude control signal output by the processor D1 have a high frequency close to VDD, and a low level close to the reference ground voltage of the weak current system; the crystal oscillator XL1, capacitor C3 and capacitor C4 are the clock circuit of the processor unit, and the clock circuit is used to provide an external clock for the processor D1. After frequency division processing, it becomes a control signal for the coordinated work of each unit of the processor D1. If there is no clock circuit to generate a clock to drive the processor D1, the work cannot be completed; in the present invention, the processor D1 adopts a processor chip with a built-in power line carrier communication function of model WTZ13, which is not specifically limited in the present invention and can be set according to needs.

[0044] Specifically, in the present embodiment, the first signal conditioning and isolation unit includes a capacitor C2, a resistor R9, a MOS tube V1, a resistor R7, an optocoupler isolator D2 and a resistor R2; one end of the capacitor C2 is connected to the processor unit, the other end of the capacitor C2 is respectively connected to the resistor R9 and the gate of the MOS tube V1, the drain of the MOS tube V1 is connected to the 2nd pin of the optocoupler isolator D2, the 1st pin of the optocoupler isolator D2 is connected to the resistor R7, the other end of the resistor R7 is connected to the power supply end, the 4th pin of the optocoupler isolator D2 is respectively connected to the resistor R2 and the MOS tube driving circuit; the 3rd pin, The other end of the resistor R9 and the source of the MOS tube V1 are grounded; the first signal conditioning and isolation unit is used to condition the PWM signal output by the processor unit, and to electrically isolate the weak current system where the communication unit and the processor unit are located from the strong current system where the AC line interface, the rectifier unit, the MOS tube drive unit, the power MOS tube and the current limiting unit are located; the capacitor C2, the resistor R9 and the MOS tube V1 realize the function of isolating the DC signal, and the resistor R7, the optical coupler isolator D2 and the resistor R2 transmit the PWM signal generated by the weak current system to the strong current system in the form of photoelectric coupling, so as to meet the isolation safety requirements between the weak current system and the strong current system; When the PWM signal output by the processor D1 changes from a low level to a high level, the capacitor C2 is charged, and the gate voltage of the MOS tube V1 rises. When the voltage difference between the gate and the source of the MOS tube V1 is greater than the conduction voltage of the MOS tube V1, the drain and the source of the MOS tube V1 are turned on, and then the voltage across the light-emitting tube inside the optocoupler isolator D2 is greater than the conduction voltage, the light-emitting tube inside the optocoupler isolator D2 emits light, and the collector and emitter of the photosensitive transistor inside the optocoupler isolator D2 are turned on; when the PWM signal is at a stable high level, due to the presence of the discharge resistor R9, the voltage between the gate and the source of the MOS tube V1 will slowly drop below the conduction voltage of the MOS tube, and the optocoupler isolator D 2 The internal light-emitting tube is turned off to prevent the PWM signal caused by the abnormal operation of the processor D1 from being kept at a high level for a long time and burning the subsequent power MOS tube Q1 and the current limiting resistor R4 and the resistor R5; when the PWM signal output by the processor D1 changes from a high level to a low level, the capacitor C2 is discharged, and the gate voltage of the MOS tube V1 decreases. When the voltage difference between the gate and the source of the MOS tube V1 is less than the conduction voltage of the MOS tube V1, the drain and the source of the MOS tube V1 are turned off, and then the voltage across the internal light-emitting tube of the optocoupler isolator D2 is less than the conduction voltage, the internal light-emitting tube of the optocoupler isolator D2 stops emitting light, and the collector and emitter of the internal photosensitive transistor of the optocoupler isolator D2 are in an open circuit.

[0045] Specifically, in the present embodiment, the MOS tube driving unit comprises a switch chip D3, a resistor R3 and a capacitor C1; the 1, 2 and 4 pins of the switch chip D3 are connected to the reference ground of the strong electric system; the 3 and 8 pins of the switch chip D3 are connected to the resistor R3, the other end of the resistor R3 is respectively connected to the capacitor C1 and the power MOS tube and the current limiting unit, and the other end of the capacitor C1 is grounded; the 5 pin of the switch chip D3 is connected to the first signal conditioning and isolation unit, the 5 pin of the switch chip D3 is a switch control pin, and is connected to the collector of the built-in photosensitive transistor of the optocoupler isolator D2; the 6 and 7 pins of the switch chip D3 are respectively connected to the common contact of the output circuit of the relay U1 in the second signal conditioning and isolation unit and the power MOS tube and the current limiting unit; the MOS tube driving unit is used to control the on and off of the power MOS tube according to the PWM signal output by the first signal conditioning and isolation unit; the switch chip D3 adopts a switch chip of the model ETA7000, which is not specifically limited in the present invention and can be specifically selected as needed. Setting; a built-in switch is provided between pins 1, 2, 4 and pins 6, 7 of the switch chip D3, and the switch is controlled by the level of pin 5 of the switch chip D3. When the voltage between pin 5 of the switch chip D3 and pins 1, 2, 4 of the switch chip D3 is less than a threshold value, the built-in switch presents a low-resistance state; when the voltage between pin 5 of the switch chip D3 and pins 1, 2, 4 of the switch chip D3 is greater than a threshold value, the built-in switch presents a high-resistance state. The resistor R3 is a current-limiting resistor, and the capacitor C1 is used for energy storage and filtering. The capacitor C1 and The resistor R3 is used to provide power to the switch chip D3; the switch inside the switch chip D3 cooperates with the gate voltage of the MOS tube Q1 to control the on-off between the source and the drain of the power MOS tube Q1; when the collector and emitter of the phototransistor inside the optocoupler isolator D2 are turned on, the voltage of the enable pin of the switch chip D3 is lower than the threshold, and the switch inside the switch chip D3 is in low resistance; when the collector and emitter of the phototransistor inside the optocoupler isolator D2 are open, the enable pin of the switch chip D3 is higher than the threshold, and the switch inside the switch chip is in high resistance.

[0046] Specifically, in the present embodiment, the second signal conditioning and isolation unit comprises a relay U1, a transistor V3 and a resistor R8; the base of the transistor V3 is connected to the processor unit; the collector of the transistor V3 is connected to the 2nd pin of the relay U1, the 1st pin of the relay U1 is connected to the resistor R8, the other end of the resistor R8 is connected to the DC power supply, the 3rd pin of the relay U1 is connected to the power MOS tube and the current limiting unit, the 4th pin of the relay U1 is respectively connected to the MOS tube driving unit and the power MOS tube and the current limiting unit; the emitter of the transistor V3 is grounded; the second signal conditioning and isolation unit is used to perform signal conditioning on the current amplitude control signal output by the processor unit, and to perform signal conditioning on the weak current system and the AC line interface, the rectifier unit, the MOS tube driving unit, the power MOS tube and the current limiting unit where the communication unit and the processor unit are located The high-voltage system in which the unit is located is electrically isolated; the 3rd pin of the relay U1 is a normally open contact, and the 4th pin of the relay U1 is a common contact; when the current amplitude control signal level output by the processor unit is higher than the Vbe voltage threshold that makes the collector and emitter of the transistor V3 conductive, the collector and emitter of the transistor V3 are conductive, and the power supply VCC supplies power to the input circuit of the relay U1 through the resistor R8 and the transistor V3, and the input circuit of the relay U1 is activated to drive the common contact and the normally open contact of the output circuit to short-circuit; when the current amplitude control signal level output by the processor unit is lower than the Vbe voltage threshold that makes the collector and emitter of the transistor V3 conductive, the input circuit of the relay U1 stops operating and drives the common contact and the normally open contact of the output circuit to open; the input circuit of the relay transmits the signal to the output circuit through the magnetic field, thereby meeting the electrical isolation requirements between weak current and strong current.

[0047] Specifically, in this embodiment, the power MOS tube and the current limiting unit include a MOS tube Q1, a resistor R4, a resistor R5, a resistor R6, a voltage regulator diode VD1 and a capacitor C5; the drain of the MOS tube Q1 is respectively connected to the rectifying unit and the resistor R6, the gate of the MOS tube Q1 is respectively connected to the other end of the resistor R6, the cathode of the voltage regulator diode VD1 and the capacitor C5, the source of the MOS tube Q1 is respectively connected to the MOS tube driving unit, the resistor R4 and the resistor R5, the other end of the resistor R4 is respectively connected to the MOS tube driving circuit and the second signal conditioning and isolation unit, the other end of the resistor R5 is connected to the second signal conditioning and isolation unit; the anode of the voltage regulator diode VD1 and the capacitor The other end of C5 is grounded; the power MOS tube and the current limiting unit are used to perform on-off operations on the pulsating direct current according to the PWM signal output by the MOS tube driving unit, and switch the current amplitude according to the current amplitude control signal; the resistor R6 provides power for the gate of the power MOS tube Q1 and the voltage regulator diode VD1; the capacitor C5 is used to filter the gate power supply of the power MOS tube Q1; the voltage regulator diode VD1 is used to clamp the gate voltage of the power MOS tube Q1; the switch inside the switch chip D3 cooperates with the gate voltage of the MOS tube Q1 to control the on-off between the source and the drain of the power MOS tube Q1; the resistors R4 and R5 limit the current flowing through the drain and source of the power MOS tube Q1.

[0048] Specifically, in this embodiment, when the common contact and the normally open contact of the relay U1 are open, the built-in switch of the switch chip D3 and the resistor R4 form a series circuit. When the internal switch of the switch chip D3 is closed, the pulsating direct current forms a current through the drain and source of the MOS tube Q1, the resistor R4 and the internal switch of the switch chip D3. When the internal switch of the switch chip D3 is disconnected, the MOS tube Q1 and the resistor R4 cannot form a loop, and the pulsating direct current does not form a current. During the period when the pulsating direct current forms the current, the current amplitude flowing through the drain and source of the MOS tube Q1 is determined by the gate voltage of the MOS tube Q1, the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, and the current limiting resistor R4. The minimum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0049] I low =(V z -V Q1gs(th) ) / R4

[0050] Among them, I low is the minimum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs ( th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, and R4 is the resistance value of the resistor R4.

[0051] Specifically, in this embodiment, when the common contact and the normally open contact of the relay U1 are short-circuited, the maximum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0052]

[0053] Among them, I high is the maximum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs ( th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, R4 is the resistance value of the resistor R4, and R5 is the resistance value of the resistor R5.

[0054] Specifically, in this embodiment, the communication unit establishes a communication channel between the processor unit and the external identification device through a power line carrier, micropower wireless or public wireless communication method; the communication unit receives instructions from the identification device and transmits them to the processor unit to determine the sending time, frequency, duty cycle and duration of the characteristic current.

[0055] According to another aspect of the present invention, the present invention provides a method for generating a characteristic current with an amplitude self-adaptation, wherein the method for generating a characteristic current with an amplitude self-adaptation comprises the following steps:

[0056] S1, the processing unit receives the instruction of the external identification device according to the communication unit, outputs the PWM signal of the specified frequency, duty cycle and duration at the specified time, and outputs the current amplitude control signal;

[0057] S2, the first signal conditioning and isolation unit receives the PWM signal, performs DC isolation processing, converts the PWM signal from a weak current system to a strong current system, and outputs a PWM signal of the strong current system;

[0058] S3, the second signal conditioning and isolation unit receives the current amplitude control signal, and converts the current amplitude control signal into a switch signal of the strong current system through the level signal of the weak current system;

[0059] S4, the MOS tube driving unit outputs the PWM signal to the power MOS tube and the current limiting unit, and converts it into a driving signal to drive the power MOS tube to turn on and off;

[0060] S5, the power MOS tube and the current limiting unit receive the current amplitude control signal and the drive signal, and output a characteristic current signal with adjustable amplitude and periodic changes on the power line of the distribution network;

[0061] S6. The rectifier unit converts the AC 220V power supply of the distribution network into pulsating DC output to the power MOS tube, the current limiting unit and the MOS tube driving unit, and converts the characteristic current signal generated by the power MOS tube and the current limiting unit to the AC 220V system of the distribution network.

[0062] Specifically, in this embodiment, when the PWM pulse weak current signal output by the processor unit rises from a low level to a high level, the first signal conditioning and isolation unit DC blocking capacitor C2 is charged, the MOS tube V1 is turned on, the built-in light-emitting diode of the optocoupler isolator D2 emits light, the collector and emitter of the built-in photosensitive transistor are turned on, the enable pin voltage of the switch chip D3 drops to nearly 0V, and the built-in switch presents a low resistance; the voltage difference between the gate and the source of the power MOS tube Q1 is greater than the turn-on voltage threshold value, the drain and the source are turned on, and the corresponding characteristic current is generated as the processor outputs a pulsating PWM signal; when the PWM pulse weak current signal output by the processor unit drops from a high level to a low level, the first signal conditioning and isolation unit The DC blocking capacitor C2 is discharged, the MOS tube V1 is turned off, the built-in light-emitting diode of the optocoupler isolator D2 stops emitting light, the collector and emitter of the built-in photosensitive transistor are turned off, the voltage of the enable pin of the switch chip D3 increases, and the built-in switch presents a high resistance; the drain and source of the power MOS tube Q1 are turned off, and the voltage difference between the gate and the source of the power MOS tube Q1 is less than the turn-on voltage threshold value, and the characteristic current stops being generated; if the PWM signal is kept at a fixed level for a long time, the charge stored in the capacitor C2 will be discharged through the resistor R9, and when the voltage drops below the turn-on threshold value of the MOS tube V1, the characteristic current will also stop being generated; the second signal conditioning and isolation unit can determine whether the current limiting resistor R5 is put into use according to the current amplitude control signal output by the processor unit;

[0063] When the current amplitude control signal is at a low level, the common contact and the normally open contact of the relay U1 are open, and the current limiting resistor R5 is not put into operation; the built-in switch of the switch chip D3 and the current limiting resistor R4 form a series circuit. During the period when the pulsating DC forms the current, the current amplitude flowing through the drain and source of the power MOS tube Q1 is determined by the gate voltage of the MOS tube Q1, the gate-source voltage difference that turns on the drain and source of Q1, and the resistance value of the current limiting resistor R4; the minimum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0064] I low =(V z -V Q1gs(th) ) / R4

[0065] Among them, I low is the minimum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs(th)is the gate-source voltage difference that turns on the drain and source in the MOS tube Q1, and R4 is the resistance value of the resistor R4;

[0066] Correspondingly, when the current amplitude control signal is at a high level, the common contact and the normally open contact of the relay U1 are short-circuited, and the current limiting resistor R5 is switched on; the resistance value of the current limiting resistor in the current path changes from the resistance value of the resistor R4 to the parallel resistance value of the resistor R4 and the resistor R5; the maximum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is:

[0067]

[0068] Among them, I high is the maximum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs(th) is the gate-source voltage difference that turns on the drain and source in the MOS tube Q1, R4 is the resistance value of the resistor R4, and R5 is the resistance value of the resistor R5

[0069] By selecting device parameters, it is possible to accurately control the small-amplitude characteristic current and the large-amplitude characteristic current flowing through the drain and source of the MOS tube Q1.

[0070] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. All equivalent structural changes made using the contents of the present invention's specification and drawings, or directly / indirectly applied in other related technical fields, are included in the patent protection scope of the present invention.

Claims

1. An amplitude adaptive characteristic current generating system, characterized in that: include: Rectification unit, power MOS tube and current limiting unit, MOS tube driving unit, first signal conditioning and isolation unit, second signal conditioning and isolation unit, processor unit and communication unit; The output end of the communication unit is electrically connected to the input end of the processor unit through a wire, the output end of the processor unit is electrically connected to the input end of the first signal conditioning and isolation unit and the second signal conditioning and isolation unit through a wire, the output end of the first signal conditioning and isolation unit is electrically connected to the input end of the MOS tube driving unit through a wire, the output end of the MOS tube driving unit and the second signal conditioning and isolation unit are electrically connected to the input end of the power MOS tube and the current limiting unit through a wire, the power MOS tube and the current limiting unit are electrically connected to the rectifier unit through a wire, the output end of the rectifier unit is electrically connected to the input end of the MOS tube driving unit, and the rectifier unit is electrically connected to the AC line interface through a wire.

2. The characteristic current generating system with amplitude adaptation according to claim 1, characterized in that: The second signal conditioning and isolation unit includes a relay U1, a transistor V3 and a resistor R8; The base of the transistor V3 is connected to the processor unit; the collector of the transistor V3 is connected to the 2nd pin of the relay U1, the 1st pin of the relay U1 is connected to the resistor R8, the other end of the resistor R8 is connected to the DC power supply, the 3rd pin of the relay U1 is connected to the power MOS tube and the current limiting unit, the 4th pin of the relay U1 is respectively connected to the MOS tube driving unit and the power MOS tube and the current limiting unit; the emitter of the transistor V3 is grounded.

3. The amplitude adaptive characteristic current generating system according to claim 2, characterized in that: The power MOS tube and current limiting unit include a MOS tube Q1, a resistor R4, a resistor R5, a resistor R6, a voltage regulator diode VD1 and a capacitor C5; the drain of the MOS tube Q1 is respectively connected to the rectifying unit and the resistor R6, the gate of the MOS tube Q1 is respectively connected to the other end of the resistor R6, the cathode of the voltage regulator diode VD1 and the capacitor C5, the source of the MOS tube Q1 is respectively connected to the MOS tube driving unit, the resistor R4 and the resistor R5, the other end of the resistor R4 is respectively connected to the MOS tube driving circuit and the second signal conditioning and isolation unit, the other end of the resistor R5 is connected to the second signal conditioning and isolation unit; the anode of the voltage regulator diode VD1 and the other end of the capacitor C5 are grounded.

4. The amplitude adaptive characteristic current generating system according to claim 3, characterized in that: The MOS tube driving unit includes a switch chip D3, a resistor R3 and a capacitor C1; pins 1, 2 and 4 of the switch chip D3 are grounded; pins 3 and 8 of the switch chip D3 are connected to the resistor R3, the other end of the resistor R3 is respectively connected to the capacitor C1, the power MOS tube and the current limiting unit, and the other end of the capacitor C1 is grounded; pin 5 of the switch chip D3 is connected to the first signal conditioning and isolation unit; pins 6 and 7 of the switch chip D3 are respectively connected to the second signal conditioning and isolation unit, the power MOS tube and the current limiting unit.

5. The amplitude adaptive characteristic current generating system according to claim 4, characterized in that: When the common contact and the normally open contact of the relay U1 are open, the built-in switch of the switch chip D3 and the resistor R4 form a series circuit, and the minimum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is: I low =(V z -V Q1gs(th) ) / R4 Among them, I low is the minimum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs(th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, and R4 is the resistance value of the resistor R4.

6. The amplitude adaptive characteristic current generating system according to claim 4, characterized in that: When the common contact and the normally open contact of the relay U1 are short-circuited, the maximum characteristic current amplitude flowing through the drain and source of the MOS tube Q1 is: Among them, I high is the maximum characteristic current amplitude flowing through the drain and source of MOS tube Q1, V z is the clamping voltage of the Zener diode VD1, V Q1gs(th) is the gate-source voltage difference that makes the drain and source of the MOS tube Q1 conductive, R4 is the resistance value of the resistor R4, and R5 is the resistance value of the resistor R5.

7. The amplitude adaptive characteristic current generating system according to any one of claims 1 to 6, characterized in that: The first signal conditioning and isolation unit includes a capacitor C2, a resistor R9, a MOS tube V1, a resistor R7, an optocoupler isolator D2 and a resistor R2; one end of the capacitor C2 is connected to the processor unit, the other end of the capacitor C2 is respectively connected to the resistor R9 and the gate of the MOS tube V1, the drain of the MOS tube V1 is connected to the 2nd pin of the optocoupler isolator D2, the 1st pin of the optocoupler isolator D2 is connected to the resistor R7, the other end of the resistor R7 is connected to the power supply end, and the 4th pin of the optocoupler isolator D2 is respectively connected to the resistor R2 and the MOS tube driving circuit; the 3rd pin of the optocoupler isolator D2, the other end of the resistor R9 and the source of the MOS tube V1 are grounded.

8. The amplitude adaptive characteristic current generating system according to any one of claims 1 to 6, characterized in that: The communication unit establishes a communication channel between the processor unit and the external identification device through a power line carrier, micro-power wireless or public wireless communication method.

9. A method for generating a characteristic current generating system with amplitude adaptation according to any one of claims 1 to 8, characterized in that: The following steps are involved: S1, the processing unit receives the instruction of the external identification device according to the communication unit, outputs the PWM signal of the specified frequency, duty cycle and duration at the specified time, and outputs the current amplitude control signal; S2, the first signal conditioning and isolation unit receives the PWM signal, performs DC isolation processing, converts the PWM signal from a weak current system to a strong current system, and outputs a PWM signal of the strong current system; S3, the second signal conditioning and isolation unit receives the current amplitude control signal, and converts the current amplitude control signal into a switch signal of the strong current system through the level signal of the weak current system; S4, the MOS tube driving unit outputs the PWM signal to the power MOS tube and the current limiting unit, and converts it into a driving signal to drive the power MOS tube to turn on and off; S5, the power MOS tube and the current limiting unit receive the current amplitude control signal and the drive signal, and output a characteristic current signal with adjustable amplitude and periodic changes on the power line of the distribution network; S6. The rectifier unit converts the AC power supply of the distribution network into pulsating DC and outputs it to the power MOS tube, the current limiting unit and the MOS tube driving unit, and converts the characteristic current signal generated by the power MOS tube and the current limiting unit to the distribution network.

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