A soft-switching isolated drive circuit

Abstract

This application relates to a soft-switching isolation drive circuit, comprising: a drive transformer, push-pull MOS transistors, power MOS transistors, drive resistors, and input capacitors; the primary winding of the drive transformer is connected in series between the push-pull MOS transistors and the input capacitors; one end of the drive resistor is electrically connected to the secondary winding of the drive transformer, and the other end of the drive resistor is electrically connected to the power MOS transistors. The soft-switching isolation drive circuit provided by this application is applicable to topologies with a fixed duty cycle close to 50%. By adjusting the excitation inductance of the drive transformer and the dead time of the push-pull MOS transistors, soft switching of the push-pull MOS transistors is achieved, and the voltage stress on the push-pull MOS transistors is reduced, effectively reducing drive losses, lowering heat, and improving the working efficiency of the switching power supply.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and particularly to a soft-switching isolation drive circuit. Background Art

[0002] With the development of power electronics technology, miniaturization, high frequency, high power density, and high efficiency are the current development trends of switching power supplies. The increase in the operating frequency of switching power supplies has greatly reduced the volume of magnetic devices, the number and volume of capacitors, but it will also increase the core loss of magnetic devices and the switching loss of power devices (such as MOS transistors), thereby reducing the efficiency of the switching power supply. Generally, there are two solutions to the increase in magnetic device losses: (1) selecting magnetic materials with low magnetic loss; (2) controlling the excitation interval of the magnetic core in the design. There are also many solutions to the switching loss of power devices. For example, adding an LC resonance circuit or a clamping tube in the switching converter, controlling the working timing of the switching tube and other methods to achieve soft switching, thereby reducing the switching loss of power devices.

[0003] In addition, at high switching frequencies, the switching power supply will also face the problem of a large increase in drive circuit losses, resulting in a reduction in the efficiency of the power supply system and serious heating of the drive circuit devices. At present, for high switching frequency applications, the research on how to reduce the losses of the drive circuit part is still insufficient and urgently needs to be improved. Summary of the Invention

[0004] Based on this, it is necessary to provide a soft-switching isolation drive circuit that can effectively reduce drive losses, reduce heat, and improve the operating efficiency of the switching power supply.

[0005] This application provides a soft-switching isolation drive circuit, including: a drive transformer, push-pull MOS transistors, power MOS transistors, drive resistors, and input capacitors; the primary winding of the drive transformer is connected in series between the push-pull MOS transistors and the input capacitors; one end of the drive resistor is electrically connected to the secondary winding of the drive transformer, and the other end of the drive resistor is electrically connected to the power MOS transistors.

[0006] Preferably, the primary winding includes: a first primary winding and a second primary winding; the push-pull MOS transistors include: a first push-pull MOS transistor and a second push-pull MOS transistor; the first primary winding is electrically connected to the drain of the first push-pull MOS transistor, and the second primary winding is electrically connected to the drain of the second push-pull MOS transistor; the gates of the first push-pull MOS transistor and the second push-pull MOS transistor receive a square wave signal with a 180° phase shift and a dead zone, and the sources of the first push-pull MOS transistor and the second push-pull MOS transistor are both grounded.

[0007] Preferably, the driving resistor includes: a first resistor and a second resistor; the power MOS transistor includes: a first power MOS transistor and a second power MOS transistor; when the first power MOS transistor and the second power MOS transistor share the same source, the number of secondary windings is one; when the first power MOS transistor and the second power MOS transistor do not share the same source, the number of secondary windings is two, denoted as: a first secondary winding and a second secondary winding.

[0008] Preferably, the first resistor is connected in series between the same-name end of the first secondary winding and the gate of the first power MOS transistor; the source of the first power MOS transistor is electrically connected to the different-name end of the first secondary winding; the second resistor is connected in series between the different-name end of the second secondary winding and the gate of the second power MOS transistor; the source of the second power MOS transistor is electrically connected to the same-name end of the second secondary winding.

[0009] Preferably, the turns ratio of the primary and secondary sides of the driving transformer is set to , and the exciting inductance of the primary winding of the driving transformer needs to satisfy the following formula:

[0010]

[0011] where is the dead time between the driving of the first push-pull MOS transistor and the second push-pull MOS transistor, is the gate-source capacitance of the first power MOS transistor, the gate-source capacitance of the second power MOS transistor, the drain-source capacitance of the first push-pull MOS transistor, is the drain-source capacitance of the second push-pull MOS transistor, is the duty cycle of the first push-pull MOS transistor V1, is the switching period.

[0012] Preferably, it further includes: four signal-type MOS transistors, respectively denoted as: the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor; the same-named end of the first secondary winding is electrically connected to the gate of the first MOS transistor, the drain of the second MOS transistor, and one end of the first resistor, the different-named end of the first secondary winding is electrically connected to the drain of the first MOS transistor and the gate of the second MOS transistor, the gate of the first power MOS transistor is electrically connected to the other end of the first resistor, and the source of the first power MOS transistor is electrically connected to the source of the first MOS transistor and the source of the second MOS transistor; the different-named end of the second secondary winding is electrically connected to the gate of the third MOS transistor, the drain of the fourth MOS transistor, and one end of the second resistor, the same-named end of the second secondary winding is electrically connected to the drain of the third MOS transistor and the gate of the fourth MOS transistor, the gate of the second power MOS transistor is electrically connected to the other end of the second resistor, and the source of the second power MOS transistor is electrically connected to the source of the third MOS transistor and the source of the fourth MOS transistor.

[0013] Preferably, the gate voltage turn-on thresholds of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are all lower than the gate voltage turn-on thresholds of the first power MOS transistor and the second power MOS transistor.

[0014] Preferably, when the first power MOS transistor and the second power MOS transistor are in the common-source form, the soft-switching isolation drive circuit further includes: a fifth MOS transistor and a sixth MOS transistor; one end of the secondary winding is electrically connected to one end of the first resistor, the drain of the fifth MOS transistor, and the gate of the sixth MOS transistor; the other end of the secondary winding is electrically connected to one end of the second resistor, the drain of the sixth MOS transistor, and the gate of the fifth MOS transistor; the gate of the first power MOS transistor is electrically connected to the other end of the first resistor, and the source of the first power MOS transistor is electrically connected to the source of the fifth MOS transistor, the source of the sixth MOS transistor, and the source of the second power MOS transistor; the gate of the second power MOS transistor is electrically connected to the other end of the second resistor.

[0015] Preferably, the first power MOS transistor and the second power MOS transistor are driven by positive voltage.

[0016] Preferably, the drains of the first power MOS transistor and the second power MOS transistor are both connected to a power circuit to control the power conversion of the power circuit.

[0017] The soft-switching isolation drive circuit provided by the present application is applicable to topologies with a fixed duty cycle close to 50%. By adjusting the excitation inductance of the drive transformer and the dead time of the push-pull MOS transistors, soft switching of the push-pull MOS transistors is achieved, and the voltage stress on the push-pull MOS transistors is reduced, effectively reducing drive losses, lowering heat, and improving the operating efficiency of the switching power supply. Description of the Drawings

[0018] To more clearly illustrate the technical solutions in the embodiments of the present application or in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0019] Figure 1 Schematic diagram of the positive and negative voltage soft-switching isolation drive circuit according to an embodiment of the present application.

[0020] Figure 2 is Figure 1 the waveform diagram of the drive circuit.

[0021] Figure 3 Schematic diagram of the positive voltage soft-switching isolation drive circuit according to an embodiment of the present application.

[0022] Figure 4 Schematic diagram of the positive voltage soft-switching isolation drive circuit according to another embodiment of the present application. Detailed Embodiments

[0023] To facilitate the understanding of the present application, the following will describe the present application more comprehensively with reference to the relevant drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0024] It can be understood that in the following embodiments, "connection", if there is an electrical signal or data transmission between the connected circuits, modules, units, etc., should be understood as "electrical connection", "communication connection", etc.

[0025] As Figure 1 shown, this embodiment provides a soft-switching isolation drive circuit, including: a drive transformer T, a push-pull MOS transistor 1, a power MOS transistor 2, a drive resistor 3, and an input capacitor C.

[0026] The primary winding of the drive transformer T is connected in series between the push-pull MOS transistor 1 and the input capacitor C; one end of the drive resistor 3 is electrically connected to the secondary winding of the drive transformer T, and the other end of the drive resistor 3 is electrically connected to the power MOS transistor 2.

[0027] Preferably, the primary winding includes a first primary winding and a second primary winding; the push-pull MOS transistor 1 includes a first push-pull MOS transistor V1 and a second push-pull MOS transistor V2.

[0028] One end of the first primary winding is electrically connected to the drain of the first push-pull MOS transistor V1, and the other end of the first primary winding is electrically connected to one end of the input capacitor C; one end of the second primary winding is electrically connected to the drain of the second push-pull MOS transistor V2, and the other end of the second primary winding is electrically connected to one end of the input capacitor C; the gates of the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2 receive a square wave signal with a 180° phase shift and a dead zone, and the sources of the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2 are both grounded; the other end of the input capacitor C is grounded.

[0029] Here, the square wave signal is generated by the control circuit module and serves as the initial drive signal for the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2. As an example, two square wave signals with a fixed duty cycle close to 50% and a 180° phase shift are respectively given to the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2, denoted as: the drive signal Pulse_A of the first push-pull MOS transistor V1 and the drive signal Pulse_B of the second push-pull MOS transistor V2. Preferably, the duty cycles of the drive signal Pulse_A and the drive signal Pulse_B are equal.

[0030] Preferably, the drive resistor 3 includes a first resistor R1 and a second resistor R2; the power MOS transistor 2 includes a first power MOS transistor V3 and a second power MOS transistor V4.

[0031] When the first power MOS transistor V3 and the second power MOS transistor V4 are common-source, the number of secondary windings is one; when the first power MOS transistor V3 and the second power MOS transistor V4 are not common-source, the number of secondary windings is two, denoted as: a first secondary winding and a second secondary winding.

[0032] In Figure 1 the first resistor R1 is connected in series between the same-named end of the first secondary winding and the gate of the first power MOS transistor V3; the source of the first power MOS transistor V3 is electrically connected to the different-named end of the first secondary winding; the second resistor R2 is connected in series between the different-named end of the second secondary winding and the gate of the second power MOS transistor V4; the source of the second power MOS transistor V4 is electrically connected to the same-named end of the second secondary winding.

[0033] Figure 1The shown soft-switching isolated drive circuit is a square-wave complementary lossless isolated drive circuit with a 180° phase shift and a duty cycle close to 50%. When the turns ratio of the primary and secondary sides of the drive transformer T is 1:1:1:1, as Figure 2 shown, the specific working modes of the circuit are as follows:

[0034] (1) During the time period [t0, t1], the drive signal Pulse_A is high and the drive signal Pulse_B is low. The first push-pull MOS transistor V1 is turned on and the second push-pull MOS transistor V2 is turned off. The drain current V1_Id of the first push-pull MOS transistor V1 increases linearly and reaches the maximum value at the moment t1. The first power MOS transistor V3 is turned on and the second power MOS transistor V4 is turned off, starting a power transfer process.

[0035] (2) During the time period [t1, t2], the drive signal Pulse_A becomes low. Both the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2 are turned off. During the dead time, the magnetizing inductance of the drive transformer T resonates with the gate capacitances of the first power MOS transistor V3 and the second power MOS transistor V4 to redistribute the energy between the gates, causing the output parasitic capacitance of the first push-pull MOS transistor V1 to be charged and the output parasitic capacitance of the second push-pull MOS transistor V2 to be discharged, so that the gate voltage V4_GS of the second power MOS transistor V4 reaches the winding supply voltage VCC at the moment t2, and the gate voltage of the first power MOS transistor V3 reaches -VCC at the moment t2. During the dead time, the drain-source voltage V1_DS of the first push-pull MOS transistor V1 gradually rises and finally reaches the voltage of 2*VCC.

[0036] (3) During the time period [t2, t3], the drive signal Pulse_B becomes high at the moment t2. Since the voltage across the winding of the push-pull drive transformer is VCC at the moment t2, the second push-pull MOS transistor V2 can achieve ZVS conduction. The drain current of the second push-pull MOS transistor V2 increases linearly and reaches the maximum value at the moment t3. The second power MOS transistor V4 is turned on and the first power MOS transistor V3 is turned off, starting another power transfer process.

[0037] (4) During the time period [t3, t4], the drive signal Pulse_B becomes low. Both the first push-pull MOS transistor V1 and the second push-pull MOS transistor V2 are turned off. At this time, the magnetizing inductance of the drive transformer T Resonates with the gate capacitances of the first power MOS transistor V3 and the second power MOS transistor V4, redistributes the energy between the gates, causes the output parasitic capacitance of the first push-pull MOS transistor V1 to discharge and the output parasitic capacitance of the second push-pull MOS transistor V2 to charge, so that the voltage across both ends of the winding of the push-pull drive transformer reaches VCC; turns on the first push-pull MOS transistor V1 at time t4, and ZVS turn-on of the first push-pull MOS transistor V1 can be achieved. Thus, the working process of one switching cycle ends.

[0038] The turns ratio of the primary and secondary sides of the drive transformer is set to , during the dead time, the magnetizing inductance of the drive transformer T Resonates with the gate capacitances of the first power MOS transistor V3 and the second power MOS transistor V4, redistributes the energy between the gates, and completes the charge transfer during the dead time, as follows:

[0039]

[0040]

[0041] Here, 2×VCC is because the gate voltage of the power MOS transistor (i.e., the GS voltage) changes from -VCC to +VCC. is the duty cycle of the first push-pull MOS transistor V1, is the switching cycle of the soft-switching isolation drive circuit, is the primary magnetizing current of the drive transformer T. It can be deduced from the above two formulas that the value of the magnetizing inductance of the primary winding of the drive transformer T needs to satisfy the following formula:

[0042]

[0043] Among them, is the dead time between the drives of the first push-pull MOS transistor and the second push-pull MOS transistor, is the gate-source capacitance of the first power MOS transistor, is the gate-source capacitance of the second power MOS transistor, is the drain-source capacitance of the first push-pull MOS transistor, is the drain-source capacitance of the second push-pull MOS transistor.

[0044] The soft-switching isolation drive circuit provided in this embodiment is applicable to topologies with a fixed duty cycle close to 50% (such as full-bridge / half-bridge LLC topology, BUCK cascaded push-pull topology, etc.). By adjusting the magnetizing inductance of the drive transformer T The dead time of the push-pull MOS transistors is adjusted to achieve soft switching of the push-pull MOS transistors and reduce the voltage stress on the push-pull MOS transistors, effectively reducing drive losses, lowering heat, and improving the operating efficiency of the switching power supply.

[0045] In Figure 1 the circuit shown, the gate waveforms obtained by the first power MOS transistor V3 and the second power MOS transistor V4 are in the form of positive and negative voltage drive. Since a part of the energy is consumed due to the reverse flow of current during the conversion from negative voltage to positive voltage, an improvement is made by adding MOS transistors on the basis of Figure 1 to change the first power MOS transistor V3 and the second power MOS transistor V4 to positive voltage drive. The specific circuit form is as shown in Figure 3 . That is, Figure 3 the first power MOS transistor V3 and the second power MOS transistor V4 in

[0046] Figure 3 are positive voltage driven. The four added MOS transistors in

[0047] are respectively denoted as: the first MOS transistor V31, the second MOS transistor V32, the third MOS transistor V41, and the fourth MOS transistor V42.

[0048] The same-named end of the first secondary winding is electrically connected to the gate of the first MOS transistor V31, the drain of the second MOS transistor V32, and one end of the first resistor R1. The different-named end of the first secondary winding is electrically connected to the drain of the first MOS transistor V31 and the gate of the second MOS transistor V32. The gate of the first power MOS transistor V3 is electrically connected to the other end of the first resistor R1. The source of the first power MOS transistor V3 is electrically connected to the sources of the first MOS transistor V31 and the second MOS transistor V32.

[0049] The non - common end of the second secondary winding is electrically connected to the gate of the third MOS transistor V41, the drain of the fourth MOS transistor V42, and one end of the second resistor R2. The common end of the second secondary winding is electrically connected to the drain of the third MOS transistor V41 and the gate of the fourth MOS transistor V42. The gate of the second power MOS transistor V4 is electrically connected to the other end of the second resistor R2. The source of the second power MOS transistor V4 is electrically connected to the sources of the third MOS transistor V41 and the fourth MOS transistor V42.

[0050] Figure 3 The working process of the shown positive - voltage soft - switching isolation drive circuit is as follows: When the common end of the first secondary winding of the drive transformer T is positive, the first MOS transistor V31 conducts, and a positive voltage is applied between the gate and source of the first power MOS transistor V3, and the first power MOS transistor V3 conducts. When the non - common end of the first secondary winding is positive, the second MOS transistor V32 conducts, and the gate - source of the first power MOS transistor V3 is short - circuited through the first resistor R1, and the first power MOS transistor V3 turns off. When the non - common end of the second secondary winding of the drive transformer T is positive, the third MOS transistor V41 conducts, and a positive voltage is applied between the gate and source of the second power MOS transistor V4, and the second power MOS transistor V4 conducts. When the common end of the second secondary winding is positive, the fourth MOS transistor V42 conducts, and the gate - source of the second power MOS transistor V4 is short - circuited through the second resistor R2, and the second power MOS transistor V4 turns off.

[0051] When the first power MOS transistor V3 and the second power MOS transistor V4 share the same source Figure 3 The shown circuit can be simplified to Figure 4 , saving one secondary winding and two signal - type MOS transistors. It can be understood that Figure 4 the first power MOS transistor V3 and the second power MOS transistor V4 in

[0052] In Figure 4Among them, the number of the secondary windings is one. The two signal-type MOS transistors are respectively denoted as: the fifth MOS transistor V51 and the sixth MOS transistor V61. The opposite-named end of the secondary winding is electrically connected to one end of the first resistor R1, the drain of the fifth MOS transistor V51, and the gate of the sixth MOS transistor V61; the same-named end of the secondary winding is electrically connected to one end of the second resistor R2, the drain of the sixth MOS transistor V61, and the gate of the fifth MOS transistor V51; the gate of the first power MOS transistor V3 is electrically connected to the other end of the first resistor R1, and the source of the first power MOS transistor V3 is electrically connected to the source of the fifth MOS transistor V51, the source of the sixth MOS transistor V61, and the source of the second power MOS transistor V4; the gate of the second power MOS transistor V4 is electrically connected to the other end of the second resistor R2.

[0053] Figure 4 The working process of the positive-pressure soft-switching isolation drive circuit shown is as follows: when the same-named end of the secondary winding of the drive transformer T is positive, the fifth MOS transistor V51 conducts, and a positive voltage is applied between the gate and source of the second power MOS transistor V4, and the second power MOS transistor V4 conducts. The gate and source of the first power MOS transistor V3 are short-circuited through the first resistor R1, and the first power MOS transistor V3 turns off; when the opposite-named end of the secondary winding is positive, the sixth MOS transistor V61 conducts, and a positive voltage is applied between the gate and source of the first power MOS transistor V3, and the first power MOS transistor V3 conducts. The gate and source of the second power MOS transistor V4 are short-circuited through the second resistor R2, and the second power MOS transistor V4 turns off.

[0054] It can be understood that in the Figure 1 、 Figure 3 and Figure 4 circuit, the drains of the first power MOS transistor V3 and the second power MOS transistor V4 are both connected to the power circuit to control the power conversion of the power circuit. As an example, the power circuit may include a capacitor, a transformer, etc.

[0055] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several deformations and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A soft switch isolation drive circuit, characterized in that: include: Driving transformer, push-pull MOS tube, power MOS tube, driving resistor and input capacitor; The primary winding of the driving transformer is connected in series between the push-pull MOS tube and the input capacitor; One end of the driving resistor is electrically connected to the secondary winding of the driving transformer, and the other end of the driving resistor is electrically connected to the power MOS tube; The push-pull MOS transistor comprises: a first push-pull MOS transistor and a second push-pull MOS transistor; the gate of the first push-pull MOS transistor and the gate of the second push-pull MOS transistor receive a square wave signal with a dead zone and a phase shift of 180°; The power MOS tube comprises: a first power MOS tube and a second power MOS tube; The turns ratio of the primary and secondary sides of the driving transformer is , the primary winding excitation inductance of the drive transformer The value of satisfies the following formula: in, is the dead time between driving the first push-pull MOS tube and the second push-pull MOS tube, The drain-source capacitance of the first push-pull MOS tube, is the drain-source capacitance of the second push-pull MOS tube, is the gate-source capacitance of the first power MOS tube, The gate-source capacitance of the second power MOS tube, is the duty cycle of the first push-pull MOS tube, is the switching cycle; During the dead time, the excitation inductance of the primary winding of the driving transformer resonates with the gate capacitance of the first power MOS tube and the gate capacitance of the second power MOS tube.

2. The soft switch isolation drive circuit according to claim 1, characterized in that: The primary winding comprises: a first primary winding and a second primary winding; The first primary winding is electrically connected to the drain of the first push-pull MOS transistor, and the second primary winding is electrically connected to the drain of the second push-pull MOS transistor; the source of the first push-pull MOS transistor and the source of the second push-pull MOS transistor are both grounded.

3. The soft switch isolation driving circuit according to claim 2, characterized in that: The driving resistor comprises: a first resistor and a second resistor; When the first power MOS tube and the second power MOS tube share a common source, the number of the secondary winding is one; When the first power MOS tube and the second power MOS tube do not have a common source, the number of the secondary windings is two, which are recorded as: a first secondary winding and a second secondary winding.

4. The soft switch isolation drive circuit according to claim 3, characterized in that: The first resistor is connected in series between the same-name end of the first secondary winding and the gate of the first power MOS tube; the source of the first power MOS tube is electrically connected to the opposite-name end of the first secondary winding; The second resistor is connected in series between the opposite-name end of the second secondary winding and the gate of the second power MOS tube; the source of the second power MOS tube is electrically connected to the same-name end of the second secondary winding.

5. The soft switch isolation drive circuit according to claim 1, characterized in that: The duty cycle of the driving signal of the first push-pull MOS transistor and the duty cycle of the driving signal of the second push-pull MOS transistor are equal.

6. The soft switch isolation drive circuit according to claim 3, characterized in that: Also includes: A first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube; The same-name end of the first secondary winding is electrically connected to the gate of the first MOS transistor, the drain of the second MOS transistor and one end of the first resistor, the opposite-name end of the first secondary winding is electrically connected to the drain of the first MOS transistor and the gate of the second MOS transistor, the gate of the first power MOS transistor is electrically connected to the other end of the first resistor, and the source of the first power MOS transistor is electrically connected to the source of the first MOS transistor and the source of the second MOS transistor; The opposite-name end of the second secondary winding is electrically connected to the gate of the third MOS tube, the drain of the fourth MOS tube and one end of the second resistor, the same-name end of the second secondary winding is electrically connected to the drain of the third MOS tube and the gate of the fourth MOS tube, the gate of the second power MOS tube is electrically connected to the other end of the second resistor, and the source of the second power MOS tube is electrically connected to the source of the third MOS tube and the source of the fourth MOS tube.

7. The soft switch isolation driving circuit according to claim 6, characterized in that: The gate voltage turn-on thresholds of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all lower than the gate voltage turn-on thresholds of the first power MOS tube and the second power MOS tube.

8. The soft switch isolation driving circuit according to claim 3, characterized in that: When the first power MOS tube and the second power MOS tube are in a common source form, the soft switch isolation drive circuit further includes: a fifth MOS tube and a sixth MOS tube; One end of the secondary winding is electrically connected to one end of the first resistor, the drain of the fifth MOS transistor and the gate of the sixth MOS transistor; the other end of the secondary winding is electrically connected to one end of the second resistor, the drain of the sixth MOS transistor and the gate of the fifth MOS transistor; The gate of the first power MOS tube is electrically connected to the other end of the first resistor, and the source of the first power MOS tube is electrically connected to the source of the fifth MOS tube, the source of the sixth MOS tube and the source of the second power MOS tube; The gate of the second power MOS tube is electrically connected to the other end of the second resistor.

9. The soft switch isolation drive circuit according to any one of claims 5 to 8, characterized in that: The first power MOS tube and the second power MOS tube are driven by positive voltage.

10. The soft switch isolation drive circuit according to any one of claims 4 to 8, characterized in that: The drain of the first power MOS tube and the drain of the second power MOS tube are both connected to a power circuit to control power conversion of the power circuit.

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