Power converter and step modulation method thereof

By designing a multi-level power converter in a cascade bridge system of a medium voltage solid-state transformer, and using the multi-level pulse phase shift modulation method of the cascade bridge, the problems of high switching losses, poor power balance and poor dynamic performance in the prior art mid-cascade bridge system are solved, and the effects of low power imbalance, few harmonics, low switching losses and good dynamic performance are achieved.

CN119853480APending Publication Date: 2025-04-18EATON INTELLIGENT POWER LTD
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Patent Information

Application Number
CN202311338240.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-10-16
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

The existing medium voltage solid-state transformer cascade bridge system has problems such as high switching losses, poor power balance and poor dynamic performance in terms of modulation.

Method used

A power converter is designed that includes n cascade bridges that are superimposed on each other to form a desired output pulse waveform by configuring them to output the same multi-level pulses and phase shifts the same angle. Each cascade bridge output pulse contains 2k+1 sub-pulse in every half cycle. The sub-pulse is distributed symmetrically with the center, and the pulse width increases and decreases in turn in half cycle.

Benefits of technology

It realizes a power converter with low power imbalance, few harmonics, low switching losses and good dynamic performance.

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Abstract

The invention provides a power converter and a step modulation method thereof, the power converter comprises n cascade bridges, n is greater than or equal to 2, the n cascade bridges are respectively configured to output the same multi-level pulse, and the output n multi-level pulses are sequentially phase-shifted by the same angle, the n multi-level pulses are overlapped with each other to form an expected output pulse waveform of the power converter, each of the n cascade bridges is configured to enable the output pulse of the n cascade bridges to comprise 2k + 1 sub-pulses in each half period, k is greater than or equal to 1, the 2k + 1 sub-pulses are symmetrically distributed by taking the (k + 1) th sub-pulse as a center, and k is greater than or equal to 1. The pulse widths from the first sub-pulse to the (k + 1) th sub-pulse are sequentially increased, and the pulse widths from the (k + 1) th sub-pulse to the (2k + 1) th sub-pulse are sequentially decreased.
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Description

Technical Field

[0001] The invention belongs to the field of electric power supply, and in particular relates to a power converter and a step modulation method thereof. Background Art

[0002] In ultra-large-scale power applications, medium voltage (MV) solid-state transformers (SSTs) can achieve higher power density, higher efficiency, and lower weight by replacing the traditional bulky 50 / 60Hz transformers with high-frequency transformers operating at frequencies exceeding 10kHz in a smaller size.

[0003] Modular topology is one of the best solutions for building medium voltage solid-state transformer systems. For medium voltage solid-state transformers, one of the key points that affects its efficiency, dynamic performance, and power balance between all modules is the modulation of the cascade bridge. Those skilled in the art have been exploring modulation methods that can optimize the switching loss, power balance, and dynamic performance of the cascade bridge system. Summary of the invention

[0004] Therefore, the object of the present invention is to overcome the defects of the above-mentioned prior art and provide a power converter, which includes n cascade bridges, wherein n≥2, wherein the n cascade bridges are respectively configured to output the same multi-level pulses and the output n multi-level pulses are sequentially phase-shifted by the same angle, and the n multi-level pulses are superimposed on each other to form the desired output pulse waveform of the power converter,

[0005] wherein each of the n cascade bridges is configured such that its output pulse contains 2k+1 sub-pulses in each half cycle, where k≥1, and

[0006] The 2k+1 sub-pulses are symmetrically distributed with the k+1th sub-pulse as the center, and the pulse widths from the 1st sub-pulse to the k+1th sub-pulse increase successively, and the pulse widths from the k+1th sub-pulse to the 2k+1th sub-pulse decrease successively.

[0007] According to the power converter of the present invention, preferably, the multi-level pulse is a 2-level pulse or a 3-level pulse.

[0008] According to the power converter of the present invention, preferably, the 2k+1 sub-pulses are separated by 2k zero regions, and the 2k zero regions are symmetrically distributed around the k+1th sub-pulse.

[0009] According to the power converter of the present invention, preferably, the widths of the 1st zero zone to the kth zero zone decrease sequentially, and the widths of the k+1th zero zone to the 2kth zero zone increase sequentially.

[0010] According to the power converter of the present invention, preferably, the minimum value of the same angle is 1 / n of the pulse width of the first sub-pulse.

[0011] According to the power converter of the present invention, preferably, n=10.

[0012] According to the power converter of the present invention, preferably, k=1, 2 or 3.

[0013] The present invention also provides a step modulation method for a power converter, wherein the power converter comprises n cascade bridges, wherein n≥2, and wherein the step modulation method comprises:

[0014] The n cascade bridges are adjusted so that they respectively output the same multi-level pulses and the n multi-level pulses output are sequentially phase-shifted by the same angle, and the n multi-level pulses are superimposed on each other to form a desired output pulse waveform of the power converter,

[0015] wherein each of the n cascade bridges is adjusted so that its output pulse contains 2k+1 sub-pulses in each half cycle, where k≥1, and

[0016] The 2k+1 sub-pulses are symmetrically distributed with the k+1th sub-pulse as the center, and the pulse widths from the 1st sub-pulse to the k+1th sub-pulse increase successively, and the pulse widths from the k+1th sub-pulse to the 2k+1th sub-pulse decrease successively.

[0017] According to the step modulation method of the present invention, preferably, the n cascade bridges are adjusted so that they respectively output 2-level pulses or 3-level pulses.

[0018] According to the step modulation method of the present invention, preferably, each of the n cascade bridges is further adjusted so that the 2k+1 sub-pulses are separated by 2k zero regions, and the 2k zero regions are symmetrically distributed around the k+1th sub-pulse.

[0019] Compared with the prior art, the multi-level power converter of the present invention has low power imbalance, few harmonics, low switching loss and good dynamic performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The embodiments of the present invention are further described below with reference to the accompanying drawings, in which:

[0021] Figure 1 A circuit topology of a multi-level converter based on a cascade bridge according to an embodiment of the present invention;

[0022] Figure 2 shows a conventional method of generating a one-cycle staircase waveform by phase shifting the AC voltage of 10 cascade bridges;

[0023] Figure 3 for Figure 2 A zoomed-in view of a half cycle of the staircase waveform;

[0024] Figure 4 A waveform diagram of the output voltage of each bridge stage and the total output voltage of the cascade bridge according to an embodiment of the present invention;

[0025] Figure 5 A waveform diagram of the output voltage of each bridge and the total output voltage of the cascade bridge according to another embodiment of the present invention;

[0026] Figure 6 A waveform diagram of the output voltages of each bridge stage and the total output voltage of the cascade bridge according to yet another embodiment of the present invention;

[0027] Figure 7 A waveform diagram of the output voltage of each bridge stage and the total output voltage of the cascaded bridge according to another seven-pulse embodiment of the present invention; and

[0028] Figure 8 Waveform diagram of the output voltage of each bridge stage and the total output voltage of the cascade bridge within one cycle (0-2π) according to another seven-pulse embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail by specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0030] Figure 1 The circuit topology of a multi-level converter based on a cascade bridge according to an embodiment of the present invention is shown, which is composed of a plurality of DC / AC bridges B1, B2, B3, ... Bn, and the AC outputs V1, V2, V3 ... Vn of each DC / AC bridge are connected in series, so that all DC / AC bridges are cascaded to generate a higher AC output voltage Vs = V1 + V2 + V3 + ... + Vn. Since each bridge can generate 3 levels of voltage (+V, 0, -V) on its AC side, the total AC output voltage Vs of the entire system can be 2n + 1 levels (-nV, ..., 0, ..., +nV).

[0031] Take the 10-level cascade bridge as an example. Figure 2 The conventional method of generating a staircase waveform of one cycle by phase shifting the AC voltage of 10 cascade bridges is shown. The output voltages V1, V2, ..., V10 of the 1st to 10th bridges are three-level voltages of +V, 0, and -V that change periodically, and the output voltages of the 10-level bridges are superimposed on each other to generate a staircase waveform Vs. For clarity, see Figure 3 shown Figure 2 From the enlarged view of half a cycle of the step waveform, it can be seen that the sinusoidal modulation of the total voltage is achieved by a slight difference in phase shift and pulse width, of which phase shift is the main factor. Specifically, the phases of V1 to V10 lag behind in sequence, and (PW5=PW6)>(PW4=PW7)>(PW3=PW8)>(PW2=PW9)>(PW1=PW10), where PW1~PW10 represent the pulse widths of the AC output voltages V1, V2, ..., V10 of the 1st to 10th bridges, respectively. In this embodiment, if a sinusoidal (cosine) voltage waveform is to be output as a whole, the phase shift of the 10th cascade bridge is the largest, which may be close to 90 degrees, and the phase shifts of the remaining cascade bridges are evenly divided from 0 degrees to the maximum phase shift angle. Those skilled in the art will understand that for a determined maximum phase shift angle, the number n of cascade bridges is different, and the angles of the phase shifts of each bridge in sequence are also different.

[0032] However, this method has obvious disadvantages, namely: considering the AC current with the same phase angle as the total voltage (power factor = 1), and the voltage of each bridge has a different phase angle relative to the AC current, the power factors of all bridges are different, which will cause the power distribution of the cascade system to have a large imbalance, and the pulse width difference also makes the power imbalance of each bridge worse. Therefore, the embodiment of the present invention aims to optimize the phase shift angle and pulse width difference between each bridge, so as to improve the power imbalance of the cascade system and reduce harmonics.

[0033] An embodiment of the present invention provides a step modulation method for a power converter. Figure 4 The waveform diagram of the output voltage of each bridge of this embodiment and the total output voltage of the cascade bridge is shown. Figure 3 The output voltage pulses of each bridge are shown in FIG. Figure 3The output voltage pulses of each stage of the bridge are set to have the same width, and then two "zero zones" (a "zero zone pair") Zero1 and Zero2 are inserted in each voltage pulse, so as to divide one voltage pulse into three pulses Pulse1, Pulse2 and Pulse3 (therefore, this embodiment can also be called a "three-pulse embodiment"), the interval between pulse Pulse1 and pulse Pulse2 is Zero1, and the interval between pulse Pulse1 and pulse Pulse3 is Zero2. In this embodiment, the width of pulse Pulse1 is greater than the width of pulse Pulse2 on its left side and the width of pulse Pulse3 on its right side, and the width of pulse Pulse2 is equal to the width of pulse Pulse3, and the widths of Zero1 and Zero2 are equal, so that an "upward staircase" configuration is formed from pulse Pulse2 to pulse Pulse1, and a "downward staircase" configuration is formed from pulse Pulse1 to pulse Pulse3, and pulses Pulse2 and pulse Pulse3 are symmetrically arranged relative to pulse Pulse1, and the half-wave waveform formed is symmetrical with respect to π / 2 line. In addition, as Figure 4 As shown, the distances between the two zero zones and the midpoint of the initial pulse are the same. If they are not equal, additional harmonics will be introduced. In particular, the width and position of the zero zone (i.e., the distance between the zero zone and the midpoint of the initial pulse) are calculated according to the harmonics to be filtered out, and the sum of the three voltage pulses of each bridge is modulated to be closer to a sine wave. According to an embodiment of the present invention, the more pulses there are, the closer the whole is to a sine wave.

[0034] In this embodiment, the phase shift δ of adjacent bridges can be half of the shortest pulse width divided into n (n=10 in this embodiment). This phase shift angle is the minimum value at which the output voltages of n cascade bridges can be superimposed to produce n levels, which is smaller than the phase shift of adjacent bridges in the traditional modulation method. Taking this embodiment as an example, the minimum phase shift angle δ is one tenth of the pulse width of pulse Pulse3. The more pulses there are, the narrower the shortest pulse is, so the phase shift angle after averaging is smaller. In addition, through the method of this embodiment, the phase shift can be decoupled from the sinusoidal modulation of the total voltage. Figure 2 In the conventional method shown, in order to achieve a total voltage in the form of a sinusoidal shape, the phase shift angle and pulse width of each cascade bridge need to change according to the law of the sine curve. In the method of this embodiment, the number of pulses and pulse shapes of each cascade bridge are the same, and the sinusoidal law is already reflected in these waveforms. The role of phase shifting is mainly to reduce the voltage change rate dv / dt. The phase shift between each cascade bridge can change linearly, which is convenient for power balancing. A smaller phase shift angle means that the imbalance of power distribution in the cascade system is reduced.

[0035] Another embodiment of the present invention provides another step modulation method for a power converter. Figure 5The waveform diagram of the output voltage of each bridge and the total output voltage of the cascade bridge according to another embodiment of the present invention is shown. Figure 4 This embodiment inserts four “zero zones” (two “zero zone pairs”) Zero1 and Zero3 as well as Zero2 and Zero4 into each voltage pulse, thereby dividing one voltage pulse into five pulses Pulse1 to Pulse5 (therefore, this embodiment can also be called a “five-pulse embodiment”), the interval between pulse Pulse1 and pulse Pulse2 is Zero1, the interval between pulse Pulse2 and pulse Pulse3 is Zero2, the interval between pulse Pulse1 and pulse Pulse4 is Zero3, and the interval between pulse Pulse4 and pulse Pulse5 is Zero4. In this embodiment, the width of pulse Pulse1 is greater than the width of pulse Pulse2 on its left side and the width of pulse Pulse4 on its right side, the width of pulse Pulse2 is greater than the width of pulse Pulse3 on its left side, the width of pulse Pulse4 is greater than the width of pulse Pulse5 on its right side, and the width of pulse Pulse2 is equal to the width of pulse Pulse4, the width of pulse Pulse3 is equal to the width of pulse Pulse5, Zero1 and Zero3 are equal in width, Zero2 and Zero4 are equal in width, and the width of zero zone Zero1 is greater than the width of zero zone Zero2. Therefore, pulse Pulse3 to pulse Pulse2 and then to pulse Pulse1 form an "upward staircase" configuration, and pulse Pulse1 to pulse Pulse4 and then to pulse Pulse5 form a "downward staircase" configuration, and pulses Pulse2 and pulse Pulse4 as well as pulses Pulse3 and Pulse5 are symmetrically arranged relative to pulse Pulse1, and the half-wave waveform formed is symmetrical about the π / 2 line. In this embodiment, the midpoint of pulse Pulse1 is used as the symmetry point, and the pulses and zero zones on both sides thereof are arranged symmetrically. In addition, similar to the previous three-pulse embodiment, the width and position of the zero zone (i.e., the distance between the zero zone and the midpoint of the initial pulse) are calculated according to the harmonics to be filtered out, and the sum of the five voltage pulses of each bridge is modulated to be closer to a sine wave.

[0036] In this embodiment, the phase shift δ of adjacent bridges is further reduced, thereby further reducing the imbalance of power distribution in the cascade system.

[0037] Another embodiment of the present invention provides another step modulation method for a power converter. Figure 6 The waveform diagram of the output voltage of each bridge and the total output voltage of the cascade bridge of another embodiment of the present invention is shown. Figure 5, this embodiment adds two "zero zones" in each voltage pulse, that is, inserts six "zero zones" (three "zero zone pairs") Zero1 and Zero4, Zero2 and Zero5, and Zero3 and Zero6, so as to divide a voltage pulse into seven pulses Pulse1 to Pulse7 (therefore, this embodiment can also be called a "seven-pulse embodiment"), the interval between pulse Pulse1 and pulse Pulse2 is Zero1, the interval between pulse Pulse2 and pulse Pulse3 is Zero2, the interval between pulse Pulse3 and pulse Pulse4 is Zero3, the interval between pulse Pulse1 and pulse Pulse5 is Zero4, the interval between pulse Pulse5 and pulse Pulse6 is Zero5, and the interval between pulse Pulse6 and pulse Pulse7 is Zero6. In this embodiment, as Figure 6 As shown, on the left side of pulse Pulse1, the pulse width increases from pulse Pulse4 to pulse Pulse1; on the right side of pulse Pulse1, the pulse width decreases from pulse Pulse1 to pulse Pulse7. Therefore, pulse Pulse4 to pulse Pulse1 form an "upward staircase" configuration, and pulse Pulse1 to pulse Pulse7 form a "downward staircase" configuration. In this embodiment, similar to the above, the midpoint of the central pulse Pulse1 is used as the symmetry point, and the zero zones and pulses on both sides thereof are arranged symmetrically. In addition, similar to the previous embodiment, the width and position of the zero zone (i.e., the distance between the zero zone and the midpoint of the initial pulse) are calculated in particular according to the harmonics to be filtered out, and the sum of the seven voltage pulses of each stage of the bridge is modulated to be closer to a sine wave.

[0038] In this embodiment, the phase shift δ between adjacent bridges is further reduced compared to the previous embodiment, thereby further reducing the imbalance of power distribution in the cascade system.

[0039] Another embodiment of the present invention also provides a step modulation method for a power converter. Figure 7 The waveform diagram of the output voltage of each bridge and the total output voltage of the cascade bridge of another seven-pulse embodiment of the present invention is shown. Figure 6 The seven-pulse embodiment shown in the figure reduces the width of each pulse and increases the width of each zero zone while ensuring the "up stairs" and "down stairs" configurations, but the phase shift angle of each bridge remains unchanged. By changing the width of each pulse and each zero zone, different modulation indices can be achieved. In the embodiment of the present invention, the modulation index refers to the amplitude of the sine wave that needs to be equivalent to the pulse (0 means no sinusoidal voltage ~ 1 means the maximum sinusoidal voltage). As the modulation index increases, the pulse width will usually increase. The pulse width is determined according to the volt-second balance principle.

[0040] In the foregoing embodiments of the present invention, the numbering of the pulses and the zero zone is increased from the center pulse and the zero zone to both sides. Figure 6 For example, the central pulse is numbered as Pulse1, and the numbers from Pulse1 to the left are Pulse2, Pulse3, and Pulse4, and the numbers from Pulse1 to the right are Pulse5, Pulse6, and Pulse7. Similarly, the two zero zones in the center are numbered as Zero1 and Zero4, and the numbers from Zero1 to the left are Zero2 and Zero3, and the numbers from Zero4 to the right are Zero5 and Zero6. Those skilled in the art will appreciate that the numbering method may also be increased from left to right and decreased from left to right, and the numbering rules for pulses and zero zones do not affect the modulation method of the present invention. Still based on Figure 6 For example, the seven pulses can be numbered from left to right as Pulse1, Pulse2, ... Pulse7, and the six zero areas can be numbered from left to right as Zero1, Zero2, ... Zero6, or vice versa.

[0041] In the above embodiments, only the situation within half a cycle (0 to π) is discussed. Those skilled in the art will understand that for the above three-level voltage (+V, 0, -V), in the other half cycle (π to 2π), the width and interval of all pulses are the same as those within 0 to π, but inverted. Figure 8 The waveform diagram of the output voltage of each bridge stage and the total output voltage of the cascade bridge within one cycle (0-2π) of the seven-pulse embodiment shown.

[0042] According to another embodiment of the present invention, each bridge generates a two-level voltage (+V, 0) on its AC side, using a step modulation method similar to the above, which is equivalent to repeating the positive half-cycle of the above embodiment, and the output voltage of the power converter is a positive "mantou wave".

[0043] According to another embodiment of the present invention, each bridge generates two levels of voltage (0, -V) on its AC side, using a step modulation method similar to the above, which is equivalent to repeating the negative half-cycle of the above embodiment, and the output voltage of the power converter is a negative "mantou wave".

[0044] According to other embodiments of the present invention, the voltage generated by each bridge on its AC side is not limited to 2 or 3 levels, and can be more than 3 levels.

[0045] In the aforementioned embodiment, only 10 cascade bridges are discussed as an example. In other embodiments, the number of cascade bridges is not limited to 10, as long as it is greater than or equal to 2.

[0046] In addition, in the embodiment of the present invention, the number of pulses contained in the output voltage of each bridge stage is not limited to 7, and may include 9, 11...(2k+1), where k is an integer and k≥1.

[0047] The multi-level power converter of the present invention is based on a new step modulation method, has low power imbalance, few harmonics, low switching loss and good dynamic performance.

[0048] Although the present invention has been described through preferred embodiments, the present invention is not limited to the embodiments described herein but includes various changes and modifications that may be made without departing from the scope of the present invention.

Claims

1. A power converter comprising n cascade bridges, wherein n≥2, wherein: The n cascade bridges are respectively configured to output the same multi-level pulses and the output n multi-level pulses are sequentially phase-shifted by the same angle, and the n multi-level pulses are superimposed on each other to form a desired output pulse waveform of the power converter, wherein each of the n cascade bridges is configured such that its output pulse contains 2k+1 sub-pulses in each half cycle, where k≥1, and The 2k+1 sub-pulses are symmetrically distributed with the k+1th sub-pulse as the center, and the pulse widths from the 1st sub-pulse to the k+1th sub-pulse increase successively, and the pulse widths from the k+1th sub-pulse to the 2k+1th sub-pulse decrease successively.

2. The power converter according to claim 1, wherein: The multi-level pulse is a 2-level pulse or a 3-level pulse.

3. The power converter according to claim 2, wherein: The 2k+1 sub-pulses are separated by 2k zero regions, and the 2k zero regions are symmetrically distributed around the k+1th sub-pulse.

4. The power converter according to claim 3, wherein: The widths of the 1st zero area to the kth zero area decrease successively, and the widths of the k+1th zero area to the 2kth zero area increase successively.

5. The power converter according to any one of claims 1 to 4, wherein: The minimum value of the same angle is 1 / n of the pulse width of the first sub-pulse.

6. The power converter according to any one of claims 1 to 4, wherein: Said n=10.

7. The power converter according to any one of claims 1 to 4, wherein: The k=1, 2 or 3.

8. A step modulation method for a power converter, wherein: The power converter comprises n cascade bridges, wherein n≥2, and wherein the ladder modulation method comprises: The n cascade bridges are adjusted so that they respectively output the same multi-level pulses and the n multi-level pulses output are sequentially phase-shifted by the same angle, and the n multi-level pulses are superimposed on each other to form a desired output pulse waveform of the power converter, wherein each of the n cascade bridges is adjusted so that its output pulse contains 2k+1 sub-pulses in each half cycle, where k≥1, and The 2k+1 sub-pulses are symmetrically distributed with the k+1th sub-pulse as the center, and the pulse widths from the 1st sub-pulse to the k+1th sub-pulse increase successively, and the pulse widths from the k+1th sub-pulse to the 2k+1th sub-pulse decrease successively.

9. The step modulation method according to claim 8, wherein: The n cascade bridges are adjusted so that they respectively output 2-level pulses or 3-level pulses.

10. The step modulation method according to claim 9, wherein: Each of the n cascade bridges is further adjusted so that the 2k+1 sub-pulses are separated by 2k zero regions, and the 2k zero regions are symmetrically distributed around the k+1th sub-pulse.