Time gain control circuit

Abstract

The invention discloses a time gain control circuit which comprises a reference power supply, a single-chip microcomputer, a DA chip, an adder, a follower and a gainer. According to the set sound velocity, the selected time control gain curve and the selected measuring range, the single chip microcomputer generates a digital signal corresponding to a propagation loss formula on a time axis which takes sound wave emission as starting time and takes propagation time required by the measuring range as ending time, and transmits the digital signal to the DA chip; an analog signal generated by the DA chip according to an input digital signal and a reference voltage passes through the adder and the follower and then serves as a control signal to be input to the gainer, the gainer is controlled to correspond to different amplification factors at different times, and therefore corresponding amplification control over the input signal on a time axis is achieved. According to the invention, the intensity of echo signals at different depths is effectively improved, so that deep water area echo signals which are originally weak and even difficult to distinguish due to long-distance propagation can also be clearly presented, and the accuracy and reliability of depth sounding are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a time gain control circuit. Background Art

[0002] As the most effective means of underwater detection, hydroacoustic signals have been widely used in various sonar devices for underwater target detection. Echo sounders are conventional water depth measurement equipment that use hydroacoustic signals for distance measurement, and are also the most commonly used detection equipment today.

[0003] As sound waves propagate in water, they attenuate as the propagation distance increases, causing the intensity of the echo signal to weaken. The farther the reflection interface is from the transducer, the weaker the echo signal. In order to more clearly and accurately detect and display the reflected echoes from the bottom of the water and underwater objects at different depths or distances, it is necessary to adjust the gain of the received echo signal according to its arrival time (corresponding to different depths). Summary of the invention

[0004] The object of the present invention is to provide a time gain control circuit to solve the problems in the background technology.

[0005] In order to solve the above technical problems, the present invention provides a time gain control circuit, comprising: a reference power supply, a single chip microcomputer, a DA chip, an adder, a follower, a gain device and a power supply circuit;

[0006] The single chip microcomputer generates a digital signal corresponding to the propagation loss formula on a time axis with the start time of the sound wave emission and the end time of the propagation time required by the range according to the set sound speed, the selected time control gain curve and the selected range, and transmits it to the DA chip;

[0007] The analog signal generated by the DA chip according to the input digital signal and the reference voltage is input to the gain device as a control signal after passing through the adder and the follower, and the gain device is controlled to correspond to different amplification factors at different times, thereby realizing corresponding amplification control of the input signal on the time axis;

[0008] The power supply circuit is used to supply power to each module.

[0009] In one embodiment, the power supply circuit includes a module N6, capacitors C10 to C15, and inductors L1 to L2; the model of the module N6 is WRA2405ZP-6W, which is used to convert the external input power into +5V and -5V, and provide it to the operational amplifier chip and the gain device in the receiving circuit;

[0010] Capacitors C12 and C13 are input filter capacitors of module N6, which are respectively connected in parallel to the +VIN port and -VIN port of module N6; inductors L1, L2, capacitors C10, C11, C14, and C15 are respectively output filter inductors and filter capacitors of module N6, the first end of inductor L1 is connected to the +Vo port of module N6, and the second end is simultaneously connected to the first end of capacitor C11 and the first end of capacitor C10; the first end of inductor L2 is connected to the -Vo port of module N6, and the second end is simultaneously connected to the first end of capacitor C14 and the first end of capacitor C15; the second end of capacitor C11, the second end of capacitor C10, the second end of capacitor C14, and the second end of capacitor C15 are commonly connected to the 0V port of module N6.

[0011] In one implementation, the reference power supply includes modules N1 and N3, and capacitors C1 to C4; the model of module N1 is RC1117S33T, the model of module N3 is ADR433B, capacitors C1 and C3 are connected in parallel between the Vout port of module N1 and the ground, capacitors C2 and C4 are connected in parallel between the Vin port of module N1 and the ground; and the Vin port of module N3 is connected to the Vin port of module N1; wherein capacitors C2 and C4 are input filter capacitors of module N1, and capacitors C1 and C3 are output filter capacitors of module N1.

[0012] In one embodiment, the DA chip includes a module N4, the model of the module N4 is MCP4921, and the +5V converted by the power supply circuit is converted into +3VD and a reference power supply for the module N4 through modules N1 and N3 respectively.

[0013] In one embodiment, the single-chip microcomputer includes modules N7 and J1, resistors R4 to R6, capacitors C7 and C8, and capacitors C16 and C17; the model of module N7 is C8051F340, and the model of module J1 is HEADER 5X2; resistors R4 and R5 are connected in series to the RST / C2CK port of module N7, resistor R6 is connected to the C2D port of module N7, capacitors C7 and C8 are connected in parallel between the VDD port of module N7 and the ground, and capacitors C16 and C17 are connected in parallel between the fifth port of module J1 and the ground; wherein capacitors C7, C8, C16, and C17 are filter capacitors, resistors R4 and R5 constitute a single-chip microcomputer reset circuit, and resistors R5 and R6 also play a current limiting role; module J1 is connected to an external simulator to simulate and burn the single-chip microcomputer.

[0014] In one embodiment, the adder includes a module N2A and an adjustable resistor RP1, and resistors R1 to R3, which process the analog signal of the DA chip and output it to the follower; the model of the module N2A is TL084, and its first end is connected to a +5V voltage through resistors R2 and R3, and its second end is connected to an adjustment pin of the adjustable resistor RP1. In addition, the second end is also connected between the resistor R2 and the resistor R3, and the third end is grounded through the resistor R1; the input pin of the adjustable resistor RP1 is connected to the VOUTA port of the module N4, and the output pin is grounded.

[0015] In one implementation, the follower includes a module N2B and a capacitor C5, wherein the model of the module N2B is also TL084, the capacitor C5 is connected between the seventh terminal of the module N2B and the ground, the fifth terminal of the module N2B is connected to the first terminal of the module N2A, and the capacitor C5 is a filter capacitor for the output signal of the module N2B.

[0016] In one embodiment, the gain device includes a module N5 and capacitors C6 and C9, which convert the signal after the previous stage amplification into a signal after time gain processing. Capacitors C6 and C9 are power supply filter capacitors. Capacitor C6 is connected to the U(-) port of module N5, and capacitor C9 is connected to the U(+) port of module N5.

[0017] The present invention provides a time gain control circuit, which gradually increases the gain of the receiving amplifier according to the time sequence of the echo signal arrival, that is, the corresponding depth information. Generally, the farther the signal is from the transducer (the later the echo arrives), the higher the gain compensation is given, so as to compensate for the attenuation caused by the long-distance propagation of the sound wave, so that the intensity of the echo signals at different depths can be relatively balanced after processing. Through reasonable time gain control, the intensity of the echo signals at different depths can be effectively improved, so that the deep water echo signals that originally became very weak or even difficult to distinguish due to long-distance propagation can also be clearly presented, reducing the misjudgment and missed judgment caused by signal attenuation, and improving the accuracy and reliability of depth measurement. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 The present invention provides a schematic diagram of the principle of a time gain control circuit.

[0019] Figure 2 The present invention provides a schematic diagram of the structure of a time gain control circuit.

Claims

1. A time gain control circuit, characterized in that: include: Reference power supply, single chip microcomputer, DA chip, adder, follower, gainer and power supply circuit; The single chip microcomputer generates a digital signal corresponding to the propagation loss formula on a time axis with the start time of the sound wave emission and the end time of the propagation time required by the range according to the set sound speed, the selected time control gain curve and the selected range, and transmits it to the DA chip; The analog signal generated by the DA chip according to the input digital signal and the reference voltage is input to the gain device as a control signal after passing through the adder and the follower, and the gain device is controlled to correspond to different amplification factors at different times, thereby realizing corresponding amplification control of the input signal on the time axis; The power supply circuit is used to supply power to each module.

2. The time gain control circuit according to claim 1, characterized in that: The power supply circuit includes a module N6, capacitors C10-C15, and inductors L1-L2; the model of the module N6 is WRA2405ZP-6W, which is used to convert the external input power into +5V and -5V, and provide it to the operational amplifier chip and the gain device in the receiving circuit; Capacitors C12 and C13 are input filter capacitors of module N6, which are respectively connected in parallel to the +VIN port and -VIN port of module N6; inductors L1, L2, capacitors C10, C11, C14, and C15 are respectively output filter inductors and filter capacitors of module N6, the first end of inductor L1 is connected to the +Vo port of module N6, and the second end is simultaneously connected to the first end of capacitor C11 and the first end of capacitor C10; the first end of inductor L2 is connected to the -Vo port of module N6, and the second end is simultaneously connected to the first end of capacitor C14 and the first end of capacitor C15; the second end of capacitor C11, the second end of capacitor C10, the second end of capacitor C14, and the second end of capacitor C15 are commonly connected to the 0V port of module N6.

3. The time gain control circuit according to claim 2, characterized in that: The reference power supply includes modules N1 and N3, and capacitors C1 to C4; the model of module N1 is RC1117S33T, the model of module N3 is ADR433B, capacitors C1 and C3 are connected in parallel between the Vout port of module N1 and the ground, capacitors C2 and C4 are connected in parallel between the Vin port of module N1 and the ground; and the Vin port of module N3 is connected to the Vin port of module N1; wherein capacitors C2 and C4 are input filter capacitors of module N1, and capacitors C1 and C3 are output filter capacitors of module N1.

4. The time gain control circuit according to claim 3, characterized in that: The DA chip includes a module N4, the model of which is MCP4921. The +5V converted by the power supply circuit is converted into +3VD and a reference power supply for the module N4 through modules N1 and N3 respectively.

5. The time gain control circuit according to claim 4, characterized in that: The single-chip microcomputer includes modules N7 and J1, resistors R4-R6, capacitors C7 and C8, and capacitors C16 and C17; the model of module N7 is C8051F340, and the model of module J1 is HEADER 5X2; resistors R4 and R5 are connected in series to the RST / C2CK port of module N7, resistor R6 is connected to the C2D port of module N7, capacitors C7 and C8 are connected in parallel between the VDD port of module N7 and the ground, and capacitors C16 and C17 are connected in parallel between the fifth port of module J1 and the ground; wherein capacitors C7, C8, C16, and C17 are filter capacitors, resistors R4 and R5 constitute a single-chip microcomputer reset circuit, and resistors R5 and R6 also play a current limiting role; module J1 is connected to an external simulator to simulate and burn the single-chip microcomputer.

6. The time gain control circuit according to claim 5, characterized in that: The adder includes a module N2A and an adjustable resistor RP1, and resistors R1 to R3, which process the analog signal of the DA chip and output it to the follower; the model of the module N2A is TL084, and its first end is connected to the +5V voltage through the resistors R2 and R3, and the second end is connected to the adjustment pin of the adjustable resistor RP1. In addition, the second end is also connected between the resistors R2 and R3, and the third end is grounded through the resistor R1; the input pin of the adjustable resistor RP1 is connected to the VOUTA port of the module N4, and the output pin is grounded.

7. The time gain control circuit according to claim 6, characterized in that: The follower includes a module N2B and a capacitor C5, wherein the model of the module N2B is also TL084, the capacitor C5 is connected between the seventh terminal of the module N2B and the ground, the fifth terminal of the module N2B is connected to the first terminal of the module N2A, and the capacitor C5 is a filter capacitor for the output signal of the module N2B.

8. The time gain control circuit according to claim 7, characterized in that: The gain device includes a module N5 and capacitors C6 and C9, which convert the signal after the previous stage amplification into a signal after time gain processing. Capacitors C6 and C9 are power supply filter capacitors. Capacitor C6 is connected to the U(-) port of module N5, and capacitor C9 is connected to the U(+) port of module N5.

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