Surface acoustic wave filter and packaging method thereof

Abstract

The invention provides a packaging method of a surface acoustic wave filter. The packaging method of the surface acoustic wave filter comprises the steps that a first substrate is provided, and an interdigital transducer and a welding pad located on the side edge of the interdigital transducer are formed on the bonding side of the first substrate; a second substrate is provided, and a groove and a via hole located in the side edge of the groove are formed in the bonding side of the second substrate; the bonding side of the second substrate is aligned with the bonding side of the first substrate, the first substrate and the second substrate are bonded, the groove covers the interdigital transducer to form a cavity, and the via hole corresponds to the position of the welding pad; and forming a conductive column in the via hole, wherein the conductive column is electrically connected with the welding pad. In this way, before the second substrate and the first substrate are bonded, the groove and the via hole are formed in the second substrate in advance, the problem that the first substrate is damaged due to the fact that a hole is formed in the second substrate can be avoided, and the packaging yield can be improved. The invention also provides a surface acoustic wave filter manufactured by using the packaging method.

Description

Technical Field

[0001] The present invention relates to the technical field of packaging, and in particular to a surface acoustic wave filter and a packaging method thereof. Background Art

[0002] Surface acoustic wave (SAW) filters have the characteristics of high operating frequency, wide bandwidth, good frequency selection characteristics, small size and light weight, and can be produced using the same production process as integrated circuits. They are simple to manufacture, low in cost, and have good consistency in frequency characteristics. Therefore, they are widely used in various electronic devices. Surface acoustic wave filters include interdigital transducers (IDTs) and cavities that ensure that the interdigital transducers complete the filtering work.

[0003] An existing packaging method for surface acoustic wave filters is: attaching a first dry film to the filter wafer, photolithography the first dry film layer to expose the chip pad and IDT; then attaching a second dry film to the wafer surface, photolithography the second dry film to expose the chip pad position, and forming a vacuum cavity between the IDT area and the second layer of dry film. Since the mechanical strength of the dry film is relatively poor, the cavity made by the dry film is easily deformed and damaged, thereby affecting the reliability of the surface acoustic wave filter.

[0004] Another existing method for packaging a surface acoustic wave filter is: providing a first substrate, with an IDT formed on the surface of the first substrate; installing a second substrate on the first substrate, with a cavity required for the IDT to work formed between the first substrate and the second substrate; drilling a hole in the second substrate by laser drilling; and forming a conductive column in the hole. However, in the process of drilling the hole in the second substrate, the first substrate is easily damaged, such as being broken by pressure, which affects the yield of the packaging. Summary of the invention

[0005] One of the purposes of the present invention is to provide a surface acoustic wave filter and a packaging method thereof, which can avoid the problem of opening a hole in a second substrate causing damage to a first substrate, thereby facilitating improving the yield of packaging.

[0006] In order to achieve the above object, the present invention provides a method for packaging a surface acoustic wave filter. The method for packaging a surface acoustic wave filter comprises:

[0007] Providing a first substrate, wherein an IDT and a pad located on a side of the IDT are formed on a bonding side of the first substrate;

[0008] Providing a second substrate, wherein a bonding side of the second substrate is formed with a groove and a via located at a side of the groove;

[0009] Aligning the bonding side of the second substrate with the bonding side of the first substrate, bonding the first substrate and the second substrate, wherein the groove covers the interdigital transducer to form a cavity, and the via hole corresponds to the position of the pad; and

[0010] A conductive column is formed in the via hole, and the conductive column is electrically connected to the pad.

[0011] Optionally, the step of providing a first substrate includes: forming an IDT and a pad on a bonding side of the first substrate; and forming a first insulating layer on the bonding side of the first substrate, wherein the first insulating layer covers the IDT and the pad.

[0012] Optionally, the step of providing a second substrate includes: forming a second insulating layer on the bonding side of the second substrate, the second insulating layer covering the second substrate; etching the second insulating layer and the second substrate to form the groove and the via, the bottom surface of the groove is located in the second insulating layer, and the via passes through the second insulating layer and partially extends into the second substrate.

[0013] Optionally, in the step of bonding the first substrate and the second substrate, the first substrate and the second substrate are bonded by bonding the first insulating layer and the second insulating layer, and the first insulating layer and the second insulating layer are made of the same material.

[0014] Optionally, the second substrate has a non-bonding side opposite to the bonding side; the packaging method further includes: after bonding the first substrate and the second substrate and before forming a conductive column in the conductive hole, removing part of the thickness of the non-bonding side of the second substrate to expose the conductive hole.

[0015] Optionally, in the step of providing a second substrate, the second substrate has a doping layer; the method of removing part of the thickness of the non-bonding side of the second substrate includes: annealing the second substrate, and peeling off part of the thickness of the second substrate from the position of the doping layer.

[0016] Optionally, the doping layer is formed by implanting hydrogen ions into the second substrate.

[0017] Optionally, in the step of providing a second substrate, the conductive pillar extends from a bonding side surface of the second substrate to a surface of the doping layer.

[0018] Optionally, part of the thickness of the non-bonding side of the second substrate is removed by grinding.

[0019] Optionally, the conductive column is formed in the via hole by electroplating or tinning.

[0020] Optionally, the packaging method further includes: after forming the conductive column in the through hole, forming a pin at an end of the conductive column away from the first substrate.

[0021] Optionally, the pins are formed by electroplating, printing solder paste or implanting solder balls.

[0022] Another aspect of the present invention provides a surface acoustic wave filter. The surface acoustic wave filter is manufactured by using the above-mentioned surface acoustic wave filter packaging method.

[0023] In the surface acoustic wave filter and packaging method thereof provided by the present invention, an interdigital transducer and a pad located on the side of the interdigital transducer are formed on the bonding side of the first substrate provided; a groove and a via located on the side of the groove are formed on the bonding side of the second substrate provided; the bonding side of the second substrate is aligned with the bonding side of the first substrate, the first substrate and the second substrate are bonded, the groove covers the top of the interdigital transducer to form a cavity, the via corresponds to the position of the pad; a conductive column is formed in the via, and the conductive column is electrically connected to the pad. In the present invention, before the second substrate is bonded to the first substrate, the groove and the via are pre-formed on the second substrate, so that the problem of opening a hole in the second substrate causing damage to the first substrate can be avoided, which is conducive to improving the yield of packaging.

[0024] Furthermore, the present application bonds the first substrate and the second substrate by bonding a first insulating layer on the surface of the first substrate and a second insulating layer on the surface of the second substrate, and the first insulating layer and the second insulating layer are made of the same material, thereby improving the bonding reliability of the first substrate and the second substrate and improving the reliability of the product; in addition, the bottom surface of the groove on the bonding side of the second substrate is located in the second insulating layer, and the groove covers the top of the interdigital transducer to form a cavity, so that the cavity required for the operation of the interdigital transducer is formed in the first insulating layer and the second insulating layer of the same material, which can avoid the problem of easy deformation and damage of the cavity formed by the dry film, and can also avoid the chip reliability problem caused by the difference in thermal expansion coefficient (CTE) after the two materials are bonded, which helps to improve the reliability of the surface acoustic wave filter. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 The present invention is a flowchart of a method for packaging a surface acoustic wave filter according to an embodiment of the present invention.

[0026] Figures 2 to 11 A schematic diagram of the structure of the steps of a method for packaging a surface acoustic wave filter provided by an embodiment of the present invention.

[0027] Figure 12 to Figure 14 The figure is a schematic structural diagram of the steps of a method for packaging a surface acoustic wave filter according to another embodiment of the present invention.

[0028] Explanation of the reference numerals: 100 - first substrate; 101 - interdigital transducer; 102 - soldering pad; 103 - first insulating layer; 200 - second substrate; 201 - doping layer; 202 - second insulating layer; 203 - groove; 204 - via hole; 300 - cavity; 301 - conductive column; 302 - pin. DETAILED DESCRIPTION

[0029] The following is a further detailed description of the surface acoustic wave filter and the packaging method thereof proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0030] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. Unless otherwise defined in the present application document, the technical terms or scientific terms used in the present invention should be the common meaning understood by people with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in the present specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantitative limit, but indicate that there is at least one. "Multiple" or "several" means two or more. Unless otherwise specified, words such as "upper / upper layer" and / or "lower / lower layer" are only for convenience of explanation and are not limited to one position or one spatial orientation. Words such as "include" or "comprise" mean that the elements or structures appearing in front of "include" or "comprise" include the elements or structures listed after "include" or "comprise" and their equivalents, and do not exclude other elements or structures. Words such as "connect" or "connected" are not limited to physical or mechanical connections, and can include electrical connections, whether direct or indirect. The singular forms "a", "said" and "the" used in the present specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0031] Figure 1 The present invention is a flowchart of a method for packaging a surface acoustic wave filter according to an embodiment of the present invention.

[0032] like Figure 1 As shown, the packaging method of the surface acoustic wave filter provided in this embodiment includes:

[0033] Step S1, providing a first substrate, wherein an IDT and a pad located on a side of the IDT are formed on a bonding side of the first substrate;

[0034] Step S2, providing a second substrate, wherein a bonding side of the second substrate is formed with a groove and a conductive hole located at a side of the groove;

[0035] Step S3, aligning the bonding side of the second substrate with the bonding side of the first substrate, bonding the first substrate and the second substrate, wherein the groove covers the interdigital transducer to form a cavity, and the via corresponds to the pad position; and

[0036] Step S4, forming a conductive column in the via hole, wherein the conductive column is electrically connected to the pad.

[0037] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0038] Figures 2 to 11 The following is a schematic diagram of the structure of the steps of the packaging method of the surface acoustic wave filter provided by one embodiment of the present invention. Figure 1 , Figures 2 to 11 A method for packaging the surface acoustic wave filter of the present application will be described.

[0039] like Figure 3 As described above, an IDT 101 and a pad 102 (Pad) located at a side of the IDT 101 are formed on the bonding side of the provided first substrate 100 .

[0040] Specifically, Figure 3As shown, pads 102 are formed on both sides of the IDT 101, and the pads 102 can be electrically connected to the IDT 101 to lead out the IDT 101. The material of the IDT 101 can include metal materials such as aluminum (Al), copper (Cu), gold (Au), silver (Ag), chromium (Cr), titanium (Ti) or tungsten (W), and can also include alloy materials of the above metal materials. The material of the pad 102 can include metal materials such as aluminum (Al), copper (Cu), gold (Au), silver (Ag), chromium (Cr), titanium (Ti) or tungsten (W), and can also include alloy materials of the above metal materials.

[0041] The first substrate 100 may be a ceramic substrate or a silicon substrate, etc. The first substrate 100 may also be formed of a piezoelectric material, such as lithium tantalate or lithium niobate.

[0042] like Figure 3 As shown, the bonding side of the first substrate 100 provided in this embodiment may also be formed with a first insulating layer 103, and the first insulating layer 103 covers the IDT 101 and the pad 102. Step S1 of this embodiment may include: Figure 2 As shown, an IDT 101 and a pad 102 are formed on the bonding side of the first substrate 100; Figure 3 As shown, a first insulating layer 103 is formed on the bonding side of the first substrate 100 , and the first insulating layer 103 covers the IDT 101 and the pad 102 .

[0043] In this embodiment, the material of the first insulating layer 103 may include silicon oxide, but is not limited thereto. The first insulating layer 103 may be formed by atmospheric pressure chemical vapor deposition (APCVD), ultrahigh vacuum chemical vapor deposition (UHVCVD), low-pressure chemical vapor deposition (LPCVD), or plasma enhanced CVD (PECVD).

[0044] Execute step S2, such as Figure 7 As shown, a second substrate 200 is provided, and a groove 203 and a via 204 located at a side of the groove 203 are formed on the bonding side of the second substrate 200 .

[0045] Specifically, a second insulating layer 202 is formed on the bonding side of the second substrate 200 , the via 204 may penetrate the second insulating layer 202 and extend into the second substrate 200 , and the groove 203 may be formed in the second insulating layer 202 .

[0046] A doping layer 201 may be formed in the second substrate 200 . The doping layer 201 may be formed by injecting hydrogen ions (H) into the second substrate 200 . The doping layer 201 is brittle after annealing, so that the second substrate 200 can be easily split and thinned from the position of the doping layer after annealing.

[0047] Exemplarily, step S2 may include: Figure 4 As shown, a second substrate 200 is provided, and the second substrate 200 has an opposite bonding side and a non-bonding side; Figure 5 As shown, an ion implantation process is performed to form a doped layer 201 in the second substrate 200; Figure 6 As shown, a second insulating layer 202 is formed on the bonding side of the second substrate 200, and the second insulating layer 202 covers the second substrate 200; Figure 7 As shown, the second insulating layer 202 and the second substrate 200 are etched to form a groove 203 and a via 204. The bottom surface of the groove 203 can be located in the second insulating layer 202, that is, the depth of the groove 203 can be less than the thickness of the second insulating layer 202, and the via 204 can penetrate the second insulating layer 202 and partially extend into the second substrate 200.

[0048] The step of forming the via hole 204 may specifically be: after forming the second insulating layer 202, a photoresist layer may be formed on the second insulating layer 202, the photoresist layer may be exposed and developed to complete the patterning of the photoresist layer, and the second insulating layer 202 and the second substrate 200 may be etched using the patterned photoresist layer as a mask to form the via hole 204. The method for forming the groove 203 is the same as the method for forming the via hole 204. In this embodiment, since the groove 203 and the via hole 204 have different depths, the groove 203 and the via hole 204 may be formed by two photolithography and etching processes.

[0049] In this embodiment, via holes 204 may be formed on both sides of the groove 203. The second substrate 200 may be a ceramic substrate, a sapphire substrate, a silicon substrate, etc. The material of the second insulating layer 202 may include silicon oxide, but is not limited thereto.

[0050] It should be noted that, in this embodiment, step S1 of providing the first substrate 100 is performed before step S2 of providing the second substrate 200, but the present invention is not limited thereto. In other embodiments, step S1 and step S2 may be performed simultaneously, or step S2 may be performed before step S1.

[0051] Execute step S3, such as Figure 8As shown, the bonding side of the second substrate 200 is aligned with the bonding side of the first substrate 100, and the first substrate 100 and the second substrate 200 are bonded. The groove 203 covers the IDT 101 to form a cavity 300, and the conductive hole 204 corresponds to the position of the pad 102.

[0052] In this embodiment, the first substrate 100 and the second substrate 200 are bonded by bonding the first insulating layer 103 and the second insulating layer 202. The first insulating layer 103 and the second insulating layer 202 are made of the same material, so that the bonding reliability between the first substrate 100 and the second substrate 200 can be improved. Figure 7 and Figure 8 As shown, the bottom surface of the groove 203 on the bonding side of the second substrate 200 is located in the second insulating layer 202, and the groove 203 covers the top of the IDT 101 to form a cavity 300, so that the cavity 300 required for the IDT 101 to work is formed in the first insulating layer 103 and the second insulating layer 202 of the same material. The materials of the first insulating layer 103 and the second insulating layer 202 are, for example, silicon oxide. The mechanical strength of the first insulating layer 103 and the second insulating layer 202 is better than that of the dry film, thereby avoiding the problem that the cavity formed by the dry film is easily deformed and damaged, and also avoiding the chip reliability problem caused by the difference in the coefficient of thermal expansion (CTE) after the two materials are bonded, which helps to improve the reliability of the surface acoustic wave filter.

[0053] refer to Figure 7 and Figure 8 As shown, in this embodiment, the via hole 204 does not penetrate the second substrate 200. After the first substrate 100 and the second substrate 200 are bonded, the via hole 204 is closed between the first substrate 100 and the second substrate 200, so that after the first substrate 100 and the second substrate 200 are bonded and before the conductive pillar is formed in the via hole 204, Fig. 9 As shown, it is necessary to remove part of the thickness of the non-bonding side of the second substrate 200 to expose the via 204 .

[0054] In this embodiment, the second substrate 200 has a doping layer 201, and the method for removing part of the thickness of the non-bonding side of the second substrate 200 may include: annealing the second substrate 200, and removing part of the thickness of the second substrate 200 by stripping from the position of the doping layer 201. In this way, the process of removing part of the thickness of the second substrate 200 is relatively simple and efficient.

[0055] It should be noted that the reference Figure 7 , Figure 8 and Fig. 9As shown, in this embodiment, the via hole 204 can extend from the bonding side surface of the second substrate 200 to the surface of the doping layer 201, so that the via hole 204 can be directly exposed after the partial thickness of the second substrate 200 is removed from the position of the doping layer 201, and the thinning efficiency is higher than the solution of grinding the second substrate to expose the via hole. Among them, if the surface of the non-bonding side of the second substrate 200 is uneven after the partial thickness of the second substrate 200 is removed from the doping layer 201, the non-bonding side surface of the second substrate 200 can be ground, and the grinding amount of this grinding step is small and the grinding time is short.

[0056] In other embodiments, the via hole 204 may also penetrate the doped layer 201; the via hole 204 may not extend to the surface of the doped layer 201. After removing part of the thickness of the second substrate 200 from the position of the doped layer 201, the via hole 204 may be exposed by grinding the second substrate 200. Compared with the solution of completely exposing the via hole by grinding the second substrate, the efficiency is higher. In other embodiments of the present application, the via hole 204 may also penetrate the second substrate 200, so that after bonding the first substrate 100 and the second substrate 200, the conductive pillar 301 may be directly formed in the via hole 204.

[0057] Figure 12 to Figure 14 FIG. 2 is a schematic diagram of a packaging method of a surface acoustic wave filter according to another embodiment of the present invention. In another embodiment of the present application, no doping layer is formed in the second substrate 200. Specifically, refer to Fig.12 and Fig.13 As shown, step S2 may include: providing a second substrate 200, a second insulating layer 202 is formed on the bonding side surface of the second substrate 200, and then forming a via hole 204 in the second insulating layer 202 and the second substrate 200 and forming a groove 203 in the second insulating layer 202. Fig.14 and Fig. 9 As shown, after the first substrate 100 and the second substrate 200 are bonded, a portion of the thickness of the non-bonding side of the second substrate 200 may be removed by grinding to expose the via 204 .

[0058] Next, execute step S4, such as Fig.10 As shown, a conductive column 301 is formed in the via hole 204 , and the conductive column 301 is electrically connected to the pad 102 .

[0059] It should be noted that, since the first insulating layer 103 covers the pad 102, Fig. 9As shown, after bonding the first substrate 100 and the second substrate 200, the via hole 204 is close to the bottom of the pad 102, that is, the surface of the pad 102 is covered with insulating material. Before forming the conductive column 301 in the via hole 204, the insulating material at the bottom of the via hole 204 needs to be removed to ensure the reliability of the electrical connection between the conductive column 301 and the pad 102.

[0060] Exemplarily, the conductive pillar 301 may be formed in the via hole 204 by electroplating, but the present invention is not limited thereto. It should be noted that the electroplating process includes a pre-treatment process, and the pre-treatment process of the electroplating process may be used to remove the insulating material at the bottom of the via hole 204, thereby simplifying the process flow. In other embodiments, the conductive pillar 301 may be formed by tinning or the like.

[0061] For example, the material of the conductive pillar 301 may include metal materials such as copper or tin.

[0062] refer to Fig.11 As shown, after forming the conductive pillar 301, a pin 302 is formed at one end of the conductive pillar 301 away from the first substrate 100. Exemplarily, the pin 302 can be formed by electroplating, printing solder paste or implanting solder balls. The material of the pin 302 can include metals such as silver, copper or tin.

[0063] The present application also provides a surface acoustic wave filter, which can be formed by the above-mentioned surface acoustic wave filter packaging method.

[0064] refer to Fig.11 As shown, the surface acoustic wave filter includes: a first substrate 100 and a second substrate 200 bonded to each other; an IDT 101 and a pad 102 located on the side of the IDT 101 are formed on the bonding side of the first substrate 100; a groove 203 and a via 204 located on the side of the groove 203 are formed on the bonding side of the second substrate 200; the groove 203 covers the top of the IDT 101 to form a cavity 300, and the via 204 corresponds to the position of the pad 102; a conductive column 301 is formed in the via 204.

[0065] A first insulating layer 103 may also be formed on the bonding side of the first substrate 100, and the first insulating layer 103 covers the interdigital transducer 101. A second insulating layer 202 may also be formed on the bonding side of the second substrate 200, the bottom surface of the groove 203 may be located in the second insulating layer 202, and the via 204 may penetrate the second insulating layer 202 and partially extend into the second substrate 200. In this embodiment, the cavity 300 is formed between the first insulating layer 103 and the second insulating layer 202. The first substrate 100 and the second substrate 200 are bonded through the first insulating layer 103 and the second insulating layer 202.

[0066] A pin 302 is formed at one end of the conductive pillar 301 away from the first substrate 100 .

[0067] In the surface acoustic wave filter and its packaging method provided by the present application, the bonding side of the first substrate 100 provided is formed with an interdigital transducer 101 and a pad 102 located on the side of the interdigital transducer 101; the bonding side of the second substrate 200 provided is formed with a groove 203 and a via 204 located on the side of the groove 203; the bonding side of the second substrate 200 is aligned with the bonding side of the first substrate 100, and the first substrate 100 and the second substrate 200 are bonded, the groove 203 covers the top of the interdigital transducer 101 to form a cavity 300, and the via 204 corresponds to the position of the pad 102; a conductive column 301 is formed in the via 204, and the conductive column 301 is electrically connected to the pad 102. In the present application, before the second substrate 200 is bonded to the first substrate 100, the grooves 203 and the vias 204 are pre-formed on the second substrate 200, so as to avoid the problem of damage to the first substrate 100 caused by opening holes in the second substrate 200, which is beneficial to improving the yield of packaging.

[0068] It should be noted that this specification adopts a progressive description method, and the parts described later focus on the differences from the parts described previously, and the same and similar parts between the various parts can be referred to each other.

[0069] References throughout the specification to "one embodiment," "other embodiments," or "this embodiment" indicate that a particular component, structure, or feature described with the embodiment is included in at least one embodiment. Therefore, the phrases "one embodiment," "other embodiments," or "this embodiment" appearing in various places throughout the specification do not necessarily refer to the same embodiment. Moreover, in one or more embodiments, particular components, structures, or features may be combined in any suitable manner.

[0070] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for packaging a surface acoustic wave filter, characterized in that: include: Providing a first substrate, wherein an IDT and a pad located on a side of the IDT are formed on a bonding side of the first substrate; Providing a second substrate, wherein a bonding side of the second substrate is formed with a groove and a via located at a side of the groove; Aligning the bonding side of the second substrate with the bonding side of the first substrate, bonding the first substrate and the second substrate, wherein the groove covers the interdigital transducer to form a cavity, and the via hole corresponds to the position of the pad; and A conductive column is formed in the via hole, and the conductive column is electrically connected to the pad.

2. The method for packaging a surface acoustic wave filter according to claim 1, wherein: The step of providing a first substrate comprises: forming an IDT and a bonding pad on a bonding side of the first substrate; and A first insulating layer is formed on the bonding side of the first substrate, wherein the first insulating layer covers the IDT and the pad.

3. The method for packaging a surface acoustic wave filter according to claim 2, wherein: The step of providing a second substrate comprises: forming a second insulating layer on the bonding side of the second substrate, wherein the second insulating layer covers the second substrate; The second insulating layer and the second substrate are etched to form the groove and the via hole, wherein the bottom surface of the groove is located in the second insulating layer, and the via hole penetrates the second insulating layer and partially extends into the second substrate.

4. The method for packaging a surface acoustic wave filter according to claim 3, wherein: In the step of bonding the first substrate and the second substrate, the first substrate and the second substrate are bonded by bonding the first insulating layer and the second insulating layer, and the first insulating layer and the second insulating layer are made of the same material.

5. The method for packaging a surface acoustic wave filter according to claim 1, wherein: The second substrate has a non-bonding side opposite to the bonding side; the packaging method further includes: After bonding the first substrate and the second substrate and before forming a conductive column in the via hole, a portion of the thickness of the non-bonding side of the second substrate is removed to expose the via hole.

6. The method for packaging a surface acoustic wave filter according to claim 5, wherein: In the step of providing a second substrate, the second substrate has a doping layer; The method for removing a portion of the thickness of the non-bonding side of the second substrate includes: annealing the second substrate, and removing a portion of the thickness of the second substrate by stripping from the position of the doping layer.

7. The method for packaging a surface acoustic wave filter according to claim 6, wherein: The doping layer is formed by implanting hydrogen ions into the second substrate.

8. The method for packaging a surface acoustic wave filter according to claim 6, wherein: In the step of providing a second substrate, the conductive pillar extends from a bonding side surface of the second substrate to a surface of the doping layer.

9. The method for packaging a surface acoustic wave filter according to claim 5, wherein: Part of the thickness of the non-bonding side of the second substrate is removed by grinding.

10. The method for packaging a surface acoustic wave filter according to claim 1, wherein: The conductive column is formed in the via hole by electroplating or tinning.

11. The method for packaging a surface acoustic wave filter according to claim 1, wherein: The packaging method further comprises: After forming the conductive column in the through hole, a pin is formed at an end of the conductive column away from the first substrate.

12. The method for packaging a surface acoustic wave filter according to claim 11, wherein: The pins are formed by electroplating, printing solder paste or implanting solder balls.

13. A surface acoustic wave filter, characterized in that: The surface acoustic wave filter is manufactured by the packaging method of any one of claims 1 to 12.

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