Small-sized electronic equipment in sealed environment

Abstract

The invention belongs to the technical field of electronic thermal control, and relates to a small electronic device in a sealed environment, which comprises an electronic device shell, a circuit board and a plurality of electronic elements, the circuit board is arranged in the electronic equipment shell, the number of the electronic elements is larger than or equal to 5, the center distance between the electronic elements is larger than or equal to ammin, and the layout of the electronic elements meets the optimal layout scheme; the optimal layout scheme refers to a layout scheme in which the sum sigma (phi * R) of all the electronic components is smaller than the sum sigma (phi * R) of all the electronic components in any other layout scheme; wherein i is the serial number of the electronic element, phi i is the steady-state heat flow between the ith electronic element and the shell of the electronic equipment, and Ri is the heat resistance between the ith electronic element and the shell of the electronic equipment. According to the layout scheme that the sum of phi * R of all the electronic elements is minimum, the average value of the surface temperatures of all the electronic elements is minimum, and the optimal heat dissipation effect is obtained.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic thermal control, and in particular to a small electronic device in a sealed environment. Background Art

[0002] In the prior art, small and medium-sized electronic devices are mainly made of small electronic components welded on a printed circuit board and are set in a sealed environment; for small electronic devices with high electronic component integration and complex design in a sealed environment, conventional air cooling, liquid cooling and other methods may not be applicable, and the main heat dissipation method in the prior art is passive heat dissipation by heat conduction; when designing small electronic equipment, the size of the electronic equipment shell is usually determined according to the application scenario, and the design is mainly for the plane layout position of the small electronic components and the printed circuit board that matches them, and the printed circuit on the printed circuit board needs to match the position of the small electronic components.

[0003] In the prior art, the plane layout design of small and medium-sized electronic components is mainly based on experience and relies on passive heat dissipation of heat conduction, which has the following defects: the heat dissipation of each electronic component is not smooth, the electronic component overheats and causes damage to the electronic component, reducing the service life of the electronic equipment; the electrical properties of semiconductor materials in the electronic component change at high temperatures exceeding the working range, affecting the electrical properties of the electronic component, and in severe cases causing the electronic component to lose function. Summary of the invention

[0004] In view of the above analysis and in response to the deficiencies in the prior art, the present invention aims to provide a small electronic device in a sealed environment to solve at least one of the problems existing in the prior art, such as poor heat dissipation of electronic components in small electronic devices, overheating of electronic components leading to damage of electronic components, and reduced service life of electronic devices.

[0005] The purpose of the present invention is mainly achieved through the following technical solutions:

[0006] The present invention discloses a small electronic device in a sealed environment, comprising:

[0007] Electronic equipment housings, circuit boards, and multiple electronic components;

[0008] The circuit board is arranged inside the housing of the electronic device, the number of the electronic components is ≥5, and the center distance between the electronic components is ≥a min , the electronic component layout meets the optimal layout solution:

[0009] The optimal layout solution refers to the sum of all electronic components Φ×R ∑(Φ i ×R i ) is less than the sum of all electronic components Φ×R∑(Φ i ×R i ) layout plan;

[0010] Among them, i is the serial number of the electronic component, Φ i is the steady-state heat flow between the ith electronic component and the electronic device housing, R i is the thermal resistance between the ith electronic component and the housing of the electronic device.

[0011] Preferably, the optimal layout of electronic components satisfies:

[0012] Four electronic components selected from all electronic components are placed in pairs at the four sides of the electronic device housing, and the four electronic components meet the following requirements:

[0013] When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level;

[0014] When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level;

[0015] The first quadrilateral is constructed with the four selected electronic components as vertices. Except for the above four electronic components, all electronic components are given a sequence number S in descending order according to their power consumption. i ; For electronic components with the same power consumption, a random one-to-one corresponding sequence number is given, which satisfies: the sequence number of the electronic component with higher power consumption < the sequence number of the electronic component with the same power consumption < the sequence number of the electronic component with lower power consumption;

[0016] Except for the above four electronic components, all other electronic components are numbered according to the sequence S. i The four vertices of the first quadrilateral are gradually dispersed and arranged on each side of the first quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy:

[0017] o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the first quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the first quadrilateral;

[0018] And, satisfying:

[0019] When the perimeter of the first quadrilateral cannot simultaneously meet the minimum spacing requirement of the dispersed layout of all electronic components, it is necessary to construct a second quadrilateral, ..., an Nth quadrilateral inside the first quadrilateral;

[0020] Satisfies: The Nth quadrilateral is the interior quadrilateral of the N-1th quadrilateral, and the minimum distance between the side lengths of the Nth quadrilateral and the N-1th quadrilateral is ≥ a min ;

[0021] After the first quadrilateral is laid out, the remaining electronic components are laid out in the second quadrilateral, ..., Nth quadrilateral in ascending order of serial number. For the layout of the Mth quadrilateral among the second quadrilateral, ..., Nth quadrilateral, the following conditions are satisfied:

[0022] After the M-1th quadrilateral layout, the remaining electronic components are numbered S according to the sequence i The four vertices of the Mth quadrilateral are gradually dispersed and arranged on each side of the Mth quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy:

[0023] o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the Mth quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the Mth quadrilateral.

[0024] Preferably, R i satisfy:

[0025] R i =(C l i1 l i2 l i3 l i4 ) / (l i1 l i2 l i3 +l i1 l i2 l i4 +l i2 l i3 l i4 +l i1 l i3 l i4 );

[0026] Among them, l i1 , l i2 , l i3 , l i4 They are the distances between the four sides of the electronic components and the electronic equipment casing, and С is a constant.

[0027] Preferably, a min ≥5mm.

[0028] Preferably, the circuit board is provided with a conductive layer and an insulating layer which are stacked, the conductive layer and the insulating layer are provided with multiple layers, and a heat conducting layer is provided between two insulating layers in the middle of the circuit board.

[0029] Preferably, the circuit board is provided with a through hole.

[0030] Preferably, through holes are provided between the electronic components.

[0031] An internal thermal control method for a small electronic device in a sealed environment, used for designing a small electronic device in a sealed environment as described above, comprising:

[0032] Improve heat dissipation in the vertical layout plane based on the circuit board with high thermal conductivity layer in the electronic equipment;

[0033] Based on the steady-state heat flow Φ between the electronic components in the electronic device and the electronic device housing and the thermal resistance R between the electronic components and the electronic device housing, the plane layout of the electronic components in the electronic device is designed to improve the heat dissipation in the layout plane.

[0034] Preferably, it includes:

[0035] S1. Preliminarily arrange the layout of each electronic component based on the power consumption of each electronic component;

[0036] S2. Further adjust the positions of the electronic components after the preliminary layout setting so that the sum of Φ×R of all electronic components ∑(Φ i ×R i ) is further reduced to obtain a solution with better overall heat dissipation effect.

[0037] Preferably, it includes:

[0038] S211: adjusting the position of each electronic component based on Φ×R of each electronic component;

[0039] S212: The ∑(Φ i ×R i ) and before adjustment∑(Φ i ×R i ) to compare the position before and after adjustment∑(Φ i ×R i )The difference ends when it is less than a specific value e.

[0040] A thermal control design method for a small electronic device in a sealed environment, used for the design of the above electronic device, comprising:

[0041] Circuit boards based on high thermal conductivity layers in electronic devices improve heat dissipation in the vertical layout plane;

[0042] Based on the steady-state heat flow Φ between the electronic components in the electronic device and the electronic device housing and the thermal resistance R between the electronic components and the electronic device housing, the plane layout of the electronic components in the electronic device is designed to improve the heat dissipation in the layout plane.

[0043] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0044] (1) The present invention achieves the minimum average surface temperature of all electronic components and obtains the best heat dissipation effect by arranging them according to a layout scheme in which the sum of Φ×R of all electronic components is minimized;

[0045] (2) The present invention is carried out by R i A model of the relationship between the surface temperature of electronic components and their positions was constructed, and a layout scheme was set up with the minimum sum of Φ×R of all electronic components, so that the average surface temperature of all electronic components was minimized and the optimal heat dissipation effect was obtained;

[0046] (3) The present invention provides a sequence of electronic component numbers in descending order according to power consumption, determines the displacement sequence and step length of the electronic components, and determines the sum of Φ×R (temperature) of each electronic component after adjustment, thereby automatically adjusting the spacing between each electronic component and the electronic device housing, and obtaining a layout scheme with the minimum sum of Φ×R (temperature) of all electronic components. Compared with the prior art scheme that relies on experience to determine the layout position of electronic components, the present invention realizes automatic operation and calculation, and at the same time greatly improves the positioning accuracy of each electronic component in the final layout scheme with the lowest temperature;

[0047] (4) The present invention preliminarily arranges the layout of each electronic component. On the one hand, the electronic component with high power consumption is placed close to the connection between the two sides of the electronic device housing, so that the thermal resistance of the electronic component is reasonably set according to the power consumption of the electronic component, which helps to evenly dissipate heat of each electronic device. On the other hand, the preliminary arrangement of the layout of each electronic component helps to reduce the amount of calculation required for further adjustment of the position of each electronic component, and obtain the layout plan with the most adequate heat dissipation of each electronic component, thereby improving the execution efficiency.

[0048] (5) The present invention gives priority to processing electronic components with larger power consumption, which is beneficial for the electronic components with larger power consumption to obtain lower thermal resistance, which is beneficial for improving the operation speed and quickly realizing the adjustment of electronic components; in addition, giving priority to processing electronic components with larger power consumption helps to avoid the situation where electronic components with smaller power consumption preferentially occupy the area with lower thermal resistance, and obtain ∑(Φ i ×R i )The smallest layout solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The drawings are only for the purpose of illustrating specific embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like components throughout the drawings.

[0050] Figure 1 It is a schematic diagram of the preparation process of the present invention;

[0051] Figure 2 The positions of the electronic components before adjustment in Example 1 of the present invention;

[0052] Figure 3The simulation analysis results of Example 1 of the present invention are as follows;

[0053] Figure 4 The positions of the electronic components before adjustment in Example 2 of the present invention;

[0054] Figure 5 The simulation analysis results of Example 2 of the present invention are shown below;

[0055] Figure 6 This is the simulation analysis result of comparative example 1 of the present invention;

[0056] Figure 7 It is a schematic diagram of determining the distances between the electronic component and the four sides of the electronic device housing after the first displacement based on the center coordinates (x1, y1) and the size of the electronic component in the present invention;

[0057] Figure 8 It is a schematic diagram of a transverse cross section of a circuit board of the present invention;

[0058] Fig. 9 A schematic diagram of through-hole arrangement in a circuit board of the present invention;

[0059] Fig.10 The simulation analysis results of comparative example 2 of the present invention are shown below;

[0060] Fig.11 This is the simulation analysis result of comparative example 3 of the present invention.

[0061] Reference numerals

[0062] Circuit board 1; conductive layer 101; insulating layer 102; thermal conductive layer 103; through hole 104;

[0063] Electronic components 2. DETAILED DESCRIPTION

[0064] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0065] The present invention discloses a small electronic device in a sealed environment, comprising:

[0066] Electronic equipment housings, circuit boards, and multiple electronic components;

[0067] The circuit board is set inside the housing of the electronic equipment, the number of electronic components is ≥5, and the center distance between the electronic components is ≥a min , the electronic component layout satisfies the optimal layout solution: the sum of all electronic components Φ×R in the optimal layout solution∑(Φ i ×R i) is less than the sum of all electronic components Φ×R∑(Φ i ×R i ).

[0068] It should be noted that the heat transfer formula between electronic components and electronic equipment housing can be obtained from Fourier's law:

[0069] Φ i =(t i -t2) / R i , where t i is the steady-state temperature of the i-th electronic component, t2 is the steady-state temperature of the electronic device housing, where i is the electronic component number, Φ i is the steady-state heat flow between the ith electronic component and the electronic device housing, R i is the thermal resistance between the ith electronic component and the housing of the electronic device.

[0070] Furthermore, since electronic equipment shells are often made of metal shells, their thermal conductivity is relatively high, for example, aluminum alloy can reach 237W / mk. In small electronic equipment, the steady-state temperature gradient of the electronic equipment shell is small, and the temperature of the metal shell can be approximated to be uniform. From the heat transfer formula, it can be seen that for a single electronic component, the steady-state temperature t i =Φ i ×R i +t2, where t2 is the metal shell temperature; for all electronic components inside the electronic device, when t2 is simplified to average temperature, t2 is only affected by the total heat generated by the electronic components, the total thermal resistance and the total heat loss on the device surface. Changes in the plane layout of the electronic components will hardly affect t2. The average steady-state temperature of the electronic components t - =[∑(Φ i ×R i )] / n+t2,t - Only affected by ∑(Φ i ×R i ) influence: When ∑(Φ i ×R i ) decreases, the average steady-state temperature t - Reduced, that is, the total heat generated by all electronic components is reduced, improving the overall heat dissipation effect of electronic components inside electronic equipment.

[0071] It should be noted that the steady-state temperature refers to the temperature at which the internal heat generation and surface heat dissipation of electronic components and small electronic devices reach normal temperature; similar to the definition of t2, the steady-state temperature t i It is also the result of simplifying the steady-state temperature of each surface of the electronic component to a uniform temperature.

[0072] Specifically, Φ is a parameter related to the heat generated by electronic components. When the temperature of the electronic components does not change in steady state, the heat generated by the electronic components is equal to the steady-state heat flow Φ; the heat generated by the electronic components Q = I 2 R can be obtained by looking up the electronic component parameter table, where I is the current passing through the electronic component and R is the thermal resistance of the electronic component.

[0073] Specifically, Figure 1 As shown, for the i-th electronic component, R i The thermal resistance R of the electronic components to the four sides of the electronic equipment housing i1 , R i2 , R i3 , R i4 Parallel connection; the thermal resistance of the electronic component to the four sides of the electronic device housing is proportional to the distance l between the center of the electronic component and the four sides of the electronic device housing i1 , l i2 , l i3 , l i4 Positively correlated, R i1 It can be approximated as С×l i1 , R i2 It can be approximated as С×l i2 , R i3 It can be approximated as С×l i3 , R i4 It can be approximated as С×l i4 , С is a constant, R i satisfy:

[0074] R i =(C l i1 l i2 l i3 l i4 ) / (l i1 l i2 l i3 +l i1 l i2 l i4 +l i2 l i3 l i4 +l i1 l i3 l i4 ).

[0075] Based on the above formula, adjust the plane position of the electronic component, that is, the distance l between the electronic component and the four sides of the electronic device housing. i1 , l i2 , l i3 , l i4 , we can get the thermal resistance R of the i-th electronic component i , combined with Φ iObtain the Φ of each electronic component i ×R i , further calculate the Φ of the i-th electronic component i ×R i , and then obtain the sum of Φ×R of the electronic components ∑(Φ i ×R i ).

[0076] Compared with the prior art, the present invention achieves the minimum average surface temperature of all electronic components and obtains the best heat dissipation effect by arranging them according to a layout scheme in which the sum of Φ×R of all electronic components is minimized.

[0077] Preferably, the optimal layout solution has a sum of all electronic components Φ×R ∑(Φ i ×R i ) and the sum of all electronic components Φ×R ∑(Φ i ×R i )≥0.05×MIN[∑(Φ i ×R i )], MIN[] means taking the minimum value, MIN[∑(Φ i ×R i )] is the sum of all electronic components Φ×R ∑(Φ i ×R i ) is the minimum value of .

[0078] Specifically, a min ≥5mm.

[0079] Compared with the prior art, the present invention adopts R i A model of the relationship between the surface temperature of electronic components and their positions was constructed, and a layout scheme was set up with the minimum sum of Φ×R of all electronic components to minimize the average surface temperature of all electronic components and obtain the best heat dissipation effect.

[0080] Specifically, the optimal layout of electronic components meets the following requirements:

[0081] Four electronic components selected from all electronic components are placed in pairs at the four sides of the electronic device housing, and the four electronic components meet the following requirements:

[0082] When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level;

[0083] When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level;

[0084] The first quadrilateral is constructed with the four selected electronic components as vertices. Except for the above four electronic components, all electronic components are given a sequence number S in descending order according to their power consumption. i ; For electronic components with the same power consumption, a random one-to-one corresponding sequence number is given, which satisfies: the sequence number of the electronic component with higher power consumption < the sequence number of the electronic component with the same power consumption < the sequence number of the electronic component with lower power consumption;

[0085] Except for the above four electronic components, all other electronic components are numbered according to the sequence S. i The four vertices of the first quadrilateral are gradually dispersed and arranged on each side of the first quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy:

[0086] o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the first quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the first quadrilateral;

[0087] And, satisfying:

[0088] When the perimeter of the first quadrilateral cannot simultaneously meet the minimum spacing requirement of the dispersed layout of all electronic components, it is necessary to construct a second quadrilateral, ..., an Nth quadrilateral inside the first quadrilateral;

[0089] Satisfies: The Nth quadrilateral is the interior quadrilateral of the N-1th quadrilateral, and the minimum distance between the side lengths of the Nth quadrilateral and the N-1th quadrilateral is ≥ a min ;

[0090] After the first quadrilateral is laid out, the remaining electronic components are laid out in the second quadrilateral, ..., Nth quadrilateral in ascending order of serial number. For the layout of the Mth quadrilateral among the second quadrilateral, ..., Nth quadrilateral, the following conditions are satisfied:

[0091] After the M-1th quadrilateral layout, the remaining electronic components are numbered S according to the sequence i The four vertices of the Mth quadrilateral are gradually dispersed and arranged on each side of the Mth quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy:

[0092] o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the Mth quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the Mth quadrilateral.

[0093] Specifically, the optimal layout solution of electronic components is obtained by the following method:

[0094] S1. Preliminarily arrange the layout of each electronic component based on the power consumption of each electronic component;

[0095] S2. Further adjust the positions of the electronic components after the preliminary layout setting so that the sum of Φ×R of all electronic components ∑(Φ i ×R i ) is further reduced to obtain a solution with better overall heat dissipation effect.

[0096] Specifically, S1 includes:

[0097] S101: Four electronic components are selected from all electronic components and placed in pairs at the four sides of the electronic device housing. The four electronic components meet the following requirements:

[0098] When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level;

[0099] When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level;

[0100] S102: The remaining electronic components are dispersedly arranged inside the housing of the electronic device.

[0101] It is understandable that the outer shell of electronic devices is often designed as a cuboid for ease of transportation and use. It should be noted that in the layout plane of electronic components, the thermal resistance gradually increases and the heat dissipation efficiency gradually decreases from the connection between the four sides to the center of the electronic device; on the one hand, electronic components with high power consumption are placed close to the side connection of the electronic device, which realizes the reasonable setting of the thermal resistance of the electronic components according to the power consumption of the electronic components, which helps to evenly dissipate heat in various electronic devices; on the other hand, by preliminarily setting the layout of each electronic component, it helps to reduce the amount of calculation required for further adjustment of the position of each electronic component, obtain the layout plan with the most adequate heat dissipation of each electronic component, and improve the execution efficiency.

[0102] Specifically, the distance between the electronic component and the housing of the electronic device is ≥1mm; to avoid mutual interference in heat dissipation between the electronic components, the center distance a between the electronic components is ≥5mm.

[0103] In a feasible implementation, the positions of the electronic components that have completed the preliminary layout setting are further adjusted using a genetic algorithm program in Matlab, including:

[0104] l i1 +l i2 = side length of electronic equipment housing;

[0105] l i3 +l i4 =The length of the other side of the electronic equipment housing;

[0106] l i1 ≠l y1 or i3 ≠l y3 ;

[0107] The thermal resistance R between the ith electronic component and the electronic device housing i =(C l i1 l i2 l i3 l i4 ) / (l i1 l i2 l i3 +l i1 l i2 l i4 +l i2 l i3 l i4 +l i1 l i3 l i4 );

[0108] Φ i is the steady-state heat flow between the ith electronic component and the electronic device housing;

[0109] MIN∑(Φ i ×R i ) is the objective function;

[0110] Set the position of each electronic component before and after adjustment∑(Φ i ×R i ) is less than a certain value as a convergence condition.

[0111] Preferably, the specific value of the convergence condition is 0.05 to 0.2 times MIN[∑(Φ i ×R i )];MIN[∑(Φ i ×R i )] is the sum of all electronic components Φ×R ∑(Φ i ×R i ) is the minimum value of .

[0112] Preferably, the search variable is set to 0-184 mm, and the search step is set to 2 mm-5 mm.

[0113] When implementing, select the genetic algorithm program in Matlab, input the boundary conditions and the objective function MIN∑(Φ i ×R i ), set the search variable and search step, and let the computer automatically run to obtain the optimal solution.

[0114] In another feasible implementation, a solution for S2 to obtain a better overall heat dissipation effect includes:

[0115] S211: adjusting the position of each electronic component based on Φ×R of each electronic component;

[0116] S212: The ∑(Φ i ×R i ) and before adjustment∑(Φ i ×R i ) to compare the position before and after adjustment∑(Φ i ×R i )The difference ends when it is less than a specific value e.

[0117] It should be noted that the four electronic components selected in S102 are already at the position with the lowest thermal resistance, and there is no need to further adjust their positions subsequently.

[0118] Specifically, S211 includes: adjusting all electronic components except the four electronic components screened out in S101 in order from large to small according to power consumption.

[0119] It can be understood that giving priority to electronic components with higher power consumption is conducive to obtaining lower thermal resistance for electronic components with higher power consumption, which is conducive to improving computing speed and quickly adjusting electronic components; in addition, giving priority to electronic components with higher power consumption helps to avoid the situation where electronic components with lower power consumption preferentially occupy areas with lower thermal resistance.

[0120] Specifically, S211 includes:

[0121] S2111: Filter out all electronic components except the four electronic components in S101, and give the series number S in descending order according to the power consumption. i ; For electronic components with the same power consumption, a random one-to-one corresponding sequence number is given, which satisfies: the sequence number of the electronic component with higher power consumption < the sequence number of the electronic component with the same power consumption < the sequence number of the electronic component with lower power consumption;

[0122] S2112: construct a plane rectangular coordinate system with the center of the electronic device housing as the origin, a direction parallel to one side of the electronic device housing as the x-axis, and a direction parallel to the adjacent side of the side as the y-axis;

[0123] S2113: Determine the center coordinates (x0) of the electronic component with sequence number S0 in the initial state based on the distances between the electronic component with sequence number S0 and the four sides of the electronic device housing and the size of the electronic component. 0 ,y0 0 );

[0124] S2114: Connect the electronic component with sequence number S0 to the side of the housing closest to the center of the electronic component (x min ,y min ) The displacement step length λ is positively correlated with the initial state of the electronic component Φ×R, and the center coordinates (x1 0 , y1 0 );

[0125] S2115: Refer to S2113-S2114 and number the sequence S1-S in ascending order i The electronic component is connected to the side of the housing closest to the center of the electronic component (x min ,y min ) The first displacement is positively correlated with the step length λ of the electronic component Φ×R in the initial state, and the corresponding electronic component center coordinates (x1 1 , y1 1 ),…,(x1 i , y1 i );

[0126] S2116: Based on the center coordinates of all electronic components after the first displacement and the size of the electronic components, determine the distances of the electronic components from the four sides of the electronic device housing after the first displacement, and determine the sum Φ×R of all electronic components Φ×R and ∑(Φ i ×R i );

[0127] S2117: based on the judgment result of S212, the electronic component displacement is terminated or the electronic component position after the first displacement is used as the initial position, and the output ∑(Φ i ×R i ) as the input of S212.

[0128] Compared with the prior art, the present invention provides electronic component series numbers in descending order according to power consumption, determines the displacement order and step length of the electronic components, and judges the sum of Φ×R (temperature) of each electronic component after adjustment, thereby automatically adjusting the spacing between each electronic component and the electronic device housing, and obtaining a layout scheme with the minimum sum of Φ×R (temperature) of all electronic components. Compared with the prior art scheme that relies on experience to determine the layout position of electronic components, the present invention realizes automatic operation and calculation, and at the same time greatly improves the positioning accuracy of each electronic component in the final layout scheme with the lowest temperature.

[0129] Specifically, in S2114, the electronic component is connected to the side of the housing closest to the center of the electronic component (x min ,y min) displacement, so that each electronic component Φ×R is reduced, and thus ∑(Φ i ×R i ) decreases and gradually converges.

[0130] Preferably, the electronic component displacement step length λ satisfies: λ = k × Φ × R, k is a constant, and the value range of k satisfies: 0.1‰ × the maximum side length of the electronic device housing ≤ k × (Φ × R) max ≤0.2‰×maximum side length of electronic equipment housing, where (Φ×R) max It is the maximum value of Φ×R of each electronic component on the layout plane.

[0131] It should be noted that the displacement step length λ is a parameter that is positively correlated with Φ×R, so that the electronic components with higher surface temperatures have a faster adjustment rate, which helps to converge as quickly as possible.

[0132] Specifically, in S212, e is 0.05 to 0.2 times MIN[∑(Φ i ×R i )],MIN[∑(Φ i ×R i )] is the sum of all electronic components Φ×R ∑(Φ i ×R i ) is the minimum value of .

[0133] Specifically, in S2115, the center coordinates of the electronic component corresponding to the first displacement (x1 1 , y1 1 ),…,(x1 i , y1 i ) includes the step of preventing overlapping of sequentially processed electronic components:

[0134] For sequence number S j The electronic components, j∈i, are numbered based on the sequence 0~(S i -1) After the electronic component has obtained the first displacement, the center coordinates of the electronic component are judged as follows:

[0135] Definition 0≤S j ≤S i -1,

[0136] For sequence number S j Electronic components;

[0137] If [(x1 i -x1 j ) 2 +(y1 i -y1 j ) 2 ] 0.5 <5, then output (x1 i , y1i ) as the first displacement sequence number S i The center coordinates of the electronic components;

[0138] If [(x1 i -x1 j ) 2 +(y1 i -y1 j ) 2 ] 0.5 ≥5, then output (x1' i ,y 1’ i ) as the first displacement sequence number S i The center coordinates of the electronic components; (x 1’ i ,y 1’ i ) satisfies (x1 i , y1 i )、(x0 i ,y0 i ) are collinear, and [(x 1’ i -x1 j ) 2 +(y1' i -y1 j ) 2 ] 0.5 =5;

[0139] S j Traversal sequence number 0~(S i -1), output multiple first displacements and sequential numbers S i The center coordinates of the electronic components are MIN{[(x1 i -x1 0 ) 2 +(y1 i -y1 0 ) 2 ] 0.5 ,…,[(x1 i -x1 j ) 2 +(y1 i -y1 j ) 2 ] 0.5 ,…,[(x1 i -x1 i-1 ) 2 +(y1 i -y1 i-1 ) 2 ] 0.5} corresponds to (x1 i , y1 i) as the first displacement sequence number S i The center coordinates of the electronic component, MIN{} represents the minimum value function.

[0140] It should be noted that the above criterion will [(x1 i -x1 j ) 2 +(y1 i -y1 j ) 2 ] 0.5 Compared with 5, it is because when designing electronic components, the center distance of various electronic components should meet ≥5mm, and before and after the position of electronic components is adjusted, the center distance of each electronic component should meet ≥5mm.

[0141] Preferably, when the distances between the center coordinates of the electronic component and the two side connections of two or more electronic device housings are equal before the first displacement in S2115, one of the two side connections of an electronic device housing is randomly selected as the nearest two side connections of the electronic device housing, and the moving direction is determined.

[0142] Specifically, in S2115 , displacing the electronic component by a specific step length λ to obtain the center coordinates (x1, y1) of the electronic component after the first displacement can be achieved by using the existing geometric calculation method.

[0143] Specifically, in S2116, based on the center coordinates (x1, y1) and the size of the electronic component, the distances between the electronic component and the four sides of the electronic device housing after the first displacement are determined, taking the minimum distance between the electronic component and the electronic device housing after the first displacement as an example, such as Figure 7 As shown: the coordinates of the connection between the two sides of the electronic device housing closest to the electronic component (the vertex closest to the electronic component on the layout plane) are (x', y'), the electronic component is a rectangle of length × width (a × b) on the layout plane, and the minimum distance between the electronic component and the electronic device housing is l min =|x'|-|x1|-b / 2 (when Figure 7 After the electronic component placement position is rotated 90°, b in the formula should be replaced by a); similarly, the distance between the electronic component and the other three sides of the electronic device housing can also be calculated according to the above method.

[0144] Specifically, as shown in the cross-sectional structure of the circuit board Figure 8 As shown, the circuit board 1 is provided with a conductive layer 101 and an insulating layer 102 which are stacked, the conductive layer 101 and the insulating layer 102 are provided with multiple layers, and a heat conducting layer 103 is provided between two insulating layers 102 in the middle of the circuit board 1 .

[0145] Specifically, the conductive layer 101 may be a copper foil, the insulating layer 102 may be a ST115G material, and the thermal conductive layer 103 may be an aluminum high thermal conductive layer.

[0146] During implementation, the conductive layer 101 is used for electrical connection between different electronic components, the insulating layer 102 is used for insulation between different conductive layers 101, and the thermal conductivity of the thermal conductive layer 103 is much higher than that of the insulating layer 102 and the air inside the electronic device, which is conducive to heat collection and heat transfer to the device casing.

[0147] Preferably, if Fig. 9 As shown, the circuit board 1 is provided with a through hole 104, which helps to increase the heat transfer rate in the direction perpendicular to the layout plane of the circuit board and improve the heat dissipation effect.

[0148] Preferably, there is a through hole 104.

[0149] On the other hand, the present invention discloses a thermal control design method for a small electronic device in a sealed environment, which is used for the design of the above electronic device, comprising:

[0150] Improve heat dissipation in the vertical layout plane based on the circuit board with high thermal conductivity layer in the electronic equipment;

[0151] Based on the steady-state heat flow Φ between the electronic components in the electronic device and the electronic device housing and the thermal resistance R between the electronic components and the electronic device housing, the plane layout of the electronic components in the electronic device is designed to improve the heat dissipation in the layout plane.

[0152] In order to better illustrate the present invention, the following embodiments are further provided:

[0153] Example 1

[0154] This embodiment discloses a small electronic device in a sealed environment, comprising:

[0155] Electronic equipment housings, circuit boards, and multiple electronic components;

[0156] The circuit board is set inside the electronic device housing, the number of electronic components is 5, the center distance between the electronic components is ≥5mm, and the layout of the electronic components meets the optimal layout solution: the sum of all electronic components Φ×R ∑(Φ i ×R i ) is less than the sum of all electronic components Φ×R∑(Φ i ×R i ).

[0157] The circuit board 1 is provided with a conductive layer 101 and an insulating layer 102 which are stacked. The conductive layer 101 and the insulating layer 102 are provided with four layers. A heat conducting layer 103 is provided between two insulating layers 102 in the middle of the circuit board 1 .

[0158] The conductive layer 101 is copper foil, the insulating layer 102 is ST115G material, and the thermal conductive layer 103 is an aluminum high thermal conductive layer.

[0159] There are 10 between each electronic component 2 in the circuit board 1. through hole 104.

[0160] The optimal layout of electronic components is obtained by the following method:

[0161] S1. Preliminarily arrange the layout of each electronic component based on the power consumption of each electronic component;

[0162] S101: Four electronic components are selected from all electronic components and placed in pairs at the four sides of the electronic device housing. The four electronic components meet the following requirements:

[0163] When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level;

[0164] When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level;

[0165] S102: The remaining electronic components are arranged from large to small and away from the side surfaces where they are connected in pairs according to the electronic component sorting result.

[0166] Specifically, there are 5 electronic components, 4 of which have a power consumption of 0.72W and 1 has a power consumption of 0.68W. All of them are thermal resistors, and the heating power is equal to the power consumption. The size of the electronic components is 12mm×12mm (length×width), and the size of the electronic equipment shell is 200mm×200mm (length×width);

[0167] The distance l between the center of the electronic component in the initial position and the four sides of the electronic device housing i1 , l i2 , l i3 , l i4 ,like Figure 2 As shown, it satisfies:

[0168] .

[0170] S2, using the genetic algorithm program in Matlab to further adjust the positions of the electronic components after the initial layout setting, l i1 +l i2 = side length of electronic equipment housing;

[0171] l i3 +l i4 =The length of the other side of the electronic equipment housing;

[0172] l i1 ≠l y1 or i3 ≠l y3 ;

[0173] The thermal resistance R between the ith electronic component and the electronic device housing i =(C l i1 l i2 l i3 l i4 ) / (l i1 l i2 l i3 +l i1 l i2 l i4 +l i2 l i3 l i4 +l i1 l i3 l i4 );

[0174] Φ i is the steady-state heat flow between the ith electronic component and the electronic device housing;

[0175] MIN∑(Φ i ×R i ) is the objective function;

[0176] Set the position of each electronic component before and after adjustment∑(Φ i ×R i ) is less than a certain value as a convergence condition.

[0177] The specific value of the convergence condition is 0.1 times MIN[∑(Φ i ×R i )].

[0178] The search variable is set to 0-184 mm, and the search step is set to 5 mm.

[0179] Select the genetic algorithm program in Matlab, enter the boundary conditions and objective function MIN∑(Φ i ×R i ), set the search variable and search step, and let the computer automatically run to obtain the optimal solution.

[0180] The distance l between the center of the electronic component and the four sides of the electronic device housing after searching i1 , l i2 , l i3 , l i4 ,satisfy:

[0181]

[0182] ANSYS is used for simulation. The surface temperature results of electronic components in electronic equipment after simulation are shown in the following table:

[0183]

[0184] The simulation results are as follows Figure 3 As shown, the red area is smaller.

[0185] Example 2

[0186] This embodiment discloses a small electronic device in a sealed environment, comprising:

[0187] Electronic equipment housings, circuit boards, and multiple electronic components;

[0188] The circuit board is set inside the electronic device housing, the number of electronic components is 5, the center distance between the electronic components is ≥5mm, and the layout of the electronic components meets the optimal layout solution: the sum of all electronic components Φ×R ∑(Φ i ×R i ) is less than the sum of all electronic components Φ×R∑(Φ i ×R i ).

[0189] The circuit board 1 is provided with a conductive layer 101 and an insulating layer 102 which are stacked. The conductive layer 101 and the insulating layer 102 are provided with four layers. A heat conducting layer 103 is provided between two insulating layers 102 in the middle of the circuit board 1 .

[0190] The conductive layer 101 is copper foil, the insulating layer 102 is ST115G material, and the thermal conductive layer 103 is an aluminum high thermal conductive layer.

[0191] There is a circuit board 1 between each electronic component 2. through hole 104.

[0192] The optimal layout of electronic components is obtained by the following method:

[0193] S1. Preliminarily arrange the layout of each electronic component based on the power consumption of each electronic component;

[0194] S101: Four electronic components are selected from all electronic components and placed in pairs at the four sides of the electronic device housing. The four electronic components meet the following requirements:

[0195] When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level;

[0196] When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level;

[0197] S102: The remaining electronic components are dispersedly arranged inside the housing of the electronic device.

[0198] Specifically, there are 5 electronic components, 4 of which have a power consumption of 0.72W and 1 has a power consumption of 0.68W. All of them are thermal resistors, and the heating power is equal to the power consumption. The size of the electronic components is 12mm×12mm (length×width), and the size of the electronic equipment shell is 200mm×200mm (length×width);

[0199] The distance between the center of the electronic component and the four sides of the electronic equipment housing. i1 , l i2 , l i3 , l i4 ,satisfy:

[0200]

[0201] The initial layout of each electronic component is as follows Figure 4 shown.

[0202] S2, further adjust the positions of the electronic components after the preliminary layout setting, so that all electronic components Φ i ×R i The sum is reduced in one step to obtain a solution with better overall heat dissipation effect.

[0203] S211: adjusting the position of each electronic component based on Φ×R of each electronic component;

[0204] S2111: Filter out all electronic components except the four electronic components in S101, and give the series number S in descending order according to the power consumption. i ; For electronic components with the same power consumption, a random one-to-one corresponding sequence number is given, which satisfies: the sequence number of the electronic component with higher power consumption < the sequence number of the electronic component with the same power consumption < the sequence number of the electronic component with lower power consumption;

[0205] S2112: construct a plane rectangular coordinate system with the center of the electronic device housing as the origin, a direction parallel to one side of the electronic device housing as the x-axis, and a direction parallel to the adjacent side of the side as the y-axis;

[0206] S2113: Determine the center coordinates (x0) of the electronic component with sequence number S0 in the initial state based on the distances between the electronic component with sequence number S0 and the four sides of the electronic device housing and the size of the electronic component. 0 ,y0 0 );

[0207] S2114: Connect the electronic component with sequence number S0 to the side of the housing closest to the center of the electronic component (x min ,y min ) The displacement is positively correlated with the initial state of the electronic component Φ×R, step length λ, λ = 0.1‰×200mm; obtain the center coordinates of the electronic component numbered S0 after the first displacement of the electronic component (x10 , y1 0 );

[0208] S2115: Refer to S2113-S2114 and number the sequence S1-S in ascending order i The electronic component is connected to the side of the housing closest to the center of the electronic component (x min ,y min ) The first displacement is positively correlated with the initial state of the electronic component Φ×R, step length λ, λ = 0.1‰×200mm; the corresponding electronic component center coordinates (x1 1 , y1 1 ),…,(x1 i , y1 i ); before the first displacement, when the distances between the center coordinates of the electronic component and the two side connections of two or more electronic equipment housings are equal, randomly select one of the two side connections of an electronic equipment housing as the closest two side connections of the electronic equipment housing, and determine the moving direction;

[0209] S2116: Based on the center coordinates of all electronic components after the first displacement and the size of the electronic components, determine the distances of the electronic components from the four sides of the electronic device housing after the first displacement, and determine the sum Φ×R of all electronic components Φ×R and ∑(Φ i ×R i );

[0210] S2117: based on the judgment result of S212, the electronic component displacement is terminated or the electronic component position after the first displacement is used as the initial position, and the output ∑(Φ i ×R i ) as the input of S212.

[0211] S212: The ∑(Φ i ×R i ) and before adjustment∑(Φ i ×R i ) to compare the position before and after adjustment∑(Φ i ×R i )The difference is less than 0.1 times MIN[∑(Φ i ×R i )]Finish.

[0212] Obtain the optimal layout of electronic components to meet:

[0213]

[0214] ANSYS is used for simulation. The surface temperature results of electronic components in electronic equipment after simulation are shown in the following table:

[0215]

[0216] The simulation results are as follows Figure 5 As shown, the red area is smaller, and the original electronic component position input in Example 2 is different from that in Example 1, but the final output layout scheme is the same. Both methods can achieve adaptive adjustment of electronic components.

[0217] Comparative Example 1

[0218] This comparative example discloses a small electronic device in a sealed environment, which is different from Example 1 or 2 in that: there are 5 electronic components, all of which are thermal resistors, and the heating power is equal to the power consumption, of which 4 have a power consumption of 0.72W and 1 has a power consumption of 0.68W. The size of the electronic components is 12mm×12mm (length×width), and the size of the electronic device shell is 200mm×200mm (length×width);

[0219] The initial positions of the electronic components are the same as those in Example 2. The position of the component a5 has not been optimized by S2. The positions of the components are the final positions.

[0220] ANSYS is used for simulation. The surface temperature results of electronic components in electronic equipment after simulation are shown in the following table:

[0221]

[0222] The simulation results are as follows Figure 6 As shown: the red area is larger, and the average surface temperature is significantly greater than that of Example 1 and Example 2.

[0223] Comparative Example 2

[0224] This comparative example discloses a small electronic device in a sealed environment, which is different from Example 2 in that: the circuit board is not provided with a heat conducting layer 103;

[0225] The initial position of each electronic component and the position after S2 adjustment are the same as those in Example 2.

[0226] ANSYS is used for simulation. The surface temperature results of electronic components in electronic equipment after simulation are shown in the following table:

[0227]

[0228] The average surface temperature is significantly greater than that of Example 1 and Example 2.

[0229] like Fig.10 As shown, compared with the simulation analysis data of Example 2, the area of ​​the high temperature zone is significantly increased.

[0230] Comparative Example 3

[0231] This comparative example discloses a small electronic device in a sealed environment, which is different from Example 2 in that: the circuit board is not provided with a through hole 104;

[0232] The initial position of each electronic component and the position after S2 adjustment are the same as those in Example 2.

[0233] ANSYS is used for simulation. The surface temperature results of electronic components in electronic equipment after simulation are shown in the following table:

[0234]

[0235] It can be seen from the above table that the average surface temperature is significantly greater than that of Example 1 and Example 2.

[0236] like Fig.11 As shown, compared with the simulation analysis data of Example 2, the surface temperature of the electronic component increases significantly.

[0237] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A small electronic device in a sealed environment, characterized in that: include: Electronic equipment housings, circuit boards, and multiple electronic components; The circuit board is arranged inside the housing of the electronic device, the number of the electronic components is ≥5, and the center distance between the electronic components is ≥a min , the layout of electronic components meets the optimal layout plan; The optimal layout solution refers to the sum of all electronic components Φ×R ∑(Φ i ×R i ) is less than the sum of all electronic components Φ×R∑(Φ i ×R i ) layout plan; Among them, i is the serial number of the electronic component, Φ i is the steady-state heat flow between the ith electronic component and the electronic device housing, R i is the thermal resistance between the ith electronic component and the housing of the electronic device.

2. The small electronic device in a sealed environment according to claim 1, characterized in that: The optimal layout solution of electronic components meets the following requirements: Four electronic components selected from all electronic components are placed in pairs at the four side surfaces of the electronic device housing, and the four electronic components meet the following requirements: When the number of electronic components with the highest power consumption level is ≥ 4, four electronic components are electronic components with the highest power consumption level; When the number of electronic components at the highest power consumption level is less than 4, the four electronic components include both electronic components at the highest power consumption level and electronic components at the second highest power consumption level; The first quadrilateral is constructed with the four selected electronic components as vertices. Except for the above four electronic components, all electronic components are given a sequence number S in descending order according to their power consumption. i ; For electronic components with the same power consumption, a random one-to-one corresponding sequence number is given, which satisfies: the sequence number of the electronic component with higher power consumption < the sequence number of the electronic component with the same power consumption < the sequence number of the electronic component with lower power consumption; Except for the above four electronic components, all other electronic components are numbered according to the sequence S. i The four vertices of the first quadrilateral are gradually dispersed and arranged on each side of the first quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy: o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the first quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the first quadrilateral; And, satisfy: When the perimeter of the first quadrilateral cannot simultaneously meet the minimum spacing requirement of the dispersed layout of all electronic components, it is necessary to construct a second quadrilateral, ..., an Nth quadrilateral inside the first quadrilateral; Satisfies: The Nth quadrilateral is the interior quadrilateral of the N-1th quadrilateral, and the minimum distance between the side lengths of the Nth quadrilateral and the N-1th quadrilateral is ≥ a min ; After the first quadrilateral is laid out, the remaining electronic components are laid out in the second quadrilateral, ..., Nth quadrilateral in ascending order of serial number. For the layout of the Mth quadrilateral among the second quadrilateral, ..., Nth quadrilateral, the following conditions are satisfied: After the M-1th quadrilateral layout, the remaining electronic components are numbered S according to the sequence i The four vertices of the Mth quadrilateral are gradually dispersed and arranged on each side of the Mth quadrilateral from small to large, and the minimum distance between the centers of any two electronic components is ≥ a min ; and, satisfy: o∈(0,i), sequence number S o-1 The closest distance between the electronic component and the vertex of the Mth quadrilateral is ≤ the sequence number S o The electronic component is closest to the vertex of the Mth quadrilateral.

3. The small electronic device in a sealed environment according to claim 2, characterized in that: R i satisfy: R i =(C l i1 L i2 L i3 L i4 ) / (L i1 L i2 L i3 +l i1 L i2 L i4 +l i2 L i3 L i4 +l i1 L i3 L i4 ); Among them, l i1 , l i2 , l i3 , l i4 They are the distances between the four sides of the electronic components and the electronic equipment casing, and С is a constant.

4. The small electronic device in a sealed environment according to claim 3, characterized in that: a min ≥5mm。 5. The small electronic device in a sealed environment according to claim 4, characterized in that: The circuit board is provided with a conductive layer and an insulating layer which are stacked, the conductive layer and the insulating layer are provided with multiple layers, and a heat conducting layer is provided between two insulating layers in the middle of the circuit board.

6. The small electronic device in a sealed environment according to claim 5, characterized in that: The circuit board is provided with a through hole.

7. The small electronic device in a sealed environment according to claim 6, characterized in that: Through holes are arranged between the electronic components.

8. A method for internal thermal control of a small electronic device in a sealed environment, characterized in that: The design of a small electronic device in a sealed environment for use in the electronic device described in any one of claims 1 to 7 comprises: Improve heat dissipation in the vertical layout plane based on the circuit board with high thermal conductivity layer in the electronic equipment; Based on the steady-state heat flow Φ between the electronic components in the electronic device and the electronic device housing and the thermal resistance R between the electronic components and the electronic device housing, the plane layout of the electronic components in the electronic device is designed to improve the heat dissipation in the layout plane.

9. The internal thermal control method of a small electronic device in a sealed environment according to claim 8, characterized in that: include: S1. Preliminary layout arrangement of each electronic component based on the power consumption of each electronic component; S2. Further adjust the positions of the electronic components after the preliminary layout setting so that the sum of Φ×R of all electronic components ∑(Φ i ×R i ) is further reduced to obtain a solution with better overall heat dissipation effect.

10. The internal thermal control method of a small electronic device in a sealed environment according to claim 9, characterized in that: include: S211: adjusting the position of each electronic component based on Φ×R of each electronic component; S212: The ∑(Φ i ×R i ) and before adjustment∑(Φ i ×R i ) to compare the position before and after adjustment∑(Φ i ×R i )The difference ends when it is less than a specific value e.

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