Memory module and electronic equipment

Abstract

The embodiment of the invention discloses a memory module and electronic equipment. The memory module comprises a first PCB substrate, memory devices are arranged on two side plate surfaces of the first PCB substrate, and the first PCB substrate is packaged to form a packaging body; the packaging body comprises a welding surface and a heat conduction surface, the welding surface comprises a first pin arrangement area and a first heat conduction area, the first pin arrangement area comprises a plurality of first pins arranged at intervals, and the first pins are electrically connected with the first PCB substrate; the first heat conduction area is covered with a first metal layer, the heat conduction face is covered with a second metal layer, the side wall of the packaging body is covered with a third metal layer, and the third metal layer is connected with the first metal layer and the second metal layer. By means of the arrangement, a low-thermal-resistance heat conduction path can be constructed and formed according to heating of devices in the memory module, and the system heat exporting efficiency of the memory module is effectively improved. Meanwhile, interconnection between the two layers of memory devices is achieved based on the first PCB substrate, the high integration level is achieved, and high-density layout and good heat dissipation performance can be reasonably considered.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of memory architecture technology, and more particularly to a memory module and an electronic device. Background Art

[0002] Traditional DDR (Double Data Rate SDRAM, double-rate synchronous dynamic random access memory) / DRAM (Dynamic Random Access Memory, dynamic random access memory) particles are mostly assembled on the motherboard in the form of memory sticks, or directly soldered onto the board in the form of on-board particles. Among them, memory sticks usually use adapted memory stick sockets to achieve assembly positioning, which cannot be applied to scenarios with height restrictions; among them, the method of directly mounting DDR / DRAM particles on the board has a limited number of particle layouts within the board width, and the disassembly and assembly operability is low, which directly affects product reliability.

[0003] In order to improve capacity density, SIP (System In Package) has evolved from traditional 2D packaging to 3D packaging to meet the functional needs of high-density interconnection scenarios and have good assembly processability. SIP stacked memory modules (such as but not limited to main chips, DDR / DRAM particles, etc.) installed on PCB (Printed Circuit Board) will generate heat when working. In order to ensure the normal operation of circuits and devices, heat dissipation of heat-generating devices is required. With the increase of power consumption of SIP stacked modules on PCB (including main chips and their surrounding power devices, etc.) and PCB, the heat dissipation effect of the inner layer of the module and the bottom circuit system has become a bottleneck for the high-density development of memory modules. Summary of the invention

[0004] The embodiments of the present application provide a memory module and an electronic device, which optimize the memory module architecture to achieve both high-density layout and good heat dissipation performance.

[0005] A first aspect of an embodiment of the present application provides a memory module, which includes a first PCB substrate and a plurality of memory devices; the first PCB substrate includes a first board surface and a second board surface that are separated from each other, memory devices are arranged on the first board surface and the second board surface, and are packaged to form a package body; the package body includes a welding surface and a heat-conducting surface, the welding surface is located on the side where the bottom memory device of the package body is located, and the heat-conducting surface is located on the side where the top memory device of the package body is located; here, the welding surface includes a first pin arrangement area and a first heat-conducting area, and its first pin arrangement area includes a plurality of first pins arranged at intervals, the first pins are electrically connected to the first PCB substrate through an electrical connection portion, and the first pins are used to be electrically connected to an external circuit, and are external pins; its first heat-conducting area is covered with a first metal layer, the heat-conducting surface is covered with a second metal layer, and the side walls of the package body are covered with a third metal layer, and the third metal layer is respectively connected to the first metal layer and the second metal layer. With such a configuration, a heat conduction path can be constructed for the heat generated by the device inside the memory module. The metal layer of the first heat conduction area of ​​the bottom welding surface is connected to the side wall metal layer, and the heat conducted to the bottom of the memory module can be conducted to the top heat conduction surface through the side wall metal layer. Compared with the method of transferring heat from the bottom of the structure to the top in the vertical direction, the embodiment of the present application constructs a heat conduction path with lower thermal resistance, which can quickly export the larger heat generated at the bottom of the module, and effectively improve the system heat export efficiency of the memory module. In this way, by improving the heat dissipation capacity of the memory module itself, efficient heat dissipation of the memory device is achieved, providing technical guarantee for meeting the needs of high-density layout scenarios.

[0006] At the same time, the first PCB substrate is used to realize the interconnection between the two layers of memory devices on the first board surface and the second board surface. On the basis of obtaining good heat dissipation capability, it has a high degree of integration and meets the trend design requirements of high-density stacking of modules.

[0007] In addition, the packaging filler can completely fill the arrangement spacing or gaps between the particles and between them and the PCB substrate. On the one hand, the PCB substrate can be coupled with components such as memory devices, so that the heat generated by the internal devices can be evenly transferred to the metal layer, effectively avoiding the influence of air gaps on the heat dissipation efficiency of the system; on the other hand, the packaging filler can wrap the memory devices to reduce the adverse effects of external dust and impurities on the performance of the particles.

[0008] In practical applications, the first metal layer and the second metal layer may be coated on the corresponding surface along the width, or may be partially not configured with the heat-conducting metal layer, for example but not limited to partially hollowed out.

[0009] Based on the first aspect, the embodiment of the present application further provides a first implementation of the first aspect: the two opposite side walls of the package are respectively covered with a third metal layer. In this way, from the first metal layer on the welding surface side to the second metal layer on the heat conducting surface side, two heat transfer paths can be constructed based on the third metal layers on both sides. The heat generated by the memory module can be transferred to the heat conducting surface through the two heat transfer paths, which can further improve the heat extraction efficiency of the system.

[0010] In practical applications, the third metal layer can be arranged in the entire width of the side wall to improve the heat conduction capability.

[0011] Based on the first implementation of the first aspect, the embodiment of the present application further provides a second implementation of the first aspect: the first pin arrangement area around the first pin is covered with a solder resist layer, so as to ensure the stability and reliability of the connectivity performance of each first pin.

[0012] Exemplarily, the first pin may be a solder ball, for example but not limited to, formed by a ball planting process; or, the first pin may also be a pad, for example but not limited to, formed by a metallization pattern process.

[0013] Based on the first aspect, or the first implementation of the first aspect, or the second implementation of the first aspect, the embodiment of the present application also provides a third implementation of the first aspect: the memory module also includes a second PCB substrate, and a memory device is also arranged on the second PCB substrate; the first PCB substrate is used as a carrier board to form a basic package, and the second PCB substrate is stacked and arranged on the basic package, and interconnected with the first PCB substrate to form a package. With such a configuration, the high-density layout of the memory can be further improved.

[0014] Based on the third implementation of the first aspect, the embodiment of the present application also provides a fourth implementation of the first aspect: the second PCB substrate includes a first board surface and a second board surface that are opposite to each other, the memory device is arranged on the second board surface of the second PCB substrate, and the first board surface of the second PCB substrate is arranged opposite to the basic package; accordingly, the surface of the basic package opposite to the second PCB substrate includes a second pin arrangement area and a second heat conduction area; its second pin arrangement area includes a plurality of second pins arranged at intervals, the second pins are electrically connected to the interface on the first board surface of the second PCB substrate, and are electrically connected to the first PCB substrate through an electrical connection portion, and the second pins are internal pins; its second heat conduction area is covered with a fourth metal layer, and the fourth metal layer is connected to the third metal layer. In this way, the heat of the middle layer of the memory module can be transferred to the third metal layer of the side wall through the fourth metal layer, and conducted to the second metal layer of the top heat conduction surface through the side wall metal layer, thereby improving the system heat extraction efficiency of the entire module.

[0015] Exemplarily, the fourth metal layer can be connected to the third metal layer on both side walls, or can be connected to the third metal layer on one side wall, and the heat of the middle layer can be conducted to the top heat conducting surface through the fourth metal layer and the third metal layer.

[0016] Based on the third implementation of the first aspect, or the fourth implementation of the first aspect, the embodiment of the present application further provides a fifth implementation of the first aspect: the second pin arrangement area around the second pin is covered with a solder resist layer, so as to ensure the stability and reliability of the connectivity performance of each second pin.

[0017] Exemplarily, the second pin may be a solder ball or a solder pad.

[0018] Based on the third implementation of the first aspect, or the fourth implementation of the first aspect, or the fifth implementation of the first aspect, the embodiment of the present application also provides a sixth implementation of the first aspect: the first board surface of the second PCB substrate is covered with a fifth metal layer, and the fifth metal layer is connected to the third metal layer. In this way, the heat of the first metal layer on the bottom welding surface and the fourth metal layer and the fifth metal layer in the middle are conducted to the third metal layer, and quickly conducted to the second metal layer on the top heat-conducting surface through the third metal, and the heat on the memory module side is taken away by the heat dissipation component that contacts and exchanges heat with the heat-conducting surface. On the whole, efficient heat dissipation of the memory particles in the upper, middle and lower layers can be achieved, and the system heat extraction efficiency of the module can be improved.

[0019] Based on the first aspect, or the first implementation of the first aspect, or the second implementation of the first aspect, the third implementation of the first aspect, or the fourth implementation of the first aspect, or the fifth implementation of the first aspect, or the sixth implementation of the first aspect, the embodiment of the present application also provides a seventh implementation of the first aspect: the welding surface of the memory module includes two first pin arrangement areas, and in the first direction, the two first pin arrangement areas are respectively arranged on both sides of the first heat conduction area. In this way, on the one hand, it can meet the adaptation needs of different application scenarios and has good flexibility; on the other hand, the first metal layer of the first heat conduction area separates the solder resist layers of the first pin arrangement areas on both sides, which can effectively improve the phenomenon of pin welding blistering and provide technical guarantee for improving product yield.

[0020] Based on the seventh implementation of the first aspect, the embodiment of the present application further provides an eighth implementation of the first aspect: the first metal layer and the second metal layer both extend along the second direction to two opposite side walls of the package body, where the second direction is a direction different from the first direction in the plane where the welding surface is located. In this way, the amplitude range can be maximized to improve the heat dissipation capacity.

[0021] Based on the first aspect, or the first implementation of the first aspect, or the second implementation of the first aspect, or the third implementation of the first aspect, or the fourth implementation of the first aspect, or the fifth implementation of the first aspect, or the sixth implementation of the first aspect, or the seventh implementation of the first aspect, or the eighth implementation of the first aspect, the embodiment of the present application further provides a ninth implementation of the first aspect: the memory device is a memory particle. Exemplarily, the memory particle is a flip chip, and the package structure is more compact, reducing the space occupied by the actual assembly.

[0022] Based on the first aspect, or the first implementation of the first aspect, or the second implementation of the first aspect, the third implementation of the first aspect, or the fourth implementation of the first aspect, or the fifth implementation of the first aspect, or the sixth implementation of the first aspect, or the seventh implementation of the first aspect, or the eighth implementation of the first aspect, the embodiment of the present application further provides a tenth implementation of the first aspect: the memory device is a memory core. Exemplarily, the memory core is electrically connected to the corresponding PCB substrate through a wire bonding process, has good processability, and can further improve the integration of the package structure.

[0023] Based on the tenth implementation of the first aspect, the embodiment of the present application also provides an eleventh implementation of the first aspect: a sixth metal layer is covered between the memory core and the board surface of the corresponding PCB substrate, and the sixth metal layer is connected to the third metal layer. In this way, the heat of each memory core can be quickly transferred to the third metal layer through the sixth metal layer, and then conducted to the second metal layer on the top heat-conducting surface through the sidewall metal layer, which can further improve the system heat extraction efficiency of the module and achieve efficient heat dissipation of the memory cores in the upper, middle and lower layers.

[0024] In practical applications, the sixth metal layer can extend along the second direction to the side walls at both ends to achieve heat conduction through paths on both sides.

[0025] Based on the third implementation of the first aspect, or the fourth implementation of the first aspect, or the fifth implementation of the first aspect, or the sixth implementation of the first aspect, or the seventh implementation of the first aspect, or the eighth implementation of the first aspect, or the ninth implementation of the first aspect, or the tenth implementation of the first aspect, or the eleventh implementation of the first aspect, the embodiment of the present application also provides a twelfth implementation of the first aspect: the memory module also includes an RCD chip, and the RCD chip can be arranged on the first PCB substrate, or on the second PCB substrate. In this way, the functional requirements of different application scenarios can be met, and the flexibility is high.

[0026] In practical applications, the memory module further includes a plurality of electronic components, which are arranged on the first PCB substrate or on the second PCB substrate; at least one of the plurality of electronic components is a capacitor or a resistor.

[0027] A second aspect of an embodiment of the present application provides an electronic device, which includes a mainboard and a memory module as described above, wherein the memory module is arranged on the mainboard.

[0028] In practical applications, the electronic device may further include a heat dissipation component, the heat exchange surface of the heat dissipation component is in contact with and fits with the heat conduction surface of the memory module to quickly remove the working heat of the memory module. The second metal layer of the heat conduction surface at the top of the memory module may be in contact with and fit with the heat dissipation component through a TIM material to improve the heat exchange efficiency between the two.

[0029] Exemplarily, the heat dissipation component connected to the top heat conduction surface of the memory module may be a finned air-cooled heat sink; in other exemplary embodiments, the memory module may also be a liquid-cooled cold plate heat sink. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A structural cross-sectional view of a memory module provided in an embodiment of the present application;

[0031] Figure 2 for Figure 1 A bottom view of the memory module shown in ;

[0032] Figure 3 for Figure 1 A top view of the memory module shown in ;

[0033] Figure 4 for Figure 2 A-direction view;

[0034] Figure 5 for Figure 1 Schematic diagram of heat conduction of memory modules shown in;

[0035] Figure 6 for Figure 1 A schematic diagram of an assembly process of a memory module shown in;

[0036] Figure 7 A structural cross-sectional view of another memory module provided in an embodiment of the present application;

[0037] Figure 8 A structural cross-sectional view of another memory module provided in an embodiment of the present application;

[0038] Fig. 9 for Figure 8 DD section view in;

[0039] Fig.10 for Figure 7 Schematic diagram of heat conduction of memory modules shown in;

[0040] Fig.11 for Figure 8 A schematic diagram of an assembly process of a memory module shown in;

[0041] Fig.12 A structural cross-sectional view of another memory module provided in an embodiment of the present application;

[0042] Fig.13 A structural cross-sectional view of another memory module provided in an embodiment of the present application;

[0043] Fig.14 A schematic diagram of the layout of a memory module provided in an embodiment of the present application;

[0044] Fig.15 A schematic diagram of the layout of another memory module provided in an embodiment of the present application;

[0045] Fig.16 A structural cross-sectional view of another memory module provided in an embodiment of the present application;

[0046] Fig.17 for Fig.16 A schematic diagram of the board layout of the first PCB substrate is shown in;

[0047] Fig.18 for Fig.16 A schematic diagram of the layout of the second PCB substrate is shown in FIG.

[0048] Fig.19 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] The embodiments of the present application provide a memory module implementation scheme that can realize rapid internal heat dissipation, so as to be applied to different high-density application scenarios.

[0050] With the development of SIP (System In Package), multiple DDR / DRAM particles can be stacked side by side or stacked to form a memory module in a SIP stacking state. For example, but not limited to, the SIP stacked memory module can also be packaged with RCD (register clock driver) chips and / or electronic components such as resistors and capacitors. As a package, the effective heat dissipation of the heat-generating devices and the bottom circuit system of the SIP stacking architecture will affect the high-density development of the memory module. Therefore, it is necessary to provide a solution for the memory module stacking architecture that can effectively export the heat generated by the device, so as to improve the heat dissipation capacity of the memory module as a whole.

[0051] Based on this, an embodiment of the present application provides a memory module, which includes a first PCB substrate and a plurality of memory devices, wherein the first PCB substrate includes a first board surface and a second board surface that are separated from each other, and the plurality of memory devices are respectively arranged on the first board surface and the second board surface, and are packaged to form a package body; the "package" here means that the PCB substrate and the memory devices are sealed with a packaging filler to form a package body with a certain structural form, for example but not limited to, the package body is a plate-like structure. Among them, the memory device can be a memory particle or a memory core particle, the memory particle is a memory chip that has completed self-packaging, and the memory core particle refers to a memory die formed based on wafer processing and cutting.

[0052] The package body includes a welding surface and a heat-conducting surface, the welding surface is located on the side where the bottom memory device of the package body is located, and the heat-conducting surface is located on the side where the top memory device of the package body is located; wherein the welding surface includes a first pin arrangement area and a first heat-conducting area, the first pin arrangement area includes a plurality of first pins arranged at intervals, and each first pin is electrically connected to an interface on a first PCB substrate through an electrical connection portion; the "bottom layer" and "top layer" here are defined based on the assembly relationship with the welding surface as a description reference, the bottom memory device is close to the welding surface, and the top memory device is close to the heat-conducting surface, the welding surface is also the bottom welding surface of the memory module, each first pin can be electrically connected to a single board, thereby realizing the connection between the memory device and an external circuit, and the device on the memory module can also be electrically connected to other external devices through single board routing.

[0053] Among them, the first heat-conducting area and the heat-conducting surface of the welding surface are respectively covered with metal layers, and the side wall of the package body is covered with a metal layer; and the metal layer located on the side wall of the package body is respectively connected to the metal layer located in the first heat-conducting area and the metal layer located on the heat-conducting surface; here, the heat-conducting surface is also the heat dissipation surface or heat exchange surface of the memory module, for example but not limited to, for contacting and exchanging heat with the heat exchange component. With such a configuration, a heat-conducting path can be constructed for the heating of the device inside the memory module, and the metal layer of the first heat-conducting area of ​​the bottom welding surface is connected to the metal layer of the side wall, so that the heat conducted to the bottom of the memory module can be conducted to the top heat-conducting surface through the metal layer of the side wall; compared with the method of transferring heat from the bottom of the structure to the top in the vertical direction, the embodiment of the present application constructs a heat-conducting path with lower thermal resistance, which can quickly export the larger heat generated at the bottom of the module, and effectively improve the system heat export efficiency of the memory module. In this way, by improving the heat dissipation capacity of the memory module itself, efficient heat dissipation of the memory device is achieved, providing technical guarantee for meeting the needs of high-density layout scenarios.

[0054] At the same time, the first PCB substrate is used to realize the interconnection between the two layers of memory devices on the first board surface and the second board surface, which meets the trend design requirements of high-density stacking of modules while obtaining good heat dissipation capabilities.

[0055] In addition, the packaging filler can completely fill the arrangement spacing or gaps between the particles and between them and the PCB substrate. On the one hand, the PCB substrate can be coupled with components such as memory devices, so that the heat generated by the internal devices can be evenly transferred to the metal layer, effectively avoiding the influence of air gaps on the heat dissipation efficiency of the system; on the other hand, the packaging filler can wrap the memory devices to reduce the adverse effects of external dust and impurities on the performance of the particles.

[0056] In order to better understand the technical solution and technical effects of the present application, without losing generality, the specific embodiments will be described in detail below in conjunction with the accompanying drawings. Figure 1 , which is a structural cross-sectional view of a memory module provided in an embodiment of the present application.

[0057] like Figure 1 As shown, the memory module 10 is a two-layer stacked architecture. In the example in the figure, two memory particles 1 are arranged on the first board surface 21 of the first PCB substrate 2, and three memory particles 1 are arranged on the second board surface 22 of the first PCB substrate 2. In a specific implementation, the memory particles 1 on the two boards can be interconnected through the PCB substrate according to the functional configuration requirements.

[0058] It is understandable that the number of memory particles set in the two-layer stacking architecture can be determined according to the overall product design. For example, but not limited to, it can be configured as five, nine or eighteen memory particles 1. Multiple memory particles 1 can be respectively arranged on two opposing board surfaces of the first PCB substrate 2, and encapsulated by the encapsulation filler 3 to form a package. As shown in the figure, the package is in the shape of a plate as a whole, and has the structural characteristics of high integration and easy process implementation, which is convenient for assembly in different application scenarios. Here, the encapsulation filler 3 can be made of resin filling material, which is not limited in the embodiment of the present application.

[0059] The soldering surface 10A of the package is located on the side where the memory chip 1 on the first board surface 21 is located, that is, on the side where the bottom memory chip of the package is located. Each first pin 5 on the soldering surface 10A is electrically connected to the interface on the first board surface 21 through the electrical connection part 4 to establish a corresponding signal conduction relationship. Please refer to Figure 2 , the figure is Figure 1 The bottom view of the memory module shown in the figure shows the layout of the welding surface. For the convenience of description, two coordinate directions of the plane where the welding surface of the memory module 10 is located are defined: a first direction X and a second direction Y. As shown in the figure, the first direction X is the width direction of the welding surface 10A, and the second direction Y is the length direction of the welding surface 10A. It should be understood that the corresponding relationship between the above coordinate directions and the length and width of the board surface is only used to describe the structural layout, and is not limited to the corresponding relationship shown in the figure.

[0060] Combination Figure 1 and Figure 2 As shown, the welding surface 10A includes a first pin arrangement area B1 and a first heat conduction area B2, the first heat conduction area B2 of the welding surface 10A is covered with a first metal layer 101, each first pin 5 is arranged at intervals in the first pin arrangement area B1, and the first pin arrangement area B1 around the first pin 5 is covered with a solder resist layer 104. In this embodiment, the welding surface 10A is provided with two first pin arrangement areas B1, and in the first direction X, the two first pin arrangement areas B1 are respectively arranged on both sides of the first heat conduction area B2. The first heat conduction area B2 located in the middle and the first pin arrangement areas B1 located on both sides are both extended along the second direction Y and arranged within the width range of the welding surface 10A.

[0061] For the first pin arrangement area B1, in a possible implementation, the pin arrangement area can also be arranged on one side of the heat conduction area, that is, only one pin arrangement area is set on the welding surface of the memory module (not shown in the figure). In comparison, the first metal layer 101 of the first heat conduction area B2 shown in the figure separates the solder resist layer 104 of the first pin arrangement area B1 on both sides, which can effectively improve the phenomenon of pin welding blistering.

[0062] In another possible implementation, the pin layout area may also adopt a layout of a plurality of other areas, for example, but not limited to, multiple pin layout areas adopt a symmetrical or asymmetrical layout (not shown in the figure) to adapt to the configuration position of the corresponding interconnection interface on the single board side in the scenario.

[0063] In another possible implementation, the pin arrangement area may also be arranged in the second direction Y within a partial width range of the welding surface 10A, rather than being limited to extending to both end sides of the welding surface 10A along the second direction Y as shown in the figure.

[0064] In the application scenario, as the bottom welding surface of the memory module, each first pin 5 of the welding surface 10A is used to be electrically connected to a single board (not shown in the figure) for power supply and data transmission and other functions. In a specific implementation, the corresponding first pin 5 can be defined according to the I / O (Input / Output) function matching of the memory module 10, and signal crosstalk can be avoided by reasonably controlling the pin spacing. This is not limited in the embodiment of the present application.

[0065] For the first heat-conducting area B2, in a possible implementation, the first metal layer can extend along the second direction Y to one end side of the welding surface 10A (not shown in the figure), and the first metal layer is connected to the sidewall metal layer through a single end side, and an effective heat-conducting path can also be established. In other possible implementations, the first metal layer can also be in a state where no heat-conducting metal layer is configured in part (not shown in the figure), such as but not limited to partial hollowing, as long as the single end side or both ends of the first metal layer can be connected to the sidewall metal layer. This is not limited in the embodiments of the present application.

[0066] It should be noted that, in the present embodiment, except for the first pin arrangement area B1, other areas on the welding surface 10A are all first heat conduction areas B2, that is, except for the first pin arrangement area B1, they are all covered with the first metal layer to maximize the use of the width size of the welding surface 10A to provide a heat dissipation path and enhance the memory module's own heat dissipation capacity.

[0067] Please also see Figure 3 and Figure 4 ,in, Figure 3 for Figure 1 The top view of the memory module shown in Figure 4 for Figure 2 A-direction view.

[0068] like Figure 1 and Figure 3 As shown, the heat conducting surface 10B of the package is located on the side where the memory chip 1 is located on the second board surface 22, that is, on the other side where the top memory chip of the package is located. In the example in the figure, the second metal layer 102 covers the entire width of the heat conducting surface 10B to maximize the use of the heat conducting surface 10B of the package to establish a heat dissipation path.

[0069] In other possible implementations, the second metal layer may also be partially unconfigured with a heat-conducting metal layer (not shown in the figure), such as but not limited to partially hollowed out, as long as the second metal layer can be connected to the sidewall metal layer. This embodiment of the application is not limited thereto.

[0070] like Figure 2 and Figure 4 As shown, the two side walls 10C of the package body are respectively covered with a third metal layer 103, and the third metal layer 103 is respectively connected to the first metal layer 101 and the second metal layer 102. In this embodiment, the third metal layer 103 can extend to both ends of the side wall along the first direction X to maximize the use of the width of the side wall to provide a heat dissipation path.

[0071] Please also see Figure 5 , the figure shows Figure 1 Schematic diagram of heat conduction among the metal layers of a memory module shown in FIG. Figure 5The middle arrow indicates the heat conduction path, through the third metal layer 103 of the side wall, the heat on the first metal layer 101 side of the bottom welding surface can be quickly conducted to the second metal layer 102 of the top heat conducting surface, and the heat on the memory module side can be taken away through the heat dissipation component 20 that contacts and exchanges heat with the heat conducting surface. In this way, the system heat dissipation efficiency of the module can be improved.

[0072] In other possible implementations, the third metal layer may also be partially not configured with a heat-conducting metal layer (not shown in the figure), for example but not limited to, in the X direction, the third metal layer may be configured in the middle area of ​​the side wall 10C, as long as the third metal layer can be connected to the first metal layer 101 and the second metal layer 102. This is not limited in the embodiment of the present application.

[0073] For example Figure 1 As shown, optionally, the memory module 10 also integrates and packages other electronic devices 6, for example but not limited to, the electronic device 6 can be a resistor and / or capacitor arranged on the first PCB substrate 2 to achieve corresponding functions according to the overall design requirements of the module.

[0074] Combine the following Figure 6 , a brief description Figure 1 The assembly process of the memory module 10 is shown in FIG.

[0075] Step S501, memory chips 1 and electronic devices 6 (resistors and / or capacitors) are respectively assembled on both side surfaces of the first PCB substrate 2. For example but not limited to, the SMT (Surface Mounted Technology) process can be used to complete the assembly and fixation of the above devices.

[0076] Step S502, forming an electrical connection portion 4 on the board surface of the first PCB substrate 2. In a specific implementation, the electrical connection portion 4 can be configured as a copper column structure; in other specific implementations, the electrical connection portion 4 can also be formed by a needle implantation process, or vertically formed based on a WB (Wire bonding) process. This embodiment of the present application is not limited.

[0077] Step S503, encapsulating to form a package body, based on the encapsulation filler 3, the arrangement spacing or gap between the memory chip 1, the electronic device 6 and the first PCB substrate 2 is completely filled, and the first PCB substrate 1 is coupled with the memory chip 1 and the electronic device 6 as a whole.

[0078] Step S504, forming a first metal layer 101, a second metal layer 102 and a third metal layer (combined with the heat conduction area 10A, the heat conduction surface 10B and the side wall of the package body) respectively. Figure 2 and Figure 3As shown), for example but not limited to, a corresponding metal layer can be formed by a metallization pattern process; at the same time, a solder resist layer 104 is formed in the first pin arrangement area B1 of the welding surface 10A, for example but not limited to, a green oil layer.

[0079] In a specific implementation, the first metal layer 101, the second metal layer 102 and the third metal layer may be copper layers or silver layers, which may be determined based on the heat transfer performance requirements and the manufacturing process cost. This embodiment of the present application is not limited thereto.

[0080] Step S505, using a ball planting process, a first pin 5 in the form of a solder ball is formed in the first pin arrangement area B1 of the welding surface 10A, presenting an LGA (Land Grid Array) packaging form to improve welding assembly processability. At this point, the finished product cutting process can be performed.

[0081] Optionally, for the first pin 5 in the form of a solder ball, the thickness of the first metal layer 101 in the heat conduction area B2 of the soldering surface 10A can be adjusted so that the outer surface of the first metal layer 101 is flush with the apex of the solder ball. In this way, on the one hand, the height of the weld can be made consistent, and the welding processability is better; on the other hand, it can also ensure good contact between the bottom soldering surface and the single board side.

[0082] In a specific implementation, the pins in the first pin arrangement area B1 of the welding surface 10A may also adopt a pin structure, which can be plug-in-adapted with a socket installed on an external single board (not shown in the figure) to achieve electrical connection.

[0083] It should be understood that step S505 is an optional process. In other possible implementations, the external pins may be formed based on the pads in the first pin arrangement area B1 and welded to the corresponding interfaces of the external board to achieve electrical connection.

[0084] See also Figure 7 , which is a cross-sectional view of the structure of another memory module provided in the embodiment of the present application. Figure 1 In order to understand the differences and connections between the embodiments described in the drawings, the components or structures with the same functions are indicated by the same symbols in the drawings.

[0085] like Figure 7 As shown, on the welding surface 10A of the memory module 10a, the first pins 5a arranged at intervals in the first pin arrangement area B1 are pad structures, which can be formed by a metal patterning process in a specific implementation. For example, the pad of the first pin 5a can be circular, square or other shapes, which is not limited in the embodiment of the present application.

[0086] The other components and connections of the memory module 10a are Figure 1 The described implementation schemes are the same, so they will not be described again.

[0087] The memory modules described in the above embodiments are all two-layer stacking structures. In other implementations, the packaged memory module can also be a three-layer stacking structure. Figure 8 , which is a cross-sectional view of the structure of another memory module provided in the embodiment of the present application. Figure 1 and Figure 7 The differences and connections between the described embodiments, and the components or structures with the same functions are indicated in the figures with the same symbols.

[0088] like Figure 8 As shown, the memory module 10b is a three-layer stacking structure. On the basis of the basic package body 1 formed by the first PCB substrate 2 as the carrier, it also includes a memory particle stacking structure with the second PCB substrate 8 as the carrier, and then the package body is encapsulated by the encapsulation filler 3. In the example in the figure, two memory particles 1 are arranged on the first board surface 21 and the second board surface 22 of the first PCB substrate 2, and three memory particles 1 are arranged on the second PCB substrate 8.

[0089] It is understandable that the number of memory chips in the three-layer stacking architecture can be determined according to the overall product design. For example, but not limited to, it can be configured as eighteen, twenty or forty memory chips 1. This embodiment of the application is not limited.

[0090] The surface of the basic package body 1 opposite to the second PCB substrate 8 includes a second pin arrangement area T1 and a second heat conduction area T2. The second heat conduction area T2 of the basic package body 1 is covered with a fourth metal layer 105, and the fourth metal layer 105 is connected to the third metal layer 103b on the side wall. Fig. 9 , the figure is Figure 8 The fourth metal layer 105 can extend to the side walls at both ends along the second direction Y. In this way, the heat of the middle layer of the memory module 10b can be transferred to the third metal layer 103 of the side wall through the fourth metal layer 105, and then transferred to the second metal layer 102 of the top heat conductive surface through the side wall metal layer, thereby improving the heat dissipation efficiency of the entire module system.

[0091] The second pin arrangement area T1 includes a plurality of second pins 7 arranged at intervals, and the second pin arrangement area T1 around each second pin 7 is covered with a solder resist layer 107. Here, the second pin 7 on the basic package body 1 is used as an internal pin to be electrically connected to the corresponding interface of the second PCB substrate 8.

[0092] In this embodiment, the basic package I with the first PCB substrate 2 as the carrier is provided with two second pin arrangement areas T1 on the surface opposite to the first PCB substrate 2. In the first direction X, the two second pin arrangement areas T1 are arranged on both sides of the second heat conduction area T2. The second heat conduction area T2 located in the middle and the second pin arrangement areas T1 located on both sides can be extended along the second direction Y and arranged within the width range of the basic package I (not shown in the figure, but can be seen in FIG. Figure 2 Solder surface layout shown).

[0093] In a specific implementation, the second pin 7 on the second pin arrangement area T1 on the basic package body 1 can be determined according to the interface configuration on the first PCB substrate 2 side, which is not limited in the embodiment of the present application. The fourth metal layer 105 on the second heat-conducting area T2 of the basic package body 1 can also be in a state where no heat-conducting metal layer is configured in part (not shown in the figure), such as but not limited to partial hollowing, as long as the fourth metal layer can be connected to the sidewall metal layer. This is not limited in the embodiment of the present application.

[0094] The first board surface 81 of the second PCB substrate 8 is connected to the basic package body 1, and an interface adapted to the second pin 7 is provided on the first board surface 81 to realize the interconnection between boards, which can be realized according to the existing technology and will not be described in detail here. The memory particles 1 are arranged on the second board surface 82 of the second PCB substrate 8, and the second PCB substrate 8 and the devices thereon are encapsulated with the basic package body 1 by the encapsulation filler 3 to form a package body.

[0095] In order to further improve the heat dissipation efficiency of the middle layer of the memory module, optionally, the first board surface 81 of the second PCB substrate 8 is covered with a fifth metal layer 106. Figure 8 and Fig. 9 As shown, the fifth metal layer 106 is connected to the third metal layer 103b on the side wall. The fifth metal layer 106 can extend to both end side walls along the second direction Y, which can further improve the system heat dissipation efficiency of the module.

[0096] Please also see Fig.10 , the figure shows Figure 8 Schematic diagram of heat conduction among the metal layers of a memory module shown in FIG. Fig.10 The middle arrow indicates the heat conduction path, in which the heat on the first metal layer 101 of the bottom welding surface and the fourth metal layer 105 and the fifth metal layer 106 in the middle is conducted to the third metal layer 103 on both sides, and is quickly conducted to the second metal layer 102 on the top heat conducting surface through the third metal 103, and the heat on the memory module side is taken away through the heat dissipation component 20 that contacts and exchanges heat with the heat conducting surface. In this way, efficient heat dissipation of the memory particles in the upper, middle and lower layers can be achieved, and the system heat extraction efficiency of the module can be improved.

[0097] Combine the following Fig.11 , a brief description Figure 8 The assembly process of the memory module 10b is shown in FIG.

[0098] Step S901, assembling memory chips 1 and electronic devices 6 (resistors and / or capacitors) on both side surfaces of the first PCB substrate 2 respectively.

[0099] Step S902 , forming electrical connection parts 4 on both side surfaces of the first PCB substrate 2 .

[0100] Step S903, encapsulating to form a basic package body 1, based on the encapsulation filler 3, the arrangement spacing or gaps between the memory particles 1, the electronic device 6 and the first PCB substrate 2 are completely filled, and the first PCB substrate 1 is coupled with the memory particles 1 and the electronic device 6 as a whole.

[0101] Step S904, a first metal layer 101 and a fourth metal layer 105 are respectively formed on the heat conductive area of ​​the welding surface 10A of the basic package I and on the surface of the basic package I opposite to the second PCB substrate 8; at the same time, a solder resist layer 104 and a solder resist layer 107 are respectively formed on the first pin arrangement area B1 of the welding surface 10A and the second pin arrangement area T1 of the basic package I.

[0102] Step S905 , using a ball implantation process, respectively forming first pins 5 and second pins 7 in the form of solder balls on the first pin arrangement area B1 and the second pin arrangement area T1 .

[0103] Step S906, assembling the memory chip 1 on the second PCB substrate 8. For example but not limited to, the memory chip 1 is assembled using the SMT process.

[0104] Step S907, stacking the second PCB substrate 8 assembled with the memory particles 1 on the basic package body 1, and completing the welding between the second pin 7 and the corresponding interface on the second PCB substrate 8.

[0105] Step S908, encapsulation forms a package body, and based on the encapsulation filler 3, the second PCB substrate 8 and its memory particles 1, and the arrangement spacing or gap between the second PCB substrate 8 and the basic package body I are completely filled, and the first PCB substrate 1, the second PCB substrate 8 and the memory particles 1 and the electronic devices 6 and other devices are coupled into one.

[0106] Step S909, forming a second metal layer 102 and a third metal layer (combined with Figure 2 and Figure 3 At this point, the finished product cutting process can be performed.

[0107] It should be understood that step S905 is an optional process. In other possible implementations, the external pins may be formed based on the pads in the first pin arrangement area B1 and welded to the corresponding interfaces of the external board to achieve electrical connection.

[0108] In a possible implementation, the processes described in steps 901 to 905 and the processes described in steps 906 to 907 may be performed simultaneously, and then the processes described in steps 908 to 909 may be performed sequentially. In other possible implementations, the processes described in steps 906 to 907 may be performed first, and then the processes described in steps 901 to 905 may be performed, and then the processes described in steps 908 to 909 may be performed sequentially.

[0109] The foregoing Figure 8 In the described memory module of the three-layer stacked architecture, the first pin 5 on the welding surface and the second pin 7 on the top surface of the basic package 1 are both welding structures. In other implementations, pins in the form of solder pads may also be used.

[0110] See also Fig.12 , which is a cross-sectional view of the structure of another memory module provided in the embodiment of the present application. Figure 8 The differences and connections between the described embodiments, and the components or structures with the same functions are indicated in the figures with the same symbols.

[0111] like Fig.12 As shown, on the surface of the basic package of the memory module 10c opposite to the first PCB substrate 2, the second pins 7c arranged in the second pin arrangement area T1 are pad structures, which can be formed by a metal patterning process in a specific implementation. For example, the pad of the second pin 7c can be circular, square or other shapes, which is not limited in the embodiment of the present application.

[0112] See also Fig.13 , which is a cross-sectional view of the structure of another memory module provided in the embodiment of the present application. Figure 8 and Fig.12 The differences and connections between the described embodiments, and the components or structures with the same functions are indicated in the figures with the same symbols.

[0113] like Fig.13 As shown, on the welding surface 10A of the memory module 10d, the first pins 5a arranged at intervals in the first pin arrangement area B1 are a pad structure; at the same time, on the surface of the basic package body opposite to the first PCB substrate 2, the second pins 7c arranged at intervals in the second pin arrangement area T1 are a pad structure.

[0114] Based on the two-layer stacking architecture and the three-layer stacking architecture described in the above embodiments, in practical applications, such as Fig.14 As shown, the memory module 10e can be integrated with an RCD (Register Clock Driver) chip. In a specific implementation, the placement of the RCD chip can be determined as needed and is not limited to Fig.14 The middle part of the memory module 10e is shown in FIG.

[0115] In addition, the RCD chip can be integrated on the first PCB substrate 2, or on the second PCB substrate 8, which is not limited in the embodiment of the present application.

[0116] Of course, according to the overall design requirements of the product, it can also be Fig.15 The memory module 10f shown in FIG. 1 does not have an integrated RCD chip.

[0117] The memory modules described in the above embodiments are all packaged with memory chips 1 as memory devices integrated in a stacked architecture. In other specific implementations, memory chips can also be packaged as memory devices. Fig.16 , this figure is a structural cross-sectional view of another memory module provided in an embodiment of the present application.

[0118] like Fig.16 As shown, the memory module 10g is a three-layer stacking architecture. Figure 8 Compared with the memory module described in the embodiment, the difference is that the present embodiment uses the memory chip 1g for packaging. Figure 8 The differences and connections between the described embodiments, and the components or structures with the same functions are indicated in the figures with the same symbols.

[0119] Similarly, on the basis of the basic package body 1 formed by using the first PCB substrate 2 as a carrier, a memory chip stacking structure is also included, using the second PCB substrate 8 as a carrier. In the example in the figure, two memory chips 1g are arranged on the first board surface 21 and the second board surface 22 of the first PCB substrate 2, and three memory chips 1g are arranged on the second PCB substrate 8.

[0120] It is understandable that the number of memory chips in the three-layer stacking architecture can be determined according to the overall product design.

[0121] In the present embodiment, the memory chips 1g are all electrically connected to the corresponding PCB substrates (the first PCB substrate 2 and the second PCB substrate 8) by means of leads 11g formed by the WB process.

[0122] In order to further improve the overall heat dissipation capacity of the memory module, optionally, a sixth metal layer 108 is coated between the body of the memory core 1g and the board surface of the corresponding PCB substrate (the first PCB substrate 2, the second PCB substrate 8), and the sixth metal layer 108 is connected to the third metal layer (not shown in the figure) on the side wall. The sixth metal layer 108 can extend to the side walls at both ends along the second direction. In this way, the heat of each memory core 1g can be quickly transferred to the third metal layer 103c through the sixth metal layer 108, and conducted to the second metal layer 102 on the top heat conductive surface through the side wall metal layer, which can further improve the system heat extraction efficiency of the module and achieve efficient heat dissipation of the memory cores 1g in the upper, middle and lower layers.

[0123] The layout of the first board surface 21 and the second board surface 22 of the first PCB substrate 2 can be the same, and can be set according to product design requirements. Fig.17 , the figure is Fig.16 A schematic diagram of the board layout of the first PCB substrate is shown in FIG.

[0124] like Fig.17 As shown, two sixth metal layers 108 are correspondingly arranged for bonding and assembling the memory chip 1g; the solder resist layer 109 is arranged adjacent to the sixth metal layer 108 to achieve electrical connection of the leads.

[0125] The layout of the second board surface 82 of the second PCB substrate 8 can also be set according to product design requirements. Fig.18 , the figure is Fig.16 A schematic diagram of the board layout of the second PCB substrate is shown in FIG.

[0126] like Fig.18 As shown, three sixth metal layers 108 are correspondingly arranged for bonding and assembling the memory chip 1g, and the solder resist layer 109 is arranged adjacent to the sixth metal layer 108 to achieve electrical connection of the leads.

[0127] The other components and connections of the memory module 10g are Figure 8 The described implementation schemes are the same, so they will not be described again.

[0128] In addition to the aforementioned memory module, this embodiment also provides an electronic device, see Fig.19 , which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0129] like Fig.19As shown, the electronic device 100 includes a housing 40 and a mainboard 30 disposed in the housing 40, and the mainboard 30 is provided with a memory module 10 as described in the above embodiment. The electronic device 100 may also include a heat dissipation component 20 in contact with and bonded to the memory module 10 to quickly take away the working heat of the memory module. The second metal layer 102 of the thermal conductive surface at the top of the memory module can be in contact with and bonded to the heat dissipation component 20 through a TIM (Thermal Interface Material) material to improve the heat exchange efficiency between the two.

[0130] It should be noted that, in actual application scenarios, the heat dissipation component connected to the top heat conduction surface of the memory module can be a finned air-cooled radiator as shown in the figure, or a liquid-cooled cold plate radiator. Alternatively, the top heat conduction surface of the memory module is exposed to the application environment, that is, the second metal layer on the heat conduction surface side directly exchanges heat with the air. This is not limited in the embodiments of the present application.

[0131] Based on the good heat dissipation capability of the high-density stacked memory module, it can be widely used in different application scenarios. In a specific implementation, the electronic device can be a server, a computer or a high-performance computing cluster, for a high-power, high-integration, ultra-large-scale data center server; in addition, the electronic device can also be a switch, a router or an edge device, etc., which is not limited in the embodiments of this application.

[0132] It should be understood that other functions of the electronic device are not the core invention of the present application, and those skilled in the art can implement them according to the prior art, so they will not be described in detail herein.

[0133] The above are only preferred embodiments of the present invention. It should be pointed out that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A memory module, characterized in that: The memory module includes a first PCB substrate and a plurality of memory devices; The first PCB substrate comprises a first board surface and a second board surface which are separated from each other, and the memory device is respectively arranged on the first board surface and the second board surface, and is packaged to form a package body; The package body comprises a welding surface and a heat conducting surface, wherein the welding surface is located at the side where the bottom memory device of the package body is located, and the heat conducting surface is located at the side where the top memory device of the package body is located; The welding surface includes a first pin arrangement area and a first heat conduction area, the first pin arrangement area includes a plurality of first pins arranged at intervals to be electrically connected to an external circuit, and the first pins are electrically connected to the first PCB substrate through an electrical connection portion; The first heat conduction area is covered with a first metal layer, the heat conduction surface is covered with a second metal layer, the side wall of the package body is covered with a third metal layer, and the third metal layer is respectively connected to the first metal layer and the second metal layer.

2. The memory module according to claim 1, characterized in that: The two opposite side walls of the package body are respectively covered with the third metal layer.

3. The memory module according to claim 1 or 2, characterized in that: A first pin arrangement area around the first pin is covered with a solder resist layer.

4. The memory module according to any one of claims 1 to 3, characterized in that: The first pin is a solder ball or a solder pad.

5. The memory module according to any one of claims 1 to 4, characterized in that: The memory module also includes a second PCB substrate, on which the memory device is arranged; the first PCB substrate is used as a carrier package to form a basic package body, the second PCB substrate is stacked and arranged on the basic package body, and is interconnected with the first PCB substrate to form the package body.

6. The memory module according to claim 5, characterized in that: The second PCB substrate comprises a first board surface and a second board surface which are opposite to each other, the memory device is arranged on the second board surface of the second PCB substrate, and the first board surface of the second PCB substrate is arranged opposite to the basic package body; The surface of the basic package body opposite to the second PCB substrate comprises a second pin arrangement area and a second heat conduction area; The second pin arrangement area includes a plurality of second pins arranged at intervals, the second pins are electrically connected to the interface on the first board surface of the second PCB substrate, and are electrically connected to the first PCB substrate through an electrical connection portion; The second heat conduction region is covered with a fourth metal layer, and the fourth metal layer is connected to the third metal layer.

7. The memory module according to claim 5 or 6, characterized in that: A second pin arrangement area around the second pin is covered with a solder resist layer.

8. The memory module according to any one of claims 5 to 7, characterized in that: The first board surface of the second PCB substrate is covered with a fifth metal layer, and the fifth metal layer is connected to the third metal layer.

9. The memory module according to any one of claims 6 to 8, characterized in that: The second pin is a solder ball or a solder pad.

10. The memory module according to any one of claims 1 to 9, characterized in that: The welding surface includes two first pin arrangement areas. In a first direction, the two first pin arrangement areas are respectively arranged on both sides of the first heat conduction area.

11. The memory module according to claim 10, characterized in that: The first metal layer and the second metal layer both extend along a second direction to two opposite side walls of the package body; the second direction is different from the first direction.

12. The memory module according to any one of claims 1 to 11, characterized in that: The memory device is a memory particle.

13. The memory module according to claim 12, wherein: The memory particles are flip chips.

14. The memory module according to any one of claims 1 to 11, characterized in that: The memory device is a memory chip.

15. The memory module according to claim 14, characterized in that: The memory core is electrically connected to the corresponding PCB substrate through a wire bonding process.

16. The memory module according to claim 14 or 15, characterized in that: A sixth metal layer is covered between the memory core and the surface of the corresponding PCB substrate, and the sixth metal layer is connected to the third metal layer.

17. The memory module according to any one of claims 5 to 16, characterized in that: The memory module further includes an RCD chip, and the RCD chip is disposed on the first PCB substrate or on the second PCB substrate.

18. The memory module according to any one of claims 5 to 17, characterized in that: The memory module further includes a plurality of electronic components, which are arranged on the first PCB substrate or on the second PCB substrate; at least one of the plurality of electronic components is a capacitor or a resistor.

19. An electronic device, characterized in that: It comprises a mainboard and the memory module according to any one of claims 1 to 18, wherein the memory module is arranged on the mainboard.

20. The electronic device according to claim 19, characterized in that: It also includes a heat dissipation component, the heat exchange surface of the heat dissipation component is in contact with and fits with the heat conduction surface of the memory module.

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