Image sensor, preparation method of image sensor, electronic equipment and vehicle

Abstract

The invention discloses an image sensor, a preparation method of the image sensor, electronic equipment and a vehicle. The image sensor comprises a substrate, a signal processing structure and a pixel structure, the signal processing structure is located in the substrate and is close to the upper surface of the substrate in a first direction perpendicular to the substrate, and the signal processing structure comprises a vertical gate structure; the pixel structure is located in the substrate and is close to the lower surface of the substrate in the first direction, the pixel structure extends in the second direction and the third direction respectively, the pixel structure is connected with the vertical grid structure, and the second direction, the third direction and the first direction are mutually orthogonal. According to the image sensor, the pixel structure is prepared in the substrate and occupies the whole pixel area, so that the filling factor is improved, the full well capacity of pixels is increased, the performance of the image sensor is improved, and the design difficulty of a circuit and the manufacturing difficulty of a process are reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of image acquisition, and in particular to an image sensor, a method for preparing the image sensor, an electronic device and a vehicle. Background Art

[0002] As the functions of image sensors become more and more abundant, the integration level of corresponding devices also increases. More transistors need to be placed on the same area, which will squeeze the area of ​​the pixel area, reduce the area size of the pixel structure, and cause the pixel full well capacity parameter to decrease, thereby causing the performance of the image sensor to decrease. In the related art, in order to solve the problem of electron transmission difficulties caused by the planar gate structure, the original planar gate structure is changed to a vertical gate, that is, the gate oxide layer and the gate polysilicon extend into the silicon substrate. This structure can better transfer deep photogenerated electrons, but its fill factor is still limited by the area of ​​the pixel structure, resulting in a small full well capacity and poor image sensor performance. It is necessary to match the external structure to improve the image sensor performance, which will increase the difficulty of circuit design and process manufacturing. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one purpose of the present invention is to provide an image sensor that can improve the pixel area fill factor, increase the full well capacity of the pixel itself, improve the image sensor performance, and reduce the difficulty of circuit design and process manufacturing.

[0004] A second objective of the present invention is to provide a method for preparing an image sensor.

[0005] A third objective of the present invention is to provide an electronic device.

[0006] A fourth object of the present invention is to provide a vehicle.

[0007] In order to solve the above problems, an embodiment of the first aspect of the present invention provides an image sensor, comprising: a substrate; a signal processing structure, the signal processing structure is located in the substrate and close to the upper surface of the substrate in a first direction perpendicular to the substrate, the signal processing structure includes a vertical gate structure; a pixel structure, the pixel structure is located in the substrate and close to the lower surface of the substrate in the first direction, the pixel structure extends in a second direction and a third direction respectively, and the pixel structure is connected to the vertical gate structure, wherein the second direction, the third direction and the first direction are orthogonal to each other.

[0008] According to the image sensor of the embodiment of the present invention, a vertical gate structure is set, the vertical gate structure is close to the upper surface of the substrate and the pixel structure is close to the lower surface of the substrate, that is, the signal processing structure and the pixel structure are arranged in a vertically separated manner in the substrate, and the pixel structure extends in the second direction and the third direction respectively, that is, extends along a plane parallel to the substrate, which can increase the proportion of the pixel area covered by the pixel structure on the substrate, so that the pixel structure can have a larger area for receiving light, generate more photogenerated electrons, increase the full well capacity of the pixel itself, and improve the performance of the image sensor without the help of external structures. The difficulty of circuit design and the difficulty of process manufacturing are low.

[0009] In some embodiments, the area of ​​the pixel structure extending in the second direction and the third direction fully covers the pixel region of the substrate.

[0010] In some embodiments, the pixel structure includes: a first pixel region, which wraps the bottom of the vertical gate structure and is used to transmit the collected photogenerated electrons to the signal processing structure; a second pixel region, which is connected to the first pixel region, and the second pixel region extends along the second direction and the third direction respectively, and is used to generate the photogenerated electrons.

[0011] In some embodiments, the image sensor further includes: an isolation layer, which is located between the other parts of the signal processing structure except the vertical gate structure and the pixel structure in the first direction, and is used to isolate the signal processing structure from the pixel structure.

[0012] In some embodiments, the isolation layer includes a physical isolation layer for achieving physical isolation between the signal processor structure and the pixel structure; one end of the physical isolation layer is close to the vertical gate structure in the second direction.

[0013] In some embodiments, the physical isolation layer is a buried oxide layer prepared in the substrate using SIMOX technology.

[0014] In some embodiments, the isolation layer includes an electrical isolation layer for achieving electrical isolation between the signal processor structure and the pixel structure; one end of the electrical isolation layer is close to the vertical gate structure in the second direction.

[0015] In some embodiments, the electrical isolation layer is a doped layer having a conductivity opposite to that of the pixel structure.

[0016] In some embodiments, the vertical gate structure includes a vertical gate trench, a silicon dioxide isolation layer and a polysilicon gate, the vertical gate trench extends from the upper surface of the substrate to the pixel structure in the substrate along the first direction, the polysilicon gate is filled in the vertical gate trench and is partially located on the upper surface of the substrate, the silicon dioxide isolation layer is located between the polysilicon gate and the vertical gate trench, and the silicon dioxide isolation layer also covers the upper surface of the substrate; the signal processor structure also includes a floating gate diffusion region, a first drain region, a source region and a second drain region, the floating gate diffusion region is located in the vertical direction in the second direction One side of the straight gate trench is insulated and connected to the vertical gate trench, the floating gate diffusion region, the first drain region, the source region and the second drain region all extend from the upper surface of the substrate into the substrate along the first direction, and the floating gate diffusion region, the first drain region, the source region and the second drain region are arranged at intervals along the second direction; in the first direction, the isolation layer is located between the pixel structure and the floating gate diffusion region, the first drain region, the source region and the second drain region, and in the second direction, one end of the isolation layer is close to the vertical gate trench and is spaced a preset distance from the vertical gate trench.

[0017] In some embodiments, the signal processing structure also includes: a reset transistor, which is located on the upper surface of the substrate between the floating gate diffusion region and the first drain region, and is used to control the resetting of the floating gate diffusion region; a source follower transistor, which is located on the upper surface of the substrate between the first drain region and the source region, and is used to amplify the photogenerated electrical signal; and a row selection transistor, which is located on the upper surface of the substrate between the source region and the second drain region, and is used to control the output of the source follower transistor.

[0018] A second aspect of the present invention provides a method for preparing an image sensor, comprising: providing a substrate; preparing a pixel structure along a second direction and a third direction in the substrate near the lower surface of the substrate in a first direction perpendicular to the substrate, wherein the second direction, the third direction and the first direction are orthogonal to each other; along the first direction, preparing a signal processing structure in the substrate near the upper surface of the substrate, the signal processing structure comprising a vertical gate structure, and the vertical gate structure extends to the pixel structure in the first direction.

[0019] According to the method for preparing an image sensor of an embodiment of the present invention, based on a vertical gate structure, a signal processing structure and a pixel structure are arranged in a vertically separated manner in a substrate, and the pixel structure extends in a second direction and a third direction respectively, that is, extends along a plane parallel to the substrate. This can increase the area occupied by the pixel structure covering the pixel region on the substrate, so that the pixel structure can have a larger area for receiving light, generate more photogenerated electrons, increase the full well capacity of the pixel itself, improve the performance of the image sensor, and do not require the aid of an external structure. The circuit design difficulty and the process manufacturing difficulty are low.

[0020] In some embodiments, the area of ​​the pixel structure extending in the second direction and the third direction fully covers the pixel region of the substrate.

[0021] In some embodiments, in a first direction perpendicular to the substrate, a pixel structure is prepared along a second direction and a third direction near the lower surface of the substrate, including: preparing a first pixel region and a second pixel region near the lower surface of the substrate in the first direction, the first pixel region is connected to the second pixel region, and the second pixel region extends along the second direction and the third direction.

[0022] In some embodiments, the preparation method further includes: preparing an isolation layer between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure.

[0023] In some embodiments, preparing an isolation layer between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure includes: before preparing the pixel structure, injecting a preset dose H of oxygen into a region between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure, and performing an annealing treatment for a preset time t and a preset temperature T to form a buried oxide layer in the substrate; wherein the value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 The value of the preset time t satisfies 3 hours ≤ t ≤ 6 hours, and the value of the preset temperature T satisfies 1100° C. ≤ T ≤ 1350° C.

[0024] In some embodiments, an isolation layer is prepared between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure, including: after preparing the pixel structure and before preparing the signal processing structure, preparing a doping layer with opposite conductivity to the pixel structure between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure.

[0025] In some embodiments, a vertical gate structure is prepared in the substrate, the vertical gate structure comprising a vertical gate trench, a silicon dioxide isolation layer and a polysilicon gate, wherein the vertical gate trench extends from the upper surface of the substrate to the pixel structure in the substrate along the first direction, the polysilicon gate is filled in the vertical gate trench and is partially located on the upper surface of the substrate, the silicon dioxide isolation layer is located between the polysilicon gate and the vertical gate trench and the silicon dioxide isolation layer covers the upper surface of the substrate; a floating gate diffusion region, a first drain region, a source region and a second drain region are respectively prepared on one side of the vertical gate trench, and the The floating gate diffusion region, the first drain region, the source region and the second drain region are arranged at intervals along the second direction, the floating gate diffusion region, the first drain region, the source region and the second drain region all extend from the upper surface of the substrate to the inside of the substrate along the first direction, and the floating gate diffusion region is connected to the insulating layer of the vertical gate trench; wherein, in the first direction, the isolation layer is located between the pixel structure and the floating gate diffusion region, the first drain region, the source region and the second drain region, and in the second direction, one end of the isolation layer is close to the vertical gate trench and is spaced a preset distance from the vertical gate trench.

[0026] In some embodiments, a signal processing structure is prepared near the upper surface of the substrate in the first direction, and also includes: preparing a reset transistor, a source follower transistor and a row selection transistor at corresponding positions on the upper surface of the substrate, wherein the reset transistor is located on the upper surface of the substrate between the floating gate diffusion region and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

[0027] A third aspect of the present invention provides an electronic device, comprising the image sensor of the above embodiment.

[0028] According to the electronic device of the embodiment of the present invention, by adopting the above-mentioned image sensor, the pixel structure of the image sensor occupies the entire pixel area, thereby improving the fill factor, making the full well capacity of the pixel itself larger, and improving the performance of the image sensor without the aid of an external structure, and the circuit design difficulty and process manufacturing difficulty are low.

[0029] A fourth aspect of the present invention provides a vehicle comprising at least one image sensor according to the above-mentioned embodiment.

[0030] According to the vehicle of the embodiment of the present invention, by adopting the above-mentioned image sensor, the pixel structure of the image sensor occupies the entire pixel area, thereby improving the fill factor, making the full well capacity of the pixel itself larger, and improving the performance of the image sensor, so that the vehicle can obtain clear external environment images under various circumstances, providing data support for control strategies based on image information.

[0031] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0033] Figure 1 is a schematic diagram of an image sensor according to an embodiment of the present invention;

[0034] Figure 2 is a schematic diagram of an image sensor according to another embodiment of the present invention;

[0035] Figure 3 is a flow chart of a method for preparing an image sensor according to an embodiment of the present invention;

[0036] Figure 4 is a flow chart of a SIMOX technology implementation according to an embodiment of the present invention;

[0037] Figure 5 is a schematic diagram of preparing a doping layer according to one embodiment of the present invention;

[0038] Figure 6 is a schematic diagram of manufacturing a vertical gate structure according to an embodiment of the present invention;

[0039] Figure 7 is a structural block diagram of an electronic device according to an embodiment of the present invention;

[0040] Figure 8 is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0041] Reference numerals:

[0042] Vehicles 300;

[0043] Electronic device 200;

[0044] Image sensor 100;

[0045] Signal processing structure 120; pixel structure 130; vertical gate structure 140;

[0046] Substrate 101; first pixel region 131; second pixel region 132; isolation layer 104; silicon dioxide isolation layer 141; polysilicon gate 142; floating gate diffusion region 121; first drain region 122; source region 123; second drain region 124; reset transistor 125; source follower transistor 126; row selection transistor 127. DETAILED DESCRIPTION

[0047] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0048] A first aspect of the present invention provides an image sensor, such as Figure 1 As shown, the image sensor 100 includes: a substrate 101 , a signal processing structure 120 and a pixel structure 130 .

[0049] Among them, the signal processing structure 120 is located in the substrate and is close to the upper surface of the substrate 101 in a first direction perpendicular to the substrate 101, and the signal processing structure 120 includes a vertical gate structure 140; the pixel structure 130 is located in the substrate and is close to the lower surface of the substrate 101 in the first direction, and the pixel structure 130 extends in the second direction and the third direction respectively, and the pixel structure 130 is connected to the vertical gate structure 140, and the second direction, the third direction and the first direction are orthogonal to each other. The area formed by the pixel structure 130 extending in the second direction and the third direction can occupy 30% or 50% or 80% or 100% of the corresponding substrate area. The larger the occupied area, the larger the area of ​​the pixel area of ​​the substrate is covered, and the larger the area receiving light, the more photogenerated electrons can be generated, which is more conducive to improving the full well capacity. Among them, the pixel area can be understood as the area receiving light.

[0050] Specifically, the first direction may be understood as a direction perpendicular to the substrate, the second direction may be understood as a direction parallel to the substrate 101, and the third direction may be understood as a direction in space that is orthogonal to both the second direction and the first direction.

[0051] In view of the shortcomings of the existing structure, the image sensor proposed by the present invention can improve the problem of limited full well capacity in the existing image sensor technology. Compared with the existing structure, the pixel structure of the image sensor of the present invention can occupy the entire pixel area, and its fill factor can reach almost 100%; the process characteristics of the traditional image sensor are that the pixel structure and the signal processing structure are located on the same surface, and the light enters the pixel structure from the back mainly to reduce the blocking of the metal layer to the incident light, and the light receiving area of ​​the pixel structure does not change due to the different light entry methods, so the area of ​​the pixel structure is still the main reason for limiting the full well capacity of the pixel.

[0052] like Figure 1As shown, the image sensor 100 achieves full coverage of a single pixel area by the pixel structure 130; because the internal processing transistor device of the pixel only occupies a distance of a few microns on the surface, the internal signal processing structure 120 and the pixel structure 130 are separated in the vertical dimension, and the signal processing structure 120 is manufactured on the upper surface, and the pixel structure 130 is manufactured on the lower surface. Then, the optical signal collected by the pixel structure 130 on the lower surface is transmitted upward through the vertical gate structure 140 to be amplified and processed by the signal processing structure 120 on the upper surface; compared with the existing structure, the pixel structure 130 of the present invention fully covers the entire single pixel area, thereby achieving the expansion of the pixel structure 130 area and thereby achieving the purpose of increasing the full well capacity of the pixel itself. Secondly, more transistors can be placed on the upper surface of the silicon wafer, thereby improving the performance of the sensor and enriching the functions of the image sensor.

[0053] According to the image sensor of the embodiment of the present invention, a vertical gate structure is set, the vertical gate structure is close to the upper surface of the substrate and the pixel structure is close to the lower surface of the substrate, that is, the signal processing structure and the pixel structure are arranged in a vertically separated manner in the substrate, and the pixel structure extends in the second direction and the third direction respectively, that is, extends along a plane parallel to the substrate, which can increase the proportion of the pixel area covered by the pixel structure on the substrate, so that the pixel structure can have a larger area for receiving light, generate more photogenerated electrons, increase the full well capacity of the pixel itself, and improve the performance of the image sensor without the help of external structures. The difficulty of circuit design and the difficulty of process manufacturing are low.

[0054] In some embodiments, the area of ​​the pixel structure extending in the second direction and the third direction fully covers the pixel region of the substrate.

[0055] Specifically, Figure 1 As shown, the pixel structure 130 extends in the second direction and the third direction, so that the area of ​​the pixel structure 130 fully covers the entire single pixel area corresponding to the substrate 101, that is, the filling factor of the pixel structure 130 reaches 100%, thereby greatly increasing the full well capacity of the pixel itself and improving the performance of the image sensor.

[0056] In some embodiments, Figure 1 As shown, the pixel structure 130 includes: a first pixel area 131 and a second pixel area 132 .

[0057] The first pixel region 131 wraps around the bottom of the vertical gate structure 140, and is used to transmit the collected photogenerated electrons to the signal processing structure 120; the second pixel region 132 is connected to the first pixel region 131, and the second pixel region 132 extends along the second direction and the third direction respectively, and is used to generate photogenerated electrons.

[0058] Specifically, the first pixel region 131 and the second pixel region 132 extend along the second direction and the third direction respectively, so that the area of ​​the pixel structure 130 fully covers the entire corresponding single pixel area, increasing the illumination area, thereby generating more photogenerated electrons. The second pixel region 132 transmits the generated photogenerated electrons to the first pixel region 131. After the first pixel region 131 collects the photogenerated electrons, the collected photogenerated electrons are transmitted to the signal processing structure 120 through the vertical gate structure 140 for processing, and finally the pixel signal is transmitted.

[0059] In some embodiments, Figure 1 As shown, the image sensor 100 further includes an isolation layer 104 .

[0060] Specifically, the isolation layer 104 is located between the other parts of the signal processing structure 120 except the vertical gate structure 140 and the pixel structure 130 in the first direction, and is used to isolate the signal processing structure 120 from the pixel structure 130. Since in the present application, unlike in the related art, the pixel structure 130 and the signal processing structure 120 are horizontally distributed in the substrate, and in the present application, the pixel structure 130 and the signal processing structure 120 are vertically distributed in the substrate in the vertical dimension, the isolation layer 104 is set between the pixel structure 130 and the signal processing structure 120 to achieve isolation between the two and avoid mutual influence between the two. In the embodiment, the isolation layer 104 can play a role of physical isolation or electrical isolation.

[0061] In some embodiments, the isolation layer 104 includes a physical isolation layer for achieving physical isolation between the signal processor structure 120 and the pixel structure 130; one end of the physical isolation layer in the second direction is close to the vertical gate 140 structure. Through physical isolation, the signal processing structure 120 is less affected by the substrate effect, a lower threshold voltage can be used, and the signal transmission is faster.

[0062] Specifically, in addition to the structure being different from the existing structure, the manufacturing process of the present invention is also very different from the existing structure. According to the different isolation conditions of the upper surface signal processing structure 120 and the lower surface pixel structure 130, the present invention provides different isolation types. For example, the isolation layer 104 can be a physical isolation layer, and a buried oxide layer is used to implement physical isolation.

[0063] In some embodiments, the physical isolation layer is a buried oxide layer prepared in the substrate using SIMOX (Separation implanted oxygen) technology.

[0064] Specifically, SIMOX technology is used to inject a high dose of oxygen between the upper surface signal processing structure 120 and the lower surface pixel structure 130, and then high temperature annealing is performed to form an isolation oxide layer, thereby finally achieving complete isolation between the surface signal processing structure 120 and the lower surface pixel structure 130.

[0065] In some embodiments, the isolation layer 104 includes an electrical isolation layer for achieving electrical isolation between the signal processor structure 120 and the pixel structure 130 ; one end of the electrical isolation layer is close to the vertical gate structure 104 in the second direction.

[0066] Specifically, for example, the electrical isolation layer uses doped P-type materials to implement PN junction electrical isolation, and the process starts after the pixel structure N-type doping and the well doping of the signal processing structure 120 are completed. The mask is used to perform P+ type doping in the corresponding area and high-temperature activation to achieve isolation between the upper and lower areas. The structural schematic diagram is shown in FIG. Figure 2 shown.

[0067] In some embodiments, the electrical isolation layer is a doped layer with conductivity opposite to that of the pixel structure. For example, if the pixel structure 130 region is N-type, the electrical isolation layer is P-type. The pixel structure 130 is mainly photosensitive electrons, and the doped layer can block other types of electrons from diffusing to the pixel structure 130 region, thereby achieving electrical isolation.

[0068] For example, a P+ type doping layer is implemented between the upper surface signal processing structure 120 and the lower surface pixel structure 130 to achieve electrical isolation between the upper and lower surfaces. The P+ type doping isolation layer is located between the signal processing structure 120 and the pixel structure 130, and it will not affect the diffusion of the device N+ type doping into the substrate.

[0069] In some embodiments, Figure 1 As shown, the vertical gate structure 140 includes: a vertical gate trench, a silicon dioxide isolation layer 141 and a polysilicon gate 142; the signal processor structure 120 also includes: a floating gate diffusion region 121, a first drain region 122, a source region 123 and a second drain region 124.

[0070] Among them, the vertical gate trench extends from the upper surface of the substrate 101 to the pixel structure 130 in the substrate 101 along a first direction, the polysilicon gate 142 is filled in the vertical gate trench and partially located on the upper surface of the substrate 101, the silicon dioxide isolation 141 layer is located between the polysilicon gate 142 and the vertical gate trench, and the silicon dioxide isolation layer 141 also covers the upper surface of the substrate 101.

[0071] The floating gate diffusion region 121 is located on one side of the vertical gate trench in the second direction and is insulated and connected to the vertical gate trench. The floating gate diffusion region 121, the first drain region 122, the source region 123 and the second drain region 124 all extend from the upper surface of the substrate 101 to the inside of the substrate 101 along the first direction. The floating gate diffusion region 121, the first drain region 122, the source region 123 and the second drain region 124 are arranged at intervals along the second direction.

[0072] In the first direction, the isolation layer 104 is located between the pixel structure 130 and the floating gate diffusion region 121, the first drain region 122, the source region 123, and the second drain region 124. In the second direction, one end of the isolation layer 104 is close to the vertical gate groove and is spaced apart from the vertical gate groove by a preset distance. The isolation layer 104 is spaced apart from the vertical gate structure because the vertical gate structure 140 is connected to a higher voltage signal to prevent the vertical gate groove from breaking down and connecting to the isolation layer 104, thereby affecting the isolation effect of the isolation layer 104.

[0073] Specifically, a silicon dioxide isolation 141 is arranged between the vertical gate trench and the polysilicon gate 142, and extends from the upper surface of the substrate to the pixel structure 130 in the substrate 101, so as to better transfer deep photogenerated electrons. The floating gate diffusion region 121 is used to store electrons generated by photoelectric conversion. The first drain region 122 and the second drain region 124 play an emitting role, the second drain region 124 outputs an image signal, and the source region 123 plays a collecting role, so as to realize the basic image acquisition function of the image sensor.

[0074] In some embodiments, Figure 1 As shown, the signal processing structure 120 further includes: a reset transistor 125 , a source follower transistor 126 , and a row selection transistor 127 .

[0075] Among them, the reset transistor 125 is located on the upper surface of the substrate between the floating gate diffusion region 121 and the first drain region 122, and is used to control the reset of the floating gate diffusion region 121; the source follower 126 is located on the upper surface of the substrate between the first drain region 122 and the source region 123, and is used to amplify the photogenerated electrical signal; the row selection transistor 127 is located on the upper surface of the substrate between the source region 123 and the second drain region 124, and is used to control the output of the source follower transistor 126.

[0076] Specifically, the second pixel area 132 transmits the generated photogenerated electrons to the first pixel area 131. After the first pixel area 131 collects the photogenerated electrons, the collected photogenerated electrons are transmitted to the signal processing structure 120 for processing through the vertical gate structure 140. The reset transistor 125 controls the resetting of the floating gate diffusion area 121, the source follower transistor 126 amplifies the photogenerated electrical signal, and the row selection transistor 127 controls the output of the electrical signal amplified by the source follower transistor 126, thereby realizing the control of the image acquisition process of the image sensor and the transmission of the image signal.

[0077] Based on the structure of the image sensor of the above embodiment, Figure 3 A method for preparing an image sensor according to an embodiment of a second aspect of the present invention is described. The method at least includes steps S1 to S3.

[0078] Step S1, providing a substrate.

[0079] Specifically, a substrate is provided, and image sensors and other devices are prepared based on the substrate. The substrate may be a silicon substrate. Silicon is a common semiconductor material and is widely used in the semiconductor integrated circuit industry. It has a complete industrial chain, and the silicon substrate is cheap, available in large sizes, and has mature device technology.

[0080] Step S2, preparing a pixel structure in a first direction perpendicular to the substrate and in a second direction and a third direction inside the substrate and close to the lower surface of the substrate.

[0081] The second direction, the third direction and the first direction are orthogonal to each other.

[0082] Specifically, the pixel structure extends in the second direction and the third direction so that the area of ​​the pixel structure fully covers the entire corresponding single pixel area, thereby increasing the full well capacity of the pixel itself and improving the performance of the image sensor. The pixel structure can be a photodiode, which serves as the upper surface after subsequent flipping to receive incident light and generate a photogenerated signal.

[0083] Step S3: preparing a signal processing structure in the substrate close to the upper surface of the substrate along the first direction.

[0084] Specifically, the signal processing structure is made on the upper surface of the semiconductor in the same vertical dimension as the pixel structure, and is subsequently flipped to serve as the lower surface for processing the photogenerated signal. The signal processing structure includes: a vertical gate structure, a floating gate diffusion region, a first drain region, a source region, a second drain region, a reset transistor, a source follower transistor, and a row selection transistor. The vertical gate structure transmits the collected photogenerated electrons to the signal processing structure for processing, the reset transistor controls the resetting of the floating gate diffusion region, the source follower transistor 126 amplifies the photogenerated electrical signal, and the row selection transistor controls the electrical signal amplified by the source follower transistor to output, thereby realizing the control of the image acquisition process of the image sensor and the transmission of the image signal.

[0085] According to the method for preparing an image sensor of an embodiment of the present invention, based on a vertical gate structure, a signal processing structure and a pixel structure are arranged in a vertically separated manner in a substrate, and the pixel structure extends in a second direction and a third direction respectively, that is, extends along a plane parallel to the substrate. This can increase the area occupied by the pixel structure covering the pixel region on the substrate, so that the pixel structure can have a larger area for receiving light, generate more photogenerated electrons, increase the full well capacity of the pixel itself, improve the performance of the image sensor, and do not require the aid of an external structure. The circuit design difficulty and the process manufacturing difficulty are low.

[0086] In some embodiments, the area of ​​the pixel structure extending in the second direction and the third direction fully covers the pixel region of the substrate, so that the filling factor of the pixel structure can reach 100%, thereby greatly improving the full well capacity.

[0087] Specifically, the pixel structure extends in the second direction and the third direction so that the area of ​​the pixel structure fully covers the entire corresponding single pixel area, thereby increasing the full well capacity of the pixel itself and improving the performance of the image sensor.

[0088] In some embodiments, in a first direction perpendicular to the substrate, a pixel structure is prepared along a second direction and a third direction near the lower surface of the substrate, including: preparing a first pixel region and a second pixel region near the lower surface of the substrate in the first direction, the first pixel region is connected to the second pixel region, and the second pixel region extends along the second direction and the third direction.

[0089] Specifically, the second pixel region extends along the second direction and the third direction respectively, so that the area of ​​the second pixel region fully covers the corresponding entire single pixel area, increasing the illumination area to generate photogenerated electrons, and the second pixel region transmits the generated photogenerated electrons to the first pixel region. After the first pixel region collects the photogenerated electrons, the collected photogenerated electrons are transmitted to the signal processing structure through the vertical gate structure for processing.

[0090] In some embodiments, the preparation method further includes: preparing an isolation layer between the position of the substrate corresponding to the signal processing structure and the position of the pixel structure, so as to achieve isolation between the signal processing structure and the pixel structure to avoid mutual influence between the two. In the embodiment, the isolation layer 104 can play a role of physical isolation or electrical isolation.

[0091] Specifically, the isolation layer is located between the signal processing structure and the pixel structure for isolation. According to the different isolation conditions of the upper surface signal processing structure and the lower surface pixel structure, two types of isolation layers are provided. Different isolation types have different production and manufacturing processes. One uses a buried oxide layer to implement physical isolation, and the other uses doped P-type material to implement PN junction electrical isolation.

[0092] In some embodiments, an isolation layer is prepared between the position of the corresponding signal processing structure and the position of the corresponding pixel structure of the substrate, including: before preparing the pixel structure, injecting a preset dose H of oxygen element into the area between the position of the corresponding signal processing structure and the position of the corresponding pixel structure of the substrate, and performing annealing treatment with a preset time t and a preset temperature T to form a buried oxide layer in the substrate.

[0093] The value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 , for example, H = 1.8*10 18 cm -2 ; The value of the preset time t satisfies 3 hours ≤ t ≤ 6 hours, for example, t = 4 hours or 5 hours; the value of the preset temperature T satisfies 1100°C ≤ T ≤ 1350, for example, T = 1200°C or 1300°C, etc.

[0094] Specifically, by introducing the SIMOX technology in the advanced silicon-on-insulator manufacturing process into the manufacturing process of the image sensor, high-concentration oxygen doping is performed below the signal processing structure and long-term high-temperature annealing is performed to allow the injected oxygen elements to chemically react with silicon to produce buried silicon oxide to achieve isolation between the upper surface device and the lower surface pixel structure.

[0095] SOI (silicon on insulator) is the abbreviation of silicon on insulator, and its structure is a thin silicon layer on the surface - silicon dioxide insulating layer material - silicon substrate, and the integrated circuit is manufactured on the thin silicon layer on the surface. Compared with the integrated circuit manufactured on the bulk silicon substrate, the device manufactured on SOI has many advantages, such as faster transmission speed, smaller parasitic capacitance, smaller operating voltage and higher radiation resistance. Therefore, the present invention introduces some characteristics of SOI into the image sensor to improve some performances of the image sensor. In the SOI manufacturing process, SIMOX is one of the earliest and lowest-cost technologies. It uses high-dose ion implantation technology to implant oxygen elements into the silicon substrate, and then after a long period of high-temperature annealing, the oxygen elements in the silicon wafer react chemically with silicon to form a silicon oxide isolation buried layer, and the upper surface signal processing structure and the lower surface pixel structure are isolated by the silicon oxide isolation buried layer.

[0096] According to the following Figure 4 Describe the implementation process for introducing SIMOX technology into image sensor manufacturing.

[0097] Step S4, providing a semiconductor substrate, wherein the substrate has an oxygen pad and a shallow trench isolation structure.

[0098] Step S5, using the photoresist as a barrier layer, injecting a high dose of oxygen into the substrate through ions, and then removing the photoresist.

[0099] Step S6, performing high temperature and long time annealing to react the implanted oxygen element with the silicon element to form a buried silicon oxide layer.

[0100] Step S7, performing N-type doping and isolation doping in the substrate, the doping depth of the second pixel region is completely located below the buried oxide layer and covers the entire substrate area.

[0101] Step S8, performing vertical gate etching, growth of silicon oxide, and filling etching of polysilicon in the doped region of the substrate.

[0102] Step S9, performing high temperature and long time annealing to react the implanted oxygen element with the silicon element to generate silicon oxide.

[0103] The above steps can be achieved Figure 1 Compared with the traditional structure image sensor, Figure 1There are two biggest differences in the structure of: one is the full coverage of the single pixel area by the second pixel doping, and the other is that the signal processing structure of the image sensor is located on the upper surface of the pixel structure and isolated by a buried oxide layer. The full coverage of the single pixel area by the second pixel doping increases the photosensitive area of ​​the pixel structure, thereby increasing the sensitivity and full well capacity of the image sensor and other parameters, greatly improving the performance of the image sensor. The signal processing structure and the pixel structure are in the same wafer and are located above the pixel area. In order to prevent the leakage current and noise of the signal processing structure from affecting the pixel structure during operation, SIMOX technology is used to generate a layer of buried silicon oxide between the pixel structure and the signal processing structure to achieve physical isolation. This isolation structure avoids mutual interference between the upper and lower signals.

[0104] In some embodiments, an isolation layer is prepared between the position of the corresponding signal processing structure and the position of the corresponding pixel structure of the substrate, including: after preparing the pixel structure and before preparing the signal processing structure, preparing a doping layer with conductivity opposite to that of the pixel structure between the position of the corresponding signal processing structure and the position of the corresponding pixel structure of the substrate.

[0105] Specifically, a P+ type doping layer is prepared between the upper surface signal processing structure and the lower surface pixel structure to achieve electrical isolation between the upper and lower surfaces. The structural schematic diagram is shown in FIG. Figure 2 As shown; the P+ doped isolation layer is located between the signal processing structure and the pixel structure to achieve electrical isolation between the two regions, and will not affect the diffusion of the device's N+ doping into the substrate.

[0106] The process of preparing the doping layer is as follows Figure 5 As shown. Step ①, after the pixel structure N-type doping and the signal processing structure well doping are completed, the process starts, and the P+ type doping is performed in the corresponding area using a mask and high-temperature activation; Step ②, the growth of the vertical gate oxide layer and the filling of polysilicon; Step ③, the implementation of the sidewall process, N+ doping and subsequent processes.

[0107] Compared with the physical isolation method of the buried oxide layer, the process flow of P+ doping isolation is simpler and has the highest degree of compatibility with the original production process. It only requires high-energy and high-dose P+ doping before N+ doping, and annealing to activate the P+ doping elements and repair damage to achieve electrical isolation of the upper and lower areas to avoid mutual interference during operation. Therefore, after the subsequent back-illuminated process is completed, the pixel structure flips to become the light-receiving surface and generates photogenerated electrons in the pixel area and transmits them to the signal processing structure through the vertical gate for subsequent processing.

[0108] In some embodiments, preparing a signal processing structure near an upper surface of a substrate in a first direction includes:

[0109] A vertical gate structure is prepared in a substrate, the vertical gate structure comprising a vertical gate trench, a silicon dioxide isolation layer and a polysilicon gate, wherein the vertical gate trench extends from the upper surface of the substrate to the pixel structure in the substrate along a first direction, the polysilicon gate is filled in the vertical gate trench and partially located on the upper surface of the substrate, the silicon dioxide isolation layer is located between the polysilicon gate and the vertical gate trench, and the silicon dioxide isolation layer covers the upper surface of the substrate;

[0110] A floating gate diffusion region, a first drain region, a source region, and a second drain region are respectively prepared on one side of the vertical gate trench, the floating gate diffusion region, the first drain region, the source region, and the second drain region are arranged at intervals along the second direction, the floating gate diffusion region, the first drain region, the source region, and the second drain region all extend from the upper surface of the substrate to the inside of the substrate along the first direction, and the floating gate diffusion region is connected to the insulating layer of the vertical gate trench;

[0111] In the first direction, the isolation layer is located between the pixel structure and the floating gate diffusion region, the first drain region, the source region, and the second drain region. In the second direction, one end of the isolation layer is close to the vertical gate trench and is spaced a preset distance from the vertical gate trench.

[0112] Specifically, Figure 6 This is a schematic diagram of the vertical gate structure preparation process. Step ① is to use a mask to implement high-dose oxygen element injection; Step ② is high-temperature annealing to completely react the injected oxygen element with the silicon element to generate silicon dioxide; Step ③ is to implement pixel structure related doping injection; Step ④ is the growth of the vertical gate and polysilicon filling; Step ⑤ is to implement the sidewall process, N+ doping and subsequent processes.

[0113] A silicon dioxide isolation layer is set between the vertical gate trench and the polysilicon gate, and extends from the upper surface of the substrate to the pixel structure inside the substrate, which can better transfer deep-level photogenerated electrons. The floating gate diffusion region is used to store electrons generated by photoelectric conversion. The first drain region and the second drain region play an emitting role, the second drain region outputs the image signal, and the source region plays a collecting role to realize the basic image acquisition function of the image sensor.

[0114] In some embodiments, preparing the signal processing structure near the upper surface of the substrate in the first direction further includes: preparing a reset transistor, a source follower transistor and a row selection transistor at corresponding positions on the upper surface of the substrate.

[0115] The reset transistor is located on the upper surface of the substrate between the floating gate diffusion region and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

[0116] Specifically, the second pixel area transmits the generated photogenerated electrons to the first pixel area. After the first pixel area collects the photogenerated electrons, the collected photogenerated electrons are transmitted to the signal processing structure for processing through the vertical gate structure. The reset transistor controls the resetting of the floating gate diffusion area, the source follower transistor amplifies the photogenerated electrical signal, and the row selection transistor controls the output of the electrical signal amplified by the source follower transistor 126, thereby realizing the control of the image acquisition process of the image sensor and the transmission of the image signal.

[0117] A third aspect of the present invention provides an electronic device, such as Figure 7 As shown, the electronic device 200 includes the image sensor 100 .

[0118] According to the electronic device of the embodiment of the present invention, by adopting the above-mentioned image sensor, the pixel structure of the image sensor occupies the entire pixel area, thereby improving the fill factor, making the full well capacity of the pixel itself larger, and improving the performance of the image sensor without the aid of an external structure, and the circuit design difficulty and process manufacturing difficulty are low.

[0119] A fourth aspect of the present invention provides a vehicle, such as Figure 8 As shown, vehicle 300 includes image sensor 100 .

[0120] According to the vehicle of the embodiment of the present invention, by adopting the above-mentioned image sensor, the pixel structure of the image sensor occupies the entire pixel area, thereby improving the fill factor, making the full well capacity of the pixel itself larger, and improving the performance of the image sensor, so that the vehicle can obtain clear external environment images under various circumstances, providing data support for control strategies based on image information.

[0121] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0122] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. An image sensor, characterized in that: include: substrate; a signal processing structure, the signal processing structure being located in the substrate and close to an upper surface of the substrate in a first direction perpendicular to the substrate, the signal processing structure comprising a vertical gate structure; A pixel structure, wherein the pixel structure is located in the substrate and close to the lower surface of the substrate in the first direction, the pixel structure extends in the second direction and the third direction respectively, and the pixel structure is connected to the vertical gate structure, wherein the second direction, the third direction and the first direction are orthogonal to each other.

2. The image sensor according to claim 1, characterized in that The area of ​​the pixel structure extending in the second direction and the third direction completely covers the pixel region of the substrate.

3. The image sensor according to claim 1 or 2, characterized in that: The pixel structure comprises: a first pixel region, the first pixel region wrapping the bottom of the vertical gate structure and used for transmitting the collected photogenerated electrons to the signal processing structure; A second pixel region, wherein the second pixel region is connected to the first pixel region, and the second pixel region extends along the second direction and the third direction respectively, and is used to generate the photogenerated electrons.

4. The image sensor according to claim 1, characterized in that The image sensor further comprises: An isolation layer is located between the other parts of the signal processing structure except the vertical gate structure and the pixel structure in the first direction, and is used for isolating the signal processing structure from the pixel structure.

5. The image sensor according to claim 4, characterized in that: The isolation layer includes a physical isolation layer, which is used to achieve physical isolation between the signal processor structure and the pixel structure; One end of the physical isolation layer is close to the vertical gate structure in the second direction.

6. The image sensor according to claim 5, characterized in that: The physical isolation layer is a buried oxide layer prepared in the substrate using SIMOX technology.

7. The image sensor according to claim 4, characterized in that: The isolation layer comprises an electrical isolation layer, which is used to realize electrical isolation between the signal processor structure and the pixel structure; One end of the electrical isolation layer is close to the vertical gate structure in the second direction.

8. The image sensor according to claim 7, characterized in that: The electrical isolation layer is a doped layer having a conductivity opposite to that of the pixel structure.

9. The image sensor according to claim 4, characterized in that: The vertical gate structure comprises a vertical gate trench, a silicon dioxide isolation layer and a polysilicon gate, wherein the vertical gate trench extends from the upper surface of the substrate to the pixel structure in the substrate along the first direction, the polysilicon gate is filled in the vertical gate trench and is partially located on the upper surface of the substrate, the silicon dioxide isolation layer is located between the polysilicon gate and the vertical gate trench, and the silicon dioxide isolation layer also covers the upper surface of the substrate; The signal processor structure further includes a floating gate diffusion region, a first drain region, a source region, and a second drain region, wherein the floating gate diffusion region is located on one side of the vertical gate trench in the second direction, the floating gate diffusion region, the first drain region, the source region, and the second drain region all extend from the upper surface of the substrate into the substrate along the first direction, and the floating gate diffusion region, the first drain region, the source region, and the second drain region are arranged at intervals along the second direction; In the first direction, the isolation layer is located between the pixel structure and the floating gate diffusion region, the first drain region, the source region, and the second drain region. In the second direction, one end of the isolation layer is close to the vertical gate trench and is spaced a preset distance from the vertical gate trench.

10. The image sensor according to claim 9, characterized in that: The signal processing structure also includes: a reset transistor, the reset transistor being located on the upper surface of the substrate between the floating gate diffusion region and the first drain region and being used for controlling the resetting of the floating gate diffusion region; A source follower transistor, the source follower being located on the upper surface of the substrate between the first drain region and the source region, and being used to amplify a photogenerated electrical signal; A row selection transistor is located on the upper surface of the substrate between the source region and the second drain region and is used to control the output of the source follower transistor.

11. A method for preparing an image sensor, characterized in that: include: providing a substrate; In a first direction perpendicular to the substrate, a pixel structure is prepared in the substrate along a second direction and a third direction near a lower surface of the substrate, wherein the second direction, the third direction and the first direction are orthogonal to each other; A signal processing structure is prepared in the substrate near the upper surface of the substrate along the first direction, wherein the signal processing structure comprises a vertical gate structure extending to the pixel structure in the first direction.

12. The preparation method according to claim 11, characterized in that: The area of ​​the pixel structure extending in the second direction and the third direction completely covers the pixel region of the substrate.

13. The preparation method according to claim 11 or 12, characterized in that: In a first direction perpendicular to the substrate, a pixel structure is prepared along a second direction and a third direction close to a lower surface of the substrate, comprising: A first pixel region and a second pixel region are prepared near the lower surface of the substrate in the first direction, the first pixel region is connected to the second pixel region, and the second pixel region extends along the second direction and the third direction.

14. The preparation method according to claim 11, characterized in that: The preparation method further comprises: An isolation layer is prepared between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure.

15. The preparation method according to claim 14, characterized in that: Preparing an isolation layer between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure, comprising: Before preparing the pixel structure, a preset dose H of oxygen is implanted into a region of the substrate between a position corresponding to the signal processing structure and a position corresponding to the pixel structure, and an annealing treatment is performed for a preset time t and a preset temperature T to form a buried oxide layer in the substrate; The value of the preset dose H satisfies 1.6*10 18 cm-2≤H≤2.0*10 18 cm-2, the value of the preset time length t satisfies 3 hours ≤ t ≤ 6 hours, and the value of the preset temperature T satisfies 1100°C ≤ T ≤ 1350°C.

16. The preparation method according to claim 14, characterized in that: Preparing an isolation layer between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure, comprising: After the pixel structure is prepared and before the signal processing structure is prepared, a doping layer having conductivity opposite to that of the pixel structure is prepared between a position of the substrate corresponding to the signal processing structure and a position corresponding to the pixel structure.

17. The preparation method according to claim 14, characterized in that: Preparing a signal processing structure near the upper surface of the substrate in the first direction, comprising: A vertical gate structure is prepared in the substrate, the vertical gate structure comprising a vertical gate trench, a silicon dioxide isolation layer and a polysilicon gate, wherein the vertical gate trench extends from the upper surface of the substrate to the pixel structure in the substrate along the first direction, the polysilicon gate is filled in the vertical gate trench and is partially located on the upper surface of the substrate, the silicon dioxide isolation layer is located between the polysilicon gate and the vertical gate trench, and the silicon dioxide isolation layer covers the upper surface of the substrate; A floating gate diffusion region, a first drain region, a source region, and a second drain region are respectively prepared on one side of the vertical gate trench, wherein the floating gate diffusion region, the first drain region, the source region, and the second drain region are arranged at intervals along the second direction, and the floating gate diffusion region, the first drain region, the source region, and the second drain region all extend from the upper surface of the substrate into the substrate along the first direction; Among them, in the first direction, the isolation layer is located between the pixel structure and the floating gate diffusion region, the first drain region, the source region, and the second drain region, and in the second direction, one end of the isolation layer is close to the vertical gate trench and is spaced a preset distance from the vertical gate trench.

18. The preparation method according to claim 17, characterized in that: Preparing a signal processing structure near the upper surface of the substrate in the first direction, further comprising: A reset transistor, a source follower transistor and a row selection transistor are respectively prepared at corresponding positions on the upper surface of the substrate, wherein the reset transistor is located on the upper surface of the substrate between the floating gate diffusion region and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

19. An electronic device, characterized in that: The image sensor comprises the image sensor according to any one of claims 1 to 10.

20. A vehicle, characterized in that: Comprising at least one image sensor according to any one of claims 1-10.

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