Method for manufacturing an image sensor and image sensor

Abstract

The present application discloses a method for manufacturing an image sensor and an image sensor, relating to the technical field of semiconductor manufacturing. The manufacturing method includes: forming a first stacked structure on the surface of a substrate; forming a deep trench isolation structure in the first stacked structure to isolate the first stacked structure into a plurality of photodiode regions; and forming a plurality of doped regions in the photodiode regions; wherein, doping elements diffuse from the surface of the photodiode regions into the interior thereof to form a plurality of doped regions, the plurality of doped regions extend from the surface of the photodiode regions into the interior thereof, and the extension depths of different doped regions are different, so as to form doped regions with different layer structures.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and particularly to a method for manufacturing an image sensor and an image sensor. Background Art

[0002] An image sensor refers to a device that converts an optical image into a pixel signal output. It is divided into a charge-coupled device (CCD) image sensor and a complementary metal-oxide-semiconductor (CMOS) image sensor according to different photosensitive elements and photosensitive principles. Among them, the complementary metal-oxide-semiconductor image sensor, as a widely used image sensor, includes a front side illumination (FSI) image sensor and a back side illumination (BSI) image sensor. In the existing manufacturing method of the back side illumination image sensor, a method of using high-energy ion implantation (IMP) in the front end of line (FEOL) to form a photodiode (PD) will cause damage to the substrate and thus aggravate the crosstalk effect of the image sensor. Summary of the Invention

[0003] In view of the above problems, this application provides a method for manufacturing an image sensor and an image sensor, which uses a diffusion process to form a doped region in the photodiode region to avoid the adverse effects brought by using the high-energy ion implantation method.

[0004] According to one aspect of the present invention, a method for manufacturing an image sensor is provided, including: forming a first stack structure on the surface of a substrate; forming a deep trench isolation structure in the first stack structure to isolate the first stack structure into a plurality of photodiode regions; and forming a plurality of doped regions in the photodiode regions; wherein, the doping element diffuses from the surface of the photodiode region into its interior to form a plurality of doped regions, the plurality of doped regions extend from the surface of the photodiode region into its interior, and the extension depths of different doped regions are different, forming doped regions with different layer structures.

[0005] Optionally, a doped region is formed in the photodiode region, including: forming a third stacked structure on the surface of the photodiode region, the third stacked structure including a plurality of doped semiconductor material layers; and performing laser annealing treatment on the third stacked structure so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form a doped region; wherein, via the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures.

[0006] Optionally, a plurality of doped semiconductor material layers are sequentially formed on the substrate by an epitaxial deposition process to form a first stacked structure, and the doping type of the doped region is the same as that of the first stacked structure.

[0007] Optionally, before forming the first stacked structure on the surface of the substrate, it further includes: forming a shallow trench isolation structure extending from the first surface of the substrate into its interior; performing ion implantation from the first surface of the substrate into its interior to form a blocking layer in the substrate, the blocking layer separating the substrate into a first part on one side of the blocking layer and a second part on the other side of the blocking layer, and the shallow trench isolation structure is located in the first part; and removing the second part of the substrate to expose the surface of the blocking layer; the first stacked structure is located on the surface of the blocking layer.

[0008] Optionally, the doping type of the blocking layer is opposite to that of the first stacked structure.

[0009] Optionally, the method for forming a deep trench isolation structure in the first stacked structure includes: forming a deep trench penetrating the first stacked structure, the deep trench exposing the surface of the blocking layer; and forming an isolation medium filling the deep trench by an epitaxial deposition process to form a deep trench isolation structure; the isolation medium filling the deep trench is in contact with the blocking layer.

[0010] Optionally, the isolation medium of the deep trench isolation structure is a doped semiconductor layer material layer, and the doping type of the isolation medium of the deep trench isolation structure is opposite to that of the first stacked structure.

[0011] According to another aspect of the present invention, there is provided an image sensor, comprising: a substrate; a first stacked structure located on the substrate; a deep trench isolation structure penetrating the first stacked structure, the deep trench structure isolating the first stacked structure to form a plurality of photodiode regions; and a plurality of doped regions located in the photodiode regions, wherein doping elements diffuse from the surface of the photodiode region into its interior to form a plurality of doped regions, the plurality of doped regions extend from the surface of the photodiode region into its interior, and the extension depths of different doped regions are different, forming doped regions with different layer structures.

[0012] Optionally, the first stacked structure includes a plurality of doped semiconductor material layers, and the doping type of the doped regions is the same as the doping type of the first stacked structure.

[0013] Optionally, it further includes a barrier layer, the barrier layer is located on the substrate, and the first stacked structure is located on the barrier layer; the deep trench isolation structure penetrates the first stacked structure and contacts the barrier layer; both the deep trench isolation structure and the barrier layer are made of doped semiconductor material layers, and the doping types of the deep trench isolation structure and the barrier layer are opposite to the doping type of the first stacked structure.

[0014] The unexpected technical effect of this application is:

[0015] According to the manufacturing method of the image sensor provided by this application, by adopting a diffusion process to form a plurality of doped regions in the photodiode region, and not adopting an ion implantation process, the problems of substrate damage and increased crosstalk caused by the ion implantation process are avoided.

[0016] Furthermore, a third stacked structure including a plurality of doped semiconductor material layers is formed on the surface of the photodiode region, and the third stacked structure is subjected to laser annealing treatment so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form doped regions; wherein, via the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures. This structure increases the number of photo-generated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region; at the same time, since forming doped regions with different layer structures can be completed by only one laser annealing process, the cost of forming doped regions with different layer structures is reduced.

[0017] Furthermore, in the manufacturing method of the image sensor provided by this application, the first stacked structure is formed by an epitaxial deposition process, and also does not adopt an ion implantation process, avoiding the problems of substrate damage and increased crosstalk caused by the ion implantation process.

[0018] In the embodiment of the present application, the photodiode region is formed by multiple different semiconductor material layers, and multiple doping regions are sequentially stacked from outside to inside in the photodiode region. This structure increases the number of photo-generated carriers in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region. This enables the image sensor to capture more photons under low-light conditions, and further enables the image sensor to be applicable to low-light conditions. Description of the Drawings

[0019] Through the following description of the embodiments of the present application with reference to the drawings, the above and other objects, features, and advantages of the present application will become clearer. In the drawings:

[0020] Figure 1 Showing a schematic cross-sectional view of a conventional back-illuminated image sensor;

[0021] Figure 2 Showing a schematic diagram of an image sensor provided according to an embodiment of the present application;

[0022] Figure 3 Showing a flowchart of a manufacturing method of an image sensor according to an embodiment of the present application;

[0023] Figures 4a to 4j Showing schematic diagrams of steps of an exemplary manufacturing method of an image sensor provided according to an embodiment of the present application, where:

[0024] Figure 4a Showing a schematic cross-sectional view of forming a shallow trench isolation structure extending from the first surface of the substrate into the substrate and forming a barrier layer in the substrate in an embodiment of the present application;

[0025] Figure 4b Showing a schematic diagram of removing a second part of the substrate to expose the surface of the barrier layer in an embodiment of the present application;

[0026] Figure 4c Showing a schematic diagram of forming a first stacked structure in an embodiment of the present application;

[0027] Figure 4d Showing a schematic diagram of forming a deep trench in the first stacked structure in an embodiment of the present application;

[0028] Figure 4e Showing a schematic diagram of filling the deep trench to form a deep trench isolation structure in an embodiment of the present application;

[0029] Figure 4f Showing a schematic diagram of forming a grid structure on the surface of the deep trench isolation structure in an embodiment of the present application;

[0030] Figure 4gSchematic diagram showing the formation of a third stacked structure in the photodiode region in an embodiment of the present application;

[0031] Figure 4h Schematic diagram showing the formation of doped regions with different layer structures in an embodiment of the present application;

[0032] Figure 4i Schematic diagram showing the removal of the third stacked structure in an embodiment of the present application;

[0033] Figure 4j Schematic diagram showing the formation of an isolation dielectric layer and a filter element in an embodiment of the present application.

[0034] Description of reference numerals: 210 - semiconductor layer; 211 - substrate; 212 - barrier layer; 213 - first stacked structure; 2131 - first semiconductor material layer; 2132 - second semiconductor material layer; 2133 - third semiconductor material layer; 2134 - fourth semiconductor material layer; 220 - shallow trench isolation structure; 230 - deep trench isolation structure; 230a - deep trench; 241 - first dielectric layer; 242 - second dielectric layer; 243 - pad; 244 - connection structure; 245 - polysilicon structure; 250 - mask material layer; 251 - first mask layer; 252 - second mask layer; 253 - third mask layer; 254 - fourth mask layer; 260 - grid structure; 261 - dielectric layer; 262 - high-k dielectric layer; 263 - protective layer; 264 - metal layer; 270 - third stacked structure; 271 - first doped semiconductor material layer; 272 - second doped semiconductor material layer; 281 - first doped region; 282 - second doped region; 291 - isolation dielectric layer; 292a - blue filter element; 292b - green filter element; 292c - red filter element. Detailed description of the specific implementation

[0035] The present application will be described in more detail below with reference to the accompanying drawings. In the respective drawings, the same elements are denoted by like reference numerals. For clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0036] The present application can be presented in various forms, and some examples will be described below.

[0037] Figure 1 Shown is a conventional back-illuminated image sensor. As Figure 1As shown in the figure, the back-illuminated image sensor includes a substrate 211, in which a plurality of photodiode regions are provided, as well as deep trench isolation (DTI) structures 230 and shallow trench isolation (STI) structures 220 for separating adjacent photodiode regions. The shallow trench isolation structures 220 extend from the first surface of the substrate 211 into its interior, and the deep trench isolation structures 230 extend from the second surface of the substrate 211 into its interior, where the first surface and the second surface of the substrate 211 are opposite to each other. A stacked first dielectric layer 241 and second dielectric layer 242 are formed on the first surface of the substrate 211, where the first dielectric layer 241 is located on the first surface of the substrate 211, and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the substrate 211. A pad 243 is provided on the surface of the second dielectric layer 242 away from the first dielectric layer 241. The pad 243 is connected to a polysilicon structure 245 provided in the first dielectric layer 241 through a connection structure 244 provided in the second dielectric layer 242. The material used for the pad 243 is, for example, copper (Cu). A mask material layer 250 is formed on the second surface of the substrate 211, and a grating structure 260 formed by laminating different materials is provided on the surface of the mask material layer 250. The mask material layer 250 includes a first mask layer 251, a second mask layer 252, a third mask layer 253, and a fourth mask layer 254. Among them, the materials used for the first mask layer 251 and the fourth mask layer 254 can be silicon dioxide (SiO2), the material used for the second mask layer 252 can be aluminum oxide (Al2O3), and the material used for the third mask layer 253 can be tantalum oxide (Ta2O5). The material used for the substrate 211 is, for example, silicon (Si), and the thickness can be 3 um. The thickness of the first mask layer 251 can be 120 angstroms, the thickness of the second mask layer 252 can be 75 angstroms, the thickness of the third mask layer 253 can be 520 angstroms, and the thickness of the fourth mask layer 254 can be 1800 angstroms.

[0038] In the manufacturing method of the existing back-illuminated image sensor, the photodiode regions are formed by implanting ions from the first surface of the substrate 211 into the substrate 211 in the front-end process. Since the photodiode regions extend from the second surface of the substrate 211 into its interior and have a certain distance from the first surface of the substrate 211, high-energy ions need to be implanted from the first surface of the substrate 211 into the substrate 211. However, the high-energy ion implantation is bound to cause damage to the substrate 211 and thus exacerbate the signal crosstalk problem between the photodiode regions. Figure 1 As shown in the figure, the photodiode regions are formed by implanting ions from the first surface of the substrate 211 into the substrate 211 in the front-end process. Since the photodiode regions extend from the second surface of the substrate 211 into its interior and have a certain distance from the first surface of the substrate 211, high-energy ions need to be implanted from the first surface of the substrate 211 into the substrate 211. However, the high-energy ion implantation is bound to cause damage to the substrate 211 and thus exacerbate the signal crosstalk problem between the photodiode regions.

[0039] In view of this, an embodiment of the present application provides an image sensor. Figure 2A schematic diagram of an image sensor provided according to an embodiment of the present application is shown, as Figure 2 shown, the image sensor includes a semiconductor layer 210, a shallow trench isolation structure 220 extending from the first surface of the semiconductor layer 210 into its interior, and a deep trench isolation structure 230 extending from the second surface of the semiconductor layer 210 into its interior.

[0040] The semiconductor layer 210 sequentially includes a stacked substrate 211, a barrier layer 212, and a first stacked structure 213 from bottom to top. The shallow trench isolation structure 220 extends from the surface of the substrate 211 away from the barrier layer 212 (i.e., the first surface of the semiconductor layer 210) into the interior of the substrate 211 until it reaches the surface of the barrier layer 212 close to the substrate 211, that is, the shallow trench isolation structure 220 penetrates the substrate 211 to reach the surface of the barrier layer 212 close to the substrate 211. The deep trench isolation structure 230 extends from the surface of the first stacked structure 213 (i.e., the second surface of the semiconductor layer 210) into the interior of the first stacked structure 213 until it reaches the surface of the barrier layer 212 close to the first stacked structure 213, that is, the deep trench isolation structure 230 penetrates the first stacked structure 213 to reach the surface of the barrier layer 212 close to the first stacked structure 213. Among them, the first stacked structure 213 is isolated by the deep trench isolation structure 230 and the shallow trench isolation structure 220 to form a plurality of photodiode regions. The combination of the barrier layer 212, the shallow trench isolation structure 220, and the deep trench isolation structure 230 realizes better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor. It should be noted that the embodiment of the present application manufactures a back-illuminated image sensor, and the back-illuminated image sensor allows light to enter the pixel area through the back side. Therefore, the side corresponding to the second surface of the semiconductor layer 210 is the back side of the subsequently formed image sensor.

[0041] In this embodiment, the material used for the substrate 211 is, for example, silicon (Si). The first stacked structure 213 includes a plurality of semiconductor material layers. The plurality of semiconductor material layers may be a plurality of semiconductor material layers formed by doping different elements in silicon material, that is, the doping elements of any two semiconductor material layers in the plurality of semiconductor material layers are different, or may be a plurality of semiconductor material layers formed by doping the same element with different concentrations in silicon material, that is, the doping concentrations of any two semiconductor material layers in the plurality of semiconductor material layers are different. It should be understood that the first stacked structure 213 is used to form a photodiode region. Therefore, although different elements may be doped in different semiconductor material layers, the plurality of semiconductor material layers have the same doping type. For example, the elements doped in silicon material may be phosphorus, arsenic, antimony of Group V and other suitable elements known to those skilled in the art. In one embodiment, the first semiconductor material layer 2131, the second semiconductor material layer 2132, the third semiconductor material layer 2133 and the fourth semiconductor material layer 2134 are sequentially deposited on the surface of the blocking layer 212 to form the first stacked structure 213. Among them, the first semiconductor material layer 2131 is silicon material doped with phosphorus (P), the second semiconductor material layer 2132 is silicon material doped with arsenic (As), the third semiconductor material layer 2133 is silicon material doped with phosphorus (P), and the fourth semiconductor material layer 2134 is silicon material doped with antimony (Sb).

[0042] Further, in this embodiment, the blocking layer 212 and the deep trench isolation structure 230 are formed of doped semiconductor material, and the doping types of the two are opposite to the doping type of the first stacked structure 213 to achieve isolation of the photodiode region. It should be understood that the blocking layer 212 and the deep trench isolation structure 230 are used for isolation of the photodiode region. Therefore, the elements doped in silicon material may be boron (B), gallium (Ga) of Group III and other suitable elements known to those skilled in the art. In one embodiment, the blocking layer 212 and the deep trench isolation structure 230 are silicon material doped with gallium (Ga).

[0043] Further, a plurality of doped regions are also provided in the photodiode region. The plurality of doped regions are formed by doping different elements into the photodiode region, or by doping the same element with different concentrations into the photodiode region. The doping type of the plurality of doped regions is the same as the doping type of the first stacked structure 213. In one embodiment, phosphorus (P) element and bismuth (Bi) element are sequentially doped into the photodiode region to form a first doped region 281 and a second doped region 282 respectively.

[0044] Furthermore, a plurality of doped regions extend from the surface of the photodiode region into its interior, and the lateral extension width and the longitudinal extension depth of each doped region in the photodiode region are different, so as to form a plurality of doped regions stacked in sequence from outside to inside. For example, the lateral extension width of the first-layer doped region 281 is greater than that of the second-layer doped region 282, the longitudinal extension depth of the first-layer doped region 281 is greater than that of the second-layer doped region 282, and the first-layer doped region 281 surrounds the second-layer doped region 282, forming a structure stacked in sequence from outside to inside.

[0045] Furthermore, a dielectric stack composed of a first dielectric layer 241 and a second dielectric layer 242 is formed on the first surface of the semiconductor layer 210. Among them, the first dielectric layer 241 is located on the first surface of the semiconductor layer 210, and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the semiconductor layer 210. A grating structure 260 and a light filtering element are formed on the second surface of the semiconductor layer 210. The grating structure 260 is located on the deep trench isolation structure 230, exposing the photodiode region and the first-layer doped region 281 and the second-layer doped region 282 in the photodiode region. The grating structure 260 may include, from bottom to top in sequence as Figure 2 shown, a dielectric layer 261, a high-k dielectric layer 262, a protective layer 263, and a metal layer 264. Among them, the material of the dielectric layer 261 is, for example, silicon dioxide (SiO2), the material of the high-k dielectric layer 262 is, for example, hafnium dioxide (HfO2) with a high dielectric constant (k), the material of the protective layer 263 is, for example, titanium nitride (TiN), and the material of the metal layer 264 is, for example, tungsten (W). The light filtering element is located on the surface of the photodiode region between the grating structures, and is isolated from the photodiode region and the first-layer doped region 281 and the second-layer doped region 282 in the photodiode region through an isolation dielectric layer 291. The light filtering element may include, as Figure 2 shown, a blue light filtering element 292a, a green light filtering element 292b, and a red light filtering element 292c. It should be noted that the light filtering element includes a color filter and a microlens located on the surface of the color filter. Since the surface of the microlens is convex, Figure 2 the blue light filtering element 292a, the green light filtering element 292b, and the red light filtering element 292c shown are all convex on the surface.

[0046] In the embodiments of the present application, the photodiode region is formed by multiple different semiconductor material layers, and multiple doping regions stacked in sequence from the outside to the inside are added in the photodiode region. This structure increases the number of photo-generated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region. This enables the image sensor to capture more photons under low light conditions, and further enables the photoelectric sensor to be applicable to low light conditions.

[0047] Corresponding to the image sensor provided in the above embodiments, another embodiment of the present application further provides a manufacturing method of an image sensor. Figure 3 The flowchart showing a manufacturing method of an image sensor according to an embodiment of the present application is referred to Figure 3 and the manufacturing method includes:

[0048] Step S110, forming a first stacked structure on the surface of the substrate, where the first stacked structure includes multiple different semiconductor material layers stacked;

[0049] Step S120, forming a deep trench isolation structure in the first stacked structure to isolate the first stacked structure into multiple photodiode regions; and

[0050] Step S130, forming doping regions in the photodiode regions;

[0051] Wherein, the doping elements diffuse from the surface of the photodiode region into its interior to form multiple doping regions. The multiple doping regions extend from the surface of the photodiode region into its interior, and the extension depths of different doping regions are different, forming doping regions with different layer structures.

[0052] Specifically, the multiple different semiconductor material layers included in the first stacked structure can be multiple semiconductor material layers formed by doping different elements in silicon material, that is, the doping elements of any two semiconductor material layers among the multiple semiconductor material layers are different; or they can be multiple semiconductor material layers formed by doping the same element with different concentrations in silicon material, that is, the doping concentrations of any two semiconductor material layers among the multiple semiconductor material layers are different. The first stacked structure is used to form the photodiode region. Therefore, although different elements can be doped in different semiconductor material layers, the multiple semiconductor material layers have the same doping type. For example, the elements doped in silicon material can be group V elements such as phosphorus, arsenic, antimony, and other suitable elements known to those skilled in the art. The multiple doping regions can be multiple doping regions formed by doping different elements in the photodiode region, that is, the doping elements of any two doping regions among the multiple doping regions are different; or they can be multiple doping regions formed by doping the same element with different concentrations in the photodiode region, that is, the doping concentrations of any two doping regions among the multiple doping regions are different. And the doping type of the photodiode region is the same as that of the doping regions.

[0053] During the process of forming multiple photodiode regions and multiple doped regions in the embodiments of the present application, the ion implantation process is not adopted, thus avoiding the problems of substrate damage and increased crosstalk caused by the ion implantation process.

[0054] Figures 4a to 4j It is a schematic diagram of each step of a manufacturing method of an exemplary image sensor provided by the embodiments of the present application. Three different photodiodes need to be manufactured for this image sensor, and the first stacked structure is correspondingly divided into three regions. The following combines Figure 3 and Figures 4a to 4j to describe in detail the manufacturing method of the image sensor provided by the embodiments of the present application.

[0055] In step S110, a first stacked structure 213 is formed on a substrate 211, as Figures 4a to 4c shown.

[0056] As Figure 4a shown, before forming the first stacked structure 213, it further includes steps of forming a shallow trench isolation structure 220 extending from the first surface of the substrate 211 into its interior, forming a dielectric stack on the first surface of the substrate 211, and performing ion implantation on the second surface of the substrate 211 to form a barrier layer 212 in the substrate 211, wherein the first surface and the second surface of the substrate 211 are opposite.

[0057] Specifically, forming the shallow trench isolation structure 220 includes: forming a patterned mask layer on the first surface of the substrate 211 by means of a lithography process, etching the substrate 211 through the patterned mask layer to form a shallow trench extending from the first surface of the substrate 211 into its interior, and filling the shallow trench with an isolation medium to form the shallow trench isolation structure 220.

[0058] Next, a dielectric stack composed of a first dielectric layer 241 and a second dielectric layer 242 is formed on the first surface of the substrate 211, wherein the first dielectric layer 241 is located on the first surface of the semiconductor layer 210, and the second dielectric layer 242 is located on the surface of the first dielectric layer 241 away from the substrate 211.

[0059] Further, a blocking layer 212 is formed by ion implanting the second surface of the substrate 211. The doping type of the blocking layer 212 is opposite to that of the first stacked structure 213 formed subsequently. In one embodiment, the implanted ions are, for example, gallium (Ga) ions. The blocking layer 212 is formed on the surface of the shallow trench isolation structure 220 in the substrate 211, and is used to combine with the shallow trench isolation structure 220 and the deep trench isolation structure formed subsequently above the blocking layer 212 to achieve better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor. It should be noted that the embodiment of the present application manufactures a back-illuminated image sensor, and the back-illuminated image sensor allows light to enter the pixel region through the back side. Therefore, the side of the second surface of the substrate 211 corresponds to the back side of the image sensor formed subsequently. The blocking layer 212 has a blanket structure, dividing the substrate 211 into a first part located below the blocking layer 212 and a second part located above the blocking layer 212, and the shallow trench isolation structure 220 is located in the first part.

[0060] As Figure 4b shown, the second part of the substrate 211 is removed, exposing the surface of the blocking layer 212. The removal of the second part can be carried out by means of chemical mechanical polishing (CMP). In this way, while removing the second part, the surface of the exposed blocking layer 212 is flattened, thereby providing a high-quality substrate for the subsequent fabrication of the first stacked structure 213.

[0061] As Figure 4c shown, the first stacked structure 213 is formed. The first stacked structure 213 can be formed by sequentially depositing a plurality of different semiconductor material layers on the surface of the blocking layer 212, and the deposition process is, for example, an epitaxial deposition process. For example, as Figure 4c shown, the first semiconductor material layer 2131, the second semiconductor material layer 2132, the third semiconductor material layer 2133, and the fourth semiconductor material layer 2134 are sequentially deposited on the surface of the blocking layer 212 to form the first stacked structure 213. Among them, the first semiconductor material layer 2131 of the first stacked structure 213 is a silicon material doped with phosphorus (P), the second semiconductor material layer 2132 is a silicon material doped with arsenic (As), the third semiconductor material layer 2133 is a silicon material doped with phosphorus (P), and the fourth semiconductor material layer 2134 is a silicon material doped with antimony (Sb).

[0062] In step S120, a deep trench isolation structure 230 is formed in the first stacked structure 213 to isolate the first stacked structure 213 into a plurality of photodiode regions; as Figure 4d and Figure 4e shown.

[0063] Specifically, as Figure 4d shown, a deep trench 230a is formed within the first stacked structure 213. This step includes forming a mask layer on the surface of the first stacked structure 213; patterning the mask layer on the first stacked structure 213 to form a patterned mask layer, and using the patterned mask layer as a mask to etch the first stacked structure 213 to form the deep trench 230a.

[0064] It should be noted that the deep trench isolation structure 230 is to be combined with the above-mentioned shallow trench isolation structure 220 for isolating adjacent photodiode regions. Therefore, there is a one-to-one correspondence between the positions of the formed deep trench 230a and the shallow trench isolation structure 220. To distinguish it from the above-mentioned shallow trench isolation structure 220, the deep trench isolation structure 230 is also called the deep trench isolation structure 230 because it usually has a height greater than that of the shallow trench isolation structure 220.

[0065] Specifically, patterning the mask layer means removing the positions corresponding to the deep trench 230a on the mask layer to form an opening area, which is used to etch the first stacked structure 213 later to form the deep trench 230a. In one embodiment, the first stacked structure 213 can be etched using a dry etching process, which is beneficial to ensuring the accuracy of the subsequently fabricated deep trench isolation structure 230.

[0066] As Figure 4e shown, the deep trench 230a is filled to form the deep trench isolation structure 230, and the isolation medium filling the deep trench 230a contacts the barrier layer 212. In this embodiment, the material filled into the deep trench 230a is, for example, the same as the material of the barrier layer 212, and the isolation medium in the deep trench 230a can be deposited by epitaxy. The doping type of the isolation medium of the deep trench isolation structure 230 is opposite to that of the first stacked structure 213.

[0067] Further, after filling the deep trench 230a to form the deep trench isolation structure 230, it may further include: a step of planarizing the surface of the deep trench isolation structure 230 and the first stacked structure 213, which aims to provide a high-quality fabrication substrate for subsequently forming the grating structure 260.

[0068] Through the above steps, a semiconductor layer 210, a shallow trench isolation structure 220, a deep trench isolation structure 230, and a photodiode region are formed. The semiconductor layer 210 includes a substrate 211, a barrier layer 212, and a first stacked structure 213 stacked in sequence from bottom to top. The surface of the substrate 211 away from the barrier layer 212 constitutes the first surface of the semiconductor layer 210, and the surface of the first stacked structure 213 away from the barrier layer 212 constitutes the second surface of the semiconductor layer 210. The shallow trench isolation structure 220 extends from the surface of the substrate 211 away from the barrier layer 212 (i.e., the first surface of the semiconductor layer 210) into the interior of the substrate 211 until it reaches the surface of the barrier layer 212 close to the substrate 211, that is, the shallow trench isolation structure 220 penetrates the substrate 211 to reach the surface of the barrier layer 212 close to the substrate 211. The deep trench isolation structure 230 extends from the surface of the first stacked structure 213 (i.e., the second surface of the semiconductor layer 210) into the interior of the first stacked structure 213 until it reaches the surface of the barrier layer 212 close to the first stacked structure 213, that is, the deep trench isolation structure 230 penetrates the first stacked structure 213 to reach the surface of the barrier layer 212 close to the first stacked structure 213. The first stacked structure 213 is isolated by the deep trench isolation structure 230 and the shallow trench isolation structure 220 to form a plurality of photodiode regions. The combination of the barrier layer 212, the shallow trench isolation structure 220, and the deep trench isolation structure 230 realizes better isolation of adjacent photodiode regions, thereby reducing the crosstalk effect of the image sensor.

[0069] After step S120, it further includes the step of forming a grid structure 260 on the surface of the deep trench isolation structure 230, as Figure 4f shown.

[0070] Specifically, forming the grid structure 260 includes: forming a second stacked structure on the surface of the first stacked structure 213 and the surface of the deep trench isolation structure 230; and etching the second stacked structure until the first stacked structure 213 is exposed, so that the remaining part of the second stacked structure forms the grid structure 260 located on the surface of the deep trench isolation structure 230. Since the grid structure 260 is formed by a multi-layer structure, it can reduce the generation of dark current and improve the product yield. The grid structure 260 may, as Figure 4f shown, include a dielectric layer 261, a high-k dielectric layer 262, a protective layer 263, and a metal layer 264 in sequence from bottom to top. Among them, the material used for the dielectric layer 261 is, for example, silicon dioxide (SiO2), the material used for the high-k dielectric layer 262 is, for example, hafnium dioxide (HfO2) with a high dielectric constant (k), the material used for the protective layer 263 is, for example, titanium nitride (TiN), and the material used for the metal layer 264 is, for example, tungsten (W).

[0071] In step S130, a doped region is formed in the photodiode region, as Figures 4g to 4has shown

[0072] Specifically, as Figure 4g shown, a third stacked structure 270 is formed in the photodiode region. The third stacked structure 270 can be formed by sequentially depositing multiple doped semiconductor material layers on the surface of the first stacked structure 213, and the deposition process is, for example, epitaxial deposition. For example, as Figure 4g shown, the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272 are sequentially deposited on the surface of the first stacked structure 213 to form the third stacked structure 270. Among them, the first doped semiconductor material layer 271 is a silicon material doped with phosphorus (P), and the second doped semiconductor material layer 272 is a silicon material doped with bismuth (Bi). It should be noted that the number of layers of the third stacked structure 270 is consistent with the stacked number of the subsequent formed doped regions. Although Figure 4g only shows the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272, it should be known that those skilled in the art can set the number of layers of the third stacked structure 270 according to needs, and can set the doping elements of each doped semiconductor material layer according to needs. Further, the third stacked structure 270 needs to have the same doping type as the photodiode region formed by the first stacked structure 213.

[0073] Further, as Figure 4h shown, the third stacked structure 270 is subjected to laser annealing treatment. The laser annealing process causes the doping elements in the third stacked structure 270 to diffuse into the first stacked structure 213 to form a doped region with a different layer structure. In one embodiment, the energy of the laser annealing is, for example, 30 mj, and the laser annealing time is, for example, 10 ms to 20 ms.

[0074] Specifically, during the laser annealing process, the first doped semiconductor material layer 271 is closer to the first stacked structure 213 than the second doped semiconductor material layer 272. When the first doped semiconductor material layer 271 and the second doped semiconductor material layer 272 are simultaneously subjected to laser annealing, the doping elements in the first doped semiconductor material layer 271 diffuse to a deeper depth in the first stacked structure 213, while the doping elements in the second doped semiconductor material layer 272 diffuse to a relatively shallower depth in the first stacked structure 213, thereby forming a diffusion region with a different layer structure. For example, the doping element phosphorus (P) in the first doped semiconductor material layer 271 diffuses into the first stacked structure 213 to form a first doped region 281, and the doping element bismuth (Bi) in the second doped semiconductor material layer 272 diffuses into the first stacked structure 213 to form a second doped region 282. The first doped region 281 and the second doped region 282 are stacked in sequence from the outside to the inside.

[0075] In the embodiment of the present application, the photodiode region is formed by a deposition process, and the doped region is formed by a diffusion process. The ion implantation process is not used during the formation of the photodiode region and the doped region, thus avoiding the problems of substrate damage and increased crosstalk caused by the ion implantation process.

[0076] Furthermore, since the formation of a doped region with different layer structures can be completed by only one laser annealing process, the cost of forming a doped region with different layer structures is reduced.

[0077] Furthermore, as Figure 4i shown, after the first-layer doped region 281 and the second-layer doped region 282 are formed, the third-layer stack structure 270 is removed.

[0078] Furthermore, as Figure 4j shown, after the first-layer doped region 281 and the second-layer doped region 282 are formed, the method for manufacturing an image sensor provided by the embodiment of the present application may further include: forming an isolation dielectric layer 291 on the surface of the photodiode region and forming a light filtering element on the surface of the isolation dielectric layer 291 between the grid structures. The light filtering element may include a blue light filtering element 292a, a green light filtering element 292b, and a red light filtering element as Figure 4j shown. It should be noted that the light filtering element includes a color filter and a microlens on the surface of the color filter. Since the surface of the microlens is convex, Figure 4j the blue light filtering element 292a, the green light filtering element 292b, and the red light filtering element as

[0079] The unexpected technical effect of the present application is:

[0080] According to the method for manufacturing an image sensor provided by the present application, by using a diffusion process to form multiple doped regions in the photodiode region and not using the ion implantation process, the problems of substrate damage and increased crosstalk caused by the ion implantation process are avoided.

[0081] Further, a third stacked structure including a plurality of doped semiconductor material layers is formed on the surface of the photodiode region, and the third stacked structure is subjected to laser annealing treatment so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form a doped region; wherein, via the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures. This structure increases the number of photo-generated carriers (Quantum e-) in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region; at the same time, since forming the doped regions with different layer structures can be completed by only one laser annealing process, the cost of forming the doped regions with different layer structures is reduced.

[0082] Further, in the manufacturing method of the image sensor provided in the present application, the first stacked structure is formed by an epitaxial deposition process, and the ion implantation process is not used either, avoiding the problems of substrate damage and increased crosstalk caused by the ion implantation process.

[0083] In the embodiment of the present application, the photodiode region is formed by a plurality of different semiconductor material layers, and a plurality of doped regions stacked in sequence from outside to inside are added in the photodiode region. This structure increases the number of photo-generated carriers in the photodiode region, thereby improving the photoelectric conversion efficiency of the photodiode region. This enables the image sensor to capture more photons under low light conditions, and further enables the image sensor to be applicable to low light conditions.

[0084] As described above in accordance with the embodiments of the present application, these embodiments do not describe all the details in detail, nor do they limit the application to only the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. The present specification selects and specifically describes these embodiments to better explain the principle and practical application of the present application, so that those skilled in the art can make good use of the present application and its modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A manufacturing method of an image sensor, characterized in that, Including: Ion implanting from the first surface of the substrate into its interior to form a barrier layer in the substrate; Forming a first stacked structure on the surface of the barrier layer, the doping type of the barrier layer being opposite to that of the first stacked structure; Forming a deep trench isolation structure within the first stacked structure to isolate the first stacked structure into a plurality of photodiode regions; And Forming a plurality of doped regions in the photodiode regions; Wherein, doping elements diffuse from the surface of the photodiode region into its interior to form a plurality of doped regions, the plurality of doped regions extend from the surface of the photodiode region into its interior, and the extension depths of different doped regions are different, forming doped regions with different layer structures.

2. The manufacturing method according to claim 1, characterized in that, Forming a doped region in the photodiode region includes: Forming a third stacked structure on the surface of the photodiode region, the third stacked structure including a plurality of doped semiconductor material layers; and Performing a laser annealing process on the third stacked structure so that the doping elements in the plurality of doped semiconductor material layers diffuse into the first stacked structure to form doped regions; Wherein, via the same laser annealing step, the doping elements in different doped semiconductor material layers diffuse to different depths in the third stacked structure to form doped regions with different layer structures.

3. The manufacturing method according to claim 2, characterized in that, Using an epitaxial deposition process to sequentially form a plurality of doped semiconductor material layers on the substrate to form a first stacked structure, the doping type of the doped region being the same as that of the first stacked structure.

4. The manufacturing method according to claim 3, characterized in that, Before forming the first stacked structure on the surface of the substrate, it further includes: Forming a shallow trench isolation structure extending from the first surface of the substrate into its interior; Ion implanting from the first surface of the substrate into its interior to form a barrier layer in the substrate, the barrier layer separating the substrate into a first part on one side of the barrier layer and a second part on the other side of the barrier layer, and the shallow trench isolation structure is located in the first part; and Removing the second part of the substrate to expose the surface of the barrier layer; The first stacked structure is located on the surface of the barrier layer.

5. The manufacturing method according to claim 4, characterized in that The doping type of the barrier layer is opposite to that of the first stacked structure.

6. The manufacturing method according to claim 4, characterized in that, The method for forming a deep trench isolation structure within the first stacked structure includes: Forming a deep trench penetrating the first stacked structure, the deep trench exposing the surface of the barrier layer; and Using an epitaxial deposition process to form an isolation medium filling the deep trench to form a deep trench isolation structure; The isolation medium filling the deep trench is in contact with the barrier layer.

7. The manufacturing method according to claim 6, characterized in that, The isolation medium of the deep trench isolation structure is a doped semiconductor layer material layer, and the doping type of the isolation medium of the deep trench isolation structure is opposite to that of the first stacked structure.

8. An image sensor, characterized in that, Including: A substrate; A barrier layer, the barrier layer being located on the substrate; A first stacked structure, located on the barrier layer, the doping type of the barrier layer being opposite to that of the first stacked structure; A deep trench isolation structure penetrating the first stacked structure, the deep trench isolation structure isolating the first stacked structure into a plurality of photodiode regions; And A plurality of doped regions are located in the photodiode region, wherein doping elements diffuse from the surface of the photodiode region into its interior to form a plurality of doped regions. The plurality of doped regions extend from the surface of the photodiode region into its interior, and the extension depths of different doped regions are different, forming doped regions with different layer structures.

9. The image sensor according to claim 8, characterized in that, The first stacked structure includes a plurality of doped semiconductor material layers, and the doping type of the doped region is the same as the doping type of the first stacked structure.

10. The image sensor according to claim 8, wherein, It further includes a blocking layer, the blocking layer is located on the substrate, and the first stacked structure is located on the blocking layer; The deep trench isolation structure penetrates through the first stacked structure and contacts the blocking layer; Both the deep trench isolation structure and the blocking layer are made of doped semiconductor material layers, and the doping types of both the deep trench isolation structure and the blocking layer are opposite to the doping type of the first stacked structure.

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