LED chip and preparation method thereof

Abstract

The invention relates to the technical field of photoelectricity, and discloses an LED chip and a preparation method thereof.The LED chip comprises an N electrode layer, an N-type GaN layer, a multi-quantum-well light-emitting layer, a P-type GaN layer and a P electrode layer which are sequentially stacked, and a plurality of N electrode columns are arranged on the N electrode layer; the N electrode columns penetrate through the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer, the P electrode layer and the P electrode substrate and then are connected with the N electrode substrate, the P electrode layer is provided with a plurality of P electrode columns, the P electrode columns are connected with the P electrode substrate, and the P electrode substrate and the N electrode substrate are arranged below the P electrode layer. According to the LED chip provided by the invention, the harmonic problem caused by non-uniform current distribution can be effectively solved due to the improvement of the electrode distribution mode.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic technology, and in particular to an LED chip and a preparation method thereof. Background Art

[0002] LED chips inevitably have problems with harmonics, especially the third harmonic current, which leads to large neutral line current and fire hazards. This is caused by the LED infrastructure.

[0003] The idea of ​​solving this problem in the prior art, in addition to the external harmonic filter, generally considers adding a current blocking layer to the LED stacking structure, but this cannot fundamentally solve the LED harmonic problem. Since one of the causes of harmonics is the uneven distribution of the current path in the middle of the stacking structure at the electrode connection point and the middle of the stacking, adding a current blocking layer only reduces this unevenness. Moreover, the method of adding a current blocking layer generally requires adding it when the crystal is generated, which seriously affects the efficiency and yield of crystal generation.

[0004] On the other hand, due to the uneven current distribution, the middle of the stacked structure is particularly prone to overheating, which seriously affects the service life of the LED chip. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an LED chip so that the harmonic problem caused by uneven current distribution can be effectively solved by improving the electrode distribution method.

[0006] The technical problem to be solved by the present invention is to provide a method for preparing an LED chip, which is simple to process, has extremely high operability, does not affect the yield rate, and has low difficulty in processing the newly added process.

[0007] In order to solve the above technical problems, the present invention provides an LED chip, comprising an N electrode layer, an N-type GaN layer, a multi-quantum well light-emitting layer, a P-type GaN layer, and a P electrode layer stacked in sequence, wherein a plurality of N electrode columns are provided on the N electrode layer, and the N electrode columns pass through the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer, the P electrode layer, and the P electrode substrate and are connected to the N electrode substrate, a plurality of P electrode columns are provided on the P electrode layer, and the P electrode columns are connected to the P electrode substrate, and the P electrode substrate and the N electrode substrate are arranged below the P electrode layer.

[0008] In some embodiments, an insulating column sleeve is provided outside the N electrode column.

[0009] In some embodiments, the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer, the P-electrode layer and the P-electrode substrate are all provided with a first through hole matching the N-electrode column.

[0010] In some embodiments, an insulating substrate is provided between the P-electrode substrate and the N-electrode substrate, and the P-electrode layer, the P-electrode column, the P-electrode substrate, the insulating substrate and the N-electrode substrate are sequentially connected.

[0011] In some embodiments, the P-electrode substrate, the insulating substrate, and the N-electrode substrate are all provided with second through holes matching the N-electrode columns.

[0012] In some embodiments, after the N electrode column passes through the second through hole, the end of the N electrode column is connected to a fixing device.

[0013] In some embodiments, the fixing device is a boss, and a recess matching the boss is provided on the N-electrode substrate, so that the N-electrode column is fixedly connected to the N-electrode substrate.

[0014] In some embodiments, the N electrode columns and the P electrode columns are arranged in an array, and the P electrode column is disposed between two adjacent N electrode columns.

[0015] In some embodiments, the N-electrode columns are distributed in a sparse inner layer and dense outer layer.

[0016] In order to solve the above problems, the present invention also provides a method for preparing an LED chip, comprising the following steps:

[0017] A P-type GaN layer, a multi-quantum well light-emitting layer, and an N-type GaN layer are sequentially prepared on the P-electrode layer;

[0018] A first through hole is formed on the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer and the P-electrode layer;

[0019] Preparing a P electrode column on the P electrode layer, and preparing an N electrode column on the N electrode layer;

[0020] Passing the N-electrode column through the first through hole so that the N-electrode layer is mounted on the N-type GaN layer;

[0021] Preparing a second through hole on the P-electrode substrate, the insulating substrate, and the N-electrode substrate;

[0022] Connecting the P electrode column to the P electrode substrate;

[0023] The N-electrode column is passed through the second through hole to connect the N-electrode column to the N-electrode substrate.

[0024] The implementation of the present invention has the following beneficial effects:

[0025] The LED provided by the present invention alleviates the harmonic problem caused by uneven current distribution by improving the electrode distribution mode, and can greatly improve the problem of excessive temperature, effectively ensuring that the LED chip is relatively evenly heated, thereby significantly improving the service life of the LED chip. Specifically, the current forms a connecting path from the N-electrode substrate, N-electrode column, N-electrode layer, N-type GaN layer, multi-quantum well light-emitting layer, P-type GaN layer, P-electrode layer, P-electrode column, and P-electrode substrate. The N-electrode column and the P-electrode column are both distributed in an array, so the current distribution is uniform, thereby effectively avoiding harmonic problems and excessive temperature problems. At the same time, due to the setting of the P-electrode column, there is a gap between the P-electrode substrate and the P-electrode layer. This gap can further significantly improve the cooling efficiency based on the array-form N-electrode column and the P-electrode column.

[0026] The LED preparation method provided by the present invention has simple processing, extremely high operability, almost no impact on the yield rate, and low difficulty in processing the newly added process, so the overall efficiency is not greatly affected. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a schematic diagram of the structure of an LED chip provided in one embodiment of the present invention;

[0028] Figure 2 An exploded view of an LED chip provided in one embodiment of the present invention;

[0029] Figure 3 is a cross-sectional view of an LED chip provided in one embodiment of the present invention;

[0030] Figure 4 Schematic diagram of the distribution structure of N electrode columns and P electrode columns of an LED chip provided in one embodiment of the present invention.

[0031] In the accompanying drawings: 11-N electrode layer, 12-N-type GaN layer, 13-multi-quantum well light-emitting layer, 14-P-type GaN layer, 15-P electrode layer, 21-N electrode column, 22-insulating column sleeve, 23-fixing device, 24-P electrode column, 31-P electrode substrate, 32-insulating substrate, 33-N electrode substrate. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0033] In the description of the present invention, it is necessary to understand that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0034] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0035] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0037] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the examples of various specific processes and materials provided by the present invention, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0038] In the present invention, "preferred" and "better" are only used to describe implementation methods or embodiments with better effects, and it should be understood that they do not constitute a limitation on the scope of protection of the present invention. In the present invention, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features. In the present invention, when involving numerical ranges, unless otherwise specified, the two endpoints of the numerical range are included.

[0039] To solve the above problems, the present invention provides an LED chip, such as Figure 1 to Figure 4 As shown, it includes an N electrode layer 11, an N-type GaN layer 12, a multi-quantum well light-emitting layer 13, a P-type GaN layer 14, and a P electrode layer 15 stacked in sequence, wherein the N electrode layer 11 is provided with a plurality of N electrode columns 21, and the N electrode columns 21 pass through the N-type GaN layer 12, the multi-quantum well light-emitting layer, the P-type GaN layer 14, the P electrode layer 15 and the P electrode substrate 31 and are connected to the N electrode substrate 33, and the P electrode layer 15 is provided with a plurality of P electrode columns 24, and the P electrode columns 24 are connected to the P electrode substrate 31, and the P electrode substrate 31 and the N electrode substrate 33 are arranged below the P electrode layer 15.

[0040] The LED provided by the present invention alleviates the harmonic problem caused by uneven current distribution by improving the electrode distribution mode, and can greatly improve the problem of excessive temperature, effectively ensuring a relatively uniform temperature of the LED chip, thereby significantly improving the service life of the LED chip.

[0041] Specifically, the current forms a connection path from the N-electrode substrate 33, the N-electrode column 21, the N-electrode layer 11, the N-type GaN layer 12, the multi-quantum well light-emitting layer 13, the P-type GaN layer 14, the P-electrode layer 15, the P-electrode column 24, and the P-electrode substrate 31. Since the N-electrode column 21 and the P-electrode column 24 are both in array form, the current distribution is uniform, thereby effectively avoiding harmonic problems and over-temperature problems. At the same time, due to the setting of the P-electrode column 24, there is a gap between the P-electrode substrate 31 and the P-electrode layer 15. This gap can further significantly improve the cooling efficiency based on the array form of the N-electrode column 21 and the P-electrode column 24.

[0042] like Figure 2 As shown, in some embodiments, the N electrode column 21 is provided with an insulating column sleeve 22. The N electrode column 21 is a column made of metal or conductive material, which is used to provide an electrical connection or a conductive path. The purpose of the external insulating column sleeve 22 is to prevent the N electrode column 21 from directly contacting the surrounding environment to prevent short circuit or current leakage.

[0043] like Figure 2 As shown, in some embodiments, the N-type GaN layer 12, the multi-quantum well light-emitting layer 13, the P-type GaN layer 14, the P-electrode layer 15 and the P-electrode substrate 31 are all provided with a first through hole matching the N-electrode column 21. The first through hole is a hole for passing through the N-electrode column 21, and is located on the N-type GaN layer 12, the multi-quantum well light-emitting layer 13, the P-type GaN layer 14, the P-electrode layer 15 and the P-electrode substrate 31. The first through hole can be circular or have other shapes, depending on the design requirements of the N-electrode column 21. Based on this design, the manufacturing method of the LED chip provided by the present invention hardly changes the traditional process of the LED chip, but only adds post-processes such as drilling and assembly, with high operating efficiency and small negative impact.

[0044] In some embodiments, an insulating substrate 32 is provided between the P-electrode substrate 31 and the N-electrode substrate 33, and the P-electrode layer 15, the P-electrode column 24, the P-electrode substrate 31, the insulating substrate 32 and the N-electrode substrate 33 are sequentially connected. The function of the insulating substrate 32 is to isolate the P-electrode substrate 31 and the N-electrode substrate 33 to prevent them from directly contacting, thereby avoiding short circuit or current leakage. The insulating substrate 32 can be an insulating material such as ceramic, glass, polymer, etc.

[0045] like Figure 2 As shown, in some embodiments, the P-electrode substrate 31, the insulating substrate 32, and the N-electrode substrate 33 are all provided with a second through hole matching the N-electrode column 21. The second through hole is a hole for passing through the N-electrode column 21, and is located on the P-electrode substrate 31, the insulating substrate 32, and the N-electrode substrate 33. The second through hole can be circular or have other shapes, depending on the design requirements of the N-electrode column 21. Based on this design, the manufacturing method of the LED chip provided by the present invention hardly changes the traditional process of the LED chip, but only adds post-processes such as drilling and assembly, with high operating efficiency and small negative impact.

[0046] like Figure 2As shown, further, in some embodiments, after the N electrode column 21 passes through the second through hole, the end of the N electrode column 21 is connected to the fixing device 23. The end of the N electrode column 21 is connected to the fixing device 23, and the fixing device 23 can be a nut, a bolt, a welding point, a buckle or other types of mechanical fixing components. The function of this fixing device 23 is to firmly fix the N electrode column 21 in the desired position, so as to ensure that the N electrode column 21 will not loosen or fall off, and can maintain a stable electrical connection.

[0047] like Figure 3 As shown, preferably, the fixing device 23 is a boss, and the N-electrode substrate 33 is provided with a recess matching the boss, so that the N-electrode column 21 is fixedly connected to the N-electrode substrate 33. Through the matching of the boss and the recess, the end of the N-electrode column 21 can be firmly fixed on the N-electrode substrate 33, thereby ensuring that the electrical connection between them will not be easily disconnected. In addition, this design simplifies the manufacturing process, and the fixation can be completed by mechanical fitting and welding.

[0048] like Figure 4 As shown, in some embodiments, the N electrode columns 21 and the P electrode columns 24 are arranged in an array, and the P electrode columns 24 are arranged between two adjacent N electrode columns 21. It is easy to understand that the N electrode columns 21 and the P electrode columns 24 can be distributed not only in a matrix manner but also in a circular array manner, as long as the distribution form of the N electrode columns 21 and the P electrode columns 24 is regularly distributed.

[0049] Preferably, the N electrode columns 21 are distributed in a sparse inner layer and dense outer layer. This distribution form can more effectively solve the harmonic problem and over-temperature problem to be solved by the present invention, and can achieve better results with the same materials compared to uniform distribution.

[0050] Accordingly, the present invention also provides a method for preparing an LED chip, comprising the following steps:

[0051] (1) sequentially preparing a P-type GaN layer 14, a multi-quantum well light-emitting layer 13, and an N-type GaN layer 12 on a P-electrode layer 15;

[0052] (2) preparing first through holes on the N-type GaN layer 12, the multi-quantum well light-emitting layer 1313, the P-type GaN layer 14 and the P-electrode layer 15;

[0053] (3) preparing a P electrode column 24 on the P electrode layer 15 and preparing an N electrode column 21 on the N electrode layer 11;

[0054] (4) Passing the N electrode column 21 through the first through hole so that the N electrode layer 11 is mounted on the N-type GaN layer 12;

[0055] (5) preparing a second through hole on the P-electrode substrate 31, the insulating substrate 32, and the N-electrode substrate 33;

[0056] (6) Connecting the P electrode column 24 to the P electrode substrate 31;

[0057] (7) The N-electrode column 21 is passed through the second through hole, so that the N-electrode column 21 is connected to the N-electrode substrate 33 .

[0058] In some embodiments, the N electrode column 21 is provided with an insulating column sleeve 22 . When the N electrode column 21 is prepared on the N electrode layer 11 , the insulating column sleeve 22 is firstly sleeved on the N electrode column 21 and then fixedly connected to the N electrode layer 11 .

[0059] In some embodiments, an insulating substrate 32 is provided between the P-electrode substrate 31 and the N-electrode substrate 33 , and an end of the N-electrode column 21 is connected to a fixing device 23 .

[0060] Furthermore, in some embodiments, the method for manufacturing the LED chip comprises the following steps:

[0061] S1, sequentially preparing a P-type GaN layer 14, a multi-quantum well light-emitting layer 13, and an N-type GaN layer 12 on a P-electrode layer 15;

[0062] S2, preparing first through holes on the N-type GaN layer 12, the multi-quantum well light-emitting layer 1313, the P-type GaN layer 14 and the P-electrode layer 15;

[0063] S3, preparing a P electrode column 24 on the P electrode layer 15, and preparing an N electrode column 21 on the N electrode layer 11;

[0064] Preferably, the N electrode columns 21 are positioned in an array by a mold, the solder is fixed at the ends, and then reflow soldered to the N electrode layer 11. The reflow soldering process is mature and is particularly suitable for the field of LED chips with small operating size and space, with good soldering effect, simple operation and low cost burden.

[0065] S4, passing the N electrode column 21 through the first through hole, so that the N electrode layer 11 is installed on the N-type GaN layer 12;

[0066] S5, preparing a second through hole on the P-electrode substrate 31, the insulating substrate 32, and the N-electrode substrate 33;

[0067] S6, connecting the P electrode column 24 to the P electrode substrate 31;

[0068] S7 , passing the N electrode column 21 through the second through hole to connect the N electrode column 21 to the N electrode substrate 33 , and welding a fixing device 23 to the end of the N electrode column 21 .

[0069] The LED preparation method provided by the present invention has simple processing, extremely high operability, almost no impact on the yield rate, and low difficulty in processing the newly added process, so the overall efficiency is not greatly affected.

[0070] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0071] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. An LED chip, characterized in that: The invention comprises an N electrode layer, an N-type GaN layer, a multi-quantum well light-emitting layer, a P-type GaN layer and a P electrode layer which are stacked in sequence, wherein a plurality of N electrode columns are arranged on the N electrode layer, and the N electrode columns pass through the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer, the P electrode layer and the P electrode substrate and are connected to the N electrode substrate, and a plurality of P electrode columns are arranged on the P electrode layer, and the P electrode substrate and the N electrode substrate are arranged below the P electrode layer.

2. The LED chip according to claim 1, characterized in that: An insulating column sleeve is arranged outside the N electrode column.

3. The LED chip according to claim 1, characterized in that: The N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer, the P-electrode layer and the P-electrode substrate are all provided with a first through hole matching the N-electrode column.

4. The LED chip according to claim 1, characterized in that: An insulating substrate is disposed between the P-electrode substrate and the N-electrode substrate, and the P-electrode layer, the P-electrode column, the P-electrode substrate, the insulating substrate and the N-electrode substrate are sequentially connected.

5. The LED chip according to claim 4, characterized in that: The P-electrode substrate, the insulating substrate and the N-electrode substrate are all provided with second through holes matching the N-electrode columns.

6. The LED chip according to claim 5, characterized in that: After the N electrode column passes through the second through hole, the end of the N electrode column is connected to the fixing device.

7. The LED chip according to claim 6, characterized in that: The fixing device is a boss, and a recess matching the boss is provided on the N-electrode substrate, so that the N-electrode column is fixedly connected to the N-electrode substrate.

8. The LED chip according to claim 1, characterized in that: The N electrode columns and the P electrode columns are arranged in an array, and the P electrode column is arranged between two adjacent N electrode columns.

9. The LED chip according to claim 1, characterized in that: The N electrode columns are distributed in a sparse inner layer and dense outer layer.

10. A method for preparing an LED chip according to any one of claims 1 to 9, characterized in that: The following steps are involved: A P-type GaN layer, a multi-quantum well light-emitting layer, and an N-type GaN layer are sequentially prepared on the P-electrode layer; A first through hole is formed on the N-type GaN layer, the multi-quantum well light-emitting layer, the P-type GaN layer and the P-electrode layer; Preparing a P electrode column on the P electrode layer, and preparing an N electrode column on the N electrode layer; Passing the N-electrode column through the first through hole so that the N-electrode layer is mounted on the N-type GaN layer; Preparing a second through hole on the P-electrode substrate, the insulating substrate, and the N-electrode substrate; Connecting the P electrode column to the P electrode substrate; The N-electrode column is passed through the second through hole to connect the N-electrode column to the N-electrode substrate.

Images