Testing device for chip testing

Abstract

The utility model provides a testing device for chip testing, and relates to the technical field of chip testing. A plurality of test probes penetrate through an upper base, a conductive part is mounted at the bottom of the upper base and comprises a plurality of insulating component groups and a plurality of conductive component groups arranged at intervals along a first direction, each conductive component group comprises at least one conductive sheet, the top of each conductive sheet is in contact with the corresponding test probe, and the bottom of each conductive sheet is in contact with a tested chip. An insulating component group is arranged between two adjacent conductive component groups, and each insulating component group comprises at least one insulating sheet. According to the utility model, the conductive member is equivalently arranged between the tested chip and the test probe, the effective contact area with the tested chip is increased by using the conductive sheet of the conductive member, and the contact pressure between the conductive sheet and the tested chip is reduced relative to the contact pressure between the test probe and the tested chip, so that the current is shunted, and the test efficiency is improved. The current distribution is more uniform, and the situation that the tested chip is scratched due to the fact that the test probe is heated and softened is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of chip testing, in particular to a testing device for chip testing. Background Art

[0002] When the power chip is undergoing a limit capacity test, that is, a test of its ability to withstand the instantaneous high current of a short circuit, the test probe is in direct contact with the pad of the power chip. The overcurrent peak of a single test probe is relatively high (30-50A). The instantaneous energy will cause the contact point of a single test probe to overheat, causing the material of the test probe to soften, and then causing the contact test probe to penetrate deeper. The test probe will penetrate into the interior of the power chip, causing internal damage to the power chip during the test process. Utility Model Content

[0003] One purpose of the present invention is to provide a test device for chip testing, so as to solve the technical problem in the prior art that power chips may be internally damaged during the testing process.

[0004] A further object of the present invention is to optimize the contact resistance and current distribution between the conductive sheet and the chip under test.

[0005] In particular, the present invention provides a testing device for chip testing, comprising:

[0006] An upper base and a lower base, wherein the upper base is located above the lower base and is pressed together with the lower base, and the top of the lower base has a mounting position for mounting a chip under test;

[0007] a plurality of test probes passing through the upper base;

[0008] A conductive member is mounted on the bottom of the upper base and includes multiple groups of insulating component groups and multiple groups of conductive component groups arranged at intervals along the first direction, each group of the conductive component groups includes at least one conductive sheet, the top of the conductive sheet contacts the test probe, and the bottom contacts the chip under test, and a group of insulating component groups is provided between two adjacent groups of the conductive component groups, and each group of the insulating component groups includes at least one insulating sheet.

[0009] Optionally, the plurality of test probes are divided into a plurality of test probe groups, each group of the test probe groups corresponds to a group of the conductive component groups, and are arranged at intervals along the first direction, and each group of the test probe groups includes a plurality of the test probes arranged at intervals along a second direction, and the second direction is perpendicular to the first direction.

[0010] Optionally, each group of the conductive components includes a plurality of the conductive sheets arranged at intervals along the second direction, and each of the conductive sheets is in contact with at least one test probe of the corresponding test probe group.

[0011] Optionally, the plurality of conductive sheets in each group of conductive components are arranged at intervals, and each conductive sheet is in contact with a functional area of ​​the chip under test.

[0012] Optionally, each group of the conductive components includes one conductive sheet arranged along the second direction, and the conductive sheet contacts all the test probes of the corresponding test probe group.

[0013] Optionally, a plurality of contact portions arranged at intervals are provided at the bottom of the conductive sheet of each group of conductive components, and each of the contact portions contacts a functional area of ​​the chip under test.

[0014] Optionally, the lower surface of each conductive sheet has at least one raised portion, the raised portion has an arc surface, and the lowest end of the arc surface contacts the functional area of ​​the chip under test.

[0015] Optionally, a plurality of grooves arranged at intervals are provided at the bottom of each insulating sheet.

[0016] Optionally, the upper surface of each insulating sheet is higher than the upper surface of the conductive component group, and the lower surface of the insulating sheet is higher than the lower surface of the conductive component.

[0017] Optionally, the conductive member further includes:

[0018] The mounting seat is mounted on the bottom of the upper base and has at least one through hole running vertically through, and multiple groups of the insulating component groups and multiple groups of the conductive component groups are mounted in the through hole.

[0019] In the present invention, a chip under test is mounted on the top of the lower base, multiple test probes pass through the upper base, and a conductive member is mounted on the bottom of the upper base. The conductive member includes multiple insulating component groups and multiple conductive component groups spaced apart along a first direction. Each conductive component group includes at least one conductive sheet, the top of which contacts the test probes and the bottom contacts the chip under test. An insulating component group is provided between two adjacent conductive component groups, and each insulating component group includes at least one insulating sheet. The above technical solution is equivalent to placing the conductive member between the chip under test and the test probes, and utilizing the conductive sheet of the conductive member to increase the effective contact area with the chip under test. The contact pressure between the conductive sheet and the chip under test is reduced relative to the contact pressure when the test probes directly contact the chip under test, thereby shunting the current and making the current distribution more uniform. This reduces the current intensity per unit area and prevents the test probes from heating up, softening, and scratching the chip under test. In addition, by providing an insulating component group between two adjacent conductive component groups, electrical isolation between the conductive component groups can be achieved.

[0020] Furthermore, in the present invention, each conductive sheet has at least one raised portion on its lower surface, each portion having an arcuate surface, the lowest end of which contacts the functional area of ​​the chip under test. This technical solution optimizes planar contact to linear contact, further optimizing the contact resistance and current distribution between the conductive sheet and the chip under test.

[0021] Based on the following detailed description of specific embodiments of the present invention in conjunction with the accompanying drawings, those skilled in the art will become more aware of the above and other objects, advantages and features of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Hereinafter, some specific embodiments of the present invention will be described in detail in an exemplary and non-limiting manner with reference to the accompanying drawings. The same reference numerals in the accompanying drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the accompanying drawings:

[0023] Figure 1 is a schematic structural diagram of a test device for chip testing according to an embodiment of the present utility model;

[0024] Figure 2 yes Figure 1 The schematic structural diagram of the test device shown is a diagram with the upper base omitted;

[0025] Figure 3 yes Figure 1 A schematic structural diagram of the lower base in the test device shown;

[0026] Figure 4 yes Figure 1 A schematic structural diagram of the top of the conductive member in the test device shown;

[0027] Figure 5 yes Figure 1 A schematic structural diagram of the bottom of the conductive member in the test device shown;

[0028] Figure 6 is a schematic structural diagram of a conductive component group according to one embodiment of the present utility model;

[0029] Figure 7 is a schematic structural diagram of a conductive component group according to another embodiment of the present utility model;

[0030] Figure 8 is a schematic structural diagram of a conductive sheet according to an embodiment of the present utility model;

[0031] Figure 9 yes Figure 6 Schematic diagram of the structure of the middle insulation sheet;

[0032] Figure 10 yes Figure 7Schematic diagram of the structure of the middle insulation sheet;

[0033] Figure 11 is a schematic structural diagram of a mounting base according to an embodiment of the present utility model;

[0034] Figure 12 It is a schematic structural diagram of a mounting base according to another embodiment of the utility model.

[0035] Reference numerals:

[0036] 100-test device, 200-test chip, 10-upper base, 20-lower base, 11-test probe, 30-conductive part, 31-mounting seat, 21-mounting position, 311-through hole, 321-conductive sheet, 331-insulating sheet, 32-conductive component group, 333-first clamping portion, 332-groove, 33-insulating component group, 323-second clamping portion, 322-contact portion, 324-third clamping portion, 325-protrusion, 326-arc surface. DETAILED DESCRIPTION

[0037] The following describes in detail embodiments of the present invention, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present invention, and should not be construed as limiting the present invention.

[0038] In the description of the present invention, it should be understood that the terms "upper" and "lower" etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0039] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features, that is, include one or more of the features. In the description of the present utility model, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined. When a feature "includes or contains" one or more of the features it covers, unless otherwise specifically described, this indicates that other features are not excluded and may further include other features.

[0040] Unless otherwise specified or limited, the terms "connection" and "installation" should be interpreted broadly. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components, unless otherwise specified. A person of ordinary skill in the art should be able to understand the specific meanings of the above terms in this utility model based on the specific circumstances.

[0041] Unless otherwise defined, all terms (including technical terms and scientific terms) used in the description of this embodiment have the same meaning as commonly understood by ordinary technicians in the technical field to which this application belongs.

[0042] Figure 1 is a schematic structural diagram of a test device 100 for chip testing according to an embodiment of the present invention. Figure 2 yes Figure 1 The schematic structural diagram of the testing device 100 shown in FIG. 1 is a diagram omitting the upper base 10. Figure 3 yes Figure 1 The schematic structural diagram of the lower base 20 in the testing device 100 is shown. Figure 4 yes Figure 1 The schematic structural diagram of the top of the conductive member 30 in the test device 100 is shown. Figure 5 yes Figure 1 Schematic diagram of the bottom of the conductive member 30 in the test device 100. Figures 1 to 5 As shown, in a specific embodiment, a test device 100 for chip testing includes an upper base 10 and a lower base 20. The upper base 10 is located above the lower base 20 and is pressed against the lower base 20. The top of the lower base 20 has a mounting position 21 for mounting the chip under test 200. The test device 100 also includes a plurality of test probes 11 and a conductive member 30. The plurality of test probes 11 pass through the upper base 10. The conductive member 30 is mounted on the bottom of the upper base 10 and includes a plurality of insulating component groups 33 and a plurality of conductive component groups 32 arranged at intervals along a first direction. Each conductive component group 32 includes at least one conductive sheet 321. The top of the conductive sheet 321 contacts the test probe 11 and the bottom contacts the chip under test 200. An insulating component group 33 is provided between two adjacent conductive component groups 32. Each insulating component group 33 includes at least one insulating sheet 331. Here, the conductive component group 32 is used to connect the test probe 11 and the chip under test 200 , and the top of the test probe 11 is connected to the circuit board, thereby transmitting the acquired signal of the chip under test 200 to the tester.

[0043] This embodiment is equivalent to placing the conductive member 30 between the chip under test 200 and the test probe 11. The conductive sheet 321 of the conductive member 30 increases the effective contact area with the chip under test 200. The contact pressure between the conductive sheet 321 and the chip under test 200 is reduced compared to the contact pressure when the test probe 11 directly contacts the chip under test 200. This results in current diversion, more uniform current distribution, and reduced current intensity per unit area, preventing the test probe 11 from heating up and softening, potentially scratching the chip under test 200. Furthermore, by providing an insulating component group 33 between two adjacent conductive component groups 32, electrical isolation between the conductive component groups 32 can be achieved.

[0044] Figure 6 FIG is a schematic structural diagram of a conductive component group 32 according to an embodiment of the present invention. Figure 6 As shown, Figure 6 Arrow A in the figure indicates the first direction, and arrow B indicates the second direction. In some embodiments, the plurality of test probes 11 are divided into a plurality of test probe groups, each test probe group corresponds to a conductive component group 32, and is arranged at intervals along the first direction, and each test probe group includes a plurality of test probes 11 arranged at intervals along the second direction, and the second direction is perpendicular to the first direction. Figure 6 As can be seen in the figure, multiple test probes 11 are arranged in an array, and a row of test probes 11 arranged along the direction of arrow B is regarded as a test probe group, and each test probe group corresponds to a conductive component group 32. Multiple test probe groups are arranged along the direction of arrow A.

[0045] In some embodiments, each conductive component group 32 includes a plurality of conductive sheets 321 spaced apart along the second direction, and each conductive sheet 321 contacts at least one test probe 11 of a corresponding test probe group. Figure 6 As shown, each conductive component group 32 includes three conductive plates 321. In other embodiments, each conductive component group 32 may also include two, four, or five conductive plates 321, with the number of conductive plates 321 selected based on specific design requirements. Each conductive plate 321 contacts three to four test probes 11, with the number of contacted test probes 11 selected based on specific design requirements.

[0046] In some embodiments, the plurality of conductive sheets 321 of each conductive component group 32 are arranged at intervals, and each conductive sheet 321 contacts a functional area of ​​the chip under test 200. It can be understood that each conductive sheet 321 can only contact one functional area of ​​the chip under test 200. Figure 6 When each group of conductive sheets 321 includes three conductive sheets 321, the three conductive sheets 321 correspond to three functional areas. The conductive sheets 321 in the same row along the direction of arrow A correspond to the same functional area.

[0047] Figure 7 FIG is a schematic structural diagram of a conductive component group 32 according to another embodiment of the present invention. Figure 7 As shown, in another embodiment, each conductive component group 32 includes a conductive sheet 321 arranged along the second direction, and the conductive sheet 321 contacts all the test probes 11 of the corresponding test probe group. In other words, the number of conductive sheets 321 included in each conductive component group 32 can be designed according to specific design requirements, that is, a single integral conductive sheet 321 can be provided, or multiple independent conductive sheets 321 can be provided.

[0048] In some embodiments, see Figure 7 The bottom of the conductive sheet 321 of each conductive component group 32 is provided with a plurality of contact portions 322 arranged at intervals, and each contact portion 322 contacts a functional area of ​​the chip under test 200 .

[0049] Figure 8 FIG is a schematic structural diagram of a conductive sheet 321 according to an embodiment of the present invention. Figure 8 As shown, the lower surface of each conductive sheet 321 has at least one raised portion 325, each of which has a curved surface 326. The lowest end of the curved surface 326 contacts the functional area of ​​the chip under test 200. This embodiment optimizes planar contact to linear contact, further optimizing the contact resistance and current distribution between the conductive sheet 321 and the chip under test 200. In this embodiment, the lower surface of each conductive sheet 321 has two raised portions 325. In other embodiments, the number of raised portions 325 can be selected based on specific design requirements.

[0050] Figure 9 yes Figure 6 Schematic structural diagram of the middle insulating sheet 331, Figure 10 yes Figure 7 Schematic diagram of the structure of the insulating sheet 331. Figure 9 and Figure 10 As shown, in some embodiments, a plurality of grooves 332 are provided at intervals on the bottom of each insulating sheet 331. Here, when each conductive component group 32 has multiple conductive sheets 321, one groove 332 corresponds to the gap between two adjacent conductive sheets 321. When each conductive component group 32 has only one conductive sheet 321, one groove 332 corresponds to the gap between two adjacent contact portions 322.

[0051] In some embodiments, one or more insulating sheets 331 may be provided between two adjacent conductive component groups 32. This corresponds to providing a single or multiple insulating sheets 331, depending on design requirements. Insulating sheets 331 are typically ceramic insulating sheets, and are provided to provide electrical isolation for conductive sheets 321.

[0052] In some embodiments, the upper surface of each insulating sheet 331 is higher than the upper surface of the conductive component group 32, and the lower surface of the insulating sheet 331 is higher than the lower surface of the conductive component. Here, the top of each insulating sheet 331 is located between two adjacent test probe groups.

[0053] Figure 11 This is a schematic structural diagram of a mounting base 31 according to an embodiment of the present invention. Figure 12 : is a schematic structural diagram of a mounting base 31 according to another embodiment of the present invention. In some embodiments, the conductive member 30 further includes a mounting base 31, which is mounted on the bottom of the upper base 10 and has at least one through-hole 311 extending vertically therethrough, and multiple groups of insulating component groups 33 and multiple groups of conductive component groups 32 are mounted in the through-hole 311. Here, the mounting base 31 is mounted on the bottom of the upper base 10 by means of bolt connections. During the pressing process of the upper base 10 and the lower base 20, the conductive member 30 gradually approaches the chip under test 200, and eventually the conductive sheet 321 contacts the functional area of ​​the chip under test 200.

[0054] See also Figure 11 When each conductive component group 32 has multiple conductive sheets 321, the mounting base 31 is provided with multiple through-holes 311 extending vertically therethrough. The multiple through-holes 311 are spaced apart along the second direction, and the number of through-holes 311 is the same as the number of conductive sheets 321 in each conductive component group 32. That is, if each conductive component group 32 includes three conductive sheets 321, then the number of through-holes 311 is also three, and each conductive sheet 321 in each conductive component group 32 is inserted into one through-hole 311. Figure 6 When each conductive component group 32 has multiple conductive sheets 321, each conductive sheet 321 has a second clamping portion 323 protruding outward at both ends of its top. The second clamping portion 323 is clamped on the edge of the corresponding through hole 311 to achieve the installation of the conductive sheet 321. Figure 9 The top two ends of the insulating sheet 331 respectively have first clamping parts 333 protruding outwards, which are clamped on the edges of the through holes 311 on the left and right sides to achieve the installation of the insulating sheet 331. It can be understood that, Figure 9 The insulating sheet 331 is Figure 11 The mounting seat 31 in the embodiment is used in conjunction with the mounting seat 31 in the embodiment.

[0055] See also Figure 12 When each conductive component group 32 has a conductive sheet 321, the mounting base 31 is provided with a through hole 311 that passes through in the vertical direction, and the conductive sheet 321 is inserted into the through hole 311. Figure 7When each conductive component group 32 has a conductive sheet 321, the top ends of the conductive sheet 321 each have a third clamping portion 324 protruding outwards. The third clamping portion 324 is clamped on the edge of the through hole 311 to achieve the installation of the conductive sheet 321. Figure 10 The top two ends of the insulating sheet 331 respectively have first clamping parts 333 protruding outwards, which are clamped on the edge of the through hole 311 by the first clamping parts 333, thereby achieving the installation of the insulating sheet 331. It can be understood that, Figure 10 The insulating sheet 331 is Figure 12 The mounting seat 31 in the embodiment is used in conjunction with the mounting seat 31 in the embodiment.

[0056] At this point, those skilled in the art should recognize that, although multiple exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications consistent with the principles of the present invention can be directly determined or deduced from the contents disclosed herein without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and deemed to cover all such other variations or modifications.

Claims

1. A test device for chip testing, characterized in that: include: An upper base and a lower base, wherein the upper base is located above the lower base and is pressed together with the lower base, and the top of the lower base has a mounting position for mounting a chip under test; a plurality of test probes passing through the upper base; A conductive member is mounted on the bottom of the upper base and includes multiple groups of insulating component groups and multiple groups of conductive component groups arranged at intervals along the first direction, each group of the conductive component groups includes at least one conductive sheet, the top of the conductive sheet contacts the test probe, and the bottom contacts the chip under test, and a group of insulating component groups is provided between two adjacent groups of the conductive component groups, and each group of the insulating component groups includes at least one insulating sheet.

2. The testing device according to claim 1, wherein: The multiple test probes are divided into multiple groups of test probes, each group of the test probes corresponds to a group of the conductive component groups and is arranged at intervals along the first direction, and each group of the test probes includes multiple test probes arranged at intervals along a second direction, and the second direction is perpendicular to the first direction.

3. The testing device according to claim 2, characterized in that Each of the conductive component groups includes a plurality of conductive plates arranged at intervals along the second direction, and each of the conductive plates contacts at least one test probe of the corresponding test probe group.

4. The testing device according to claim 3, characterized in that: The plurality of conductive sheets in each group of conductive components are arranged at intervals, and each conductive sheet contacts a functional area of ​​the chip under test.

5. The testing device according to claim 2, characterized in that: Each of the conductive component groups includes one conductive sheet arranged along the second direction, and the conductive sheet contacts all the test probes of the corresponding test probe group.

6. The testing device according to claim 5, characterized in that: A plurality of contact portions arranged at intervals are provided at the bottom of the conductive sheet of each conductive component group, and each of the contact portions contacts a functional area of ​​the chip under test.

7. The testing device according to any one of claims 3 to 6, characterized in that: The lower surface of each conductive sheet has at least one raised portion, and the raised portion has an arc surface, and the lowest end of the arc surface contacts the functional area of ​​the chip under test.

8. The testing device according to claim 1, wherein: The bottom of each insulating sheet is provided with a plurality of grooves arranged at intervals.

9. The testing device according to claim 1, wherein: The upper surface of each insulating sheet is higher than the upper surface of the conductive component group, and the lower surface of the insulating sheet is higher than the lower surface of the conductive component.

10. The testing device according to claim 1, wherein: The conductive member further comprises: The mounting seat is mounted on the bottom of the upper base and has at least one through hole running vertically through, and multiple groups of the insulating component groups and multiple groups of the conductive component groups are mounted in the through hole.

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