Display panel, method of manufacturing display panel, and display device

Abstract

The application provides a display panel, a preparation method of the display panel and a display device, and relates to the technical field of display, which comprises a back plate including N pixel electrodes; a flat layer including N recesses, the recesses including through holes, and the opening of one through hole being opposite to one pixel electrode; an anode metal layer including N sub-anode metal layers, located in the recesses and covering the through holes; a pixel definition layer covering the edges of the sub-anode metal layers in the recesses; a metal ring layer including N metal rings, corresponding to the outer edges of the N recesses, and the film layer structure of the metal ring layer being the same as that of the anode metal layer; N evaporation layers corresponding to covering the N recesses; and a cathode metal layer including N sub-cathode metal layers corresponding to covering the N evaporation layers, and the adjacent two sub-cathode metal layers being connected through the metal ring layer. The preparation complexity of the display panel is low, thereby helping to reduce the manufacturing cost, and the display panel has a large pixel aperture ratio and pixel density.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to display panels, methods for manufacturing display panels, and display devices. Background Technology

[0002] With the development of display technology and the gradual maturation of organic light-emitting diode (OLED) display technology, OLED panels have gradually become the mainstream display panels at present.

[0003] To ensure high resolution in OLED panels, a manufacturing technology based on fine metal masks (FMMs) has been proposed. The FMM is densely packed with vias, which correspond to the positions of designated pixel units in the OLED panel. During OLED panel production, organic materials of specific colors are deposited onto the FMM-covered OLED panel via vapor deposition. These organic materials pass through the vias in the FMM and are deposited into the designated pixel areas, thus forming pixels.

[0004] However, FMM is a consumable component in the OLED panel production process and needs to be replaced regularly. Furthermore, FMM itself is not easy to manufacture and has a relatively high cost. This makes the manufacturing process of OLED panels more complex and costly. The accuracy and usage of FMM also directly affect the display performance of OLED displays. Due to the limitations of FMM manufacturing process, the pixel aperture ratio and pixel density in OLED panels based on FMM are subject to corresponding restrictions. Summary of the Invention

[0005] This application provides a display panel, a method for manufacturing the display panel, and a display device. By using photolithography to pattern the film layers of OLEDs, the use of FMM can be avoided in the manufacturing process of OLED panels, reducing the complexity of the OLED panel manufacturing process and thus helping to reduce the manufacturing cost of OLED panels. In addition, it also helps to further increase the pixel aperture ratio and pixel density of OLED panels.

[0006] In a first aspect, a display panel is provided, comprising: a back panel, the first surface of which includes N pixel electrodes; a planarization layer located on the first surface, the planarization layer including N grooves, each groove including a through-hole, the opening of one through-hole being opposite to a pixel electrode; an anode metal layer including N sub-anode metal layers located within the grooves and covering the through-holes; a pixel definition layer located within the N grooves and covering the edges of the sub-anode metal layers within the grooves; a metal ring layer including N metal rings, the N metal rings corresponding to the outer edges of the N grooves, the film structure of the metal ring layer being the same as that of the anode metal layer; N vapor-deposited layers corresponding to and covering the N grooves, adjacent vapor-deposited layers being isolated by the metal ring layer; and a cathode metal layer including N sub-cathode metal layers, the N sub-cathode metal layers corresponding to and covering the N vapor-deposited layers, adjacent sub-cathode metal layers being connected by the metal ring layer.

[0007] In conjunction with the first aspect, in some implementations of the first aspect, the aforementioned metal ring includes a first protective layer, a conductive layer, and a second protective layer, with the conductive layer located between the first and second protective layers, and the width of the conductive layer being smaller than the width of the first and second protective layers.

[0008] In conjunction with the first aspect, in some implementations of the first aspect, the aforementioned N sub-cathode metal layers include a first sub-cathode metal layer and a second sub-cathode metal layer, the first sub-cathode metal layer and the second sub-cathode metal layer are adjacent, a first portion of the first sub-cathode metal layer fills a first gap between the first protective layer and the second protective layer, and a second portion of the second sub-cathode metal layer fills a second gap between the first protective layer and the second protective layer.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the aforementioned display panel further includes: an encapsulation layer that covers the cathode metal layer and the metal ring layer.

[0010] In conjunction with the first aspect, in some implementations of the first aspect, the aforementioned pixel definition layer includes a light-absorbing material.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the above-mentioned display panel further includes: a light-shielding layer, the light-shielding layer comprising a light-absorbing material, the light-shielding layer being embedded within an encapsulation layer, and the light-shielding layer covering a pixel definition layer.

[0012] In a second aspect, a method for fabricating a display panel is provided. The method includes: fabricating a planarization layer located on a backplane, the planarization layer including N grooves, each groove including a through-hole for exposing pixel electrodes disposed on the backplane; fabricating an anode metal layer covering the planarization layer; fabricating a first photoresist and a second photoresist on the anode metal layer, the first photoresist being located outside and surrounding the N grooves, the second photoresist being located inside the N grooves and at least a portion of the second photoresist covering the through-holes of the N grooves, to obtain a first film structure; etching the first film structure and stripping the first and second photoresists to obtain a second film structure, wherein the outer edges of the N grooves of the second film structure retain metal rings, the metal rings including N metal rings, the portion within the metal rings being used to fabricate vapor-deposited layers, wherein the vapor-deposited layers in adjacent metal rings arranged along a first direction are of different colors.

[0013] In conjunction with the second aspect, in some implementations of the second aspect, the aforementioned metal ring includes a first protective layer, a first conductive layer, and a second protective layer, with the first conductive layer located between the first and second protective layers. The first conductive layer is etched to obtain the second conductive layer, and the width of the second conductive layer is smaller than that of the first and second protective layers of the metal ring.

[0014] In conjunction with the second aspect, in some implementations of the second aspect, a pixel definition layer is prepared that surrounds a portion of the anode metal layer retained in each groove and covers the edge of the portion of the anode metal layer to obtain a third film layer structure.

[0015] In conjunction with the second aspect, in some implementations of the second aspect, a first vapor deposition layer is deposited on the first set of grooves of the third film structure to obtain a fourth film structure, wherein the first set of grooves includes J grooves, where J is less than N, and the first vapor deposition layer is a first color.

[0016] In conjunction with the second aspect, in some implementations of the second aspect, a first process vapor deposition layer is deposited on the first surface of the third film structure, the first process vapor deposition layer being a first color; a third photoresist is prepared, the third photoresist covering the first groove assembly; the third film structure after the third photoresist is set is etched to remove the portion of the first process vapor deposition layer outside the coverage area of ​​the third photoresist to obtain the first vapor deposition layer; and the third photoresist is stripped off.

[0017] In conjunction with the second aspect, in some implementations of the second aspect, a first cathode metal layer is prepared, which covers the first process vapor-deposited layer, and portions of the first cathode metal layer corresponding to two adjacent grooves are connected by metal rings.

[0018] In conjunction with the second aspect, in some implementations of the second aspect, a first encapsulation layer is prepared, which covers a first cathode metal layer; and a third photoresist is prepared on the first encapsulation layer.

[0019] In conjunction with the second aspect, in some implementations of the second aspect, a second vapor deposition layer is deposited on the second set of grooves of the fourth film layer structure to obtain a fifth film layer structure, wherein the second set of grooves includes L grooves, where L is less than N, and the second vapor deposition layer is a second color.

[0020] In conjunction with the second aspect, in some implementations of the second aspect, a second process vapor deposition layer, which is of a second color, is deposited on the second surface of the fourth film layer structure; a second cathode metal layer is prepared, which covers the second process vapor deposition layer, and portions of the second cathode metal layers corresponding to two adjacent grooves are connected by metal rings; a second encapsulation layer is prepared, which covers the second cathode metal layer; a fourth photoresist is prepared on the second encapsulation layer, which covers the second groove assembly; the fourth film layer structure after the fourth photoresist is applied is etched to remove portions of the second process vapor deposition layer outside the coverage area of ​​the fourth photoresist to obtain the second vapor deposition layer; and the fourth photoresist is stripped off.

[0021] In conjunction with the second aspect, in some implementations of the second aspect, the pixel definition layer includes a light-absorbing material.

[0022] In conjunction with the second aspect, in some implementations of the second aspect, a light-shielding layer is prepared, the light-shielding layer comprising a light-absorbing material, the light-shielding layer covering the pixel definition layer.

[0023] In conjunction with the second aspect, in some implementations of the second aspect, a panel encapsulation layer is prepared that covers the first encapsulation layer and the second encapsulation layer.

[0024] Thirdly, a display device is provided, comprising a display panel in any possible implementation of the display panel design as described in the first aspect above. Attached Figure Description

[0025] Figure 1 This is a schematic flowchart of a method 100 for manufacturing a display panel according to an embodiment of this application;

[0026] Figure 2 This is a schematic diagram of a planarization layer structure proposed in an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of the structure of an anode metal layer proposed in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of a first film structure proposed in an embodiment of this application;

[0029] Figure 5 This is a schematic diagram of a second film structure proposed in an embodiment of this application;

[0030] Figure 6 This is a schematic diagram of a cathode metal layer based on a metal ring electrical connection according to an embodiment of this application;

[0031] Figure 7 This is a schematic diagram of a third membrane structure proposed in an embodiment of this application;

[0032] Figure 8 This is a schematic flowchart of a vapor deposition method 800 for a first vapor deposition layer according to an embodiment of this application;

[0033] Figure 9 This is a schematic diagram of a third film layer structure with a first-process vapor-deposited layer proposed in an embodiment of this application;

[0034] Figure 10 This is a schematic diagram of a third film structure with a first cathode metal layer according to an embodiment of this application;

[0035] Figure 11 This is a schematic diagram of a third film layer structure covered with a first encapsulation layer according to an embodiment of this application;

[0036] Figure 12 This is a schematic diagram of the third photoresist placement position according to an embodiment of this application;

[0037] Figure 13 This is a schematic diagram of a fourth film layer structure proposed in an embodiment of this application;

[0038] Figure 14 This is a schematic flowchart of a second vapor deposition method 1400 proposed in an embodiment of this application;

[0039] Figure 15 This is a schematic diagram of a fourth film layer structure with a second-process vapor-deposited layer proposed in an embodiment of this application;

[0040] Figure 16 This is a schematic diagram of a fifth film layer structure proposed in an embodiment of this application;

[0041] Figure 17 This is a schematic diagram of a display panel with a panel encapsulation layer according to an embodiment of this application;

[0042] Figure 18 This is a schematic diagram of a display panel 1800 according to an embodiment of this application;

[0043] Figure 19This is a schematic diagram of another display panel 1800 proposed in the embodiments of this application. Detailed Implementation

[0044] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0045] This application will present various aspects, embodiments, or features relating to a system comprising multiple devices, components, modules, etc. It should be understood and appreciated that individual systems may include additional devices, components, modules, etc., and / or may not include all the devices, components, modules, etc. discussed in conjunction with the accompanying drawings. Furthermore, combinations of these approaches are also possible.

[0046] Furthermore, in the embodiments of this application, the words "exemplary," "for example," etc., are used to indicate that they are examples, illustrations, or descriptions. Any embodiment or design scheme described as "exemplary" in the embodiments of this application should not be construed as being better or more advantageous than other embodiments or design schemes. Specifically, the use of the term "exemplary" is intended to present the concept in a concrete manner.

[0047] The business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0048] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0049] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0050] To ensure the precision of pixel color deposition in OLED panels, a current OLED panel manufacturing technology based on a finite element mask (FMM) has been proposed. An FMM is a thin metal mask with small, densely packed holes. Taking the fabrication of RGB displays as an example, it is primarily used to deposit RGB organic materials (such as vapor deposition materials) through the mask during OLED fabrication to form pixels. The positions of these vias correspond to the pixel positions to ensure that the vapor deposition material is accurately deposited at the designated pixel locations. This process requires at least three FMM patterns, each pattern used to complete the deposition of a single color layer.

[0051] Considering that screens typically include pixels of multiple colors, taking the most common OLED panel based on red, green, and blue (RGB) pixels as an example, three colors need to be deposited on the OLED panel. Typically, for a row of pixels, the colors of two adjacent pixels are different, so the deposited layers corresponding to these two pixels should be two different colors. However, when deposited layers of different colors are connected, crosstalk occurs, leading to color distortion. Therefore, a separate isolation layer (also called an isolation pillar or isolation ring, etc.) needs to be prepared between the deposited layers of different colors to increase the distance between them and avoid crosstalk. Furthermore, based on this isolation layer, electrical connections between the cathode metal layers covering each deposited layer also need to be established.

[0052] Furthermore, FMMs are not easy to manufacture. To avoid color crosstalk between adjacent color vapor deposition layers, a certain amount of space needs to be reserved between the positions of the vapor deposition layers corresponding to the two colors in the FMM. This further increases the difficulty of manufacturing FMMs for OLED panels, resulting in higher manufacturing costs and process complexity for OLED panels fabricated using FMM-based photolithography. Moreover, due to the limitations of the FMM fabrication process, it is difficult to further increase the pixel aperture ratio and pixel density of OLED panels fabricated using FMM-based photolithography.

[0053] In view of this, embodiments of this application propose a display panel, a method for manufacturing the display panel, and a display device. The method employs photolithography technology and executes a specially designed display panel manufacturing process to sequentially form corresponding film layers on the OLED backplane. This avoids the use of FMM in the manufacturing process of the OLED panel, reduces the process complexity of OLED panel manufacturing, and thus helps to reduce the manufacturing cost of the OLED panel. In addition, while ensuring the accuracy of pixel evaporation, it also helps to further increase the pixel aperture ratio and pixel density of the OLED panel.

[0054] Photolithography is one of the core processes in microelectronics manufacturing. It uses light to transfer intricate patterns onto semiconductor materials or thin films. The photolithography process begins by coating the material surface with a photosensitive material (such as photoresist). Then, a specific pattern is projected onto the photoresist using a mask. Next, the exposed and unexposed areas of the photoresist are separated using photochemical reactions. The exposed or unexposed areas are then removed through development steps (depending on whether the photoresist is negative or positive), thus forming the desired pattern on the material surface.

[0055] In the embodiments of this application, photolithography technology is mainly used to define the pixel shape and position of the OLED panel, so as to form a high-precision pixel pattern on the OLED back panel, thereby achieving a high-resolution and high-definition display effect.

[0056] Furthermore, the film structure proposed in this application refers to a film structure for pixel imaging prepared on the OLED backplane. These film layers may include: a planarization layer, a pixel definition layer, an anode metal layer, a vapor deposition layer (including multiple colors), an isolation layer (or isolation pillar, isolation ring, etc.), a cathode metal layer, and an encapsulation layer.

[0057] In the conventional manufacturing process of OLED panels based on photolithography, a planarization layer needs to be prepared on the OLED backplane first. This planarization layer includes multiple raised mesas, and the gaps between the mesas are used to expose the pixel electrodes on the OLED backplane. Then, an anode metal layer and a pixel definition layer are sequentially prepared on the multiple mesas of the planarization layer, and both of these layers need to cover the pixel electrodes located in the gaps between the multiple mesas. Then, a vapor deposition layer of the corresponding pixel color is deposited on the pixel definition layer. In this process, a separate isolation layer needs to be prepared between the vapor deposition layers of the two pixel colors to avoid crosstalk between the vapor deposition layers of the two pixel colors. The preparation of this isolation layer requires a separate mask.

[0058] As explained above regarding photolithography technology, even when using photolithography, a photomask is still required during the fabrication of the corresponding film structure. However, the manufacturing difficulty and cost of this ordinary photomask are significantly lower than those of the aforementioned FMM. Nevertheless, the specially designed display panel fabrication process proposed in this application can minimize the use of photomasks and avoid the need for separately fabricating an isolation layer to separate the two pixel colors, thereby further reducing the complexity and cost of OLED panel manufacturing.

[0059] Figure 1 This is a schematic flowchart of a method 100 for manufacturing a display panel according to an embodiment of this application.

[0060] refer to Figure 1 As shown, the above preparation method 100 includes the following steps:

[0061] S110: Prepare a planarization layer.

[0062] Figure 2 This is a schematic diagram of a planar layer structure proposed in an embodiment of this application.

[0063] refer to Figure 2 As shown, a planarization layer is located on the backplate, and the planarization layer includes N grooves, each groove including a through hole for exposing pixel electrodes disposed on the backplate.

[0064] Therefore, the planarization layer prepared based on S110 includes three levels: the level where the through-hole is located, the level where the bottom of the groove (excluding the through-hole portion) is located, and the level outside the groove. And... Figure 2 In the middle, the lighter the color, the lower the height.

[0065] In some possible embodiments, the planarization layer described above can be prepared using a halftone exposure process, in which the material of the planarization layer is exposed to three different exposure intensities for the same duration, so that the portion of the planarization layer retained after development has... Figure 2 The three levels shown form three distinct sections.

[0066] In some possible embodiments, the aforementioned backplate may be the backplate of an OLED display.

[0067] S120: Preparation of the anode metal layer.

[0068] Figure 3 This is a schematic diagram of the structure of an anode metal layer proposed in an embodiment of this application.

[0069] refer to Figure 3 As shown, the anode metal layer covers the aforementioned flat layer.

[0070] It should be understood that since the through hole is part of the groove, and the groove is part of the planarization layer, the through hole is also part of the planarization layer structure. Therefore, the above-mentioned anode metal layer covering the planarization layer not only covers the groove part, but also covers the through hole and the part outside the groove. In other words, it completely covers the entire planarization layer located on the back plate.

[0071] In some possible embodiments, the anode metal layer is a three-layer metal structure. The anode metal layer can be prepared using a sputtering deposition process to deposit the three-layer metal structure. The three layers serve as a first protective layer, a first conductive layer, and a second protective layer, respectively, with the first conductive layer sandwiched between the two protective layers.

[0072] In some possible embodiments, the materials of the three film layers of the above-mentioned anode metal layer may be titanium (Ti), aluminum (Al) and titanium (Ti) in sequence, or indium tin oxide (ITO), silver (Ag) and indium tin oxide (ITO), or other combinations of metal materials suitable as anodes.

[0073] S130: Prepare a first photoresist and a second photoresist on the anode metal layer to obtain a first film structure.

[0074] Figure 4 This is a schematic diagram of a first membrane structure proposed in an embodiment of this application.

[0075] refer to Figure 4 As shown in the cross-sectional side view, a first photoresist is located outside and surrounds the N grooves, and a second photoresist is located inside the N grooves, with at least a portion of the second photoresist covering the through-holes of the N grooves. (Reference) Figure 4 As shown in the top view, the blank areas in the figure represent the shape and distribution of the first or second photoresist.

[0076] It should be understood that the above-mentioned first photoresist located outside the N grooves refers to the first photoresist located on the highest mesa portion of the planarization layer.

[0077] In some possible embodiments, the first photoresist and the second photoresist described above can be prepared in the following manner:

[0078] A photoresist is uniformly coated on the anode metal layer; then a photomask is prepared, comprising a light-blocking portion and a light-transmitting portion. When the photoresist is a negative photoresist, the light-transmitting portion of the photomask corresponds to the above-described... Figure 4 The positions of the first and second photoresists shown correspond to the light-blocking portion of the photomask when the photoresist is a positive photoresist. Figure 4 The positions of the first and second photoresists are shown; then, the backplate coated with photoresist is placed in the photolithography machine and exposed using the aforementioned mask; finally, the exposed photoresist is developed using a developer, dissolving or swelling the exposed (for positive photoresist) or unexposed (for negative photoresist) areas, and then cleaned with a cleaning agent, retaining... Figure 4 The first and second photoresists shown are used to obtain the above-mentioned... Figure 4 The first membrane structure is shown.

[0079] S140: Etch the first film structure and strip the first and second photoresists to obtain the second film structure.

[0080] Figure 5 This is a schematic diagram of a second membrane structure proposed in an embodiment of this application.

[0081] refer to Figure 5 As shown in the cross-sectional side view, the outer edges of the N grooves in the second membrane structure retain metal rings, which consist of N metal rings. (Reference) Figure 5 As shown in the top view, the portion inside the metal ring is used to prepare the vapor-deposited layer. Among the M metal rings arranged along the first direction, the vapor-deposited layers in adjacent metal rings are of different colors.

[0082] It should be understood that the outer edges of the N grooves in the aforementioned second membrane structure refer to the highest mesa portion in the planarization layer.

[0083] Furthermore, based on the structural description of the aforementioned metal rings, it can be seen that, with Figure 5 Taking the metal ring layer shown as an example, the edge of each metal ring can be used to isolate vapor-deposited layers of different colors, thereby achieving the function of the isolation layer mentioned above.

[0084] In some possible embodiments, the shape of the metal ring is not limited to a rectangle. Based on the preparation method 100 proposed in this application, the shape of the metal ring can be adaptively adjusted for different groove shapes, thereby adapting to the groove structure of the platform layer.

[0085] Based on the above technical solution, through a specially designed display panel fabrication process, the planarization layer is fabricated into a three-layer structure, including a mesa, a groove, and a through-hole. When fabricating the anode metal layer, the entire planarization layer is covered. In the photolithography process, only one exposure operation is needed to immediately fabricate the isolation layer. That is, the unwanted part of the anode metal layer is removed during the exposure operation, and the part of the anode metal layer on the mesa of the planarization layer is retained as an isolation layer to isolate adjacent different color vapor-deposited layers. This avoids the need to fabricate the isolation layer separately, simplifies the display panel fabrication process, and helps to reduce the fabrication cost of OLED panels.

[0086] In some possible embodiments, considering that a cathode metal layer needs to be prepared on the vapor-deposited layer prepared in each metal ring of the metal ring, and that the cathode metal layers in each metal ring need to be electrically connected, and that the metal ring is obtained after exposure operation based on the anode metal layer, the internal structure and material of the metal ring should be consistent with the anode metal layer. Therefore, the metal ring also includes a first protective layer, a first conductive layer and a second protective layer.

[0087] In some possible embodiments, the first conductive layer may be located above the first protective layer, and the second protective layer may be located above the first conductive layer; or the first conductive layer may be located above the second protective layer, and the first protective layer may be located above the first conductive layer.

[0088] It should be understood that, based on the materials of the three films of the anode metal layer, the first and second protective layers are also metals and have a certain degree of conductivity.

[0089] In some possible embodiments, in order to meet the requirements for electrical connection between the cathode metal layers, after obtaining the second film structure, the following operations can also be performed:

[0090] The first conductive layer of the metal ring is etched to obtain a second conductive layer, the width of which is smaller than the first and second protective layers of the metal ring.

[0091] In some possible embodiments, the etching process for the metal ring layer described above can employ wet etching, specifically lateral etching. Taking a metal ring within the metal ring layer as an example, lateral etching refers to etching the first conductive layer corresponding to the edge of the metal ring from both sides inwards to form an undercut structure, which can also be called a roof structure, undercut structure, etc. Of course, other etching methods can be adaptively used under different fabrication conditions.

[0092] It should be understood that the reason for selectively etching the metal rings is that the material properties of the first conductive layer are more active, so etching the first conductive layer is less difficult and faster.

[0093] In some possible embodiments, the metal ring can be used to realize the function of electrically connecting two adjacent cathode metal layers, and the metal ring can also be called an auxiliary cathode structure.

[0094] Figure 6 This is a schematic diagram of a cathode metal layer based on a metal ring electrical connection proposed in an embodiment of this application.

[0095] In some possible embodiments, taking the second conductive layer located above the first protective layer as an example, refer to... Figure 6 As shown, cathode metal layers are respectively disposed on both sides of one side of the metal ring layer. One end of these two cathode metal layers can directly overlap the two sides of the first protective layer and be connected through the metal ring layer. Furthermore, one end of these two cathode metal layers can be connected through the second conductive layer of the metal ring layer.

[0096] Therefore, based on the undercut structure of the metal ring, the two cathode metal layers can be more easily fixed on both sides of the second conductive layer and electrically connected.

[0097] Based on the above technical solution, by laterally etching the first conductive layer of the metal ring, each edge of the metal ring can be made into an undercut structure, allowing the cathode metal layers on both sides of the edge to overlap on the protective layer located below the first conductive layer and be electrically connected through the first conductive layer. This method is relatively easy to implement and has a fast implementation speed, thereby further reducing the difficulty of fabricating the isolation layer.

[0098] It should be understood that the aforementioned second film layer structure is only a film layer structure for completing the metal ring layer preparation, and is not a complete OLED panel structure.

[0099] In some possible embodiments, after the preparation of the second film layer structure is completed, the following follow-up operation is required: prepare a pixel definition layer to obtain the third film layer structure.

[0100] The pixel definition layer is used to define the boundaries of pixels on the display screen, preventing light crosstalk and current crosstalk between adjacent pixels, while also affecting the pixel aperture ratio and display efficiency.

[0101] Figure 7 This is a schematic diagram of a third membrane structure proposed in an embodiment of this application.

[0102] refer to Figure 7 As shown, the pixel definition layer surrounds the portion of the anode metal layer retained in each groove and covers the edge of the portion of the anode metal layer.

[0103] In some possible embodiments, reference Figure 7 As shown in (a), the pixel definition layer covers the via portion covered by the anode metal layer, that is, it fills the depression caused by the anode metal layer covering the via. Based on the coverage structure of the pixel definition layer, the difficulty of evaporation caused by the depression of the anode metal layer when preparing the evaporation layer on the entire film structure can be reduced.

[0104] In some possible embodiments, reference Figure 7 As shown in (b), the pixel definition layer does not cover the via portion covered by the anode metal layer. Based on the coverage structure of the pixel definition layer, the overlapping area between the vapor deposition layer and the anode metal layer can be increased as much as possible, thereby increasing the aperture ratio of the pixel and the pixel density of the OLED panel.

[0105] In some possible embodiments, after the preparation of the third film structure is completed, the following follow-up operation is required: depositing a first vapor deposition layer on the first set of grooves of the third film structure to obtain a fourth film structure, wherein the first set of grooves includes J grooves, J is less than N, and the first vapor deposition layer is a first color.

[0106] Taking an RGB display screen as an example, the aforementioned first groove set can be used to deposit a vapor deposition layer of a certain color, namely the aforementioned first vapor deposition layer, which can be red, green, or blue.

[0107] Figure 8 This is a schematic flowchart of a vapor deposition method 800 for a first vapor deposition layer proposed in an embodiment of this application.

[0108] refer to Figure 8 As shown, the vapor deposition method 800 includes the following steps:

[0109] S810: A first process vapor deposition layer is deposited on the first surface of the third film layer structure, the first process vapor deposition layer being a first color.

[0110] Figure 9 This is a schematic diagram of a third film structure with a first-process vapor-deposited layer proposed in an embodiment of this application.

[0111] refer to Figure 9 As shown, the first surface of the third film layer structure refers to the surface of the third film layer structure that is exposed upwards. This first surface may include the upper surface of a portion of the platform of the aforementioned flat layer, the upper surface of the metal ring layer, the upper surface of the pixel definition layer, and the upper surface of a portion of the anode metal layer. The aforementioned first process vapor deposition layer is a vapor deposition material with a specified color deposited on these surfaces.

[0112] In some possible embodiments, to meet the working principle and performance requirements of the display screen, a cathode metal layer needs to be introduced into the above-mentioned film structure to provide the necessary conductivity for the display screen, ensure the efficiency and stability of electron injection, and enable the display screen to emit light normally and stably. Therefore, after completing the evaporation of the first process layer, the following operation can also be performed: preparing the first cathode metal layer.

[0113] Figure 10 This is a schematic diagram of a third film structure with a first cathode metal layer proposed in an embodiment of this application.

[0114] refer to Figure 10 As shown, the first cathode metal layer covers the first process vapor-deposited layer, and the portions of the first cathode metal layer corresponding to two adjacent grooves are connected by the aforementioned metal ring layer. In this case, the metal ring layer serves as an auxiliary cathode, conducting electricity outwards.

[0115] In some possible embodiments, the portions of the first cathode metal layers of the two adjacent grooves can be directly connected through the conductive layer in the metal ring.

[0116] In some possible embodiments, the cathode metal layer described above can be prepared by spin evaporation.

[0117] In some possible embodiments, the material of the cathode metal layer can be a highly conductive and highly electron-transmitting material, such as magnesium (Mg) or silver (Ag).

[0118] In some possible embodiments, considering that the materials used in the various layers of the third film structure with the first cathode metal layer are generally sensitive to moisture and oxygen and are prone to reaction, ultimately leading to dark spots on the display screen, and considering that subsequent processes are required after obtaining the third film structure with the first cathode metal layer, it is necessary to protect the obtained film structure while providing a relatively flat surface for subsequent processes to prepare the corresponding film structures. Therefore, this application proposes that after completing the preparation of the first cathode metal layer, the following operation can also be performed: preparing a first encapsulation layer.

[0119] Figure 11This is a schematic diagram of a third film layer structure covered with a first encapsulation layer according to an embodiment of this application.

[0120] refer to Figure 11 As shown, the first encapsulation layer covers the first cathode metal layer.

[0121] In some possible embodiments, the first encapsulation layer can be prepared by chemical vapor deposition. The first cathode metal layer can fully cover the underlying cathode metal layer and the first process vapor deposition layer to prevent the vapor deposition material from failing due to subsequent processes such as water washing.

[0122] In some of the best possible embodiments, the material of the first encapsulation layer may be silicon nitride (SiNx), silicon oxide (SiOx), or other composite materials used for isolation.

[0123] Since the first process of vapor deposition covers all the grooves, and not just the first set of grooves mentioned above, the following operations need to be performed.

[0124] S820: Preparation of the third photoresist.

[0125] Figure 12 This is a schematic diagram of the third photoresist placement position proposed in an embodiment of this application.

[0126] refer to Figure 12 As shown, the third photoresist covers the first groove assembly.

[0127] In some possible embodiments, when fabricating the first encapsulation layer described above, a third photoresist can be fabricated on the upper surface of the first encapsulation layer, and the distribution position of the third photoresist can be referenced. Figure 11 As shown.

[0128] In some possible embodiments, a third photoresist may be prepared on the upper surface of the first cathode metal layer without preparing the first encapsulation layer described above.

[0129] S830: Etch the third film structure after the third photoresist has been set, and remove the portion of the first process vapor deposition layer outside the coverage area of ​​the third photoresist to obtain the first vapor deposition layer.

[0130] The etching process for the third film structure described above can be referred to the photolithography process mentioned earlier, and will not be repeated here.

[0131] S840: The third photoresist is peeled off to obtain the fourth film structure.

[0132] Figure 13 This is a schematic diagram of a fourth film layer structure proposed in an embodiment of this application.

[0133] refer to Figure 13 As shown, in the above method 800, the portion of the first process vapor deposition layer outside the coverage area of ​​the third photoresist is removed. This portion of the first process vapor deposition layer is covered by a portion of the first cathode metal layer, and a portion of the first encapsulation layer can also be covered by the first cathode metal layer. Therefore, after removing this portion of the first process vapor deposition layer, the portion of the film structure covered by this portion of the first process vapor deposition layer will also be removed simultaneously, thus forming... Figure 13 As shown, the fourth film layer structure, consisting of the first vapor deposition layer, the first cathode metal layer, and the first encapsulation layer, is retained only above the first groove assembly. The remaining portion still exposes the pixel definition layer, the anode metal layer, and the platform portion of the planarization layer.

[0134] Based on the above technical solution, a single-color vapor deposition layer in a portion of the grooves can be prepared by photolithography. The preparation process is relatively simple, requiring only the sequential preparation of the vapor deposition layer, cathode metal layer, and encapsulation layer on the overall film structure. Furthermore, the film structure of the first groove assembly portion can be preserved by etching.

[0135] In some possible embodiments, the fourth film layer structure described above can also be directly fabricated based on a photomask, as follows: First, a photomask with a special structure is prepared, the position of the light-transmitting part of the photomask corresponding to the first groove set; then, the photomask is aligned with the third film layer structure, and then the first vapor deposition layer, the first cathode metal layer and the first encapsulation layer are sequentially fabricated on the third film layer structure based on the photomask.

[0136] In some possible embodiments, since the above-mentioned fourth film layer structure only includes one pixel color, for an RGB display screen, it is necessary to continue to prepare two different colored vapor deposition layers based on the fourth film layer structure. Therefore, after obtaining the above-mentioned fourth film layer structure, the following operation can also be performed: deposit a second vapor deposition layer on the second groove set of the fourth film layer structure to obtain a fifth film layer structure. The second groove set includes L grooves, where L is less than N, and the second vapor deposition layer is the second color.

[0137] For example, taking an RGB display as an example, when the first color is red, the second color can be green or blue.

[0138] Figure 14 This is a schematic flowchart of a second vapor deposition method 1400 proposed in an embodiment of this application.

[0139] This vapor deposition method 1400 can be followed by the aforementioned vapor deposition method 800, for reference. Figure 14 As shown, the vapor deposition method 1400 includes the following steps:

[0140] S1410: A second process vapor deposition layer is deposited on the second surface of the fourth film layer structure, the second process vapor deposition layer being a second color.

[0141] Figure 15 This is a schematic diagram of a fourth film layer structure with a second-process vapor-deposited layer proposed in an embodiment of this application.

[0142] Refer to the above Figure 15 As shown, the second surface of the fourth film layer structure refers to the surface of the fourth film layer structure that is exposed upwards. The second surface may include the upper surface of part of the platform of the flat layer, the upper surface of the metal ring layer, the upper surface of the pixel definition layer, and the upper surface of part of the anode metal layer. The second process vapor deposition layer is a vapor deposition material with a specified color deposited on these surfaces.

[0143] S1420: Prepare a second cathode metal layer that covers the second process vapor deposition layer, and the portions of the second cathode metal layer corresponding to two adjacent grooves are connected by metal rings.

[0144] In some possible embodiments, the second cathode metal layers of two adjacent grooves can be directly connected through the conductive layer of the metal ring.

[0145] S1430: Prepare a second encapsulation layer that covers the second cathode metal layer.

[0146] Similar to the preparation of the first cathode metal layer and the first encapsulation layer described above, the second cathode metal layer and the second encapsulation layer are prepared on the overall upper surface of the fourth film layer structure on which the second process evaporation layer has been deposited.

[0147] S1440: A fourth photoresist is prepared on the second encapsulation layer, which covers the second groove assembly.

[0148] S1450: The fourth film structure after the fourth photoresist is set is etched to remove the portion of the second process vapor deposition layer outside the coverage area of ​​the fourth photoresist, so as to obtain the above-mentioned second vapor deposition layer.

[0149] The etching process for the fourth film layer structure described above can be referred to the photolithography process mentioned earlier, and will not be repeated here.

[0150] In some possible embodiments, since the second process vapor deposition layer is typically an organic material and the first encapsulation layer is typically an inorganic material, when etching the fourth film structure, the organic material exposed outside the coverage area of ​​the fourth photoresist can be directly etched, thereby removing part of the second process vapor deposition layer outside the coverage area of ​​the fourth photoresist to obtain the aforementioned second vapor deposition layer.

[0151] S1460: The fourth photoresist is peeled off to obtain the fifth film layer structure.

[0152] Figure 16 This is a schematic diagram of a fifth membrane structure proposed in an embodiment of this application.

[0153] refer to Figure 16 As can be seen, after completing the above-mentioned vapor deposition method 1400, the fifth film layer structure already has two colored vapor deposition layers and is also covered by the corresponding second cathode metal layer and second encapsulation layer. As for the remaining part, the process flow proposed in vapor deposition method 1400 can be used to prepare the third colored third vapor deposition layer, the third cathode metal layer and the third encapsulation layer in the remaining designated positions. This application will not elaborate on this in detail.

[0154] Based on the above technical solution, not only can the second vapor deposition layer, the second cathode metal layer, and the second encapsulation layer be deposited in the second groove assembly, but the structure of the first vapor deposition layer, the first cathode metal layer, and the first encapsulation layer that have been prepared previously is not affected during the preparation of these three film layers. Furthermore, the process of this method is relatively simple and the cost is low.

[0155] In some possible embodiments, the material of the pixel definition layer described above may include a light-absorbing material.

[0156] Among them, light-absorbing materials refer to materials that absorb most of the light when it shines on an object made of them, rather than transmitting or reflecting it.

[0157] Based on the above technical solution, the use of light-absorbing materials in the pixel definition layer can effectively reduce interference from external light during the use of the display screen, thereby improving the display effect.

[0158] In some possible embodiments, after completing the first encapsulation layer and the second encapsulation layer, a light-shielding layer may also be prepared on the first encapsulation layer and the second encapsulation layer, which is used to cover the pixel definition layer.

[0159] In some possible embodiments, the light-shielding layer may also cover the metal ring layer.

[0160] In some possible embodiments, the material of the light-shielding layer may be the light-absorbing material described above.

[0161] Based on the above technical solution, by introducing a light-shielding layer into the display screen, interference from external light can also be effectively reduced, thereby improving the display effect.

[0162] In some possible embodiments, taking an RGB display as an example, after completing the evaporation of the above three color evaporation layers, and the cathode metal layer and encapsulation layer (e.g., the first encapsulation layer, the second encapsulation layer and the third encapsulation layer) covering the three color evaporation layers, the following operation can also be performed: prepare a panel encapsulation layer to obtain a display panel.

[0163] Figure 17 This is a schematic diagram of the structure of a display panel with a panel encapsulation layer according to an embodiment of this application.

[0164] refer to Figure 17 As shown, the panel encapsulation layer covers the first and second encapsulation layers mentioned above. Of course, for RGB displays, the panel encapsulation layer also covers a third encapsulation layer. The upper surface of the panel encapsulation layer is flat, ensuring a smooth surface for the entire display, facilitating the subsequent addition of other protective or functional layers, such as color filters or touch layers, on top of the panel encapsulation layer. Furthermore, the panel encapsulation layer effectively prevents external contaminants such as water and oxygen from entering the display panel.

[0165] In some possible embodiments, taking the first encapsulation layer as an example, the above-mentioned panel encapsulation layer and the first encapsulation layer can be used to form a three-layer encapsulation structure. It can be seen that the above-mentioned panel encapsulation layer can be a two-layer structure, wherein the material of the first layer structure can be an organic ink material, the material of the second layer structure can be silicon nitride (SiN), and the first layer structure can be located between the second layer structure and the above-mentioned first encapsulation layer. The material of the first encapsulation layer can also be SiN.

[0166] Based on the above technical solution, the first encapsulation layer and the second encapsulation layer introduced in the process of manufacturing the display panel can be utilized to form a three-layer encapsulation structure with the panel encapsulation layer covering the entire display panel. This helps to increase the sealing of the display panel, prevent external foreign objects such as water and oxygen from entering the display panel, thereby extending the service life of the display panel and improving its stability.

[0167] It should be noted that the fabrication method described in this application embodiment is based on the fabrication of a display screen, while the idea of ​​performing photolithography on the fabricated film structure and reserving a portion as an isolation layer between other film structures proposed in this application embodiment can also be applied to other types of circuit backplanes.

[0168] Furthermore, this application also proposes a display panel that can be obtained based on any of the display panel manufacturing methods proposed in this application.

[0169] Figure 18 This is a schematic diagram of a display panel 1800 according to an embodiment of this application.

[0170] refer to Figure 18 As shown, the display panel 1800 includes:

[0171] Backplate 1810, the first surface 01 of which includes N pixel electrodes 1811, where N is a positive integer;

[0172] A planarization layer 1820 is located on the first surface 01. The planarization layer 1820 includes N grooves 1821. Each groove 1821 includes a through hole 1822. The opening of one through hole 1822 is opposite to a pixel electrode 1811.

[0173] The anode metal layer 1830 includes N sub-anode metal layers 1831, which are located in the groove 1821 and cover the through hole 1822.

[0174] A pixel definition layer 1840 is located within N recesses 1821 and covers the edges of N sub-anode metal layers 1831 within the recesses 1821.

[0175] The metal ring layer 1850 includes N metal rings 1851, which are located at the outer edges of N grooves 1821. The film structure of the metal ring layer 1850 is the same as that of the anode metal layer 1830.

[0176] N vapor-deposited layers 1860, which cover N grooves 1821 respectively, and adjacent vapor-deposited layers 1860 are separated by a metal ring 1850.

[0177] The cathode metal layer 1870 includes N sub-cathode metal layers 1871, which cover N vapor-deposited layers 1860 respectively. Adjacent sub-cathode metal layers 1871 are connected by metal rings 1850.

[0178] Since the film structure of the aforementioned metal ring layer 1850 is the same as that of the anode metal layer 1830, etching and other operations can be performed on the same film structure to fabricate both the metal ring layer 1850 and the anode metal layer 1830. This reduces the fabrication complexity of the display panel 1800, thereby helping to lower manufacturing costs. Furthermore, avoiding the use of FMM-based photolithography for the display panel allows for maximizing the overlap area between the vapor-deposited layer and the anode metal layer, thereby increasing the pixel aperture ratio and the pixel density of the display panel (which can be an OLED panel).

[0179] In some possible embodiments, the pixel definition layer 1840 may cover the via 1822 of the groove 1821. Alternatively, the pixel definition layer 1840 may only cover the edge of the groove 1821, which can further increase the area of ​​overlap between the vapor-deposited layer and the anode metal layer, thereby increasing the pixel aperture ratio and pixel density.

[0180] In some possible embodiments, the above-mentioned N vapor deposition layers 1860 include K colors, where K is greater than 1 and less than or equal to N, and adjacent vapor deposition layers 1860 have different colors.

[0181] In some possible embodiments, reference Figure 18 As shown, the metal ring 1850 includes a first protective layer 1852, a conductive layer 1853, and a second protective layer 1854. The conductive layer 1853 is located between the first protective layer 1852 and the second protective layer 1854, and the width of the conductive layer 1853 is smaller than the width of the first protective layer 1852 and the second protective layer 1854.

[0182] In some possible embodiments, reference Figure 18 As shown, the above-mentioned N sub-cathode metal layers 1871 include a first sub-cathode metal layer 1872 and a second sub-cathode metal layer 1873. The first sub-cathode metal layer 1872 and the second sub-cathode metal layer 1873 are adjacent to each other. The first part 02 of the first sub-cathode metal layer 1872 fills the first gap 03 between the first protective layer 1852 and the second protective layer 1854. The second part 04 of the second sub-cathode metal layer 1873 fills the second gap 05 between the first protective layer 1852 and the second protective layer 1854.

[0183] Based on the structural design of the display panel 1800 described above, it is known that designing the width of the conductive layer 1853 to be smaller than the width of the first protective layer 1852 and the second protective layer 1854 facilitates a more stable connection between the first sub-cathode metal layer 1872 and the second sub-cathode metal layer 1873 located on both sides of one side of the metal ring 1851 through the conductive layer 1853 of the metal ring 1851. Furthermore, during the manufacturing process, the material of the cathode metal layer 1870 can be filled into the two gaps of each metal ring 1851, reducing the manufacturing difficulty.

[0184] In some possible embodiments, reference Figure 18 As shown, the above-mentioned display panel may further include: an encapsulation layer 1880, which covers the cathode metal layer 1870 and the metal ring layer 1850, thereby protecting each film layer of the entire display panel.

[0185] In some possible embodiments, the pixel definition layer 1840 described above includes a light-absorbing material, thereby reducing the reflectivity of the display panel and crosstalk between pixels.

[0186] Figure 19 This is a schematic diagram of another display panel 1800 proposed in the embodiments of this application.

[0187] In some possible embodiments, the display panel 1800 may further include a light-shielding layer 1890, which includes a light-absorbing material, is embedded in the encapsulation layer 1880, and covers the pixel definition layer 1840.

[0188] In some possible embodiments, when the material of the pixel definition layer 1840 includes a light-absorbing material, a light-shielding layer 1890 may also be provided within the encapsulation layer 1880.

[0189] This application also proposes a display device, which includes any of the display panels 1800 proposed in this application.

[0190] This application also proposes an apparatus for manufacturing a display panel, the apparatus including a module or unit for executing any of the display panels proposed in this application.

[0191] Furthermore, this application also proposes another apparatus for manufacturing a display panel, which includes a processor and a memory connected together. The memory is used to store program code, and the processor is used to call the program code to execute any of the display panel manufacturing methods proposed in this application.

[0192] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0193] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0194] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0195] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0196] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0197] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0198] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized by, The display panel comprises: a back plate, a first surface of the back plate comprising N pixel electrodes, N being a positive integer; a flat layer, the flat layer being located on the first surface, the flat layer comprising N recesses, the recesses comprising through holes, an opening of one of the through holes being opposite to one of the pixel electrodes; an anode metal layer, the anode metal layer comprising N sub-anode metal layers, the sub-anode metal layers being located in the recesses and covering the through holes; a pixel definition layer, the pixel definition layer being located in the N recesses and covering edges of the sub-anode metal layers in the recesses; a metal ring layer, the metal ring layer comprising N metal rings, the N metal rings being located at outer edges of the N recesses, a film layer structure of the metal ring layer being the same as a film layer structure of the anode metal layer; N evaporation layers, the N evaporation layers corresponding to covering the N recesses, two adjacent evaporation layers being separated by the metal ring layer; a cathode metal layer, the cathode metal layer comprising N sub-cathode metal layers, the N sub-cathode metal layers corresponding to covering the N evaporation layers, two adjacent sub-cathode metal layers being connected by the metal ring layer.

2. The display panel of claim 1, wherein, The metal ring layer comprises a first protective layer, a conductive layer and a second protective layer, the conductive layer being located between the first protective layer and the second protective layer, a width of the conductive layer being smaller than widths of the first protective layer and the second protective layer.

3. The display panel of claim 2, wherein, The N sub-cathode metal layers comprise a first sub-cathode metal layer and a second sub-cathode metal layer, the first sub-cathode metal layer being adjacent to the second sub-cathode metal layer, a first part of the first sub-cathode metal layer filling a first gap between the first protective layer and the second protective layer, a second part of the second sub-cathode metal layer filling a second gap between the first protective layer and the second protective layer.

4. The display panel of any one of claims 1-3, wherein, The display panel further comprises: an encapsulation layer, the encapsulation layer covering the cathode metal layer and the metal ring layer.

5. The display panel of any one of claims 1-3, wherein, The pixel definition layer comprises light-absorbing material.

6. The display panel of claim 4, wherein, The display panel further comprises: a light-blocking layer, the light-blocking layer comprising light-absorbing material, the light-blocking layer being embedded in the encapsulation layer, the light-blocking layer covering the pixel definition layer.

7. A method for manufacturing a display panel, characterized by, The preparation method comprises: preparing a flat layer, the flat layer being located on a back plate, the flat layer comprising N recesses, the recesses comprising through holes, the through holes being used to expose pixel electrodes provided on the back plate, N being a positive integer; preparing an anode metal layer, the anode metal layer covering the flat layer; preparing a first photoresist and a second photoresist on the anode metal layer, the first photoresist being located outside the N recesses and surrounding the N recesses, the second photoresist being located in the N recesses and at least part of the second photoresist covering the through holes of the N recesses, to obtain a first film layer structure; etching the first film layer structure, and stripping the first photoresist and the second photoresist to obtain a second film layer structure, an outer edge of the N grooves of the second film layer structure retaining a metal ring layer, the metal ring layer comprising N metal rings, a part in the metal ring being used for preparing an evaporation layer, and in the M metal rings arranged along the first direction, the evaporation layers in two adjacent metal rings being different in color.

8. The production method according to claim 7, characterized by, The metal ring layer comprises a first protective layer, a first conductive layer and a second protective layer, the first conductive layer being located between the first protective layer and the second protective layer, and the preparation method further comprises: etching the first conductive layer to obtain a second conductive layer, the width of the second conductive layer being smaller than the first protective layer and the second protective layer of the metal ring layer.

9. The production method according to claim 8, characterized by, The preparation method further comprises: preparing a pixel definition layer, the pixel definition layer surrounding the retained part of the anode metal layer in each groove and covering the edge of the part of the anode metal layer to obtain a third film layer structure.

10. The method of claim 9, wherein, The preparation method further comprises: evaporating a first evaporation layer on a first groove set of the third film layer structure to obtain a fourth film layer structure, the first groove set comprising J grooves, the J being smaller than the N, and the first evaporation layer being of a first color.

11. The method of claim 10, wherein, The evaporation of the first evaporation layer on the first groove set of the third film layer structure comprises: evaporating a first process evaporation layer on a first surface of the third film layer structure, the first process evaporation layer being of the first color; preparing a third photoresist, the third photoresist covering the first groove set; etching the third film layer structure on which the third photoresist is arranged to remove the part of the first process evaporation layer outside the coverage range of the third photoresist to obtain the first evaporation layer; stripping the third photoresist.

12. The method of claim 11, wherein, Before the preparation of the third photoresist, the preparation method further comprises: preparing a first cathode metal layer, the first cathode metal layer covering the first process evaporation layer and being connected by the metal ring layer between the part of the first cathode metal layer corresponding to two adjacent grooves.

13. The method of claim 12, wherein, The preparation method further comprises: preparing a first encapsulation layer, the first encapsulation layer covering the first cathode metal layer; The preparation of the third photoresist comprises: preparing the third photoresist on the first encapsulation layer.

14. The method of claim 13, wherein, The preparation method further comprises: evaporating a second evaporation layer on a second groove set of the fourth film layer structure to obtain a fifth film layer structure, the second groove set comprising L grooves, the L being smaller than the N, and the second evaporation layer being of a second color.

15. The preparation method according to claim 14, characterized in that, The evaporation of the second evaporation layer on the second groove set of the fourth film layer structure comprises: evaporating a second process evaporation layer on a second surface of the fourth film layer structure, the second process evaporation layer being of the second color; preparing a second cathode metal layer, the second cathode metal layer covering the second process evaporation layer and being connected by the metal ring layer between the part of the second cathode metal layer corresponding to two adjacent grooves; preparing a second encapsulation layer, the second encapsulation layer covering the second cathode metal layer; A fourth photoresist is prepared on the second encapsulation layer, and the fourth photoresist covers the second groove set; The fourth film layer structure formed by the fourth photoresist is etched, and the second process evaporation layer outside the coverage range of the fourth photoresist is removed to obtain the second evaporation layer; The fourth photoresist is stripped.

16. The production method according to any one of claims 10 to 15, characterized by, The pixel definition layer comprises a light-absorbing material.

17. The production method according to any one of claims 10 to 15, characterized by, The preparation method further comprises: An optical shielding layer is prepared, the optical shielding layer comprises a light-absorbing material, and the optical shielding layer covers the pixel definition layer.

18. The method of claim 15, wherein, The preparation method further comprises: A panel encapsulation layer is prepared, and the panel encapsulation layer covers the first encapsulation layer and the second encapsulation layer.

19. A display device, characterized by The display panel comprises any one of claims 1 to 6.

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