Transmitter hardware sharing

Abstract

Methods and apparatus for transmitting wireless signals using a plurality of transmit chains that share hardware components to reduce transmitter circuit area. One example transmitter circuit for wireless communication generally includes a first transmit chain and a second transmit chain. The first transmit chain and the second transmit chain share a digital-to-analog converter (DAC). For certain aspects, the first transmit chain and the second transmit chain may also share a frequency synthesizer and / or a baseband processor.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. patent application serial number 17 / 934,495 filed on September 22, 2022, which is hereby incorporated by reference into this application. Technical Field

[0003] Certain aspects of the present disclosure relate generally to electronic circuits, and more particularly to sharing hardware components between two or more transmit chains. Background Art

[0004] Wireless communication devices are widely deployed to provide various communication services, such as telephony, video, data, messaging, broadcast, etc. Such wireless communication devices may send and / or receive radio frequency (RF) signals via any of a variety of suitable radio access technologies (RATs), including but not limited to 5G New Radio (NR), Long Term Evolution (LTE), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wideband CDMA (WCDMA), Global System for Mobile (GSM), Bluetooth, Bluetooth Low Energy (BLE), ZigBee, Wireless Local Area Network (WLAN) RATs (e.g., WiFi), Cellular Vehicle-to-Everything (C-V2X), etc.

[0005] A wireless communication network may include multiple base stations capable of supporting communications for multiple mobile stations. A mobile station (MS) may communicate with a base station (BS) via a downlink and an uplink. A downlink (or forward link) refers to a communication link from a base station to a mobile station, and an uplink (or reverse link) refers to a communication link from a mobile station to a base station. A base station may send data and control information to a mobile station on a downlink, and / or may receive data and control information from a mobile station on an uplink. A base station and / or a mobile station may include at least one transceiver, which may include, for example, multiple transmission paths designated for transmission using different RATs. Summary of the invention

[0006] The systems, methods, and devices of the present disclosure each have several aspects, no single one of which is solely responsible for its desirable characteristics. Without limiting the scope of the disclosure as expressed by the claims that follow, some features will now be briefly discussed. After considering this discussion, and particularly after reading the section entitled "Detailed Description," it will be understood how the features of the present disclosure provide advantages including reduced transmitter circuit area and cost (by eliminating redundant hardware).

[0007] Certain aspects of the present disclosure provide a transmitter circuit for wireless communication. The transmitter circuit generally includes a first transmission chain and a second transmission chain. The first transmission chain and the second transmission chain share a digital-to-analog converter (DAC). For certain aspects, the first transmission chain and the second transmission chain share a DAC, and at least one of a frequency synthesizer or a baseband processor.

[0008] Certain aspects of the present disclosure provide a method of wireless communication. The method generally includes: using a DAC to convert a first digital signal into a first analog signal; using a first transmission chain to process the first analog signal to generate a first radio frequency (RF) signal for transmission; using a DAC to convert a second digital signal into a second analog signal; and using a second transmission chain to process the second analog signal to generate a second RF signal for transmission. The first transmission chain and the second transmission chain share a DAC.

[0009] Certain aspects of the present disclosure provide an apparatus for wireless communication. The apparatus generally includes a component for converting a first digital signal into a first analog signal and converting a second digital signal into a second analog signal; a first component for processing the first analog signal to generate a first RF signal for transmission from the apparatus; and a second component for processing the second analog signal to generate a second RF signal for transmission from the apparatus. The first component for processing and the second component for processing share a component for converting.

[0010] To achieve the foregoing and related ends, one or more aspects include the features fully described below and particularly pointed out in the claims. The following description and the accompanying drawings set forth in detail some illustrative features of one or more aspects. However, these features are merely indicative of some of the various ways in which the principles of the various aspects may be employed, and this specification is intended to include all such aspects and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to be able to understand in detail the manner in which the above-mentioned features of the present disclosure are achieved, a more specific description briefly summarized above can be obtained by reference to various aspects, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only certain typical aspects of the present disclosure and are therefore not to be considered as limiting the scope thereof, as the specification may admit to other equally effective aspects.

[0012] Figure 1 is an illustration of an example wireless communication network in which aspects of the present disclosure may be practiced.

[0013] Figure 2 is a block diagram conceptually illustrating designs of example base stations (BSs) and user equipment (UEs) in which aspects of the present disclosure may be practiced.

[0014] Figure 3is a block diagram of an example radio frequency (RF) transceiver in which aspects of the present disclosure may be practiced.

[0015] Figure 4A is a block diagram of an example transmitter circuit with two transmit chains sharing a digital-to-analog converter (DAC), in accordance with certain aspects of the present disclosure.

[0016] Figure 4B is a block diagram of an example transmitter circuit with two transmit chains sharing a DAC and frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0017] Figure 4C is a block diagram of an example transmitter circuit with two transmit chains sharing a DAC and baseband processor, according to certain aspects of the present disclosure.

[0018] Figure 4D is a block diagram of an example transmitter circuit with two transmit chains sharing a DAC, frequency synthesizer, and baseband processor, in accordance with certain aspects of the present disclosure.

[0019] Figure 5A to Figure 5A-1 is a block diagram of an example transmitter circuit having five transmit chains, wherein a cellular vehicle-to-everything (C-V2X) transmit chain and a millimeter wave (mmW) transmit chain share a DAC and a frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0020] Figure 5B to Figure 5B-1 is a block diagram of an example transmitter circuit having five transmit chains, wherein a C-V2X transmit chain and a mmW transmit chain share a DAC and a frequency synthesizer, and wherein a sub-6 GHz transmit chain and another mmW transmit chain share another DAC and another frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0021] Figure 6 is a flow diagram of example operations for wireless communications in accordance with certain aspects of the present disclosure.

[0022] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one aspect may be beneficially utilized on other aspects without specific recitation. DETAILED DESCRIPTION

[0023] Certain aspects of the present disclosure relate to techniques and apparatus for reducing redundancy and saving space on a chip by sharing hardware between two or more transmit (TX) chains of a radio frequency (RF) transceiver or transmitter. Hardware components between multiple TX chains may include digital-to-analog converters (DACs), frequency synthesizers, and / or baseband processors.

[0024] As used herein, a "baseband processor" generally refers to logic, such as phase control logic and delay control logic, for processing digital signals received from a modulator-demodulator (modem) before being converted to analog by a DAC for up-conversion, filtering, amplification, and transmission. A baseband processor may also be referred to as a "digital baseband transmit processor."

[0025] The various aspects of the present disclosure are described more fully below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms, and should not be interpreted as being limited to any specific structure or function presented throughout the present disclosure. Instead, these aspects are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art. Based on the teachings of this article, it should be understood by those skilled in the art that the scope of the present disclosure is intended to cover any aspect of the disclosure disclosed herein, whether it is implemented independently or in combination with any other aspect of the present disclosure. For example, any number of aspects set forth herein can be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover such a device or method that is practiced using other structures, functionality, or structure and functionality in addition to or different from the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein can be embodied by one or more elements of the present invention.

[0026] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0027] As used herein, the term "connected with" in various tenses of the verb "connect" may mean that element A is directly connected to element B or that other elements may be connected between element A and element B (i.e., element A is indirectly connected to element B). In the context of electronic components, the term "connected with" may also be used herein to mean that wires, traces, or other conductive materials are used to electrically connect element A and element B (and any components electrically connected therebetween).

[0028] Example Wireless System

[0029] Figure 1An example wireless communication network 100 in which aspects of the present disclosure may be practiced is illustrated. For example, the wireless communication network 100 may be a New Radio (NR) system (e.g., a fifth generation (5G) NR network), an Evolved Universal Terrestrial Radio Access (E-UTRA) system (e.g., a fourth generation (4G) network), a Universal Mobile Telecommunications System (UMTS) (e.g., a second generation / third generation (2G / 3G) network), or a Code Division Multiple Access (CDMA) system (e.g., a 2G / 3G network), or may be configured for communication according to IEEE standards such as one or more of the 802.11 standards.

[0030] like Figure 1 As shown in , the wireless communication network 100 may include several base stations (BSs) 110a to 110z (each also individually referred to as BS 110 or collectively referred to as BS 110 herein) and other network entities. A BS may also be referred to as an access point (AP), an evolved Node B (eNodeB or eNB), a next generation Node B (gNodeB or gNB) or some other terminology.

[0031] BS 110 may provide communication coverage for a particular geographic area (sometimes referred to as a "cell"), which may be stationary or may move depending on the location of mobile BS 110. In some examples, BS 110 may be interconnected with each other and / or connected to one or more other BSs or network nodes (not shown) in wireless communication network 100 through various types of backhaul interfaces (e.g., direct physical connections, wireless connections, virtual networks, etc.) using any suitable transport network. Figure 1 In the example shown, BSs 110a, 110b, and 110c may be macro BSs for macro cells 102a, 102b, and 102c, respectively. BS 110x may be a pico BS for pico cell 102x. BSs 110y and 110z may be femto BSs for femto cells 102y and 102z, respectively. A BS may support one or more cells.

[0032] The BS 110 communicates with one or more user equipment (UE) 120a to 120y (each also individually or collectively referred to herein as UE 120) in the wireless communication network 100. A UE may be fixed or mobile, and may also be referred to as a user terminal (UT), a mobile station (MS), an access terminal, a station (STA), a client, a wireless device, a mobile device, or some other terminology. A user terminal may be a wireless device such as a cellular phone, a smart phone, a personal digital assistant (PDA), a handheld device, a wearable device, a wireless modem, a laptop computer, a tablet computer, a personal computer, etc.

[0033] BS 110 is considered a transmitting entity for downlink and a receiving entity for uplink. UE 120 is considered a transmitting entity for uplink and a receiving entity for downlink. As used herein, a "transmitting entity" is an independently operated device or apparatus capable of transmitting data via a frequency channel, and a "receiving entity" is an independently operated device or apparatus capable of receiving data via a frequency channel. In the following description, the subscript "dn" indicates a downlink, and the subscript "up" indicates an uplink. N may be selected. up UEs are used for simultaneous transmission on the uplink, N dn UEs are used for simultaneous transmission on the downlink. up May or may not be equal to N dn , and N up and N dn It may be a static value or may change for each scheduling interval.Beam steering or some other spatial processing technique may be used at the BS 110 and the UE 120.

[0034] UEs 120 (e.g., 120x, 120y, etc.) may be dispersed throughout the wireless communication network 100, and each UE 120 may be stationary or mobile. The wireless communication network 100 may also include a relay station (e.g., relay station 110r) (also referred to as a repeater, etc.) that receives transmissions of data and / or other information from an upstream station (e.g., BS 110a or UE 120r) and transmits transmissions of data and / or other information to a downstream station (e.g., UE 120 or BS 110), or relays transmissions between UEs 120 to facilitate communication between devices.

[0035] BS 110 may communicate on the downlink and uplink with one or more UEs 120 at any given moment. The downlink (i.e., forward link) is the communication link from BS 110 to UE 120, while the uplink (i.e., reverse link) is the communication link from UE 120 to BS 110. A UE 120 may also communicate peer-to-peer with another UE 120.

[0036] The wireless communication network 100 may use multiple transmit antennas and multiple receive antennas to transmit data on the downlink and uplink. The BS 110 may be equipped with several (N ap A group of (N) antennas can be used to implement transmit diversity for downlink transmission and / or receive diversity for uplink transmission. u Each UE 120 may receive downlink transmissions and send uplink transmissions. Each UE 120 may send user-specific data to and / or receive user-specific data from BS 110. Typically, each UE 120 may be equipped with one or more antennas.u The UEs 120 may have the same or different numbers of antennas.

[0037] The wireless communication network 100 may be a time division duplex (TDD) system or a frequency division duplex (FDD) system. For a TDD system, the downlink and uplink share the same frequency band. For an FDD system, the downlink and uplink use different frequency bands. The wireless communication network 100 may also utilize a single carrier or multiple carriers for transmission. Each UE 120 may be equipped with a single antenna (e.g., to reduce costs) or multiple antennas (e.g., where additional costs can be supported).

[0038] The network controller 130 (sometimes also referred to as a "system controller") may communicate with a set of BSs 110 and provide coordination and control (e.g., via backhaul) for these BSs 110. In some cases (e.g., in a 5G NR system), the network controller 130 may include a centralized unit (CU) and / or a distributed unit (DU). In some aspects, the network controller 130 may communicate with a core network 132 (e.g., a 5G core network (5GC)), which provides various network functions such as access and mobility management, session management, user plane functions, policy control functions, authentication server functions, unified data management, application functions, network open functions, network repository functions, network slice selection functions, etc.

[0039] In certain aspects of the present disclosure, BS 110 and / or UE 120 may include transmitter circuitry in which two or more transmit chains share a digital-to-analog converter (DAC), as described in more detail herein. The transmit chains may also share a frequency synthesizer and / or a baseband processor.

[0040] Figure 2 1 and 120a (eg, from a BS 110a) in which various aspects of the present disclosure may be implemented. Figure 1 Example components of a wireless communication network 100).

[0041] On the downlink, at BS 110a, the transmit processor 220 may receive data from the data source 212, control information from the controller / processor 240, and / or possibly other data (e.g., from the scheduler 244). Various types of data may be transmitted on different transport channels. For example, control information may be designated for a physical broadcast channel (PBCH), a physical control format indicator channel (PCFICH), a physical hybrid automatic repeat request (HARQ) indicator channel (PHICH), a physical downlink control channel (PDCCH), a group common PDCCH (GC PDCCH), etc. Data may be designated for a physical downlink shared channel (PDSCH), etc. A medium access control (MAC)-control element (MAC-CE) is a MAC layer communication structure that may be used for the exchange of control commands between wireless nodes. The MAC-CE may be carried in a shared channel such as a PDSCH, a physical uplink shared channel (PUSCH), or a physical sidelink shared channel (PSSCH).

[0042] The processor 220 may process (e.g., encode and symbol map) data and control information to obtain data symbols and control symbols, respectively. The transmit processor 220 may also generate reference symbols such as for a primary synchronization signal (PSS), a secondary synchronization signal (SSS), a PBCH demodulation reference signal (DMRS), and a channel state information reference signal (CSI-RS).

[0043] The transmit (TX) multiple-input multiple-output (MIMO) processor 230 may perform spatial processing (e.g., pre-decoding) on ​​data symbols, control symbols, and / or reference symbols where applicable, and may provide an output symbol stream to a modulator (MOD) in a transceiver 232a-232t. Each modulator 232a-232t in the transceiver may process a respective output symbol stream (e.g., for orthogonal frequency division multiplexing (OFDM) or the like) to obtain an output sample stream. Each transceiver 232a-232t may further process (e.g., convert to analog, amplify, filter, and up-convert) the output sample stream to obtain a downlink signal. The downlink signals from the transceivers 232a-232t may be transmitted via antennas 234a-234t, respectively.

[0044] At UE 120a, antennas 252a-252r may receive downlink signals from BS110a and may provide received signals to transceivers 254a-254r, respectively. Transceivers 254a-254r may condition (e.g., filter, amplify, downconvert, and digitize) the corresponding received signals to obtain input samples. Each demodulator (DEMOD) in transceivers 232a-232t may further process the input samples (e.g., for OFDM, etc.) to obtain received symbols. MIMO detector 256 may obtain received symbols from all demodulators in transceivers 254a-254r, perform MIMO detection on the received symbols (where applicable), and provide detected symbols. Receive processor 258 may process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide decoded data for UE 120a to data sink 260, and provide decoded control information to controller / processor 280.

[0045] On the uplink, at the UE 120a, a transmit processor 264 may receive and process data from a data source 262 (e.g., for a physical uplink shared channel (PUSCH)) and control information from a controller / processor 280 (e.g., for a physical uplink control channel (PUCCH)). The transmit processor 264 may also generate reference symbols for reference signals (e.g., for a sounding reference signal (SRS)). The symbols from the transmit processor 264 may be pre-decoded by a TX MIMO processor 266 (if applicable), further processed by a modulator (MOD) in the transceivers 254a to 254r (e.g., for single carrier frequency division multiplexing (SC-FDM), etc.), and transmitted to the BS 110a. At BS 110a, the uplink signal from UE 120a may be received by antenna 234, processed by demodulators in transceivers 232a-232t, detected by MIMO detector 236 (if applicable), and further processed by receive processor 238 to obtain decoded data and control information transmitted by UE 120a. Receive processor 238 may provide the decoded data to a data sink 239 and the decoded control information to controller / processor 240.

[0046] Memories 242 and 282 may store data and program codes for BS 110a and UE 120a, respectively. Memories 242 and 282 may also interface with controllers / processors 240 and 280, respectively. Scheduler 244 may schedule UEs for data transmission on the downlink and / or uplink.

[0047] The antennas 252, processors 258, 264, 266 and / or controller / processor 280 of the UE 120a and / or the antennas 234, processors 220, 230, 238 and / or controller / processor 240 of the BS 110a may be used to perform the various techniques and methods described herein.

[0048] In certain aspects of the present disclosure, transceiver 232 and / or transceiver 254 may include a transmitter circuit in which two or more transmit chains share a digital-to-analog converter (DAC), as described in more detail herein. In certain aspects, two or more transmit chains may also share a frequency synthesizer and / or a baseband processor.

[0049] Example RF Transceiver

[0050] Figure 3 is a block diagram of an example radio frequency (RF) transceiver circuit 300 according to certain aspects of the present disclosure. The RF transceiver circuit 300 includes at least one transmit (TX) path 302 (also referred to as a “transmit chain”) for transmitting signals via one or more antennas 306 and at least one receive (RX) path 304 (also referred to as a “receive chain”) for receiving signals via antenna 306. When TX path 302 and RX path 304 share antenna 306, these paths can be connected to the antenna via interface 308, which can include any of a variety of suitable RF devices, such as switches, duplexers, diplexers, multiplexers, etc.

[0051] Receiving in-phase (I) and / or quadrature (Q) baseband analog signals from a digital-to-analog converter (DAC) 310, the TX path 302 may include a baseband filter (BBF) 312, a mixer 314, a driver amplifier (DA) 316, and a power amplifier (PA) 318. The BBF 312, the mixer 314, the DA 316, and the PA 318 may be included in a radio frequency integrated circuit (RFIC). For certain aspects, the PA 318 may be external to the RFIC.

[0052] The BBF 312 filters the baseband signal received from the DAC 310, and the mixer 314 mixes the filtered baseband signal with a transmit local oscillator (LO) signal to convert the baseband signal of interest to a different frequency (e.g., upconvert from baseband to radio frequency). This frequency conversion process produces sum and difference frequencies between the LO frequency and the frequency of the baseband signal of interest. The sum and difference frequencies are referred to as "beat frequencies." The beat frequencies are typically in the RF range, so that the signal output by the mixer 314 is typically an RF signal, which may be amplified by the DA 316 and / or by the PA 318 before being transmitted by the antenna 306. Although one mixer 314 is illustrated, several mixers may be used to upconvert the filtered baseband signal to one or more intermediate frequencies and thereafter upconvert the intermediate frequency (IF) signal to a frequency for transmission.

[0053] The RX path 304 may include a low noise amplifier (LNA) 324, a mixer 326, and a baseband filter (BBF) 328. The LNA 324, the mixer 326, and the BBF 328 may be included in one or more RFICs, which may be the same RFIC as the RFIC that includes the TX path components, or may be a different RFIC. The RF signal received via the antenna 306 may be amplified by the LNA 324, and the mixer 326 mixes the amplified RF signal with a receive local oscillator (LO) signal to convert the RF signal of interest to a different baseband frequency (e.g., down-convert). The baseband signal output by the mixer 326 may be filtered by the BBF 328 before being converted to a digital I and / or Q signal by an analog-to-digital converter (ADC) 330 for digital signal processing.

[0054] Some transceivers may employ a frequency synthesizer with a variable frequency oscillator (e.g., a voltage controlled oscillator (VCO) or a digitally controlled oscillator (DCO)) to generate a stable, tunable LO with a specific tuning range. Thus, a transmit LO may be generated by a TX frequency synthesizer 320. The transmit LO may be buffered or amplified by an amplifier 322 before mixing with a baseband signal in a mixer 314. Similarly, a receive LO may be generated by an RX frequency synthesizer 332. The receive LO may be buffered or amplified by an amplifier 334 before mixing with an RF signal in a mixer 326. For certain aspects, a single frequency synthesizer may be used for both the TX path 302 and the RX path 304. In certain aspects, the TX frequency synthesizer 320 and / or the RX frequency synthesizer 332 may include a frequency multiplier (such as a doubler) driven by an oscillator (e.g., a VCO) in the frequency synthesizer.

[0055] Controller 336 (eg, Figure 2Controller / processor 280 in the RF transceiver circuit 300A may direct the operation of the RF transceiver circuit 300A, such as transmitting signals via TX path 302 and / or receiving signals via RX path 304. Controller 336 may be a processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof. Memory 338 (e.g., Figure 2 The memory 282 in the controller 336 may store data and / or program codes for operating the RF transceiver circuit 300. The controller 336 and / or the memory 338 may include control logic (eg, complementary metal oxide semiconductor (CMOS) logic).

[0056] Example Transmitter Hardware Sharing

[0057] In transmitter hardware (e.g., a transceiver as described above), each transmit chain (e.g., TX path 302) may include a set of dedicated circuit elements, such as a baseband processor (labeled "TXFE" for a transmitter front-end processor), a DAC 310, a BBF 312, a mixer 314, a TX frequency synthesizer 320, a DA 316, and a PA 318. Each TX path may include a complete set of dedicated elements, regardless of the technology used. For example, a single device supporting cellular vehicle-to-everything (C-V2X), 5G sub-6 GHz (sub6 or frequency range 1 (FR1)), and 5G millimeter wave (5G mmW or frequency range 2 (FR2)) communications may include TX chains, each of which includes a separate set of dedicated circuit elements, such as those listed above.

[0058] Even though a transceiver may include multiple TX chains, for certain aspects, a limited number of TX chains (e.g., four) may be used simultaneously. In addition, certain RATs may be prevented from transmitting simultaneously from a single device. For example, C-V2X and mmW transmit chains may not be enabled concurrently. Therefore, providing a complete set of hardware components (such as a baseband processor, DAC, and / or TX synthesizer) for each TX chain may be considered redundant, wasteful of chip area, and not cost-effective. Certain aspects of the present invention provide TX paths that may share at least one circuit element to reduce redundancy and save chip area.

[0059] Figure 4A is a block diagram of an example transmitter circuit 400A with two transmit (TX) chains sharing a digital-to-analog converter (DAC), in accordance with certain aspects of the present disclosure.

[0060] Transmitter circuit 400A may include TX chain 402a and TX chain 402b. In some aspects, TX chain 402a may be configured for sub-6 GHz communications and TX chain 402b may be configured for mmW communications. In some aspects, TX chain 402a may be a sub-6 GHz TX chain designated for C-V2X communications. TX chains 402a, 402b may each be similar to Figure 3 Although the TX chain 402a and the TX chain 402b are configured to support two different RATs, the TX chain 402a and the TX chain 402b share a common DAC 410.

[0061] like Figure 4A 4, TX chain 402a may include a baseband processor (TXFE 406a), a BBF 412a, a mixer 414a, a DA 416a, and a PA 418a. Mixer 414a may receive a local oscillator (LO) signal from a TX frequency synthesizer 420a. BBF 412a may be similar to BBF 312, mixer 414a may be similar to mixer 314, DA 416a may be similar to DA 316, PA 418a may be similar to PA 318, and TX frequency synthesizer 420a may be similar to TX frequency synthesizer 320.

[0062] The output of TXFE 406a may be coupled to the input of common DAC 410. A first output of DAC 410 may be coupled to BBF 412a. An output of BBF 412a may be coupled to a first input of mixer 414a. An output of TX frequency synthesizer 420a may be coupled to a second input of mixer 414a. For certain aspects, frequency divider 422a may be coupled between TX frequency synthesizer 420a and mixer 414a.

[0063] The output of mixer 414a may be coupled to the input of DA 416a. The output of DA 416a may be coupled to the input of PA 418a, and the output of PA 418a may be coupled to antenna 424a (eg, via an interface such as interface 308). Antenna 424a may be similar to antenna 306.

[0064] TX chain 402b may include each of the electrical components arranged in the same manner as TX chain 402a, and these components are similarly labeled. One difference between TX chain 402b and TX chain 402a is that, for some aspects, the second output of common DAC 410 may be coupled to BBF 412b. For other aspects, the output of DAC 410 may be selectively coupled to BBF 412a or BBF 412b (e.g., by a single-pole double-throw (SPDT) switch). Another difference between TX chain 402b and TX chain 402a is that the output of DA 416b of TX chain 402b is coupled to phased array 419. Phased array 419 may include amplifier 430 having an output coupled to an input of DA 416b and coupled to an input of mixer 426. The output of mixer 426 may be coupled to each input of phase shifter array 428. The output of each phase shifter in the phase shifter array 428 may be coupled to the input of the PA array 418b. The output of each PA in the PA array 418b may be coupled to the antenna array 424b.

[0065] As explained above, because the sub6 path supports C-V2X, and C-V2X and mmW may not be enabled concurrently, the TX chain 402a and the TX chain 402b share a common DAC 410. Because only one of the two paths may be enabled at a time, the outputs of the TXFE 406a and the TXFE 406b are both coupled to the input of the common DAC 410. As described above, the first output of the common DAC 410 may be coupled to the input of the BBF 412a, and the second output of the common DAC 410 may be coupled to the input of the BBF 412b. Therefore, the two TX chains share a common DAC 410 instead of having two separate DACs, which saves chip space.

[0066] Despite Figure 4A Two TX chains are illustrated in FIG. 4 , but the transmitter circuit 400A is not limited to only two TX chains. For example, if three and / or more TX chains sharing the same DAC cannot be enabled concurrently, the TX chains may share the same DAC.

[0067] Figure 4B is a block diagram of an example transmitter circuit 400B with two transmit chains sharing a DAC and frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0068] Transmitter circuit 400B may include TX chain 402c and TX chain 402d. Transmitter circuit 400B may be similar to transmitter circuit 400A, and TX chains 402c and 402d may be similar to TX chains 402a and 402b, respectively. However, instead of each TX chain having its own TX frequency synthesizer (e.g., synthesizers 420a, 420b), TX chain 402c and TX chain 402d share TX frequency synthesizer 420c. An output of common TX frequency synthesizer 420c may be coupled to a second input of mixer 414a and a second input of mixer 414b. For certain aspects, divider 422a may be coupled between the output of common TX frequency synthesizer 420c and the second input of mixer 414a. Regardless of whether the frequency divider 422a is included, certain aspects of the present disclosure may include a frequency divider 422b coupled between an output of the common TX frequency synthesizer 420c and a second input of the mixer 414b.

[0069] In addition, despite Figure 4B Two TX chains sharing a common DAC 410 and TX frequency synthesizer 420c are illustrated, but the DAC 410 and / or TX frequency synthesizer 420c may be shared between more than two TX paths if these TX chains sharing the same DAC cannot be enabled concurrently.

[0070] Figure 4C is a block diagram of an example transmitter circuit 400C with two transmit chains sharing a DAC and baseband processor, in accordance with certain aspects of the present disclosure.

[0071] Transmitter circuit 400C may include TX chain 402e and TX chain 402f. Transmitter circuit 400C may be similar to transmitter circuit 400A, and TX chains 402e and 402f may be similar to TX chains 402a and 402b, respectively. However, instead of each TX chain having its own baseband processor (e.g., TXFE 406a, 406b), TX chain 402e and TX chain 402f share TXFE 406c. The output of common TXFE 406c may be coupled to the input of common DAC 410. Advantageously, because TX chain 402e and TX chain 402f may not be enabled at the same time, the two TX chains may share common DAC 410 and common TXFE 406c, thereby reducing redundancy and saving chip space.

[0072] In addition, despite Figure 4C Two TX chains sharing a common TXFE 406c and DAC 410 are illustrated, but the TXFE 406c and DAC 410 may be shared between more than two TX paths if these TX chains sharing the same baseband processor and DAC cannot be enabled concurrently.

[0073] Figure 4D is a block diagram of an example transmitter circuit 400D with two transmit chains sharing a DAC, frequency synthesizer, and baseband processor, in accordance with certain aspects of the present disclosure.

[0074] Transmitter circuit 400D may include TX chain 402g and TX chain 402h. Transmitter circuit 400D may be similar to transmitter circuit 400B, and TX chains 402g and 402h may be similar to TX chains 402c and 402d, respectively. However, instead of each TX chain having its own baseband processor (e.g., TXFE 406a, 406b), TX chain 402g and TX chain 402h share TXFE 406c, wherein the output of common TXFE 406c may be coupled to the input of common DAC 410. Advantageously, because TX chain 402g and TX chain 402h cannot be enabled at the same time, the two TX chains may share common DAC 410, common TX frequency synthesizer 420c, and common TXFE 406c, thereby reducing redundancy and saving chip space.

[0075] In addition, despite Figure 4D Two TX chains sharing a common TXFE 406c, DAC 410, and TX frequency synthesizer 420c are illustrated, but the TXFE 406c, DAC 410, and TX frequency synthesizer 420c may be shared between more than two TX paths if these TX chains sharing the same baseband processor and DAC cannot be enabled concurrently.

[0076] Figure 5A to Figure 5A-1 is a block diagram of an example transmitter circuit 500A having five transmit chains, wherein a cellular vehicle-to-everything (C-V2X) transmit chain and a millimeter wave (mmW) transmit chain share a DAC and a frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0077] Transmitter circuit 500A may be similar to transmitter circuit 400B, but with the addition of TX chain 502a, TX chain 502b, and TX chain 502c. In certain aspects, TX chain 502a and TX chain 502b may be sub-6 GHz TX chains that do not share circuit components. TX chain 502c may be a mmW TX path that does not share any circuit components with another TX path.

[0078] In this example, only four of the five TX paths can be enabled simultaneously, and the C-V2X TX path and the mmW TX path cannot be enabled simultaneously. Therefore, providing separate dedicated components in each of the five paths is redundant and wastes chip space. Figure 5A to Figure 5A-1 As shown in , the sub-6 GHz TX path (e.g., the path designated for C-V2X) and the mmW TX path may share circuit components.

[0079] TX chain 502a may include a baseband processor (TXFE 506a), a DAC 510a, a BBF 512a, a mixer 514a, a DA 516a, and a PA 518a. Mixer 514a may receive a local oscillator (LO) signal from a TX frequency synthesizer 520a. DAC 510a may be similar to DAC 310, BBF 512a may be similar to BBF 312, mixer 514a may be similar to mixer 314, DA 416a may be similar to DA 316, PA 418a may be similar to PA 318, and TX frequency synthesizer 520a may be similar to TX frequency synthesizer 320.

[0080] The output of TXFE 506a may be coupled to the input of DAC 510a. The input of BBF 512a may be coupled to the output of DAC 510a, and the output of BBF 512a may be coupled to a first input of mixer 514a. The output of TX frequency synthesizer 520a may be coupled to a second input of mixer 514a. For certain aspects, frequency divider 522a may be coupled between TX frequency synthesizer 520a and mixer 514a.

[0081] The output of mixer 514a may be coupled to the input of DA 516a. The output of DA 516a may be coupled to PA 518a, and the output of PA 518a may be coupled to antenna 524a (eg, via an interface such as interface 308). Antenna 524a may be similar to antenna 306.

[0082] TX chain 502b may include each of the electrical components arranged in the same manner as TX chain 502a, and these components are similarly labeled.

[0083] As described above, to save chip space, the sub-6 GHz (or C-V2X) TX chain and the mmW TX chain may share one or more circuit elements because the two TX chains are not enabled at the same time. For example, the transmitter circuit 500A may include the TX chain 402c and the TX chain 402d that share a common DAC 410 and a common TX frequency synthesizer 420c. For certain aspects, the TX chain 402c and the TX chain 402d may also share a common TXFE 406c in the transmitter circuit 500A.

[0084] TX chain 502c may be similar to TX chain 402d, with similar components being labeled similarly. Thus, TX chain 502c may include TXFE 506c having an output coupled to DAC 510c. The output of DAC 510c may be coupled to an input of BBF 512c. The output of BBF 512c may be coupled to a first input of mixer 514c, and the output of TX frequency synthesizer 420c (or more specifically, for certain aspects, the output of divider 422b) may be coupled to a second input of mixer 514c. Thus, TX frequency synthesizer 420c is shared between the three TX chains 402c, 402d, and 502c in transmitter circuit 500A. The output of mixer 514c may be coupled to an input of DA 516c. The output of DA 516c may be coupled to phased array 519. Phased array 519 may be similar to phased array 419 , with components being similarly labeled.

[0085] Figure 5B to Figure 5B-1 is an illustration of a block diagram of an example transmitter circuit 500B having five transmit chains, wherein a C-V2X transmit chain and a mmW transmit chain share a DAC and a frequency synthesizer, and wherein a sub-6 GHz transmit chain and another mmW transmit chain share another DAC and another frequency synthesizer, in accordance with certain aspects of the present disclosure.

[0086] Transmitter circuit 500B may be similar to transmitter circuit 500A, except that TX chains 502b and 502c share a common DAC 510c and a common TX frequency synthesizer 520c, similar to TX chains 402c and 402d.

[0087] Example Operations for Wireless Communication

[0088] Figure 6 600 is a flow diagram of example operations 600 for wireless communications in accordance with certain aspects of the present disclosure. Operations 600 may be performed, for example, by a radio frequency (RF) transceiver (e.g., FIG. 4A to FIG. 4D The transmitter circuits 400A to 400D of Figure 5A to Figure 5A-1 The transmitter circuits 500A to 500B and Figure 5B to Figure 5B-1 ) to perform as described above.

[0089] Operations 600 may begin at block 602, where a digital-to-analog converter (DAC) (e.g., DAC 410, 510c) converts a first digital signal into a first analog signal. At block 604, a first transmit chain (e.g., TX chain 402a, 402c, 402e) may process the first analog signal to generate a first radio frequency (RF) signal for transmission. At 606, a DAC (the same DAC used at block 602) may convert a second digital signal into a second analog signal. At block 608, a second transmit chain (e.g., TX chain 402b, 402d, 402f) may process the second analog signal to generate a second RF signal for transmission. In other words, the first transmit chain and the second transmit chain share a DAC.

[0090] According to certain aspects, the first transmit chain and the second transmit chain share a DAC and a frequency synthesizer (e.g., TX frequency synthesizer 420c). The first transmit chain may include a first baseband filter (e.g., baseband filter 412a) and a first mixer (e.g., mixer 414a). In this case, processing the first analog signal at block 604 may include: (1) the first baseband filter filtering the first analog signal to generate a first filtered analog signal, and (2) the first mixer mixing the first filtered analog signal with a first oscillating signal (e.g., LO signal) derived from the frequency synthesizer to generate a first primary RF signal. The first RF signal may be based on the first primary RF signal (e.g., a filtered and amplified version thereof). For certain aspects, the second transmit chain may include a second baseband filter (e.g., baseband filter 412b) and a second mixer (e.g., mixer 414b). In this case, processing the second analog signal at block 608 may include: (1) filtering the second analog signal by a second baseband filter to generate a second filtered analog signal, and (2) mixing the second filtered analog signal with a second oscillating signal derived from a frequency synthesizer by a second mixer to generate a second primary RF signal. The second RF signal may be based on the second primary RF signal.

[0091] According to certain aspects, the first transmit chain and the second transmit chain share a DAC, a frequency synthesizer, and a baseband processor (eg, TXFE 406c). In this case, operation 600 may also include outputting the first digital signal from the baseband processor and outputting the second digital signal from the baseband processor.

[0092] According to certain aspects, the first transmit chain and the second transmit chain share a DAC and a baseband processor (eg, TXFE 406c). In this case, operation 600 may also include outputting the first digital signal from the baseband processor and outputting the second digital signal from the baseband processor.

[0093] According to some aspects, the operations 600 also include sending the first RF signal at a first time and sending the second RF signal at a second time. The second time is different from the first time. For some aspects, the first RF signal and the second RF signal are not (or cannot) be sent concurrently.

[0094] According to certain aspects, the first transmit chain and the second transmit chain support two different radio access technologies (RATs). For example, the first transmit chain may include a cellular vehicle-to-everything (C-V2X) transmit chain (e.g., TX chain 402c), and the second transmit chain may include a millimeter wave (mmW) transmit chain (e.g., TX chain 402d). As another example, the first transmit chain may include a sub-6 GHz transmit chain (e.g., TX chain 502b), and the second transmit chain may include a millimeter wave (mmW) transmit chain (e.g., TX chain 502c).

[0095] According to certain aspects, the operation 600 also includes another DAC (e.g., DAC 510c) converting the third digital signal into a third analog signal, and a third transmission chain (e.g., TX chain 502b) processing the third analog signal to generate a third RF signal for transmission. In this case, the operation 600 may also include another DAC converting the fourth digital signal into a fourth analog signal, and a fourth transmission chain (e.g., TX chain 502c) processing the fourth analog signal to generate a fourth RF signal for transmission. In other words, the third transmission chain and the fourth transmission chain share another DAC. For certain aspects, the third transmission chain and the fourth transmission chain share another DAC and a frequency synthesizer (e.g., TX frequency synthesizer 520c). As an example, the first transmission chain may include a cellular vehicle-to-everything (C-V2X) transmission chain (e.g., TX chain 402c); the second transmission chain may include a first millimeter wave (mmW) transmission chain (e.g., TX chain 402d); the third transmission chain may include a sub-6 GHz transmission chain (e.g., TX chain 502b); and the fourth transmission chain may include a second mmW transmission chain (e.g., TX chain 502c).

[0096] According to certain aspects, operation 600 also includes: (1) the DAC converting the third digital signal into a third analog signal, and (2) the third transmission chain (e.g., TX chain 502b) processing the third analog signal to generate a third RF signal for transmission. In this case, the first transmission chain, the second transmission chain, and the third transmission chain share the DAC.

[0097] Example aspects

[0098] In addition to the above-mentioned aspects, specific combinations of the aspects are also within the scope of the present disclosure, and the details of some of the specific combinations are as follows:

[0099] Aspect 1: A transmitter circuit for wireless communication, the transmitter circuit comprising: a first transmission chain; and a second transmission chain, wherein the first transmission chain and the second transmission chain share a digital-to-analog converter (DAC).

[0100] Aspect 2: The transmitter circuit according to aspect 1, wherein the first transmission chain and the second transmission chain share the DAC and the frequency synthesizer.

[0101] Aspect 3: A transmitter circuit according to Aspect 2, wherein: the first transmission chain includes a first baseband filter and a first mixer, the first mixer having a first input coupled to the output of the first baseband filter; the second transmission chain includes a second baseband filter and a second mixer, the second mixer having a first input coupled to the output of the second baseband filter; the first output of the DAC is coupled to the input of the first baseband filter; the second output of the DAC is coupled to the input of the second baseband filter; and the output of the frequency synthesizer is coupled to the second input of the first mixer and to the second input of the second mixer.

[0102] Aspect 4: A transmitter circuit according to any one of Aspects 1 to 3, wherein: the first transmission chain also includes a first baseband processor, the first baseband processor having an output coupled to the input of the DAC; and the second transmission chain also includes a second baseband processor, the second baseband processor having an output coupled to the input of the DAC.

[0103] Aspect 5: The transmitter circuit according to aspect 2 or 3, wherein the first transmit chain and the second transmit chain share the DAC, the frequency synthesizer, and a baseband processor having an output terminal coupled to an input terminal of the DAC.

[0104] Aspect 6: The transmitter circuit of aspect 1, wherein the first transmit chain and the second transmit chain share the DAC and a baseband processor having an output coupled to an input of the DAC.

[0105] Aspect 7: A transmitter circuit according to any one of Aspects 1 to 6, wherein a first signal is configured to be output from the first transmission chain at a first time, wherein a second signal is configured to be output from the second transmission chain at a second time, and wherein the second time is different from the first time.

[0106] Aspect 8: A transmitter circuit according to any one of Aspects 1 to 7, wherein the first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain, and wherein the second transmission chain includes a FR2 or millimeter wave transmission chain.

[0107] Aspect 9: The transmitter circuit of any one of aspects 1 to 7, wherein the first transmit chain comprises a FR1 or sub-6 GHz transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

[0108] Aspect 10: The transmitter circuit according to any one of Aspects 1 to 9, further comprising: a third transmission chain; and a fourth transmission chain, wherein the third transmission chain and the fourth transmission chain are configured to share at least one of another DAC or a frequency synthesizer.

[0109] Aspect 11: A transmitter circuit according to Aspect 10, wherein: the first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain; the second transmission chain includes a first FR2 or millimeter wave transmission chain; the third transmission chain includes a FR1 or sub-6GHz transmission chain; and the fourth transmission chain includes a second FR2 or millimeter wave transmission chain.

[0110] Aspect 12: The transmitter circuit according to any one of aspects 1 to 9, further comprising one or more additional transmission chains, wherein the total number of transmission chains in the transmitter circuit is greater than the number of transmission chains that can concurrently transmit signals.

[0111] Aspect 13: The transmitter circuit according to any one of aspects 1 to 9, further comprising at least one additional transmission chain, wherein the first transmission chain, the second transmission chain and the at least one additional transmission chain share the DAC.

[0112] Aspect 14: The transmitter circuit according to any one of aspects 1 to 13, wherein the first transmit chain and the second transmit chain support two different radio access technologies (RATs).

[0113] Aspect 15: A method for wireless communication, the method comprising: using a digital-to-analog converter (DAC) to convert a first digital signal into a first analog signal; using a first transmission chain to process the first analog signal to generate a first radio frequency (RF) signal for transmission; using the DAC to convert a second digital signal into a second analog signal; and using a second transmission chain to process the second analog signal to generate a second RF signal for transmission, wherein the first transmission chain and the second transmission chain share the DAC.

[0114] Aspect 16: The method according to aspect 15, wherein the first transmission chain and the second transmission chain share the DAC and the frequency synthesizer.

[0115] Aspect 17: A method according to Aspect 16, wherein: the first transmission chain includes a first baseband filter and a first mixer; processing the first analog signal includes: filtering the first analog signal using the first baseband filter to generate a first filtered analog signal; and mixing the first filtered analog signal with a first oscillating signal derived from the frequency synthesizer using the first mixer to generate a first primary RF signal, and the first RF signal is based on the first primary RF signal; the second transmission chain includes a second baseband filter and a second mixer; and processing the second analog signal includes: filtering the second analog signal using the second baseband filter to generate a second filtered analog signal; and mixing the second filtered analog signal with a second oscillating signal derived from the frequency synthesizer using the second mixer to generate a second primary RF signal, and the second RF signal is based on the second primary RF signal.

[0116] Aspect 18: A method according to Aspect 16 or 17, wherein: the first transmission chain and the second transmission chain share the DAC, the frequency synthesizer and the baseband processor; and the method further includes: outputting the first digital signal from the baseband processor; and outputting the second digital signal from the baseband processor.

[0117] Aspect 19: A method according to Aspect 15, wherein: the first transmit chain and the second transmit chain share the DAC and the baseband processor; and the method further includes: outputting the first digital signal from the baseband processor; and outputting the second digital signal from the baseband processor.

[0118] Aspect 20: The method according to any one of aspects 15 to 19, the method further comprising: sending the first RF signal at a first time; and sending the second RF signal at a second time, wherein the second time is different from the first time.

[0119] Aspect 21: A method according to any one of Aspects 15 to 20, wherein the first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain, and wherein the second transmission chain includes a FR2 or millimeter wave transmission chain.

[0120] Aspect 22: The method according to any one of aspects 15 to 20, wherein the first transmit chain comprises a FR1 or sub-6 GHz transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

[0121] Aspect 23: According to the method described in any one of Aspects 15 to 22, the method further includes: using another DAC to convert a third digital signal into a third analog signal; using a third transmission chain to process the third analog signal to generate a third RF signal for transmission; using the another DAC to convert a fourth digital signal into a fourth analog signal; and using a fourth transmission chain to process the fourth analog signal to generate a fourth RF signal for transmission, wherein the third transmission chain and the fourth transmission chain share the another DAC.

[0122] Aspect 24: The method of aspect 23, wherein the third transmission chain and the fourth transmission chain share the other DAC and the frequency synthesizer.

[0123] Aspect 25: A method according to Aspect 23 or 24, wherein: the first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain; the second transmission chain includes a first FR2 or millimeter wave transmission chain; the third transmission chain includes a FR1 or sub-6 GHz transmission chain; and the fourth transmission chain includes a second FR2 or millimeter wave transmission chain.

[0124] Aspect 26: According to the method described in any one of Aspects 15 to 22, the method further includes: using the DAC to convert a third digital signal into a third analog signal; and using a third transmission chain to process the third analog signal to generate a third RF signal for transmission, wherein the first transmission chain, the second transmission chain and the third transmission chain share the DAC.

[0125] Aspect 27: The method according to any one of aspects 15 to 26, wherein the first transmit chain and the second transmit chain support two different radio access technologies (RATs).

[0126] Aspect 28: A device for wireless communication, the device comprising: a component for converting a first digital signal into a first analog signal and converting a second digital signal into a second analog signal; a first component for processing the first analog signal to generate a first radio frequency (RF) signal for sending from the device; and a second component for processing the second analog signal to generate a second RF signal for sending from the device, wherein the first component for processing and the second component for processing share the component for converting.

[0127] Aspect 29: The apparatus according to Aspect 28, wherein the first means for processing and the second means for processing share the means for converting and the means for generating an oscillating signal.

[0128] Aspect 30: The apparatus according to aspect 28 or 29, wherein the first RF signal is configured to be transmitted at a first time, wherein the second RF signal is configured to be transmitted at a second time, and wherein the second time is different from the first time.

[0129] Additional considerations

[0130] The above description provides examples, but does not limit the scope, applicability or examples set forth in the claims. Without departing from the scope of the present disclosure, the functions and arrangements of the elements discussed may be changed. Various procedures or components may be omitted, replaced or added to each example as appropriate. For example, the method described may be performed in a different order from that described, and various steps may be added, omitted or combined. In addition, the features described for some examples may be combined in some other examples. For example, any number of aspects set forth herein may be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover such devices or methods practiced using other structures, functional functions or structures and functionality in addition to or different from the various aspects of the present disclosure given herein. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of the present invention. The word "exemplary" is used herein to mean "used as an example, instance, or illustration". Any aspect described as "exemplary" herein is not necessarily interpreted as being preferred or having advantages over other aspects.

[0131] The various operations of the above methods may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and / or software components and / or modules, including but not limited to circuits, application specific integrated circuits (ASICs), or processors. In general, where there are operations illustrated in the figures, these operations may have corresponding corresponding means plus functional components. For example, the means for converting may include a digital-to-analog converter (DAC), such as FIG. 4A to FIG. 4D , Figure 5A to Figure 5A-1 ,or Figure 5B to Figure 5B-1 The first means for processing and / or the second means for processing may include a portion of a transmission chain, such as a portion of the transmission chain 402a (or 402b) after the DAC 410, which may include FIG. 4A to FIG. 4D , Figure 5A to Figure 5A-1 ,or Figure 5B The baseband filter 412a (or 412b), the mixer 414a (or 414b) and the amplifier (e.g., DA 416a and / or PA 418a (or DA 416b and / or PA 418b)) of FIG. 5B-1 may include a frequency synthesizer, such as Figure 4D TX frequency synthesizer 420c.

[0132] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items (including single members). As an example, "at least one of a, b, or c" is intended to cover: a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c).

[0133] The methods disclosed herein include one or more steps or actions for implementing the described methods. The steps and / or actions of the methods may be interchangeable with each other without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions may be modified without departing from the scope of the claims.

[0134] It is to be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. A transmitter circuit for wireless communication, the transmitter circuit comprising: First sending chain; and A second transmit chain, wherein the first transmit chain and the second transmit chain share a digital-to-analog converter (DAC). 2 . The transmitter circuit of claim 1 , wherein the first transmit chain and the second transmit chain share the DAC and the frequency synthesizer.

3. The transmitter circuit of claim 2, wherein: The first transmit chain includes a first baseband filter and a first mixer having a first input coupled to an output of the first baseband filter; The second transmit chain includes a second baseband filter and a second mixer, the second mixer having a first input coupled to an output of the second baseband filter; A first output terminal of the DAC is coupled to an input terminal of the first baseband filter; A second output terminal of the DAC is coupled to an input terminal of the second baseband filter; and An output of the frequency synthesizer is coupled to a second input of the first mixer and to a second input of the second mixer.

4. The transmitter circuit of claim 3, wherein: The first transmit chain also includes a first baseband processor having an output coupled to an input of the DAC; and The second transmit chain also includes a second baseband processor having an output coupled to the input of the DAC.

5. The transmitter circuit of claim 2, wherein the first transmit chain and the second transmit chain share the DAC, the frequency synthesizer, and a baseband processor having an output coupled to an input of the DAC. 6 . The transmitter circuit of claim 1 , wherein the first transmit chain and the second transmit chain share the DAC and a baseband processor having an output coupled to an input of the DAC.

7. The transmitter circuit of claim 1, wherein a first signal is configured to be output from the first transmission chain at a first time, wherein a second signal is configured to be output from the second transmission chain at a second time, and wherein the second time is different from the first time.

8. The transmitter circuit of claim 1, wherein the first transmit chain comprises a cellular vehicle-to-everything (C-V2X) transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

9. The transmitter circuit of claim 1, wherein the first transmit chain comprises a FR1 or sub-6 GHz transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

10. The transmitter circuit of claim 1 , further comprising: The third sending chain; and A fourth transmission chain, wherein the third transmission chain and the fourth transmission chain are configured to share at least one of another DAC or a frequency synthesizer.

11. The transmitter circuit of claim 10, wherein: The first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain; The second transmit chain includes a first FR2 or mmWave transmit chain; The third transmit chain comprises a FR1 or sub-6 GHz transmit chain; and The fourth transmit chain includes a second FR2 or millimeter wave transmit chain.

12. The transmitter circuit of claim 1, further comprising one or more additional transmit chains, wherein a total number of transmit chains in the transmitter circuit is greater than a number of transmit chains that can concurrently transmit signals. 13 . The transmitter circuit of claim 1 , further comprising at least one additional transmit chain, wherein the first transmit chain, the second transmit chain, and the at least one additional transmit chain share the DAC.

14. The transmitter circuit of claim 1, wherein the first transmit chain and the second transmit chain support two different radio access technologies (RATs).

15. A method of wireless communication, the method comprising: converting the first digital signal into a first analog signal using a digital-to-analog converter (DAC); processing the first analog signal using a first transmit chain to generate a first radio frequency (RF) signal for transmission; Converting the second digital signal into a second analog signal using the DAC; as well as The second analog signal is processed using a second transmit chain to generate a second RF signal for transmission, wherein the first transmit chain and the second transmit chain share the DAC.

16. The method of claim 15, wherein the first transmit chain and the second transmit chain share the DAC and frequency synthesizer.

17. The method of claim 16, wherein: The first transmit chain includes a first baseband filter and a first mixer; Processing the first analog signal includes: filtering the first analog signal using the first baseband filter to generate a first filtered analog signal; and mixing the first filtered analog signal with a first oscillating signal derived from the frequency synthesizer using the first mixer to generate a first primary RF signal, the first RF signal being based on the first primary RF signal; The second transmit chain includes a second baseband filter and a second mixer; and Processing the second analog signal includes: filtering the second analog signal using the second baseband filter to generate a second filtered analog signal; and The second filtered analog signal is mixed with a second oscillating signal derived from the frequency synthesizer using the second mixer to generate a second primary RF signal, the second RF signal being based on the second primary RF signal.

18. The method of claim 16, wherein: The first transmission chain and the second transmission chain share the DAC, the frequency synthesizer and the baseband processor; and The method further comprises: outputting the first digital signal from the baseband processor; as well as The second digital signal is output from the baseband processor.

19. The method of claim 15, wherein: The first transmission chain and the second transmission chain share the DAC and the baseband processor; and The method further comprises: outputting the first digital signal from the baseband processor; as well as The second digital signal is output from the baseband processor.

20. The method according to claim 15, further comprising: Sending the first RF signal at a first time; as well as The second RF signal is transmitted at a second time, wherein the second time is different from the first time.

21. The method of claim 15, wherein the first transmit chain comprises a cellular vehicle-to-everything (C-V2X) transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

22. The method of claim 15, wherein the first transmit chain comprises a FR1 or sub-6 GHz transmit chain, and wherein the second transmit chain comprises a FR2 or millimeter wave transmit chain.

23. The method according to claim 15, further comprising: converting the third digital signal into a third analog signal using another DAC; processing the third analog signal using a third transmit chain to generate a third RF signal for transmission; converting the fourth digital signal into a fourth analog signal using the another DAC; and The fourth analog signal is processed using a fourth transmit chain to generate a fourth RF signal for transmission, wherein the third transmit chain and the fourth transmit chain share the other DAC.

24. The method of claim 23, wherein the third transmit chain and the fourth transmit chain share the another DAC and a frequency synthesizer.

25. The method of claim 23, wherein: The first transmission chain includes a cellular vehicle-to-everything (C-V2X) transmission chain; The second transmit chain includes a first FR2 or mmWave transmit chain; The third transmit chain comprises a FR1 or sub-6 GHz transmit chain; and The fourth transmit chain includes a second FR2 or millimeter wave transmit chain.

26. The method according to claim 15, further comprising: converting the third digital signal into a third analog signal using the DAC; as well as The third analog signal is processed using a third transmit chain to generate a third RF signal for transmission, wherein the first transmit chain, the second transmit chain, and the third transmit chain share the DAC.

27. The method of claim 15, wherein the first transmit chain and the second transmit chain support two different radio access technologies (RATs).

28. An apparatus for wireless communication, the apparatus comprising: means for converting a first digital signal into a first analog signal and converting a second digital signal into a second analog signal; first means for processing the first analog signal to generate a first radio frequency (RF) signal for transmission from the device; and Second means for processing the second analog signal to generate a second RF signal for transmission from the device, wherein the first means for processing and the second means for processing share the means for converting.

29. The apparatus of claim 28, wherein the first means for processing and the second means for processing share the means for converting and the means for generating an oscillating signal.

30. The apparatus of claim 28, wherein the first RF signal is configured to be transmitted at a first time, wherein the second RF signal is configured to be transmitted at a second time, and wherein the second time is different from the first time.

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