Addressable nanoelectrode prepared by using nanowire array and preparation method of addressable nanoelectrode

Abstract

The invention discloses an addressable nanoelectrode prepared by using a nanowire array and a method thereof, and belongs to the technical field of nanoelectrodes. A nanowire array, a metal lead, a metal pad and a copper wire are arranged on the substrate, the nanowire array is flush with the substrate, the nanowire array is connected with the metal lead, the metal lead is connected with the metal pad, the metal pad is connected with the copper wire, and the copper wire extends out of the substrate; and a resin layer is arranged on the nanowire array, the metal lead, the metal pad and the copper wire. The method comprises the following steps: preparing a substrate; processing the nanowire array; processing a metal lead and a metal pad; processing an addressable nano electrode; and testing electrochemical performance. According to the method, the nanowire array with high consistency can be repeatedly and efficiently prepared, the processed nanowire array has an ultra-long size, the size interval is controllable, the nanowire array is easy to transfer and position, and subsequent packaging is facilitated. The addressable nanoelectrode is prepared simply and efficiently at low cost, and multi-field application of the addressable nanoelectrode is realized.

Description

Technical Field

[0001] The invention relates to an addressable nanoelectrode prepared by using a nanowire array and a method thereof, belonging to the technical field of nanoelectrodes. Background Art

[0002] Nanoelectrodes have been widely used in the field of electrochemical sensing technology due to their significant advantages such as high current density, fast response rate, low detection limit and ohmic voltage drop. However, in practical applications, single nanoelectrodes face problems such as weak current signal, limited detection range and low detection flux. These problems limit the application potential of nanoelectrodes in efficient and high-precision electrochemical sensing.

[0003] Array electrodes effectively enhance the current signal and broaden the detection range by integrating multiple nanoelectrodes, overcoming the limitations of a single nanoelectrode. However, array electrodes usually exhibit holistic response characteristics during electrochemical sensing, that is, all electrodes are at the same potential or working state and lack independent control methods. Therefore, although array electrode technology has improved the problems of current signal and detection range to a certain extent, the detection flux is still limited, and the need for multiple detections increases the risk of electrode contamination.

[0004] Addressable nanoelectrodes can achieve independent control of each electrode at the same time, allowing different voltages or currents to be applied to different electrodes to explore different electrochemical reaction mechanisms. This parallel operation capability significantly shortens the electrochemical detection time, improves detection efficiency, and reduces the risk of contamination during a single detection process, thereby improving detection accuracy. Addressable nanoelectrodes usually consist of three parts: nanoelectrode arrays, metal leads, and metal pads. During the preparation process, in order to obtain nanoelectrode arrays with controllable size and high precision, researchers usually use top-down methods such as chemical etching and photolithography. At the same time, the preparation of the lead part is crucial to ensure the stability and reliability of signal transmission, so high-precision preparation methods such as focused electron beam (FEB), focused ion beam (FIB), and electron beam lithography (EBL) are often used. However, these preparation processes usually involve multi-step precision processing, which has high requirements for equipment and processes, resulting in high costs and poor scalability.

[0005] In summary, although addressable nanoelectrode technology has shown great potential in the field of electrochemical sensing, its high requirements for the preparation process limit its widespread application. Therefore, how to simply and efficiently prepare structurally stable and scalable addressable nanoelectrodes has become a technical problem that needs to be solved urgently. Summary of the invention

[0006] In order to solve the problems existing in the background technology, the present invention provides an addressable nanoelectrode prepared by using a nanowire array and a method thereof.

[0007] To achieve the above purpose, the present invention adopts the following technical solutions:

[0008] A method for preparing an addressable nanoelectrode using a nanowire array, the method comprising the following steps:

[0009] S1: substrate preparation;

[0010] S101: Select the upper surface with S i O2 layer of single crystal silicon wafer;

[0011] S102: Cutting the single crystal silicon wafer into rectangles;

[0012] S103: ultrasonically cleaning the rectangular single crystal silicon wafer in sequence using anhydrous ethanol, acetone, anhydrous ethanol, and ultrapure water;

[0013] S104: using high-purity air to dry the rectangular single crystal silicon wafer obtained in S103;

[0014] S105: The rectangular single crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a surface hydrophilized substrate.

[0015] S2: nanowire array processing;

[0016] S201: PDMS and a curing agent having a mass ratio of 10:1 are stirred and placed in a vacuum dryer for degassing;

[0017] S202: pouring the PDMS obtained in S201 onto the silicon template having micrometer-scale array grooves and then curing the PDMS to obtain a PDMS mold having micrometer-scale array grooves;

[0018] S203: mixing the resin and the curing agent in a mass ratio of 25:3 and placing them in a vacuum dryer for degassing;

[0019] S204: pouring resin on the surface of the PDMS mold and curing the resin to obtain a resin block containing micrometer-scale array grooves;

[0020] S205: plating a gold film on the surface of the resin block;

[0021] S206: cutting the resin block coated with the gold film, placing it in a silicone embedding mold, injecting resin, and then curing it to obtain a rectangular embedding block;

[0022] S207: Nano-slicing the embedded block to obtain a nanowire array.

[0023] S20701: After rotating the embedded block, the bottom of the embedded block is trimmed and polished until the bottom end surface of the gold film is exposed;

[0024] S20702: trimming the embedded block into a rectangular body with a square bottom;

[0025] S20703: Slice the bottom end surface of the gold film at the bottom of the embedded block to obtain a resin sheet containing a nanowire array, namely, a nanowire array.

[0026] S3: Metal lead and metal pad processing;

[0027] S301: Spin-coating the photoresist on the substrate at a speed of 500 r / min for 5 seconds, and then spin-coating the photoresist at a speed of 4000 r / min for 120 seconds;

[0028] S302: pre-baking, exposure, post-baking and development are performed on the process parts obtained in S301;

[0029] S303: The photoresist in the non-exposed area dissolves and falls off;

[0030] S304: depositing a gold layer on the substrate;

[0031] S305: The process parts obtained in S304 are subjected to oxygen plasma etching to remove the remaining photoresist, and the required metal leads and metal pads are prepared.

[0032] S4: Addressable nanoelectrode processing;

[0033] S401: transferring the nanowire array to the surface of the hydrophilic treated substrate, and adjusting the nanowire array and the metal lead to complete alignment and overlap;

[0034] S402: Lap the corresponding copper wire at the center of each metal pad;

[0035] S403: placing the process parts obtained in S402 in a silicone embedding mold, pouring resin to cover the nanowire array, metal leads and metal pads, and obtaining an addressable nanoelectrode sample after curing;

[0036] S404: The addressable nanoelectrode sample is trimmed and polished, and the end of the nanowire array that is not overlapped with the metal lead is trimmed until the end surface of the addressable nanoelectrode sample is flush with the end surface of the nanowire array, thereby obtaining an addressable nanoelectrode.

[0037] S5: Electrochemical performance test.

[0038] The present invention discloses an addressable nanoelectrode prepared by a method for preparing an addressable nanoelectrode using a nanowire array, comprising a substrate, a nanowire array, a metal lead, a metal pad, a copper wire and a resin layer; the upper end of the substrate is provided with a nanowire array, a metal lead, a metal pad and a copper wire, the upper end of the nanowire array is flush with the upper end of the substrate, the lower end of the nanowire array is respectively connected to the upper end of the corresponding metal lead in a one-to-one correspondence, the lower end of each of the metal leads is respectively connected to the upper end of the corresponding metal pad in a one-to-one correspondence, the middle part of each of the metal pads is respectively connected to the upper end of the corresponding copper wire in a one-to-one correspondence, and the lower end of each of the copper wires extends out of the substrate; the upper ends of the nanowire array, the metal lead, the metal pad and the copper wire are provided with a resin layer.

[0039] Compared with the prior art, the present invention has the following beneficial effects:

[0040] The present invention uses S with a thickness of 280nm i The single crystal silicon wafer of O2 layer is used as the test substrate, and the silicon wafer with micron-scale array grooves is used as the template. The soft lithography technology, magnetron sputtering technology and nano-slicing technology are combined to realize the preparation of nanowire arrays. The nanowire arrays with high consistency can be repeatedly and efficiently prepared. The processed nanowire arrays have ultra-long sizes and controllable size spacing, which are easier to transfer and position, and are convenient for subsequent packaging. Then, metal leads and metal pads are prepared on the substrate by ultraviolet lithography technology combined with physical vapor deposition. Finally, a simple alignment technology is combined to realize the overlap of the nanowire array and the lead part to complete the preparation of the addressable nanoelectrode. The addressable nanoelectrode is prepared simply, efficiently and at low cost, and the addressable nanoelectrode can be applied in multiple fields by regulating the number, spacing and length of the nanowire array and metal leads. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 is a flow chart of nanowire array preparation;

[0042] Figure 2 It is a flow chart of metal lead and metal pad preparation;

[0043] Figure 3 This is a diagram of the processing process of addressable nanoelectrodes. DETAILED DESCRIPTION

[0044] The technical solution of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0045] A method for preparing an addressable nanoelectrode using a nanowire array, the method comprising the following steps:

[0046] S1: Substrate 1 preparation;

[0047] S101: Select S with a thickness of 280nm on the upper surface i O2 layer of single crystal silicon wafer;

[0048] S102: Cutting the single crystal silicon wafer into a rectangle of 2 cm×3 cm;

[0049] S103: ultrasonically cleaning the rectangular single crystal silicon wafer in sequence with anhydrous ethanol, acetone, anhydrous ethanol, and ultrapure water for 6 minutes;

[0050] S104: using high-purity air to dry the rectangular single crystal silicon wafer obtained in S103;

[0051] S105: The rectangular single crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a substrate 1 with a hydrophilic surface.

[0052] S2: Nanowire array 2 processing, mainly achieved through soft lithography transfer technology, magnetron sputtering technology and nano-slicing technology;

[0053] S201: PDMS Sylgard 184 produced by DowCorining, USA, and a curing agent in a mass ratio of 10:1 are fully stirred and placed in a vacuum dryer for 30 minutes for degassing treatment;

[0054] S202: pouring the PDMS obtained in S201 on the silicon template with micrometer-scale array grooves, and placing the mold in an oven at 80°C for curing for 3 hours to obtain a PDMS mold with micrometer-scale array grooves;

[0055] S203: Epo-fix, a resin produced by Struers A / S of Denmark, and a curing agent in a mass ratio of 25:3 were mixed and stirred thoroughly, and then placed in a vacuum dryer for 30 minutes for degassing treatment;

[0056] S204: After pouring the resin on the surface of the PDMS mold, curing it at room temperature for 12 hours to obtain a resin block containing micrometer-scale array grooves;

[0057] S205: using magnetron sputtering technology to plate a 100 nm gold film on the surface of the resin block;

[0058] S206: After appropriately cutting the resin block coated with the gold film, the block is placed in a silicone embedding mold, injected with resin, and then cured at room temperature for 12 hours to obtain a rectangular embedding block with a size of 14×5×3 mm (length×width×height);

[0059] S207: Nano-slice the embedded block to obtain the nanowire array 2. The slicing process is mainly achieved using a commercial ultra-thin slicer (EMUC7) from Leica, Germany.

[0060] S20701: Use a glass cutter to rotate the embedded block and then trim and polish the bottom of the embedded block until the bottom end surface of the gold film is exposed. The trimming speed is 100 mm / s and the trimming thickness is 200 nm.

[0061] S20702: trimming the embedded block into a rectangular body with a square bottom (300um×300um);

[0062] S20703: Use a straight-edge diamond knife to slice the bottom end surface of the gold film at the bottom of the embedded block. The slicing speed is 1 mm / s, the slicing direction is parallel to the metal microstructure surface, and the slicing thickness is 100 nm; obtain a resin sheet containing a nanowire array, namely, nanowire array 2.

[0063] S3: Processing of metal leads 3 and metal pads 4, mainly achieved by ultraviolet lithography combined with thermal evaporation process;

[0064] S301: Spin-coat the prepared substrate 1 with a photoresist at a speed of 500 r / min for 5 seconds, and then spin-coat the photoresist at a speed of 4000 r / min for 120 seconds. The negative photoresist (SU-82015) produced by MicroChem Company of the United States is used for UV lithography.

[0065] S302: pre-baking, exposure, post-baking and development are performed on the process parts obtained in S301;

[0066] S303: The photoresist in the non-exposed area dissolves and falls off;

[0067] S304: Depositing a 150 nm thick gold layer on the substrate 1 by a thermal evaporation process;

[0068] S305: The process component obtained in S304 is subjected to oxygen plasma etching to remove the remaining photoresist, so that the required metal lead 3 and metal pad 4 are prepared on the substrate.

[0069] S4: Addressable nanoelectrode processing: This includes the overlapping of nanowire array and metal lead, the overlapping of copper wire 5 and metal pad, overall packaging and polishing;

[0070] S401: Use the scoop ring of the slicer to scoop the sliced ​​nanowire array 2, transfer the nanowire array 2 from the water tank to the surface of the hydrophilic treated substrate 1, and use a hair fiber pen to controllably fine-tune the resin slice under a stereoscopic light microscope to align and overlap the nanowire array 2 and the metal lead 3;

[0071] S402: overlap the corresponding copper wire 5 with a diameter of 0.1 mm at the center of each metal pad 4, use conductive silver glue 7 to connect to ensure current conduction, and use AB glue as a fixing material to bond the copper foil to the center of the metal pad;

[0072] S403: placing the process parts obtained in S402 in a silicone embedding mold, pouring resin to cover the nanowire array 2, the metal lead 3 and the metal pad 4, and curing at room temperature for 12 hours to obtain a well-packaged addressable nanoelectrode sample;

[0073] S404: Use an ultra-thin slicer to perform trimming and polishing on the addressable nanoelectrode sample, and trim the end of the nanowire array 2 that is not overlapped with the metal lead 3 until the end face of the addressable nanoelectrode sample is flush with the end face of the nanowire array 2, that is, the end face of the nanowire array 2 is exposed, and the addressable nanoelectrode is obtained.

[0074] S5: Electrochemical performance test.

[0075] The addressable nanoelectrode was scanned by cyclic voltammetry in a 1 mmol / L ferrocene methanol aqueous solution, the supporting electrolyte was a 0.5 mol / L KC1 aqueous solution, the potential range was -0.1V-0.6V, the scanning rate was 0.1V / s, and the cyclic voltammetry graph obtained was a standard S-shape, indicating that the addressable nanoelectrode has been successfully prepared.

[0076] The present invention discloses an addressable nanoelectrode prepared by a method for preparing an addressable nanoelectrode using a nanowire array, comprising a substrate 1, a nanowire array 2, a metal lead 3, a metal pad 4, a copper wire 5 and a resin layer 6; the upper end of the substrate 1 is provided with the nanowire array 2, the metal lead 3, the metal pad 4 and the copper wire 5, the upper end of the nanowire array 2 is flush with the upper end of the substrate 1, the lower end of the nanowire array 2 is respectively connected to the upper end of the corresponding metal lead 3 in a one-to-one correspondence, the lower end of each of the metal leads 3 is respectively connected to the upper end of the corresponding metal pad 4 in a one-to-one correspondence, the middle part of each of the metal pads 4 is respectively connected to the upper end of the corresponding copper wire 5 in a one-to-one correspondence, and the lower end of each of the copper wires 5 extends out of the substrate 1; the upper ends of the nanowire array 2, the metal lead 3, the metal pad 4 and the copper wire 5 are provided with a resin layer 6.

[0077] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and range of equivalents of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0078] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A method for preparing addressable nanoelectrodes using nanowire arrays, characterized in that: The method comprises the following steps: S1: Substrate (1) preparation; S2: Nanowire array (2) processing; S3: Processing of metal leads (3) and metal pads (4); S4: Addressable nanoelectrode processing; S5: Electrochemical performance test.

2. The method for preparing addressable nanoelectrodes using nanowire arrays according to claim 1, characterized in that: The S1 comprises the following steps: S101: Select the upper surface with S i O2 layer of single crystal silicon wafer; S102: Cutting the single crystal silicon wafer into rectangles; S103: ultrasonically cleaning the rectangular single crystal silicon wafer in sequence using anhydrous ethanol, acetone, anhydrous ethanol, and ultrapure water; S104: using high-purity air to dry the rectangular single crystal silicon wafer obtained in S103; S105: The rectangular single crystal silicon wafer obtained in S104 is subjected to oxygen plasma treatment to obtain a surface hydrophilized substrate (1).

3. The method for preparing addressable nanoelectrodes using nanowire arrays according to claim 2, characterized in that: The S2 comprises the following steps: S201: PDMS and a curing agent having a mass ratio of 10:1 are stirred and placed in a vacuum dryer for degassing; S202: pouring the PDMS obtained in S201 onto the silicon template having micrometer-scale array grooves and then curing the PDMS to obtain a PDMS mold having micrometer-scale array grooves; S203: mixing the resin and the curing agent in a mass ratio of 25:3 and placing them in a vacuum dryer for degassing; S204: pouring resin on the surface of the PDMS mold and curing the resin to obtain a resin block containing micrometer-scale array grooves; S205: plating a gold film on the surface of the resin block; S206: cutting the resin block coated with the gold film, placing it in a silicone embedding mold, injecting resin, and then curing it to obtain a rectangular embedding block; S207: Nano-slice the embedded block to obtain a nanowire array (2).

4. The method for preparing addressable nanoelectrodes using nanowire arrays according to claim 3, characterized in that: The S207 includes the following steps: S20701: After rotating the embedded block, the bottom of the embedded block is trimmed and polished until the bottom end surface of the gold film is exposed; S20702: trimming the embedded block into a rectangular body with a square bottom; S20703: Slice the bottom end surface of the gold film at the bottom of the embedded block to obtain a resin sheet containing the nanowire array, namely the nanowire array (2).

5. The method for preparing addressable nanoelectrodes using nanowire arrays according to claim 4, characterized in that: The S3 comprises the following steps: S301: Spin-coating a photoresist on the substrate (1) at a speed of 500 r / min for 5 seconds, and then spin-coating the photoresist at a speed of 4000 r / min for 120 seconds; S302: pre-baking, exposure, post-baking and development are performed on the process parts obtained in S301; S303: The photoresist in the non-exposed area dissolves and falls off; S304: depositing a gold layer on the substrate (1); S305: The process component obtained in S304 is subjected to oxygen plasma etching to remove the remaining photoresist, so as to prepare the required metal lead (3) and metal pad (4).

6. The method for preparing addressable nanoelectrodes using nanowire arrays according to claim 5, characterized in that: The S4 comprises the following steps: S401: transferring the nanowire array (2) to the surface of the hydrophilic treated substrate (1), and adjusting the nanowire array (2) and the metal lead (3) to achieve alignment and overlap; S402: overlapping the corresponding copper wire (5) at the center of each metal pad (4); S403: placing the process parts obtained in S402 in a silicone embedding mold, pouring resin to cover the nanowire array (2), the metal lead (3) and the metal pad (4), and obtaining an addressable nanoelectrode sample after curing; S404: The addressable nanoelectrode sample is subjected to a trimming and polishing process, and the end of the nanowire array (2) that is not overlapped with the metal lead (3) is trimmed until the end surface of the addressable nanoelectrode sample is flush with the end surface of the nanowire array (2), thereby obtaining an addressable nanoelectrode.

7. An addressable nanoelectrode prepared by the method for preparing an addressable nanoelectrode using a nanowire array according to claim 6, characterized in that: The invention comprises a substrate (1), a nanowire array (2), a metal lead (3), a metal pad (4), a copper wire (5) and a resin layer (6); the upper end of the substrate (1) is provided with the nanowire array (2), the metal lead (3), the metal pad (4) and the copper wire (5); the upper end of the nanowire array (2) is flush with the upper end of the substrate (1); the lower end of the nanowire array (2) is connected to the upper end of the corresponding metal lead (3) in a one-to-one correspondence; the lower end of each metal lead (3) is connected to the upper end of the corresponding metal pad (4) in a one-to-one correspondence; the middle part of each metal pad (4) is connected to the upper end of the corresponding copper wire (5) in a one-to-one correspondence; the lower end of each copper wire (5) is extended to the outside of the substrate (1); the upper ends of the nanowire array (2), the metal lead (3), the metal pad (4) and the copper wire (5) are provided with a resin layer (6).

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