CPU (Central Processing Unit) kernel screening method and system

Abstract

The present disclosure relates to a method and system for screening CPU cores, receiving system data of a user computer to diagnose the computer, and based on the diagnosis results, accessing the system of the user computer to screen core combinations by excluding or executing certain cores. The method comprises the following steps: (a) receiving system data of a user computer; (b) diagnosing the user computer by comparing the received system data with an average performance value of the same model as the user computer; (c) screening the kernel combination so as to exclude or execute certain kernel operations by accessing the system of the user computer using the diagnostic data of the user computer to achieve the average performance value; (d) applying the screened kernel combination to the user computer and receiving system data of the user computer to which the screened kernel combination is applied; and (e) comparing the system data of the user computer with the average performance value to check whether the operation of the screened kernel combination is efficient.

Description

Technical Field

[0001] The present disclosure relates to a method and system for screening multiple cores of a central processing unit (CPU). More specifically, it diagnoses security issues of a user's computer in real time and uses the diagnostic data to screen CPU core combinations in order to efficiently utilize the computer's computing power. Background Art

[0002] The CPU is the central processing unit that processes all data in a computer. Its role is to interpret and execute instructions input from the user, and then output the results.

[0003] A core is the central part of a CPU that performs computing tasks, and as the number of cores increases, the processing speed of CPU operations becomes faster.

[0004] Original computers used to perform operations and calculations using a single core, however, the need for multitasking, which requires processing multiple tasks simultaneously, has caused problems that increase overheating and power consumption issues. Nowadays, computers with multiple cores are being released.

[0005] According to the number of CPU cores, the cores can be divided into the following: 1 core - single core; 2 cores - dual cores; 4 cores - quad cores; 6 cores - hexa cores; 8 cores - octa cores; 10 cores - deca cores; 12 cores - twelve cores; 14 cores - fourteen cores; 16 cores - sixteen cores; 18 cores - eighteen cores; 24 cores - twenty-four cores; 32 cores - thirty-two cores; and 64 cores - sixty-four cores.

[0006] Usually, a single thread is given to one core, and a thread is the smallest unit of work that performs actual tasks inside the CPU. The number of threads depends on the number of cores and each function of the CPU.

[0007] Recently, with the development of program technology, the workload and data transmission volume have increased. In addition, multithreading technology that executes multiple threads in parallel at the same time and hyperthreading technology that allows two or more threads to run on a single core have emerged.

[0008] As the number of threads increases, the number of concurrent tasks also increases, so it allows processing of difficult arithmetic operations such as graphics work and virtual reality games. However, with more threads, it may lead to degradation in processing general tasks, causing bottlenecks due to synchronization and cache coherence.

[0009] Therefore, a method for efficiently improving computer performance according to a user's working style is needed.

[0010] Here, "throughput" refers to the comprehensive operation of a computer, in which all functional circuits within the computer function appropriately when performing a certain task. Comprehensive operation means that the computer can perform at the highest level, lower level, or lowest level by utilizing features such as performance cores (P-cores), efficiency cores (E-cores), and hyperthreading within cores.

[0011] As related arts for effectively improving computer performance according to a user's work style, Korean Patent No. 10-2092091, Korean Patent Publication No. 10-2010-0132267, and Korean Patent Publication No. 10-2002-0007160 are known.

[0012] Korean Patent No. 10-2092091 discloses a method of providing high reliability of a network by managing all device systems of a computer network by an intelligent central management system.

[0013] Korean Patent Publication No. 10-2010-0132267 discloses a method of using a spare device when a problem occurs by using a "scan" method, which checks the operation of combinational circuits and sequential circuits inside a system on chip (SoC) device by inputting a test pattern outside the device as a scan-based test design (DFT).

[0014] Korean Patent Publication No. 10-2002-0007160 discloses a computerized method of indicating availability of a current allocation status and availability available in the future, wherein when a plurality of applications are executed on a single server computer, each application or all applications decides and indicates availability of a server.

[0015] Unfortunately, in the known technologies disclosed in Korean Patent No. 10-2092091, Korean Patent Publication No. 10-2010-0132267, and Korean Patent Publication No. 10-2002-0007160, improved performance cannot be accurately provided in terms of maximum performance and available capacity of semiconductor devices or computer device components constituting the system. In addition, it is difficult to check and diagnose semiconductor devices and computers in operation in real time, and even if diagnosis is performed, the purchase cost and maintenance fee of the diagnostic device are too high.

[0016] Therefore, in order to facilitate appropriate setting operations according to the task type, it is necessary to construct a system in which computer diagnostic software can diagnose the computer and can change the settings to its performance level (high or low) according to the user.

[0017] [Related technical literature]

[0018] [Patent Literature]

[0019] Korean Patent No. 10-2092091 (registered on March 17, 2020, title: METHODS APPARATUS AND COMPUTER PROGRAMS FOR PROVIDING HIGH AVAILABILITY AND RELIABILITY IN SOFTWARE DEFINED NETWORK)

[0020] Korean Patent Publication No. 10-2010-0132267 (published on December 17, 2010, title: SCAN FLIPFLOP CIRCUIT AND SCAN TEST CIRCUIT)

[0021] Korean Patent Publication No. 10-2002-0007160 (published on January 26, 2002, title: A method for availability monitoring via a shared database (AMETHOD FOR AVAILABILITY MONITORING VIAASHAREDDATABASE)) Summary of the invention

[0022]

Technical issues

[0023] The present disclosure is invented based on the above needs, and the main purpose of the present disclosure is to measure the response time of computer equipment components through a diagnostic benchmark program without having a separate diagnostic program and test data, and to provide a CPU core screening method for screening the core so that it can immediately respond to abnormal symptoms (such as overheating or slow response time of computer elements) according to the type of problem.

[0024] In addition, another object of the present disclosure is to diagnose a user's computer in real time based on the user's work style, and to provide a CPU core screening system that uses the BIOS settings of the user's computer and an assembler for controlling the core to select a performance core (P-core), an efficient core (E-core), or hyperthreading to provide improved performance.

[0025] [Solution to the problem]

[0026] According to an embodiment of the present disclosure, a method for screening CPU cores to achieve the above-mentioned purpose includes the following steps: (a) receiving system data of a user computer; (b) diagnosing the user computer by comparing the received system data with an average performance value of the same model as the user computer; (c) screening core combinations to achieve the average performance value of the same model as the user computer by accessing the system of the user computer and using the diagnostic data of the user computer to execute or exclude operations of certain cores; (d) applying the screened core combination to the user computer and receiving the system data of the user computer to which the screened core combination is applied; and (e) comparing the system data of the user computer to which the screened core combination is applied with the average performance value of the same model as the user computer to check whether the operation of the screened core combination is efficient.

[0027] According to an embodiment of the present disclosure, the present disclosure is characterized by a CPU core screening method for screening core combinations, when the core combination does not reach the average performance value of the same model as the user's computer, by comparing the screened core combination with the core combination in a verification step of checking whether the computing power of the screened core combination is efficient, the core combination further limits the number of performance cores (P-cores) and high-efficiency cores (E-cores).

[0028] According to an embodiment of the present disclosure, the CPU core screening method is characterized in that the system data includes at least one of CPU utilization, temperature, speed or throughput.

[0029] In the CPU core screening method according to an embodiment of the present disclosure, the step of diagnosing the user computer by comparing the average performance value of the same model as the user computer with the received system data is characterized in that it diagnoses at least one of the root causes of parallel distribution of cores, hyperthreading of multiple cores, and core migration that may cause performance degradation of the user computer.

[0030] In the CPU core screening method according to an embodiment of the present disclosure, the method for screening core combinations is characterized in that it executes or excludes the operation of certain cores by changing the settings of BIOS based on the diagnosis result of the user computer by comparing the average performance value of the same model as the user computer with the received system data, or it executes or excludes at least one of hyperthreading, performance core or high-efficiency core by using a kernel control assembler capable of controlling the CPU to screen cores based on the diagnosis result of the user computer by comparing the average performance value of the same model as the user computer with the received system data.

[0031] In the CPU core screening method according to the embodiment of the present disclosure, the core control assembler when screening the core combination is characterized in that the CPU core of the user's computer is directly screened without accessing the BIOS setting.

[0032] The CPU core screening system according to another embodiment of the present disclosure is characterized in that it compares the received system data with the average performance value of the same model as the user computer, accesses the system of the user computer based on the result of diagnosing the user computer to change the BIOS setting, and screens the core by excluding or executing certain core operations. In addition, it is characterized in that it compares the received system data with the average performance value of the same model as the user computer, accesses the system of the user computer based on the result of diagnosing the user computer, and uses a core control assembler that can control the CPU to screen the core by excluding or executing at least one of hyperthreading, performance cores, or high-efficiency cores.

[0033] In the CPU core screening method according to an embodiment of the present disclosure, the core control assembler is characterized in that, when screening core combinations, it screens the CPU cores of the user's computer without accessing BIOS settings.

[0034] Meanwhile, the CPU core screening system according to another embodiment of the present disclosure is characterized in that it compares an input unit for receiving system data of a user computer and the received system data with an average performance value of the same model of the user computer, accesses a diagnostic unit for diagnosing the user computer and a system of the user computer to use the diagnostic result of the diagnostic unit, and screens a core combination by excluding or executing operations of certain cores so as to obtain an average performance value of the same model as the user computer. In addition, it includes a verification unit that verifies whether the operation of the screened core combination is efficient compared with the average performance value of the same model as the user computer using the system data of the user computer to which the screened core combination is applied.

[0035] In the CPU core screening system according to an embodiment of the present disclosure, the diagnosis unit diagnoses at least one of the following problems: an increase in temperature; a decrease in speed; or a decrease in utilization due to core migration.

[0036] In the CPU core screening system according to the embodiment of the present disclosure, the diagnosis unit diagnoses a throughput inversion caused by at least one of hyperthreading of a plurality of cores or parallel distribution of cores.

[0037] In the CPU core screening system according to an embodiment of the present disclosure, the screening unit executes or excludes operations of certain cores by accessing the system of the user computer according to the diagnosis of the diagnosis unit, and changes the BIOS settings to screen the cores by excluding or executing operations of certain cores.

[0038] In a CPU core screening system according to an embodiment of the present disclosure, a screening unit accesses a system of a user computer according to a result of a diagnostic unit, and screens cores by excluding or executing at least one of hyperthreading, performance cores, or high-efficiency cores using a core control assembler capable of controlling the CPU while accessing BIOS settings.

[0039] In the CPU core screening system according to an embodiment of the present disclosure, the verification unit performs a verification process using system data of a user computer applying a screened core combination received from an input unit, wherein the operation of the screened core combination is efficient compared to an average performance value.

[0040] In the CPU core screening system according to an embodiment of the present disclosure, when the verification unit determines that the screened core combination fails to achieve the average performance value of the user's computer, and if the verification unit determines that the screened core combination successfully achieves the average performance value of the user's computer, the screening unit provides the result to the user through the user's computer.

[0041] Details of other embodiments are included in the detailed description and accompanying drawings.

[0042]

Beneficial Effects

[0043] According to the solution to the above technical problem, the CPU core screening method and system according to the embodiment of the present disclosure can achieve the following effects:

[0044] (1) The CPU core screening method and system allow the user to check the response characteristics of the device through computer diagnostic software in an environment where the production line is in production or has completed production, and to check the impact of the device on computer performance through a self-diagnostic algorithm without the help of dedicated external test equipment.

[0045] (2) The CPU core screening method and system allow computer diagnostic software to check the speed and temperature of a computer device according to each operating environment by performing tests at different acceleration levels in an average operating level as a test condition.

[0046] (3) When failure or degradation of a circuit element occurs in a semiconductor embedded in a computer system, a CPU core screening method and system diagnoses and maintains the computer system by adjusting utilization levels and avoiding overload or reducing acceleration rates (such as a timing clock of a device) to consistently operate the computer system. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A CPU screening system according to an embodiment of the present disclosure is depicted.

[0048] Figure 2Depicts a flow chart for creating a load by using the PIPS (Programmable IPC Performance and Symbols) benchmark program.

[0049] Figure 3 Describes the use of Figure 2 Flowchart of the setup screens in the PIPS benchmark program for creating loads.

[0050] Figure 4 Depicts the results of measuring the performance and symptoms of a user's computer by using the PIPS benchmark program.

[0051] Figure 5 Depicts the resulting values ​​for each part of the user's computer using the PIPS benchmark program.

[0052] Figure 6 Depicts the CPU core screening process.

[0053] Figure 7 Yes means Figure 6 Flowchart of the CPU core screening process.

[0054] Figure 8 Depicts an example of filtering a kernel combination by using one kernel. DETAILED DESCRIPTION

[0055] In the following description, reference is made to the accompanying drawings, which form a part of this specification and show by way of example certain exemplary embodiments in which the present disclosure can be practiced, so as to make the purposes, techniques, solutions and advantages of the present disclosure clear. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present invention. In addition, throughout the description and claims of the present invention, the word "include" and its variations are not intended to exclude other technical features, additions, elements or steps. For those skilled in the art, the advantages and features of the present invention will become apparent from this specification and, in part, from the practice of the present invention. The following examples and drawings are provided by way of illustration and are not intended to limit the present invention. In addition, the present invention includes all possible combinations of the specific embodiments and preferred embodiments shown herein. It should be understood that the various embodiments of the present invention are different, but do not need to be mutually exclusive. In addition, it should be understood that the position or arrangement of the various elements in each disclosed embodiment can be changed without departing from the spirit and scope of the present invention. Therefore, the following detailed description should not be considered restrictive, and the scope of the present invention is limited only by the appended claims and the full range of equivalents given by these claims. Unless otherwise specified herein or clearly contradicted by the context, items mentioned in the singular are intended to cover multiple. In the following description, it should be understood that a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention unclear.

[0056] Figure 1 A CPU screening system according to an embodiment of the present disclosure is depicted.

[0057] The CPU core screening method and system according to an embodiment of the present disclosure utilizes PIPS (Programmable IPC Performance and Symbols) as a benchmark program to measure the throughput of a user's computer.

[0058] The PIPS (Programmable IPC Performance and Symptoms) benchmark can measure the throughput of a user's computer by adjusting the operation level up or down in order to measure kernel operation and symptom values.

[0059] Here, the algorithm used in the PIPS (Programmable IPC Performance and Symbolic) benchmark program is generated according to the integer arithmetic rules of the specification INT2017 and the US specification benchmark industry standard, and measures the increase and decrease in throughput of a computer-centric operation unit.

[0060] The PIPS (Programmable IPC Performance and Symbolic) benchmark program extends and executes the integer arithmetic input algorithm standardized by the Standard Performance Evaluation Corporation, and is equipped with an algorithm that adjusts the operation input to evaluate the accelerated computing of a computer by measuring the throughput at each different level (60%, 80%, 100%) of fixed CPU core utilization.

[0061] The CPU core screening system 100 according to an embodiment of the present disclosure may measure computer performance using various benchmark programs such as 3D MARK, Cinebench, PassMark, UserBenchmark in addition to the PIPS (Programmable IPC Performance and Symbols) benchmark program, and is not limited thereto.

[0062] Figure 1 The CPU core screening system 100 may include an input unit 110 , a diagnosis unit 120 , a screening unit 130 , a verification unit 140 , and a control unit 150 .

[0063] The input unit 110 of the CPU core screening system 100 receives system data of a user's computer.

[0064] According to an embodiment of the present disclosure, the system data of the user's computer (hereinafter referred to as system data) is data measured by the user's computer using a PIPS (Programmable IPC Performance and Symbol) benchmark program. In addition, the system data may include at least one of CPU utilization, temperature and speed, not to mention throughput.

[0065] In addition, after terminating the program running on the user's computer, an available benchmark program is used, and the CPU core screening system 100 according to an embodiment of the present disclosure runs programs such as an operating system and a service host on the user's computer, so that even when receiving interference, performance can be measured by having a PIPS (Programmable IPC Performance and Symbols) benchmark program.

[0066] The diagnosis unit 120 of the CPU core screening system 100 diagnoses the user computer by comparing the received system data with an average performance value of the same model as the user computer.

[0067] The diagnosis unit 120 diagnoses at least one cause of temperature increase, speed reduction, and CPU utilization reduction due to core migration, and diagnoses throughput inversion caused by at least one of hyperthreading of multiple cores and core parallel distribution.

[0068] Based on the diagnosis of the diagnosis unit 120, the screening unit 130 of the CPU core screening system 100 accesses the system of the user computer, and screens the core combination to achieve an average performance value by excluding or executing operations of certain cores, and applies the core combination screened by the screening unit 130 to the user computer.

[0069] Based on the diagnosis result of the diagnosis unit 120 on the user's computer, the screening unit 130 changes the BIOS setting to select a kernel by excluding or performing operations of certain kernels.

[0070] Based on the diagnosis result of the diagnosis unit 120 on the user computer, the screening unit 130 accesses the system of the user computer and uses the kernel control assembler without accessing the BIOS setting, and screens the kernel to exclude or execute at least one of hyperthreading, performance kernel or high-efficiency kernel.

[0071] Here, the kernel control assembler refers to an assembler for controlling the kernel control of a computer.

[0072] According to one embodiment of the present disclosure, the advantage of the CPU kernel screening system 100 is that it changes the BIOS settings by directly screening the kernel from the user's computer without accessing the BIOS settings by using the kernel control assembly program, which makes it easier to apply and saves time compared to the method of screening the kernel.

[0073] The input unit 110 of the CPU core screening system 100 receives system data of a user computer to which the screened core combination is applied, and the verification unit 140 of the CPU core screening system 100 verifies the operation efficiency of the screened core combination by comparing it with an average performance value of the user computer.

[0074] When it is determined that the kernel combination screened by the verification unit 140 has not reached the average performance value, the screening unit 130 screens the kernel combination again, and when it is determined that the kernel combination screened by the verification unit 140 has reached the average performance value, the screening unit 130 provides the result to the user through the user computer.

[0075] The control unit 150 of the CPU core screening system 100 generally corresponds to a server, and performs overall control of the input unit 110 , the diagnosis unit 120 , the screening unit 130 , and the verification unit 140 .

[0076] Figure 2 Depicts a flow chart for creating a load using the PIPS (Programmable IPC Performance and Symbols) benchmark program, and Figure 3 Describes the use of Figure 2 Flowchart of the setup screens for creating a load in the PIPS (Programmable IPC Performance and Symbolic) benchmark program.

[0077] refer to Figure 2 and Figure 3 ,Typically, in order to measure the responsiveness of a computer over a range of core utilization of a user ,computer using the PIPS (Programmable IPC Performance and Symbolic) benchmark program, an ,algorithm is required that can achieve the target utilization level.

[0078] For example, to achieve 60% core utilization for a core clock of up to 3.3 GHz, the target level of the calculation formula for core utilization can be expressed as 3.3 GHz×60 / 100=1.98 GHz, and at this time, this means that the clock must execute 198 million instruction cycles.

[0079] According to an embodiment of the present disclosure, such calculation may cause an error because it does not reach the target value due to the following reasons.

[0080] First, this is because the actual core utilization is underestimated due to one of the following situations: when the core and CPU complete multiple instructions in a single clock cycle; when instructions are processed in multiple clocks; and when several instructions other than arithmetic instructions (such as CPU branch instructions or register load instructions) are added to run the PIPS (Programmable IPC Performance and Symbolic) benchmark program.

[0081] According to an embodiment of the present disclosure, the reason why the actual core utilization is insufficient may have various reasons, such as a decrease in the core utilization other than the above-mentioned reasons.

[0082] To address these errors, the PIPS (Programmable IPC Performance and Symbols) benchmark uses a method of meeting a target utilization by supplementing the core utilization that became insufficient due to previous instructions.

[0083] from Figure 2 As can be seen from the flowchart of , when the core utilization algorithm S100 is used to calculate the throughput, the PIPS (Programmable IPC Performance and Symbolic) benchmark program inputs the created thread conditions. Thereafter, the PIPS (Programmable IPC Performance and Symbolic) benchmark program calculates the throughput by distributing and allocating the created threads to the cores in order to calculate the throughput.

[0084] Here, the PIPS (Programmable IPC Performance and Symbols) benchmark program measures the processing speed of executed programs, the number of arithmetic instructions to be implemented, and calculates the throughput in the corresponding utilization part by multiplying the weight of each program by the number of arithmetic instructions to be implemented.

[0085] According to an embodiment of the present disclosure, a program for executing the number of arithmetic instructions to be executed is a program for executing the number of arithmetic instructions to be executed of SPEC int2017, and it makes them calculated in digital units (+, -, ×, ÷). In addition, it is a program having an algorithm that generates a result and the number of arithmetic instructions to be executed per clock in proportion.

[0086] Finally, the PIPS (Programmable IPC Performance and Symbols) benchmark creates loads based on load conditions.

[0087] According to an embodiment of the present disclosure, Figure 2 and Figure 3 As can be seen in , the load levels in the setup of the created load of the PIPS (Programmable IPC Performance and Symbols) benchmark program can be measured at a low load level of 25%, a medium load level of 50%, a busy load level of 75% and a maximum load level of 100%.

[0088] In order to find the throughput of the PIPS (Programmable IPC Performance and Symbols) benchmark, the hourly load must be calculated, the equation of which can be expressed as follows.

[0089]

[0090] The equation used to calculate the throughput is as follows.

[0091] Throughput = given load level (from 0.25 to 1.0) × number of threads created × clock

[0092] Figure 4 Depicts the results of measuring the performance and symptom values ​​of a user's computer using the PIPS (Programmable IPC Performance and Symbols) benchmark program. Figure 5 Depicts the results of measuring each part of the user's computer using the PIPS (Programmable IPC Performance and Symbols) benchmark program.

[0093] Reference Figure 4 and Figure 5 , the PIPS (Programmable IPC Performance and Symbols) benchmark program generates system data by measuring the user's computer.

[0094] refer to Figure 4 , it can be seen that the PIPS (Programmable IPC Performance and Symbols) benchmark program measures the performance and symptom values ​​of a user's computer by applying the arithmetic SPEC specification algorithm to six test threads on an Intel CPU with 10 cores.

[0095] The PIPS (Programmable IPC Performance and Symbolic) benchmark applies the algorithm to a 60% CPU target utilization in the range of 0 to 60% as a first step. The utilization of the six cores ranged from a minimum of 21.8% to a maximum of 59.2%.

[0096] According to an embodiment of the present disclosure, the reason why the utilization of the six cores shows a larger deviation when the algorithm is applied as the first step is because the maximum utilization of each core is operated with the input utilization as the target, and the speed and utilization of each core are dispersed because the core migration is applied to prevent overheating problems in the process.

[0097] The PIPS (Programmable IPC Performance and Symbols) benchmark program completes a section test when three minutes of normal operation time of each section has elapsed, and saves the performance and symptom values ​​as system data at that time.

[0098] Next, the PIPS (Programmable IPC Performance and Symbols) benchmark program increases the input relative to the maximum clock rate (60% to 80%) tested in the second step, and when three minutes of normal operating time of the part has passed, the performance and symptom values ​​are saved as system data.

[0099] Finally, the PIPS (Programmable IPC Performance and Symbolic) benchmark increases the number of arithmetic instructions to be implemented so that the input corresponds to the maximum clock rate in order to achieve the utilization (100%) in the third step, and when three minutes of uptime of the part have passed, the performance and symptom values ​​are saved as system data.

[0100] refer to Figure 5 , the PIPS (Programmable IPC Performance and Symbols) benchmark program completes acceleration testing of three parts of a user's computer, and presents throughput basic performance value data and symptom values ​​for each part as a result.

[0101] According to an embodiment of the present disclosure, the result data of measuring the user's computer using the PIPS (Programmable IPC Performance and Symbols) benchmark program may include at least one of the average speed, temperature, utilization, basic performance throughput of the core, and the increase in throughput when the utilization has increased by 10%. Therefore, the data can be used as system data of the CPU core screening system 100.

[0102] Figure 6 Describes the CPU core screening process; Figure 7 Depicted Figure 6 A flowchart of the CPU core screening process; and Figure 8 Depicts an example of using one kernel to filter a combination of kernels.

[0103] Reference Figures 6 to 8 The CPU core screening system 100 screens the core combination of the user's computer using system data of the user's computer measured by a PIPS (Programmable IPC Performance and Symbols) benchmark program.

[0104] The CPU core screening method continues with the step of receiving the system data of the user computer S200 from the input unit 110 of the CPU core screening system 100 .

[0105] Here, the system data includes at least one of CPU utilization, temperature, speed, and throughput.

[0106] The diagnosis unit 120 of the CPU core screening system 100 proceeds to step S210 of diagnosing the user computer by comparing the input system data with an average performance value of the same model as the user computer.

[0107] For example, the reasons why the performance of the user computer diagnosed by the diagnosis unit 120 may be deteriorated are as follows.

[0108] When the throughput speed of the fixed CPU core utilization of each portion (60%, 80%, 100%) decreases, it can be assumed that core migration has been performed on the user computer, which may cause performance degradation of the user computer.

[0109] Furthermore, if the core temperature remains overheated over 80 degrees, the operation core migration is forced to present data transmission failure due to overheating; the throughput of the computer is deteriorated due to the core overheating; and data transmission may be inefficient.

[0110] Furthermore, it can be useful when using high-spec operations because it increases operations when performing graphics matrix multiplication processes through migration inside performance core hyperthreading cores, whereas throughput inversion can occur when using low-end smaller operations.

[0111] Furthermore, since kernel parallel distribution is applied due to an algorithm predicting the operation, throughput inversion may occur due to a significant increase in kernel migration when the operation of the program is executed.

[0112] In addition to the above reasons, the diagnosis unit 120 according to an embodiment of the present disclosure may also find various reasons that may reduce the performance of the user's computer by comparing it with an average performance value of the same model of the user's computer.

[0113] The screening unit 130 of the CPU core screening system 100 accesses the system of the user computer to exclude or execute certain cores by using the diagnostic data, and screens the core combination to achieve an average performance value S220.

[0114] To screen the kernel combination, the screening unit 130 selects the kernel combination in each method based on the diagnosis result of the diagnosis unit 120 as follows.

[0115] In the method of screening the kernel combination, the screening unit 130 first changes the BIOS setting by accessing the system of the user's computer, and it selects the kernel combination by excluding or executing the operation of certain kernels.

[0116] In addition, the screening unit 130 accesses the system of the user's computer by using a kernel control assembler that can control the CPU, and selects a kernel combination by excluding or executing at least one of a hyperthreading, a performance kernel, or a high-efficiency kernel.

[0117] According to an embodiment of the present disclosure, in the step of screening the kernel combination through the kernel control assembler, the screening unit 130 can directly select the CPU kernel of the user's computer without accessing the BIOS setting.

[0118] Next, in addition to the above two methods, you can also filter kernel combinations in various ways on the user's computer.

[0119] As an example of the kernel combination screening process, as in Figure 8 As can be seen in FIG. 1 , the screening unit 130 can directly select a core on the user's computer by using only one core (number 15 among 16 CPU cores) without accessing the BIOS setting through the kernel control assembler.

[0120] An example of how the screening unit 130 selects a kernel combination is described using the following table.

[0121] 1. When it is set to minimum operation (here, minimum operation refers to the core combination that excludes high-efficiency cores and stops hyperthreading inside performance cores)

[0122]

Table 1

[0123] Acceleration part Percentage Utilization Throughput 60％ 28％ 403K 80％ 43％ 627K 100％ 92％ 1336K

[0124] The above results were obtained when the PIPS (Programmable IPC Performance and Symbols) benchmark program was executed to measure the performance, where the CPU allowed four PIPS threads, and the proportional results of the utilization of each part (first part: 28% / 60%, second part: 43% / 80%, third part: 92% / 100%) and the throughput of each part (first part: 403K, second part: 627K, third part: 1336K) were obtained.

[0125] 2. When minimum operation is set and the hyperthreading inside the performance core is selected for operation.

[0126]

Table 2

[0127] accelerate Percentage Utilization Throughput 60％ 24％ 717K 80％ 62％ 1793K 100％ 82％ 2359K

[0128] The above results were obtained when executing the PIPS (Programmable IPC Performance and Symbols) benchmark to measure performance. Here, the CPU allows 8 PIPS threads, and the throughput of each part has increased significantly by 78%, 186% and 76.6% respectively compared to the first setting.

[0129] Furthermore, since the throughput at the 80% portion is increased by 150% compared to the throughput at the 60% portion, and the throughput at the 100% portion is increased by 31.6% compared to the throughput at the 80% portion, it can be determined that the operation of the hyperthreading has a significant impact.

[0130] 3. When the performance core is set to minimum operation while executing two additional high-efficiency cores and executing hyperthreading inside the performance core.

[0131]

Table 3

[0132] accelerate Percentage Utilization Throughput 60％ 31％ 1007K 80％ 62％ 2020K 100％ 99％ 3225K

[0133] When executing the PIPS (Programmable IPC Performance and Symbols) benchmark program to measure performance, the CPU added high-efficiency cores to drive the above results, whose values ​​are the highest among the three results derived in each section.

[0134] Therefore, the screening unit 130 can screen kernels in real time and provide them to the user so as to efficiently utilize the performance of the user's computer.

[0135] Thereafter, the CPU core screening system 100 applies the core combination selected by the screening unit 130 to the user computer, and proceeds to step S230 of receiving system data of the user computer from the input unit 110 .

[0136] In the next step, the verification unit 140 verifies the system data of the user computer to which the core combinations selected from the screening unit 130 of the CPU core screening system 100 are applied, and it verifies the efficiency of the computing capabilities of those selected core combinations compared to the average performance value of the user computer.

[0137] In the step of verifying the efficiency of the computing power of the selected core combination, the CPU core screening system 100 compares the selected core combination with the average performance value of the same model as the user's computer. If it does not reach the average performance of the same model as the user's computer, the screening unit 130 of the CPU core screening system 100 selects a core combination that further limits the number of performance cores and efficient cores S250.

[0138] Although the present invention has been described with reference to some embodiments of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims. For example, embodiments of the present disclosure have been described assuming a CPU core screening system. However, it may be equally applied to those situations where the cause of the degradation of the user's computer performance is analyzed and diagnosed, and solutions may be suggested based on the diagnostic results. Therefore, the technical overview of the present disclosure is limited only by the appended claims.

[0139] [Description of Reference Signs]

[0140] 100: CPU core screening system

[0141] 110: Input unit

[0142] 120: Diagnostic Unit

[0143] 130: Screening unit

[0144] 140: Verification Unit

Claims

1. A method for screening CPU cores, comprising: The step of receiving system data of a user's computer; The step of diagnosing the user computer by comparing the received system data with average performance values ​​of the same model as the user computer; A step of screening a combination of kernels so as to achieve the average performance value of the same model as the user computer by accessing the system of the user computer and excluding or executing operations of certain kernels using the diagnostic data of the user computer; The steps of applying the filtered kernel combination to the user computer and receiving system data of the user computer to which the filtered kernel combination is applied; as well as The step of comparing the system data of the user computer to which the filtered kernel combination is applied with the average performance value of the same model as the user computer to check whether the operation of the filtered kernel combination is efficient.

2. The method for screening CPU cores according to claim 1, wherein the number of performance cores (P-cores) and high-efficiency cores (E-cores) is further limited unless, in a verification step of checking whether the computing power of the screened core combination is efficient, the screened core combination does not reach the average performance value of the same model as the user computer.

3. The method for screening CPU cores according to claim 1, wherein the system data comprises at least one of throughput, speed, temperature and utilization of the CPU.

4. The method for screening CPU cores according to claim 1, wherein the step of diagnosing the user computer is performed by comparing the received system data with an average performance value of the same model as the user computer, and diagnosing at least one of the following causes: parallel distribution of cores, hyperthreading of multiple cores, and core migration that may cause performance degradation of the user computer.

5. The method for screening CPU cores according to claim 1, wherein the step of screening the core combination is determined based on a result of diagnosing the user computer by comparing the received system data with an average performance value of the same model as the user computer: Filtering kernels by changing the BIOS settings of the user's computer to exclude or enforce certain kernel operations; or The kernels are screened by using a kernel control assembler capable of controlling the CPU by excluding or executing at least one of a hyperthread, a performance kernel, or a high-efficiency kernel.

6. The method for screening CPU cores according to claim 5, wherein the core control assembler directly screens the CPU cores of the user computer when screening the core combination without accessing the BIOS setting.

7. A system for screening CPU cores, comprising: An input unit, the input unit receiving system data of a user's computer; a diagnosis unit configured to diagnose the user computer by comparing the received system data with an average performance value of a model identical to that of the user computer; a screening unit that accesses the system of the user computer and screens a kernel combination so as to achieve the average performance value by excluding or executing operations of certain kernels based on the result of the diagnosis unit, and applies the screened kernel combination to the user computer; as well as A verification unit compares the system data of the user computer to which the screened kernel combination is applied with the average performance value of the user computer to check whether computing power is efficient.

8. The system for screening CPU cores according to claim 7, wherein the diagnosis unit diagnoses at least one of the following problems: an increase in temperature; a decrease in speed; and a decrease in utilization due to core migration. 9 . The system for screening CPU cores according to claim 7 , wherein the diagnosis unit diagnoses a throughput inversion caused by at least one of hyperthreading of multiple cores or parallel distribution of cores.

10. The system for screening CPU cores according to claim 7, wherein the screening unit accesses the system of the user computer based on the result of the diagnosis unit, and changes BIOS settings by excluding or executing operations of certain cores to screen the cores.

11. The system for screening CPU cores according to claim 7, wherein the screening unit accesses the system of the user computer based on the result of the diagnosis unit, and screens the cores by excluding or executing at least one of hyperthreading, performance cores, or high-efficiency cores using a core control assembler capable of controlling the CPU with access to BIOS settings.

12. The system for screening CPU cores according to claim 7, wherein the verification unit compares the system data of the user computer to which the screened core combination is applied with the average performance value of the user computer to check whether the computing power of the screened core combination is efficient.

13. The system for screening CPU cores according to claim 7, wherein if the verification unit determines that the screened core combination fails to reach the average performance value of the user computer, the screening unit selects the core combination again; And wherein if the verification unit determines that the screened kernel combination successfully achieves the average performance value of the user computer, the screening unit provides its result to the user through the user computer.

Images