Calling Method, Device, Electronic Device and Storage Medium of Chip Verification Platform

Abstract

The present application provides a method, apparatus, electronic device and computer-readable storage medium for calling a chip verification platform. By compiling and running a software language calling program, there are software method interfaces encapsulated in various software languages in a preset compatible link library. A matching software method interface is determined for a calling function to be executed in the software language calling program. Then, by determining the matching software method interface with the calling function, the corresponding verification link file is called for execution, and the execution result is output as the return value of the calling function. Through the software language calling program, the execution result of the verification link file after the encapsulation of the functional method of the chip verification platform is obtained. The call is changed from being made through a hardware description language to being made through a software language calling program, reducing the learning cost of the hardware description language with high learning complexity and lowering the difficulty of chip verification learning.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular, to a method, device, electronic device, and computer-readable storage medium for calling a chip verification platform. Background Art

[0002] Chip verification is very important in integrated circuit design, aiming to confirm that the chip design meets the specification requirements.

[0003] For chip verification, it is usually implemented using a chip verification framework, which is used to organize the test environment, generate test data, control simulation, and collect and analyze simulation results.

[0004] However, the chip verification framework is based on a hardware description language, with high syntax complexity and high language learning cost, resulting in a large learning difficulty for chip verification. Summary of the Invention

[0005] Embodiments of this application provide a method, device, electronic device, and computer-readable storage medium for calling a chip verification platform to solve the problems in the related art.

[0006] In a first aspect, embodiments of this application provide a method for calling a chip verification platform, the method including:

[0007] Compiling and running a software language call program; the software language call program is written with call functions required for chip verification;

[0008] During the running of the software language call program, determining a matching software method interface for the call function to be executed from a preset compatible link library; the compatible link library includes software method interfaces encapsulated in various software languages and verification link files corresponding one-to-one to the software method interfaces, the software method interfaces are used to call the corresponding verification link files, and the verification link files are files obtained by encapsulating the functional method of the chip verification platform;

[0009] Calling the corresponding verification link file in the compatible link library through the software method interface matching the call function for execution to obtain an execution result;

[0010] Outputting the execution result as the return value of the call function until the execution of all call functions is completed.

[0011] In a second aspect, embodiments of this application provide a device for calling a chip verification framework, the device including:

[0012] A compilation module for compiling and running a software language call program; the software language call program encapsulates call functions required for chip verification, and the call functions are written in a software language;

[0013] A linking module for determining a matching software method interface for a call function to be executed from a preset compatible link library during the execution of the software language call program; the compatible link library includes software method interfaces encapsulated in various software languages and corresponding verification link files, the software method interfaces are used to call the verification link files, and the verification link files are obtained by encapsulating the methods of the chip verification platform;

[0014] An execution module for executing by calling the corresponding verification link file in the compatible link library through the software method interface to obtain an execution result;

[0015] An output module for outputting the execution result as the return value of the call function until the execution of all call functions is completed.

[0016] In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a memory, the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, it implements the steps of one or more of the methods in the embodiments of the present application.

[0017] In a fourth aspect, an embodiment of the present application provides a readable storage medium, when the instructions in the readable storage medium are executed by the processor of an electronic device, the electronic device can execute one or more of the methods in the embodiments of the present application.

[0018] In the embodiments of the present application, by compiling and running a software language call program, there are software method interfaces encapsulated in various software languages in a preset compatible link library, and a matching software method interface is determined for the call function to be executed in the software language call program, so that software language call programs written in various software languages can call the corresponding software method interfaces, achieving the effect of being compatible with various software languages. Then, through the software method interface determined to match the call function, the corresponding verification link file is called for execution, and the execution result is output as the return value of the call function. Through the software language call program, the execution result of the verification link file after the encapsulation of the function method of the chip verification platform is obtained, so that the function method of the chip verification platform can be called not only through a hardware description language, but is changed from being called through a hardware description language to being called through a software language call program, reducing the learning cost of the hardware description language with high learning complexity and lowering the difficulty of chip verification learning.

[0019] The above description is only an overview of the technical solution of the present application. In order to better understand the technical means of the present application, it can be implemented according to the content of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the specific embodiments of the present application are given below. Brief Description of the Drawings

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0021] Figure 1 is a flowchart of the steps of a method for calling a chip verification platform provided by an embodiment of the present application;

[0022] Figure 2 is a flowchart of the steps of another method for calling a chip verification platform provided by an embodiment of the present application;

[0023] Figure 3 is an architecture diagram of a method for calling a chip verification framework provided by an embodiment of the present application;

[0024] Figure 4 is a block diagram of a device for calling a chip verification platform provided by an embodiment of the present application;

[0025] Figure 5 is a block diagram of an electronic device provided by an embodiment of the present invention;

[0026] Figure 6 is a block diagram of another electronic device provided by another embodiment of the present invention. Detailed Description of the Embodiments

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts fall within the scope of protection of the present application.

[0028] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of this application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the description and claims is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. In the embodiments of this application, the term "a plurality of" refers to two or more, and other quantifiers are similar.

[0029] Integrated circuits are the core of microprocessors and multi-core processors and can be used to control computers or some electronic products used in daily life to support the realization of the functions of electronic products in aspects such as communication, transportation, and production, meeting people's usage needs.

[0030] For many electronic products, it is necessary to design integrated circuits according to specific usage functions, establish an interconnection line model between electronic devices, and place all devices and interconnection lines on a semiconductor substrate material. These components are placed on a single silicon substrate through semiconductor device manufacturing processes, thereby forming a circuit.

[0031] For electronic products with different functions, it is necessary to specify the functions of the systems and modules in the integrated circuit, and write a technical specification (spec, specification) according to the required functions. A spec is a document similar to a manual written when designing and verifying a chip, which is used to describe in detail the functions, performance, and other related characteristics of the chip or its components, ensuring that designers can accurately understand and implement the required design functions.

[0032] Designers interpret the spec and use a hardware description language to write the circuit design to obtain a circuit design file to be tested. The circuit design file to be tested can be used to describe the constituent units of the circuit, the mutual connection relationships between the constituent units, etc. At the same time, the verification personnel sort out the characteristics to be verified according to the spec, refine the test points according to the characteristics to be verified to ensure the coverage of the test structure and functions. After the verification plan is designed, a verification environment, reference model, and verification script are built, and the device under test (DUT) is covered one by one according to the test points, and a verification report is generated, and finally the design defects are found and repaired.

[0033] When verifying the DUT, a general chip verification platform can be built, and test stimuli for testing can be generated. The test stimuli are sent to the DUT and the reference model. By detecting the output of the DUT, the detected output is compared with the output of the reference model. Thus, it can be judged whether there are defects in the design. The chip verification platform is usually built on the basis of a hardware description language, with high syntax complexity and limited resources compared to other software programming languages, so it is difficult to learn, making chip verification somewhat challenging.

[0034] Figure 1 , which is the step flowchart of a method for calling a chip verification platform provided by an embodiment of the present application. As Figure 1 shown, the method may include:

[0035] Step 101, compile and run the software language calling program.

[0036] In the embodiment of the present application, call functions required for chip verification are written in the software language calling program. The software language is a type of language used to create programs and instructions for interacting with computer hardware, and refers to a high-level programming language used to write application programs and services. It abstracts the complexity of the hardware and simplifies program design. Using the software language to write the software language calling program, since there are many categories of software languages, users can write according to the software language they are good at. Moreover, the software language has a huge ecosystem, including rich libraries, frameworks, development tools and community support. These resources greatly improve the productivity of developers and are also friendly in terms of the learning cost. For example, common software languages include Python, Java, GO, C#, etc.

[0037] In addition, the chip verification platform is usually built on the basis of a hardware description language. The purpose of the hardware programming language is to precisely control the behavior of the hardware and perform management tasks on the hardware resources. The hardware language allows designers to describe and simulate the behavior of electronic components, and these languages usually play a crucial role in digital logic design, microprocessor design and embedded systems.

[0038] In some embodiments, the chip verification platform can be built based on the Universal Verification Methodology (UVM). UVM is a set of class libraries built using the SystemVerilog language to implement a verification methodology based on coverage-driven stimulus random constraints. UVM aims to unify and standardize the verification specifications in the industry. In this step, a UVM canvas can be created in the building interface, and the verification platform structure can be built on the UVM canvas.

[0039] Step 102, during the process of running the software language calling program, determine a matching software method interface for the calling function to be executed from a preset compatible link library.

[0040] In the embodiment of the present application, the compatible link library includes software method interfaces encapsulated in various software languages and verification link files corresponding one-to-one with the software method interfaces. The software method interfaces are encapsulated through various software languages, so as to adapt to software language calling programs written in different software languages, realize the use of a unified calling function when writing programs in different software languages, determine a matching software method interface for the calling function, simplify the complex process of various software languages calling software method interfaces, improve the compatibility of the compatible link library for various software languages, simplify the adaptation work of multi-language calls. At the same time, the compatible link library is used for a software language calling program written in a software language, and a file obtained by encapsulating the functional function method of the chip verification platform is called, so as to realize the use of a software language to call a chip verification platform based on a hardware description language, avoid the verifier directly using a hardware description language to build a verification environment, reduce the requirement for the verifier's proficiency in the hardware description language, enable the verifier to master a software language with a lower learning cost without spending a lot of learning costs on learning the hardware description language, and reduce the difficulty of chip verification.

[0041] For example, the compatible link library exposes a calling function A externally. Each software language calling program only needs to execute the calling function A, and finding a matching software method interface according to the software language used only needs to be completed by the compatible link library. For the verifier, only the software language needs to be used to execute the calling function A, without considering the adaptability problems caused by different writing styles of various software languages.

[0042] Step 103, call the corresponding verification link file in the compatible link library through the software method interface matching the calling function for execution to obtain an execution result.

[0043] In the embodiment of the present application, the software method interface is adaptively adjusted according to the software language used by the verifier. The software method interfaces encapsulated in multiple software languages are used to call the same verification link file. Through the software method interface matching the calling function, the corresponding verification link file can be called. The verification link file is a file obtained by encapsulating the functional function method of the chip verification platform. Executing the verification link file can drive the functional function method of the chip verification platform, so as to obtain the execution result of the functional function method of the chip verification platform without writing a test program in a hardware description language.

[0044] For example, when the calling function A is executed, the calling function A encapsulates different interfaces such as A.a, A.b, A.c, A.d, etc. according to different software languages. According to the software language category used by the software language calling program, the corresponding interface such as A.c is used to call the corresponding verification link file for execution, and finally the execution result is obtained.

[0045] Step 104, output the execution result as the return value of the calling function until the execution of all calling functions is completed.

[0046] In the embodiment of the present application, by executing the verification link file, the execution result is obtained, and the execution result is output as the return value of the calling function. In the process of obtaining the execution result, the chip verification process is built through the software language, and the execution result of the function method of the chip verification platform based on the hardware description language is obtained, reducing the use of the hardware description language in chip verification, thereby reducing the learning requirements of the verification personnel for the hardware description language. Instead, a software language with a lower learning cost is adopted to drive the execution of the function method of the chip verification platform, and the same execution result is obtained, so that the learning cost of the verification personnel for the hardware description language in chip verification is reduced, and more energy is invested in the formulation of the chip verification method. At the same time, the link library is compatible with various software languages, so that more R & D personnel proficient in other software languages can also participate in the chip verification work.

[0047] In summary, in the embodiment of the present application, by compiling and running the software language calling program, the software method interfaces encapsulated by various software languages are available in the preset compatible link library. A matching software method interface is determined for the calling function to be executed in the software language calling program, so that the software language calling programs written in various software languages can call the corresponding software method interfaces to achieve the effect of being compatible with various software languages. Then, by determining the matching software method interface with the calling function, the corresponding verification link file is called for execution, and the execution result is output as the return value of the calling function. Through the software language calling program, the execution result of the verification link file after encapsulating the function method of the chip verification platform is obtained, so that the calling of the function method of the chip verification platform can no longer be achieved only through the hardware description language. It is changed from being called through the hardware description language to being called by the software language calling program, reducing the learning cost of the hardware description language with high learning complexity and reducing the difficulty of chip verification learning.

[0048] Figure 2 , is the specific step flow chart of a calling method for a chip verification platform provided by the embodiment of the present application, as Figure 2 shown. The method may include:

[0049] Step 201, compile and run the software language calling program.

[0050] This step can specifically refer to step 101 described above, and will not be elaborated here.

[0051] Step 202: During the process of running the software language call program, identify the target software language category of the software language call program.

[0052] In the embodiment of the present application, during the process of running the software language call program, identifying the target software language category of the software language call program can make compatibility adjustments for the target software language category. For example, call the function interface encapsulated by the target software language category.

[0053] In some embodiments, the target software language category of the software language call program can be determined by identifying the file type in the software language call program. For example, files written in Python have a file suffix of.py, files written in JavaScript have a file suffix of.js, and files written in C language have a file suffix of.c.

[0054] Optionally, step 202 can specifically include:

[0055] Sub-step 2021: During the process of running the software language call program, allocate a coroutine to each of the call functions to execute the call functions.

[0056] Among them, during the process of running the software language call program, the execution of each call function is divided into two types: blocking transmission and non-blocking transmission. Blocking transmission means that when the transmission operation starts, the call function will wait for the operation to complete, that is, after receiving the execution result, it will continue to execute the subsequent program. Non-blocking transmission allows the call function to be in a suspended state and continue to execute the subsequent program without waiting for the completion of data transmission.

[0057] In addition, when using a software language for blocking transmission, when the call function starts to execute, if it matches the corresponding software method interface and executes the corresponding verification link file, and there is a problem with the execution of the verification link file, it will cause the call function to be unable to receive the return value, resulting in the call function being unable to end and unable to continue executing the subsequent program. Therefore, due to the differences between software languages and hardware description languages, deadlock problems are likely to occur.

[0058] In the embodiments of the present application, a coroutine is allocated to each calling function for task execution. A coroutine is an execution unit that is lighter than a thread and can collaborate in multitasking. The core feature of a coroutine is that it can explicitly suspend and resume the control flow, enabling a function to pause during execution and continue later. This provides a very efficient concurrent processing method, allowing each calling function to execute in a coroutine. When a calling function cannot end, it will not affect the execution of other calling functions.

[0059] Sub-step 2022: When the calling function is blocked within the coroutine, suspend the execution of the calling function in the current coroutine and switch to another coroutine to execute the calling function in the other coroutine.

[0060] In the embodiments of the present application, when the calling function in the current coroutine is blocked, due to the characteristics of the coroutine, the calling function in the current coroutine can be put into a suspended state, and the calling function in another coroutine can be switched to execute. Therefore, even if the current calling function is blocked, it will not affect the execution of other calling functions, avoiding the occurrence of deadlock problems.

[0061] For example, in the process of running a software language call program, there are calling function a and calling function b to be executed. The execution order of calling function a is before that of calling function b. So when calling function a is blocked, the process cannot continue to advance and thus calling function b cannot be executed, causing a deadlock problem. After allocating coroutine A to calling function a and coroutine B to calling function b, when calling function a is blocked, suspend the execution of calling function a and start the execution of calling function b in coroutine B. Therefore, it will not block the advancement of the process and avoid the deadlock problem.

[0062] Step 203: In the software method interfaces encapsulated in various software languages in the compatibility link library, determine the target software method interface encapsulated in the target software language category and matching the calling function to be executed;

[0063] In the embodiments of the present application, the compatibility link library has software method interfaces encapsulated in various software languages, providing corresponding interfaces for the calling functions in software language call programs using different software languages to solve the compatibility problems caused by different language styles in multiple software languages, and will use the target software method interface encapsulated in the target software language category and matching the calling function to be executed.

[0064] For example, the call function A to be executed encapsulates many corresponding software method interfaces according to different software languages, such as A.py, A.js, and A.c. After obtaining that the target software language category is Python, the interface encapsulated in Python is selected, that is, the target software method interface encapsulated in the target software language category Python and matching the call function A to be executed is A.py.

[0065] Step 204, use the target software method interface as the software method interface of the call function to be executed.

[0066] In the embodiment of the present application, using the target software method interface as the software method interface of the call function to be executed can enable software language call programs using different software languages to call a unified call function, match different software method interfaces for different software languages, call the corresponding verification link file, and complete the compatibility of software method interfaces called by multiple different software languages, thus simplifying the adaptation work in interface calls.

[0067] Step 205, call and execute the corresponding verification link file in the compatibility link library through the software method interface matching the call function to obtain an execution result.

[0068] This step can specifically refer to step 103 and will not be elaborated here.

[0069] Optionally, step 205 may specifically include:

[0070] Sub-step 2051, in the process of running the process to obtain the execution result, allocate a thread to each of the verification link files for executing the verification link file;

[0071] Among them, a thread is the smallest execution unit in a computer program. It is a separate control flow during program execution. A thread is a component of a process, and a process can contain one or more threads.

[0072] In the embodiment of the present application, in the process of running the process to obtain the execution result, allocate a thread to each verification link file for executing the verification link file. When the verification link file in the current thread is blocked during execution, since each verification link file is separately allocated a thread during execution, even if the current verification link file is blocked, it will not affect the execution of other verification link files, thus avoiding the deadlock problem.

[0073] Sub-step 2052, when the verification link file is blocked in the thread, pause the execution of the verification link file in the current thread and switch to other threads to execute the verification link files in other threads.

[0074] In an embodiment of the present application, when the execution of the verification link file is blocked during the verification in the current thread, the execution of the verification link file in the current thread is paused, and the execution is switched to other threads to execute the verification link files in other threads, so as to prevent the blocking of the verification link file in the current thread from affecting the execution of other verification link files.

[0075] For example, in the process of running to obtain the execution result, there are verification link files a and b to be executed. According to the execution order, verification link file a is executed first. If no two verification link files are each assigned a thread, the two verification link files may be assigned to be executed in one thread. When verification link file a is blocked, it will also affect the execution of verification link file b. After assigning thread A to verification link file a and thread B to verification link file b, it is ensured that the two verification link files are executed in two threads. When verification link file a is blocked, thread B is switched to execute verification link file b, thus avoiding the impact on other verification link files and avoiding deadlocks.

[0076] In one embodiment, a coroutine is assigned to each process of calling the software method interface by a calling function to complete the task, and a thread is assigned to each software method interface when executing the verification link file to complete the task, so that multiple assigned coroutines each have a corresponding number of threads to execute the subsequent task process. The coroutines and threads can correspond one by one. In a process of calling the software method interface by a calling function and executing the verification link file, the operation of the remaining processes will not be affected due to the blocking of the current process, avoiding the situation of deadlocks.

[0077] Optionally, the software method interface has a clock synchronization function for keeping the clock durations of the software language calling program and the chip verification platform consistent. Step 205 may specifically include:

[0078] Sub-step 2053, through the software method interface, call the corresponding verification link file, and obtain the clock duration information required for each verification link file to run to completion.

[0079] Among them, the clock duration of the chip verification platform is the time duration used to measure the passage of time. It provides people with accurate real-time time or provides an accurate time reference for the electronic system. The clock of the chip verification platform generally uses a crystal oscillator with high precision as the clock source, while there is no hardware device of a crystal oscillator in the software language calling program as the clock source. Therefore, a method of driving by the clock of the software language calling the chip verification platform is required.

[0080] In an embodiment of the present application, when calling the corresponding verification link file, the clock duration information required for each verification link file to complete running is obtained, so as to ensure that the software language call program can obtain the clock duration information required for the execution of the chip verification platform function method.

[0081] Sub-step 2054: According to the clock duration information, call the clock synchronization function in the software method interface.

[0082] In an embodiment of the present application, according to the clock duration information, by calling the clock synchronization function in the software method interface, the clock duration information is controlled from the software language call program, so as to avoid the situation that the software language call program does not have a hardware device with a crystal oscillator as the clock source, resulting in an error in the execution time disagreement between the software language call program and the chip verification platform function method.

[0083] For example, the execution of the chip verification platform function method requires 2 cycles, and the call function in the software language call program needs to receive the execution result of the verification link file encapsulated by the chip verification platform function method after 2 cycles. If the time is not unified, the callback function cannot determine when the execution result appears, resulting in an error of being unable to obtain the return value.

[0084] Optionally, sub-step 2054 may specifically include:

[0085] Sub-step 20541: In the process of calling the clock synchronization function in the software method interface, allocate a coroutine for the execution of each called clock synchronization function.

[0086] In an embodiment of the present application, by allocating a coroutine for the execution of each clock synchronization function, it is avoided that the clock synchronization function is blocked during execution, affecting the execution of other clock synchronization functions and causing deadlocks, ultimately resulting in inconsistent clock durations between the software language call program and the chip verification platform.

[0087] Sub-step 20542: When the clock synchronization function is blocked within the coroutine, pause the execution of the clock synchronization function of the current coroutine and switch to other coroutines to execute the clock synchronization functions in other coroutines.

[0088] In an embodiment of the present application, when the current clock synchronization function is blocked, pause the clock synchronization function of the current coroutine and switch to other coroutines to execute the clock synchronization functions in other coroutines. Even if the clock synchronization function of the current coroutine is blocked, it will not affect the execution of the clock synchronization functions in other coroutines, avoiding the deadlock problem and ensuring the consistency of the clock durations between the software language call program and the chip verification platform.

[0089] For example, in the process of calling the clock synchronization function in the software method interface, there are clock synchronization function a and clock synchronization function b to be executed. The execution order of clock synchronization function a is before that of clock synchronization function b. Coroutine A is allocated to clock synchronization function a, and coroutine B is allocated to clock synchronization function b. When clock synchronization function a is blocked, the execution of clock synchronization function a in coroutine A is paused, and the execution of clock synchronization function b in coroutine B is started, avoiding the deadlock problem and ensuring that the clock durations of the software language calling program and the chip verification platform are the same.

[0090] Sub-step 2055: Through the clock synchronization function, call the clock driving function deployed in the chip verification platform to control the clock driving function to perform clock control according to the clock duration information, so as to keep the clock durations of the software language calling program and the chip verification platform the same.

[0091] In the embodiment of the present application, the clock driving function deployed in the chip verification platform is called through the clock synchronization function for clock control, so as to keep the clock durations of the software language calling program and the chip verification platform the same.

[0092] For example, when the clock duration information is 2 cycles, the clock synchronization function is called for the first time. Through the clock synchronization function, the clock driving function is called to drive the clock duration for one cycle. After the first call of the clock synchronization function is completed, the clock synchronization function is called for the second time. Through the clock synchronization function, the clock driving function is called to drive the clock duration for one cycle, so as to realize the driving of the clock duration for 2 cycles and ensure that the clock durations of the software language calling program and the chip verification platform are the same.

[0093] Optionally, sub-step 2055 may specifically include:

[0094] Sub-step 20551: In the process of calling the clock driving function deployed in the chip verification platform, allocate a thread for the execution of each clock driving function;

[0095] In the embodiment of the present application, in the process of calling the clock driving function deployed in the chip verification platform, a thread is allocated for the execution of each clock driving function, so as to avoid the problem that when two clock driving functions are in the same thread, due to the blocking of the clock driving function with higher priority, all the clock driving functions in the thread cannot continue to proceed, resulting in the situation that the clock durations of the software language calling program and the chip verification platform are inconsistent.

[0096] Sub-step 20552: When the clock driving function is blocked in the thread, pause the execution of the clock driving function in the current thread and switch to another thread to execute the clock driving function in the other thread.

[0097] In an embodiment of the present application, when the clock promotion function in the current thread is blocked, the execution of the clock promotion function in the current thread is paused and switched to another thread to execute the clock promotion function in the other thread, so as to realize that when the clock promotion function in the current thread is blocked, since there is no other clock promotion function in the current thread, it will not be affected by the occurring blockage. After switching to the thread to be executed, other clock promotion functions can still be executed normally, thus ensuring that the clock durations of the software language call program and the chip verification platform are consistent.

[0098] As Figure 3 shown is the architecture diagram of the chip verification framework call method. When the calling function T1 calls the corresponding software method interface, a coroutine 1 is allocated for the calling function to execute the task, and when the clock synchronization function Step(1) in the software method interface is called, a thread 2 is allocated for the execution of the clock synchronization function Step(1). When the software method interface calls the corresponding verification link file, thread 1 is allocated for the execution of the current task, and thread 2 is allocated for the task of calling the clock promotion function by the clock synchronization function Step(1). During the execution of the calling function T1, a separate coroutine is allocated for the calling function T2 to execute the task to avoid deadlock with task T1. When the clock duration required for the execution of the verification link file ends, the execution result is returned to the calling function T1 and the coroutine 1, coroutine 2, thread 1, and thread 2 are released.

[0099] Sub-step 2056, after the clock synchronization function is called, obtain the execution result of the verification link file.

[0100] Optionally, sub-step 2056 may specifically include:

[0101] Sub-step 20561, when the clock synchronization function is called and the verification link file is executed, use the return value after execution as the call result;

[0102] In an embodiment of the present application, when the clock synchronization function is called, it indicates that the clock duration of the calling function of the software language call program has ended. At this time, the verification link file encapsulated by the function method of the chip verification platform also just finishes execution, and at this time, the execution result returned by the verification link file can be obtained.

[0103] Sub-step 20562, when the clock synchronization function is called and the verification link file is not executed, use the timeout error message as the call result.

[0104] In the embodiment of the present application, when the clock synchronization function call is completed but the verification link file does not return a value, it indicates that the call execution fails and the return value of the verification link file execution is not received. At this time, the timeout error message is used as the call result.

[0105] Step 206, output the execution result as the return value of the call function until the execution of all call functions is completed.

[0106] This step can specifically refer to Step 104 and will not be elaborated here.

[0107] In summary, in the embodiment of the present application, by compiling and running a software language call program, there are software method interfaces encapsulated in various software languages in a preset compatible link library. A matching software method interface is determined for the call function to be executed in the software language call program, so as to enable the software language call programs written in various software languages to call the corresponding software method interfaces, achieving the effect of being compatible with various software languages. Then, by determining a matching software method interface with the call function and sending a clock synchronization function, the corresponding verification link file and clock driving function are called for execution, and the execution result is output as the return value of the call function. Through the software language call program, the execution result of the verification link file after the encapsulation of the function method of the chip verification platform is obtained, and the clock driving of the chip verification platform is promoted through the software language call program, making the clock information unified, compensating for the defect that there is no clock source in the software language call program. In addition, multiple threads are allocated for the calls between functions, avoiding the deadlock problem caused by the differences between software languages and hardware description languages. When calling the function method of the chip verification platform, it is no longer only possible to be implemented through the hardware description language. It has changed from being called through the hardware description language to being called by the software language call program, reducing the learning cost of the hardware description language with high learning complexity and lowering the difficulty of chip verification learning.

[0108] Figure 4 It is a block diagram of a chip verification framework call device provided by an embodiment of the present application. The device includes:

[0109] A compilation module 301, configured to compile and run a software language call program; the software language call program encapsulates call functions required for chip verification, and the call functions are written in a software language.

[0110] A link module 302, which is used to determine a matching software method interface for a call function to be executed from a preset compatible link library during the execution of the software language call program; the compatible link library includes software method interfaces encapsulated in various software languages and corresponding verification link files, the software method interfaces are used to call the verification link files, and the verification link files are obtained by encapsulating the methods of the chip verification platform.

[0111] An execution module 303, which is used to execute by calling the corresponding verification link file in the compatible link library through the software method interface to obtain an execution result.

[0112] An output module 304, which is used to output the execution result as the return value of the call function until the execution of all call functions is completed.

[0113] Optionally, the link module 302 may specifically include:

[0114] An identification sub-module, which is used to identify the target software language category of the software language call program during the execution of the software language call program.

[0115] A matching sub-module, which is used to determine a target software method interface encapsulated in the target software language category and matching the call function to be executed among the software method interfaces encapsulated in various software languages in the compatible link library.

[0116] A calling sub-module, which uses the target software method interface as the software method interface of the call function to be executed.

[0117] Optionally, the link module 302 may specifically include:

[0118] A coroutine sub-module, which is used to allocate a coroutine for each call function to execute the call function during the process of executing the software language call program.

[0119] A first anti-blocking sub-module, which is used to pause the execution of the call function of the current coroutine and switch to other coroutines to execute the call functions in the other coroutines when the call function is blocked within the coroutine.

[0120] Optionally, the execution module 303 may specifically include:

[0121] A thread sub-module, which is used to allocate a thread for each verification link file to execute the verification link file during the process of obtaining the execution result.

[0122] The second anti-blocking sub-module is used to pause the execution of the verification link file of the current thread and switch to other threads to execute the verification link files in other threads when the verification link file is blocked in the thread.

[0123] Optionally, the execution module 303 may specifically include:

[0124] The clock duration sub-module is used to call the corresponding verification link file through the software method interface and obtain the clock duration information required for each verification link file to run to completion.

[0125] The clock synchronization sub-module is used to call the clock synchronization function in the software method interface according to the clock duration information.

[0126] The clock promotion sub-module is used to call the clock promotion function deployed in the chip verification platform through the clock synchronization function to control the clock promotion function to perform clock control according to the clock duration information, so as to keep the clock duration of the software language call program and the chip verification platform consistent.

[0127] The clock end sub-module is used to obtain the execution result of the verification link file after the clock synchronization function is called.

[0128] Optionally, the clock end sub-module may specifically include:

[0129] The normal return unit is used to use the return value after execution as the call result when the clock synchronization function is called and the verification link file is executed.

[0130] The abnormal return unit is used to use the timeout error information as the call result when the clock synchronization function is called and the verification link file is not executed.

[0131] Optionally, the clock synchronization sub-module may specifically include:

[0132] The coroutine unit is used to allocate a coroutine for the execution of each clock synchronization function called in the process of calling the clock synchronization function in the software method interface.

[0133] The first anti-blocking unit is used to pause the execution of the clock synchronization function of the current coroutine and switch to other coroutines to execute the clock synchronization functions in other coroutines when the clock synchronization function is blocked within the coroutine.

[0134] Optionally, the clock promotion sub-module may specifically include:

[0135] A thread unit is used to allocate a thread for the execution of each of the clock driving functions in the process of calling the clock driving functions deployed in the chip verification platform.

[0136] A second anti-blocking unit is used to pause the execution of the clock driving function of the current thread and switch to another thread to execute the clock driving function in the other thread when the clock driving function is blocked in the thread.

[0137] In summary, in the embodiments of the present application, by compiling and running a software language call program, there are software method interfaces encapsulated in various software languages in a preset compatible link library, and a matching software method interface is determined for the call function to be executed in the software language call program, so that software language call programs written in various software languages can call the corresponding software method interfaces to achieve the effect of being compatible with various software languages. Then, by determining a matching software method interface with the call function, the corresponding verification link file is called for execution, and the execution result is output as the return value of the call function. Through the software language call program, the execution result of the verification link file after the encapsulation of the function method of the chip verification platform is obtained, so that the call of the function method of the chip verification platform can no longer be realized only through the hardware description language. It is changed from being called through the hardware description language to being called by the software language call program, reducing the learning cost of the hardware description language with high learning complexity and reducing the difficulty of chip verification learning.

[0138] For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple. For the relevant parts, refer to the partial description of the method embodiments.

[0139] The embodiments in this specification are all described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0140] Regarding the device in the embodiments, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated here.

[0141] The embodiments of the present application provide a data row protection device for a dynamic random access memory, including a memory and more than one program, where the more than one program is stored in the memory and is configured to be executed by more than one processor. The more than one program includes the method described in the one or more embodiments.

[0142] Figure 5It is a block diagram of an electronic device 600 shown according to an exemplary embodiment. For example, the electronic device 600 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0143] Referring to Figure 5 , the electronic device 600 may include one or more of the following components: a processing component 602, a memory 604, a power supply component 606, a multimedia component 608, an audio component 610, an input / output (I / O) interface 612, a sensor component 614, and a communication component 616.

[0144] The processing component 602 generally controls the overall operation of the electronic device 600, such as operations associated with display, telephone calls, data communication, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to complete all or part of the steps of the described method. In addition, the processing component 602 may include one or more modules to facilitate the interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate the interaction between the multimedia component 608 and the processing component 602.

[0145] The memory 604 is used to store various types of data to support the operation of the electronic device 600. Examples of such data include instructions for any application or method operating on the electronic device 600, contact data, phone book data, messages, pictures, multimedia, etc. The memory 604 may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, a magnetic disk, or an optical disk.

[0146] The power supply component 606 provides power to various components of the electronic device 600. The power supply component 606 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 600.

[0147] The multimedia component 608 includes a screen that provides an output interface between the electronic device 600 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can sense not only the boundaries of touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operation. In some embodiments, the multimedia component 608 includes a front camera and / or a rear camera. When the electronic device 600 is in an operating mode, such as a shooting mode or a multimedia mode, the front camera and / or the rear camera can receive external multimedia data. Each of the front camera and the rear camera can be a fixed optical lens system or have a focal length and optical zoom capabilities.

[0148] The audio component 610 is used to output and / or input audio signals. For example, the audio component 610 includes a microphone (MIC) that is used to receive external audio signals when the electronic device 600 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals can be further stored in the memory 604 or sent via the communication component 616. In some embodiments, the audio component 610 further includes a speaker for outputting audio signals.

[0149] The I / O interface 612 provides an interface between the processing component 602 and a peripheral interface module, which can be a keyboard, a click wheel, buttons, etc. These buttons can include, but are not limited to: a home button, a volume button, a power button, and a lock button.

[0150] The sensor component 614 includes one or more sensors for providing status assessments of various aspects of the electronic device 600. For example, the sensor component 614 can detect the on / off state of the electronic device 600, the relative positioning of components, such as the display and the keypad of the electronic device 600. The sensor component 614 can also detect a change in the position of the electronic device 600 or a component of the electronic device 600, the presence or absence of user contact with the electronic device 600, the orientation or acceleration / deceleration of the electronic device 600, and the temperature change of the electronic device 600. The sensor component 614 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor component 614 can also include a light sensor, such as a CMOS or a CCD image sensor, for use in imaging applications. In some embodiments, the sensor component 614 can further include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0151] The communication component 616 is used to facilitate communication between the electronic device 600 and other devices in a wired or wireless manner. The electronic device 600 can access a communication standard-based wireless network, such as WiFi, a carrier network (such as 2G, 3G, 4G, or 5G), or a combination thereof. In an exemplary embodiment, the communication component 616 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 616 further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0152] In an exemplary embodiment, the electronic device 600 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for implementing the methods provided in the embodiments of the present application.

[0153] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 604 including instructions that can be executed by a processor 620 of the electronic device 600 to complete the method. For example, the non-transitory storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0154] Figure 6 It is a block diagram of an electronic device 700 shown according to an exemplary embodiment. For example, the electronic device 700 can be provided as a server. Referring to Figure 6 , the electronic device 700 includes a processing component 722, which further includes one or more processors, and memory resources represented by a memory 732 for storing instructions executable by the processing component 722, such as application programs. The application programs stored in the memory 732 can include one or more modules each corresponding to a set of instructions. In addition, the processing component 722 is configured to execute instructions to perform the methods provided in the embodiments of the present application.

[0155] The electronic device 700 may further include a power supply component 726 configured to perform power management of the electronic device 700, a wired or wireless network interface 750 configured to connect the electronic device 700 to a network, and an input / output (I / O) interface 758. The electronic device 700 may operate based on an operating system stored in the memory 732, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSD TM or the like.

[0156] An embodiment of the present application also provides a computer program product, including a computer program which, when executed by a processor, implements the method described in the embodiment.

[0157] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are only to be considered as exemplary, and the true scope and spirit of the present application are pointed out by the following claims.

[0158] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.

Claims

1. A calling method for a chip verification platform, characterized in that, The method includes: Compiling and running a software language call program; call functions required for chip verification are written in the software language call program; During the process of running the software language call program, determining a matching software method interface for a call function to be executed from a preset compatible link library; the compatible link library includes software method interfaces encapsulated in various software languages and verification link files corresponding one-to-one with the software method interfaces, the software method interfaces are used to call corresponding verification link files, and the verification link files are files obtained by encapsulating the functional function methods of the chip verification platform; Calling and executing the corresponding verification link file in the compatible link library through the software method interface matching the call function to obtain an execution result; Outputting the execution result as the return value of the call function until the execution of all call functions is completed; The software method interface has a clock synchronization function for keeping the clock durations of the software language call program and the chip verification platform consistent, and the calling and executing the corresponding verification link file in the compatible link library through the software method interface matching the call function to obtain an execution result includes: Calling the corresponding verification link file through the software method interface and obtaining the clock duration information required for each verification link file to run to completion; Calling the clock synchronization function in the software method interface according to the clock duration information; Calling the clock driving function deployed in the chip verification platform through the clock synchronization function to control the clock driving function to perform clock control according to the clock duration information, so as to keep the clock durations of the software language call program and the chip verification platform consistent; After the clock synchronization function call is completed, obtaining the execution result of the verification link file.

2. The method according to claim 1, wherein The determining a matching software method interface for a call function to be executed from a preset compatible link library during the process of running the software language call program includes: During the process of running the software language call program, identifying the target software language category of the software language call program; Determining a target software method interface encapsulated in the target software language category and matching the call function to be executed from the software method interfaces encapsulated in various software languages in the compatible link library; Taking the target software method interface as the software method interface of the call function to be executed.

3. The method according to claim 1, wherein The determining a matching software method interface for a call function to be executed from a preset compatible link library during the process of running the software language call program includes: During the process of running the software language call program, allocating a coroutine for each call function to execute the call function; When the call function is blocked within the coroutine, suspending the execution of the call function of the current coroutine and switching to other coroutines to execute the call functions in the other coroutines.

4. The method according to claim 1, wherein Invoking the corresponding verification link file in the compatible link library through the software method interface matching the calling function and obtaining an execution result, including: In the process of running the process of obtaining the execution result, allocating a thread for each of the verification link files to execute the verification link file; When the verification link file is blocked in the thread, suspending the execution of the verification link file of the current thread and switching to other threads to execute the verification link files in the other threads.

5. The method according to claim 1, characterized in that, The obtaining the execution result of the verification link file after the clock synchronization function is called, including: When the clock synchronization function is called and the verification link file is executed, using the return value after execution as the call result; When the clock synchronization function is called and the verification link file is not executed, using the timeout error message as the call result.

6. The method according to claim 1, wherein The invoking the clock synchronization function in the software method interface according to the clock duration information, including: In the process of invoking the clock synchronization function in the software method interface, allocating a coroutine for the execution of each invoked clock synchronization function; When the clock synchronization function is blocked within the coroutine, suspending the execution of the clock synchronization function of the current coroutine and switching to other coroutines to execute the clock synchronization functions in the other coroutines; The invoking the clock driving function deployed in the chip verification platform through the clock synchronization function, including: In the process of invoking the clock driving function deployed in the chip verification platform, allocating a thread for the execution of each clock driving function; When the clock driving function is blocked in the thread, suspending the execution of the clock driving function of the current thread and switching to other threads to execute the clock driving functions in the other threads.

7. A calling device for a chip verification platform, characterized in that The device includes: A compilation module for compiling and running a software language calling program; the software language calling program encapsulates calling functions required for chip verification, and the calling functions are written in a software language; A linking module for determining a matching software method interface for a calling function to be executed from a preset compatible link library during the running of the software language calling program; the compatible link library includes software method interfaces and corresponding verification link files encapsulated in various software languages, the software method interfaces are used to call verification link files, and the verification link files are files obtained by encapsulating the functional method of the chip verification platform; An execution module for invoking the corresponding verification link file in the compatible link library through the software method interface and obtaining an execution result; An output module for outputting the execution result as the return value of the calling function until the execution of all calling functions is completed; The software method interface has a clock synchronization function for keeping the clock durations of the software language calling program and the chip verification platform consistent. Invoking the corresponding verification link file in the compatible link library through the software method interface matching the calling function and obtaining an execution result, including: Through the software method interface, call the corresponding verification link file and obtain the clock duration information required for each verification link file to run to completion; According to the clock duration information, call the clock synchronization function in the software method interface; Through the clock synchronization function, call the clock driving function deployed in the chip verification platform to control the clock driving function to perform clock control according to the clock duration information, so as to keep the clock durations of the software language call program and the chip verification platform consistent; After the clock synchronization function is called, obtain the execution result of the verification link file.

8. An electronic device, characterized in that, It includes a processor and a memory, and the memory stores programs or instructions that can run on the processor. When the programs or instructions are executed by the processor, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A readable storage medium, characterized in that, When the instructions in the readable storage medium are executed by the processor of the electronic device, the electronic device is enabled to execute the method according to any one of claims 1 to 6 of the method claims.

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