A method, apparatus, device and medium for optimizing H-tree layout

Abstract

Embodiments of the present application provide a H-tree layout optimization method, device, equipment and medium, the method comprises: obtaining the initial centroid of H-tree; determining the optimization centroid according to the initial centroid of H-tree and the preset optimization model; according to the optimization centroid, determine the optimization H-tree layout; according to the optimization H-tree layout and the preset scoring rule, determine the optimization H-tree layout score; under the condition that the optimization H-tree layout score meets the preset score threshold, according to the optimization H-tree layout, determine the candidate H-tree layout; according to the candidate H-tree layout, determine whether the preset termination iteration condition is met; in the case that the candidate H-tree layout meets the preset termination iteration condition, according to the candidate H-tree layout, determine the target H-tree layout; this way helps to determine a more reasonable optimization centroid, so as to avoid the problem of global layout not optimal caused by local optimization, and can comprehensively consider the global layout factors, to ensure that the generated H-tree layout is optimal in the global.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of H-tree layout, and in particular, to an H-tree layout optimization method, device, equipment and medium. BACKGROUND

[0002] In the field of integrated circuit design, the design of clock distribution network is crucial to ensure chip performance. Among them, H-tree structure has become the preferred structure in clock distribution network due to its unique branching characteristics and efficient clock signal distribution capability. However, although H-tree has many advantages, the optimization of its layout, especially the selection of centroid, has always been a big problem in design.

[0003] Traditional centroid selection methods, such as geometric center method and weighted center method, can guide the selection of centroid to some extent, but these methods are mainly based on local information, such as node position, connection line length, etc., and do not fully consider the global layout requirements. This local consideration often leads to the generated H-tree layout not being optimal globally, which in turn causes a series of problems. For example, the delay of clock signal may increase, the deviation may increase, and the power consumption may also rise, which will seriously affect the overall performance of the chip.

[0004] Therefore, there is an urgent need for a method that can accurately evaluate the impact of different centroid selection on H-tree layout and clock signal distribution performance. This method needs to consider global information comprehensively, including but not limited to node distribution, connection line direction, signal transmission speed, etc., to effectively optimize the centroid selection of H-tree. SUMMARY

[0005] In view of the above problems, the present application embodiments are proposed to provide an H-tree layout optimization method, device, equipment and medium which can overcome the above problems or at least partially solve the above problems.

[0006] To solve the above problems, the present application embodiments disclose an H-tree layout optimization method, which comprises:

[0007] obtaining an initial centroid of an H-tree;

[0008] determining an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;

[0009] determining an optimized H-tree layout according to the optimized centroid;

[0010] determining an optimized H-tree layout score according to the optimized H-tree layout and a preset scoring rule;

[0011] under the condition that the optimized H-tree layout score meets a preset score threshold, determining a candidate H-tree layout according to the optimized H-tree layout;

[0012] determining whether a preset termination iteration condition is met according to the candidate H-tree layout;

[0013] In a case where the candidate H-tree layout meets the preset termination iteration condition, determining a target H-tree layout according to the candidate H-tree layout.

[0014] Optionally, the determining whether the preset termination iteration condition is met according to the candidate H-tree layout comprises:

[0015] determining a candidate layout score according to the candidate H-tree layout and a preset score rule;

[0016] determining a score difference value according to the candidate layout score and the preset score threshold value;

[0017] In a case where the score difference value is less than a preset difference threshold value, determining that the candidate H-tree layout meets the preset termination iteration condition.

[0018] Optionally, the method further comprises:

[0019] In a case where the score difference value is greater than or equal to the preset difference threshold value, returning to the step of determining an optimized centroid according to the initial centroid of the H-tree and a preset optimization model.

[0020] Optionally, the returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model in a case where the score difference value is greater than or equal to the preset difference threshold value comprises:

[0021] obtaining a processing number of the H-tree and a processing number threshold value;

[0022] In a case where the score difference value is greater than or equal to the preset difference threshold value and the processing number is less than the processing number threshold value, returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and updating the processing number of the H-tree;

[0023] The method further comprises:

[0024] In a case where the score difference value is greater than or equal to the preset difference threshold value and the processing number is equal to the preset processing number threshold value, determining a target H-tree layout according to the candidate H-tree layout.

[0025] Optionally, the returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model in a case where the score difference value is greater than or equal to the preset difference threshold value and the processing number is less than the processing number threshold value, and updating the processing number of the H-tree comprises:

[0026] determining a termination iteration parameter according to the processing number of the H-tree and a preset adjustment factor;

[0027] In a case where the score difference is greater than or equal to a preset difference threshold, the processing number is less than the preset processing number threshold, and the termination iteration parameter does not satisfy a preset termination iteration parameter condition, returning to a step of determining an optimized centroid according to an initial centroid of the H-tree and a preset optimization model, and updating the processing number and the termination iteration parameter of the H-tree;

[0028] The method further comprises:

[0029] In a case where the score difference is greater than or equal to a preset difference threshold, the processing number is less than the preset processing number threshold, and the termination iteration parameter satisfies a preset termination iteration parameter condition, determining a target H-tree layout according to the candidate H-tree layout.

[0030] Optionally, the method further comprises:

[0031] Obtaining a duration of the current optimized H-tree centroid and a preset update time threshold;

[0032] Updating the termination iteration parameter according to the preset adjustment factor, the duration of the current optimized H-tree centroid and the preset update time threshold.

[0033] Optionally, the determining, under a condition that the score of the optimized H-tree layout satisfies a preset score threshold, a candidate H-tree layout according to the optimized H-tree layout, comprises:

[0034] In a case where the layout score is greater than or equal to a score threshold, determining a candidate H-tree layout according to the optimized H-tree layout;

[0035] The method further comprises:

[0036] In a case where the layout score is less than a score threshold, obtaining a preset acceptance condition;

[0037] In a case where the optimized H-tree layout satisfies the preset acceptance condition, determining a candidate H-tree layout according to the optimized H-tree layout.

[0038] Optionally, the obtaining an initial centroid of the H-tree comprises:

[0039] Obtaining information of a logic unit requiring a clock signal in a design area of the H-tree; the logic unit comprises information of the H-tree root node, a clock access point and a logic unit of a component requiring a clock signal on a child node;

[0040] Generating an initial centroid of the H-tree according to the information of the logic unit.

[0041] Optionally, the obtaining an initial centroid of the H-tree comprises:

[0042] obtaining a structure of the H-tree;

[0043] determining a root node of the H-tree according to the structure of the H-tree;

[0044] determining a distribution of clock access points according to the root node of the H-tree;

[0045] determining an initial centroid of the H-tree according to the distribution of the clock access points.

[0046] In another aspect, the embodiments of the present application further disclose an H-tree layout optimization device, which comprises:

[0047] an initial centroid generation module, configured to obtain an initial centroid of an H-tree;

[0048] an optimized centroid generation module, configured to determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;

[0049] an H-tree layout generation module, configured to determine an optimized H-tree layout according to the optimized centroid;

[0050] a layout score determination module, configured to determine an optimized H-tree layout score according to the optimized H-tree layout and a preset score rule;

[0051] a candidate layout determination module, configured to determine a candidate H-tree layout according to the optimized H-tree layout under the condition that the optimized H-tree layout score meets a preset score threshold;

[0052] an iteration termination determination module, configured to determine whether a preset iteration termination condition is met according to the candidate H-tree layout;

[0053] a target layout determination module, configured to determine a target H-tree layout according to the candidate H-tree layout in the case that the candidate H-tree layout meets the preset iteration termination condition.

[0054] Optionally, the iteration termination determination module comprises:

[0055] a candidate score determination submodule, configured to determine a candidate layout score according to the candidate H-tree layout and the preset score rule;

[0056] a score difference determination submodule, configured to determine a score difference according to the candidate layout score and the preset score threshold;

[0057] a determination termination submodule, configured to determine that the candidate H-tree layout meets the preset iteration termination condition in the case that the score difference is less than a preset difference threshold.

[0058] Optionally, the device further comprises:

[0059] The iteration starting submodule is configured to, when the score difference is greater than or equal to a preset difference threshold, return to a step of determining an optimized centroid according to an initial centroid of the H-tree and a preset optimization model.

[0060] Optionally, the iteration starting submodule comprises:

[0061] The processing frequency acquisition unit is configured to acquire a processing frequency of the H-tree and a processing frequency threshold.

[0062] The iteration confirming unit is configured to, when the score difference is greater than or equal to a preset difference threshold and the processing frequency is less than the processing frequency threshold, return to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and update the processing frequency of the H-tree.

[0063] The apparatus further comprises:

[0064] The target layout determining submodule is configured to, when the score difference is greater than or equal to a preset difference threshold and the processing frequency is equal to the preset processing frequency threshold, determine a target H-tree layout according to the candidate H-tree layout.

[0065] Optionally, the iteration confirming unit further comprises:

[0066] The termination iteration parameter determining subunit is configured to determine a termination iteration parameter according to the processing frequency of the H-tree and a preset adjustment factor.

[0067] The first iteration confirming subunit is configured to, when the score difference is greater than or equal to a preset difference threshold, the processing frequency is less than the processing frequency threshold, and the termination iteration parameter does not satisfy a preset termination iteration parameter condition, return to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and update the processing frequency of the H-tree and the termination iteration parameter.

[0068] The apparatus further comprises:

[0069] The first termination iteration submodule is configured to, when the score difference is greater than or equal to a preset difference threshold, the processing frequency is less than the preset processing frequency threshold, and the termination iteration parameter satisfies a preset termination iteration parameter condition, determine the target H-tree layout according to the candidate H-tree layout.

[0070] Optionally, the apparatus further comprises:

[0071] The duration determining submodule is configured to acquire a duration of the current optimized H-tree centroid and a preset update time threshold.

[0072] The iteration termination parameter updating submodule is configured to update the iteration termination parameter according to the preset adjustment factor, the duration of the current optimized H-tree centroid, and the preset update time threshold.

[0073] Optionally, the candidate layout determining module comprises:

[0074] The first candidate layout determining submodule is configured to determine a candidate H-tree layout according to the optimized H-tree layout when the layout score is greater than or equal to a score threshold.

[0075] The device further comprises:

[0076] The acceptance condition determining submodule is configured to obtain a preset acceptance condition when the layout score is less than a score threshold.

[0077] The second candidate layout determining submodule is configured to determine a candidate H-tree layout according to the optimized H-tree layout when the optimized H-tree layout meets the preset acceptance condition.

[0078] Optionally, the initial centroid generating module comprises:

[0079] The H-tree design information obtaining submodule is configured to obtain information of a logic unit in a design region of the H-tree that needs a clock signal, wherein the logic unit comprises information of the H-tree root node, a clock access point, and a component logic unit on a child node that needs the clock signal.

[0080] The first initial centroid generating submodule is configured to generate an initial centroid of the H-tree according to the logic unit information.

[0081] Optionally, the initial centroid generating module comprises:

[0082] The H-tree structure obtaining submodule is configured to obtain a structure of the H-tree.

[0083] The H-tree root node obtaining submodule is configured to determine a root node of the H-tree according to the structure of the H-tree.

[0084] The clock access point determining submodule is configured to determine a distribution of clock access points according to the root node of the H-tree.

[0085] The second initial centroid generating submodule is configured to determine an initial centroid of the H-tree according to the distribution of the clock access points.

[0086] Correspondingly, an electronic device is disclosed, which comprises a processor, a memory, and a computer program stored in the memory and capable of running on the processor, and the computer program is executed by the processor to implement each step of the H-tree layout optimization method.

[0087] Accordingly, the embodiment of the present application discloses a computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, and the computer program is executed by a processor to implement each step of the H-tree layout optimization method.

[0088] The embodiment of the present application has the following advantages: by determining the optimization H-tree layout score according to the initial centroid of the H-tree, the preset optimization model, and the optimization H-tree layout and the preset scoring rule, the influence of different centroid selection on the overall layout of the H-tree can be more comprehensively evaluated. This global perspective helps to determine a more reasonable optimization centroid, thereby avoiding the problem of global layout optimization caused by local optimization, and in combination with the iteration condition, the embodiment can continuously adjust the layout according to the scoring result through the iterative optimization process, and further approach the global optimal solution. Through the preset optimization model and the scoring rule, the embodiment of the present application can comprehensively consider global layout factors such as the distribution of nodes and the direction of connection lines, so as to ensure that the generated H-tree layout is optimal in the global. This global consideration is incomparable to the traditional local optimization method. BRIEF DESCRIPTION OF DRAWINGS

[0089] Figure 1 is a step flow chart of an H-tree layout optimization method embodiment of the present application;

[0090] Figure 2 is a step flow chart of another H-tree layout optimization method embodiment two of the present application;

[0091] Figure 3 is a model concept diagram of a clock tree layout optimization method using a simulated annealing algorithm as an optimization model of the present application;

[0092] Figure 4 is a flow chart of an H-tree layout optimization method using a simulated annealing algorithm as an optimization model of the present application;

[0093] Figure 5 is a structure block diagram of an H-tree layout optimization device embodiment of the present application. DETAILED DESCRIPTION

[0094] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0095] Clock tree refers to the network of various clock signals derived from a clock source. In digital integrated circuits, clock signals are used to synchronize the operation of various components, ensuring that data is transmitted and processed at the correct time. The clock tree ensures that each component can obtain the required clock frequency at the correct time, thereby achieving synchronous operation. The clock distribution network, as part of the clock tree, is responsible for transmitting clock signals from the clock source to various components on the chip. A well-designed clock distribution network can ensure that the delay and skew of clock signals on all paths are as small as possible, thereby improving the stability and performance of the system.

[0096] Clock signal is a periodic digital signal used to synchronize operations in digital circuits. It is usually generated by a stable clock source such as a crystal oscillator or resonator and transmitted to various components on the chip through the clock tree and clock distribution network. The main role of the clock signal is to ensure that various components work at the correct timing, avoiding data conflicts and synchronization problems. In digital circuits, clock signals are often used to control the reading and writing operations of registers, as well as the flip-flop of triggers, etc.

[0097] H tree is a computer science and technology term announced by the National Committee for the Approval of Scientific and Technical Terms in 2018. It belongs to a special form of tree structure, extending from the center to four directions, showing a shape similar to H. H tree is often used in clock distribution networks. In the design of the clock tree, the H tree structure can effectively transmit the clock signal from the root node to the various child nodes, while maintaining the synchronization and stability of the signal. The H tree structure has hierarchy and symmetry, which gives it unique advantages in the distribution and transmission of clock signals. For example, it can reduce clock skew and delay, improve the performance and reliability of the clock tree.

[0098] Tap points are usually located at the end of each level of H tree branches, and are the access points for clock signals from the main trunk of the H tree to various leaf nodes, i.e. registers or other timing elements. The main role of the tap point is to ensure that the clock signal can be evenly distributed to all leaf nodes, thereby reducing clock skew and delay. By reasonably setting the location and number of tap points, efficient transmission and synchronization of clock signals can be achieved.

[0099] One of the core ideas of the embodiments of the present application is to use a global optimization algorithm to continuously optimize and iterate the selection of the centroid of the H tree, until the optimal centroid position of the H tree within the given H tree range is selected

[0100] Referring to Figure 1 , a step flowchart of an embodiment of an H tree layout optimization method of the present application is shown, which can specifically include the following steps:

[0101] Step 101, obtaining the initial centroid of the H tree;

[0102] In an H-tree, the centroid is a logical concept that has special significance for the distribution and transmission of clock signals. For example, it might be the node with the smallest signal delay or the node with the best signal synchronization. Therefore, finding the centroid of the H-tree within a given range and further designing tap points based on the centroid is a crucial step in the design and optimization of the H-tree.

[0103] Step 102: Determine the optimized centroid based on the initial centroid of the H-tree and the preset optimization model;

[0104] In selecting the centroid for optimization, a preset global optimization module and the generated initial centroid are used to generate the optimized centroid.

[0105] Global optimization algorithms are heuristic algorithms based on simulating the behavior of organisms in nature, aiming to find the global optimum or near-global optimum solution to an optimization problem.

[0106] In one example, the preset optimization module can be a simulated annealing algorithm model. Simulated annealing, first proposed by Metropolis et al. in 1953, is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving the optimization problem and the annealing process of a physical system, and seeks the global optimum by simulating the behavior of matter reaching its lowest energy state during solid annealing.

[0107] One method for determining the optimal centroid is to randomly generate a point within the neighborhood of the current centroid as the optimal centroid. The neighborhood range here is generally determined by experience or by business requirements; the neighborhood range here is a circle with a radius of 10 micrometers.

[0108] Step 103: Determine the optimized H-tree layout based on the optimized centroid;

[0109] The steps for generating a layout based on the centroid can be summarized as follows: First, determine the location of the H-tree centroid. Then, based on the centroid location, divide the layout space into several sub-regions. These sub-regions will be used to place the nodes and connecting lines of the H-tree. Within each sub-region, place the nodes one by one according to the structure and hierarchical relationship of the H-tree. Typically, the root node is placed at or near the centroid, and other nodes are placed layer by layer outwards. Connect the nodes of the H-tree using connecting lines to form a complete tree structure. The length and direction of the connecting lines should be optimized as much as possible to reduce signal transmission delay and interference. Finally, adjust and optimize the initially generated H-tree layout as needed. This may include adjusting the node positions, the direction and length of the connecting lines, etc., to meet specific performance requirements or constraints.

[0110] Step 104: Determine the optimized H-tree layout score based on the optimized H-tree layout and the preset scoring rules;

[0111] After determining the layout of the H-tree, the next step is to evaluate whether the generated layout meets the requirements.

[0112] In one example, the scoring rule could be: E = w1·Delay + w2·Power + w3·Aesthetics, w1 + w2 + w3 = 1, where Delay is the sum of signal delays from the centroid to each child node, using an RC delay model. Where R i For the connected resistor, C i Power is used to calculate power consumption, taking into account the resistance and current of each connection. Aesthetics: Layout aesthetics can be quantified by calculating the distances and intersections between points.

[0113] The aesthetics of an H-tree layout can be evaluated through the distance between nodes, path intersections, symmetry, and balance. The uniformity of node distances can be calculated by taking the standard deviation of the distances between all nodes; a smaller standard deviation indicates a more even distribution of nodes. Path intersections can be measured by the number of intersections between all paths; a smaller number indicates a clearer layout. Symmetry and balance can be measured by the difference in node distribution on both sides of the symmetrical H-tree; better symmetry results in a more aesthetically pleasing layout. The aesthetics of the layout can be adjusted selectively based on project requirements. Here, the aesthetics of the layout is calculated as 0.5 × (standard deviation between nodes) + 0.3 × (number of intersections) + 0.2 × (number of differences in node distribution on both sides); smaller values ​​indicate a more aesthetically pleasing layout.

[0114] The RC delay model is based on a circuit consisting of a resistor (R) and a capacitor (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, the resistor restricts the flow of current, while the capacitor stores charge. When voltage passes through these two components, charge accumulates and is released, causing changes in current and voltage in the circuit, thus producing a delay effect.

[0115] Step 105: Under the condition that the optimized H-tree layout score meets the preset score threshold, determine the candidate H-tree layout according to the optimized H-tree layout.

[0116] The calculated layout score is compared with a preset scoring threshold to determine whether the layout meets the requirements. The scoring threshold is generally designed based on business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.

[0117] Step 106: Determine whether the preset termination iteration condition is met based on the candidate H-tree layout;

[0118] The termination condition can be an iteration count condition or a scoring threshold condition, which can be designed according to business needs.

[0119] Step 107: If the candidate H-tree layout satisfies the preset termination iteration condition, determine the target H-tree layout based on the candidate H-tree layout.

[0120] Furthermore, if the candidate layout meets the requirements and the requirements for terminating the iteration, the current iteration is stopped, and the layout is output as the target H-tree layout.

[0121] This invention, through a process of determining the optimized H-tree layout score based on the initial centroid of the H-tree, a preset optimization model, and the optimized H-tree layout and preset scoring rules, can more comprehensively evaluate the impact of different centroid choices on the overall H-tree layout. This global perspective helps determine a more reasonable optimized centroid, thus avoiding the problem of suboptimal global layout caused by local optimization. Combined with iterative conditions, this embodiment allows for continuous layout adjustments based on the scoring results through an iterative optimization process, further approaching the global optimum. Through the preset optimization model and scoring rules, this invention comprehensively considers global layout factors, such as node distribution and the direction of connecting lines, to ensure that the generated H-tree layout is globally optimal. This global consideration is unparalleled by traditional local optimization methods.

[0122] Reference Figure 2 The flowchart illustrates another embodiment of the H-tree layout optimization method of the present invention, which may specifically include the following steps:

[0123] Step 201: Obtain the logic unit information that requires clock signals within the design area of ​​the H-tree; the logic unit includes: information on the logic units of the H-tree root node, clock access point, and child nodes that require clock signals;

[0124] When designing an H-tree structure, it's necessary to collect and understand information about all logic units within the design area that require clock signals. This information covers the root node of the H-tree, the clock access point, and all relevant logic units on its child nodes. This is done to ensure that the clock signal can be correctly and efficiently delivered to each logic unit, thereby meeting the design requirements of the entire circuit.

[0125] The design region refers to the specific area allocated to the H-tree structure in integrated circuit design. Logic cells are the basic building blocks of integrated circuits, used to perform logical operations (such as AND, OR, NOT, etc.).

[0126] The root node of an H-tree is the starting point of the tree and is typically the input point for clock signals. Clock access points are located on branches of the H-tree where clock signals are connected and then further distributed to child nodes. The logic units at the child nodes that require clock signals are those at the ends or middle levels of the H-tree; they directly receive clock signals to perform their functions. The information about each logic unit refers to specific details about each unit that requires a clock signal, including but not limited to: the unit's location, type, function, required clock frequency, and clock signal phase requirements.

[0127] Step 202: Generate the initial centroid of the H-tree based on the logical unit information.

[0128] Based on business needs, preset algorithms, and logical unit information, the initial centroid of the H number is generated.

[0129] In one embodiment, steps 201 and 202 may also be the following steps:

[0130] Obtain the structure of the H-tree;

[0131] To understand the overall layout and branching of an existing H-tree, one can use EDA (Electronic Design Automation) tools, ICC2 (IC Compiler II) tools, or perform manual analysis. The structure of the H-tree describes how the clock signal is distributed from the root node to each child node.

[0132] Based on the structure of the H-tree, determine the root node of the H-tree;

[0133] In an H-tree structure, the root node is usually the only node without a parent node, or the node directly connected to the clock source.

[0134] The distribution of clock access points is determined based on the root node of the H-tree;

[0135] Starting from the root node, along the branches of the H-tree, determine the location of the clock access point according to the design requirements and clock signal distribution strategy.

[0136] The initial centroid of the H-tree is determined based on the distribution of the clock access points.

[0137] In one example, given an H-tree, the structure of the H-tree can be obtained first, and the distribution of taps and the position of the root node can be further determined. Then, based on the tap information obtained from analyzing the H-tree structure, a preset clustering algorithm combined with automated tools such as ICC2 can be used to generate an initial centroid of an optimized H-tree.

[0138] In this way, embodiments of the present invention can not only generate a target layout, but also obtain an optimized H-tree layout by analyzing the layout of an existing H-tree.

[0139] Step 203: Determine the optimized centroid based on the initial centroid of the H-tree and the preset optimization model;

[0140] In selecting the centroid for optimization, a preset global optimization module and the generated initial centroid are used to generate the optimized centroid.

[0141] Global optimization algorithms are heuristic algorithms based on simulating the behavior of organisms in nature, aiming to find the global optimum or near-global optimum solution to an optimization problem.

[0142] In one example, the preset optimization module can be a simulated annealing algorithm model. Simulated annealing, first proposed by Metropolis et al. in 1953, is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving the optimization problem and the annealing process of a physical system, and seeks the global optimum by simulating the behavior of matter reaching its lowest energy state during solid annealing.

[0143] One method for determining the optimal centroid is to randomly generate a point within the neighborhood of the current centroid as the optimal centroid. The neighborhood range here is generally determined by experience or by business requirements; the neighborhood range here is a circle with a radius of 10 micrometers.

[0144] Step 204: Determine the optimized H-tree layout based on the optimized centroid;

[0145] After determining the layout of the H-tree, the next step is to evaluate whether the generated layout meets the requirements.

[0146] In one example, the scoring rule could be: E = w1·Delay + w2·Power + w3·Aesthetics, w1 + w2 + w3 = 1, where Delay is the sum of signal delays from the centroid to each child node, using an RC delay model. Where R i For the connected resistor, C i Power is used to calculate power consumption, taking into account the resistance and current of each connection. Aesthetics: Layout aesthetics can be quantified by calculating the distances and intersections between points.

[0147] The aesthetics of an H-tree layout can be evaluated through the distance between nodes, path intersections, symmetry, and balance. The uniformity of node distances can be calculated by taking the standard deviation of the distances between all nodes; a smaller standard deviation indicates a more even distribution of nodes. Path intersections can be measured by the number of intersections between all paths; a smaller number indicates a clearer layout. Symmetry and balance can be measured by the difference in node distribution on both sides of the symmetrical H-tree; better symmetry results in a more aesthetically pleasing layout. The aesthetics of the layout can be adjusted selectively based on project requirements. Here, the aesthetics of the layout is calculated as 0.5 × (standard deviation between nodes) + 0.3 × (number of intersections) + 0.2 × (number of differences in node distribution on both sides); smaller values ​​indicate a more aesthetically pleasing layout.

[0148] The RC delay model is based on a circuit consisting of a resistor (R) and a capacitor (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, the resistor restricts the flow of current, while the capacitor stores charge. When voltage passes through these two components, charge accumulates and is released, causing changes in current and voltage in the circuit, thus producing a delay effect.

[0149] Step 205: Determine the optimized H-tree layout score based on the optimized H-tree layout and the preset scoring rules;

[0150] The calculated layout score is compared with a preset scoring threshold to determine whether the layout meets the requirements. The scoring threshold is generally designed based on business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.

[0151] In one example, the scoring threshold can be preset according to business requirements, or it can be dynamically adjusted based on the score of the layout result of this optimization.

[0152] Step 206: Under the condition that the optimized H-tree layout score meets the preset score threshold, determine the candidate H-tree layout according to the optimized H-tree layout;

[0153] The termination condition can be an iteration count condition or a scoring threshold condition, which can be designed according to business needs.

[0154] In one embodiment, step 206 includes the following sub-steps:

[0155] Sub-step S11: If the layout score is greater than or equal to the score threshold, determine the candidate H-tree layout according to the optimized H-tree layout;

[0156] The method further includes:

[0157] Under the condition that the layout score is less than the score threshold, a preset acceptance condition is obtained;

[0158] The common problem of non-global optimization models getting stuck in local minima can be avoided by setting preset acceptance conditions.

[0159] In one example, this acceptance criterion could be the Metropolis criterion, whose core idea is to accept a new state with a certain probability, rather than accepting or rejecting it with complete certainty. By pre-setting acceptance conditions, the optimization model is prevented from getting trapped in local optima, thus ensuring the model's robustness.

[0160] If the optimized H-tree layout meets the preset acceptance conditions, a candidate H-tree layout is determined based on the optimized H-tree layout.

[0161] Step 207: Determine whether the preset termination iteration condition is met based on the candidate H-tree layout;

[0162] In one embodiment, step 207 includes the following sub-steps:

[0163] Sub-step S21: Determine the candidate layout score based on the candidate H-tree layout and the preset scoring rules;

[0164] Sub-step S22: Determine the score difference based on the candidate layout score and the preset score threshold;

[0165] Once the score meets the initial acceptance threshold, the degree of optimization of this optimization result is determined. In this embodiment of the invention, the degree of layout optimization is judged by the difference between the layout score and the preset score.

[0166] In one example, the degree of layout optimization can be determined by the difference between the layout score and the score threshold updated based on the previous optimization result.

[0167] Sub-step S23: If the score difference is less than a preset difference threshold, determine that the candidate H-tree layout satisfies the preset termination iteration condition.

[0168] When the difference is less than a certain value, the current candidate H number layout can be considered to have met the termination iteration condition. Determining whether the current layout meets the requirements by using the scoring difference provides a direct way to determine the result of this optimization, making the optimization process clearer.

[0169] In one embodiment, the method further includes:

[0170] If the score difference is greater than or equal to a preset difference threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.

[0171] If the current optimization result does not meet the difference required to terminate the iteration, the previous step will be returned to continue the iteration in order to obtain a better result.

[0172] In one embodiment, the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to a preset difference threshold includes the following sub-steps:

[0173] Sub-step S31: Obtain the number of times the H-tree is processed and the threshold number of times it is processed;

[0174] In addition to determining whether to terminate the iteration based on the score difference, a limit is set on the number of iterations. This is to prevent endless iterations caused by unknown errors; furthermore, in practical applications, the model's runtime is usually an important consideration. By setting a threshold for the number of processing iterations, the maximum runtime of the algorithm can be roughly controlled, thereby meeting the time requirements in practical applications.

[0175] Sub-step S32: When the score difference is greater than or equal to a preset difference threshold and the number of processing steps is less than the number of processing steps threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model, and update the number of processing steps of the H-tree;

[0176] During model iteration, if the difference between the current layout score and the preset layout score is still relatively large, and the number of iterations has not yet reached the upper limit, the model will try to find a better solution based on the initial centroid of the H-tree and the preset optimization model, and update the number of iterations.

[0177] The method further includes:

[0178] If the score difference is greater than or equal to a preset difference threshold and the number of processing steps is equal to the preset number of processing steps threshold, the target H-tree layout is determined based on the candidate H-tree layout.

[0179] When the model reaches the preset maximum number of iterations, the iteration should be terminated even if the current layout score still differs from the preset layout score. This execution process ensures that the model has sufficient search space to find the optimal solution, while limiting the number of iterations prevents the model from falling into an infinite loop.

[0180] In one embodiment, sub-step S32 further includes the following sub-step:

[0181] Sub-step S321: Determine the termination iteration parameters based on the number of times the H-tree has been processed and the preset adjustment factor;

[0182] In addition to the number of processing steps, additional parameters can be set to control the algorithm's execution.

[0183] In one example, when applying simulated annealing to an H-tree optimization model, the termination iteration parameter is temperature. Temperature, as a key control parameter of the simulated annealing algorithm, determines the degree of exploration in the solution space. At high temperatures, the algorithm is more inclined to accept new, potentially worse solutions, thus enhancing its exploration ability; at low temperatures, the algorithm is more inclined to retain the current better solutions, thus enhancing convergence. In this example, the initial temperature can be 1000 degrees Celsius, and the cooling strategy is either a 10% temperature decrease after a preset time or an exponential cooling based on a preset cooling index after a preset time. The preset cooling index can be adjusted according to the needs of the optimization problem; here it is 0.95.

[0184] Sub-step S322: If the score difference is greater than or equal to the preset difference threshold, the number of processing steps is less than the number of processing steps threshold, and the termination iteration parameter does not meet the preset termination iteration parameter condition, return to the step of determining the optimization centroid based on the initial centroid of the H-tree and the preset optimization model, and update the number of processing steps and the termination iteration parameter of the H-tree.

[0185] When neither the number of processing iterations nor the termination iteration parameter has reached the preset maximum value, the model will continue to iterate and update the termination iteration parameter.

[0186] The method further includes: when the score difference is greater than or equal to a preset difference threshold, the number of processing steps is less than the preset number of processing steps threshold, and the termination iteration parameter meets the preset termination iteration parameter condition, determining the target H-tree layout based on the candidate H-tree layout.

[0187] The optimization iteration will also terminate if the threshold for the number of processing iterations has not been reached but the termination iteration parameters have been met.

[0188] In one example, the iteration stops when the temperature drops to 1. The optimization process of the model can be further optimized by setting additional parameters to terminate the iteration.

[0189] In one embodiment, the method further includes:

[0190] Obtain the duration of the H-tree centroid optimization and the preset update time threshold;

[0191] The termination iteration parameter is updated based on the preset adjustment factor, the duration of the current H-tree centroid optimization, and the preset update time threshold.

[0192] The optimization of the termination iteration parameters can be achieved by updating data from multiple dimensions to ensure the comprehensiveness of the model;

[0193] Step 208: If the candidate H-tree layout satisfies the preset termination iteration condition, determine the target H-tree layout based on the candidate H-tree layout.

[0194] Reference Figure 3 The diagram shows a conceptual model of a clock tree layout optimization method using simulated annealing algorithm as the optimization model according to the present invention.

[0195] First, based on the structure of the clock tree and the location distribution of the logic units, the coverage of the H-tree is determined; then, based on this information, an initial temperature and a cooling strategy corresponding to the threshold are designed.

[0196] Then, a perturbation mechanism for the mass points is defined according to the needs of optimizing business. The perturbation mechanism is used to generate a new centroid in each iteration. The selection of the new centroid is made after making minor adjustments around the previous centroid.

[0197] Then, based on the project's needs, such as latency requirements, power consumption requirements, and layout range, an evaluation function is designed to evaluate the quality of the generated layout. Finally, based on multiple dimensions of information, such as initial temperature and project information, an acceptance criterion is set to allow the optimization model to escape local optima. After completing the above preparations, a termination condition is determined by combining all the design metrics. The termination condition may include metrics such as the maximum number of iterations and the lowest temperature.

[0198] This invention, through a process of determining the optimized H-tree layout score based on the initial centroid of the H-tree, a preset optimization model, and the optimized H-tree layout and preset scoring rules, can more comprehensively evaluate the impact of different centroid choices on the overall H-tree layout. This global perspective helps determine a more reasonable optimized centroid, thus avoiding the problem of suboptimal global layout caused by local optimization. Combined with iterative conditions, this embodiment allows for continuous layout adjustments based on the scoring results through an iterative optimization process, further approaching the global optimum. Through the preset optimization model and scoring rules, this invention comprehensively considers global layout factors, such as node distribution and the direction of connecting lines, to ensure that the generated H-tree layout is globally optimal. This global consideration is unparalleled by traditional local optimization methods.

[0199] Reference Figure 4 The flowchart illustrates an H-tree layout optimization method of the present invention that uses simulated annealing algorithm as optimization model:

[0200] First, we need to determine the number and distribution of tap points in the given H-tree, and then determine the current particle based on the distribution of tap points;

[0201] Then, based on a predefined perturbation mechanism, a new centroid is generated based on the current centroid, and a new layout is generated based on the new centroid.

[0202] Based on the pre-designed evaluation function, the score of the new layout is calculated, and the score is compared with the preset threshold to determine whether the new layout is the current optimal solution. If it is, the new layout is accepted as the new comparison standard; otherwise, the layout is accepted probabilistically according to the pre-designed acceptance criteria.

[0203] After the layout acceptance work is completed, it is determined whether the current iteration number has reached the preset iteration number threshold. If it has not reached the threshold, the iteration continues and returns to the steps of generating a new centroid based on the current centroid according to the predefined perturbation mechanism, and generating a new layout based on the new centroid.

[0204] If the number of iterations is reached, it is determined whether the new layout meets the preset output criteria. If it does, the new layout is output; otherwise, it continues to return to the steps of generating a new centroid based on the current centroid according to the predefined perturbation mechanism and generating a new layout based on the new centroid to continue iterating.

[0205] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0206] Reference Figure 5 The diagram shows a structural block diagram of an embodiment of the H-tree layout optimization device of the present invention, which may specifically include the following modules:

[0207] The initial centroid generation module 301 is used to obtain the initial centroid of the H-tree;

[0208] In an H-tree, the centroid is a logical concept that has special significance for the distribution and transmission of clock signals. For example, it might be the node with the smallest signal delay or the node with the best signal synchronization. Therefore, finding the centroid of the H-tree within a given range and further designing tap points based on the centroid is a crucial step in the design and optimization of the H-tree.

[0209] The centroid generation module 302 is used to determine the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.

[0210] In selecting the centroid for optimization, a preset global optimization module and the generated initial centroid are used to generate the optimized centroid.

[0211] Global optimization algorithms are heuristic algorithms based on simulating the behavior of organisms in nature, aiming to find the global optimum or near-global optimum solution to an optimization problem.

[0212] In one example, the preset optimization module can be a simulated annealing algorithm model. Simulated annealing, first proposed by Metropolis et al. in 1953, is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving the optimization problem and the annealing process of a physical system, and seeks the global optimum by simulating the behavior of matter reaching its lowest energy state during solid annealing.

[0213] One method for determining the optimal centroid is to randomly generate a point within the neighborhood of the current centroid as the optimal centroid. The neighborhood range here is generally determined by experience or by business requirements; the neighborhood range here is a circle with a radius of 10 micrometers.

[0214] H-tree layout generation module 303 is used to determine the optimized H-tree layout based on the optimized centroid;

[0215] The steps for generating a layout based on the centroid can be summarized as follows: First, determine the location of the H-tree centroid. Then, based on the centroid location, divide the layout space into several sub-regions. These sub-regions will be used to place the nodes and connecting lines of the H-tree. Within each sub-region, place the nodes one by one according to the structure and hierarchical relationship of the H-tree. Typically, the root node is placed at or near the centroid, and other nodes are placed layer by layer outwards. Connect the nodes of the H-tree using connecting lines to form a complete tree structure. The length and direction of the connecting lines should be optimized as much as possible to reduce signal transmission delay and interference. Finally, adjust and optimize the initially generated H-tree layout as needed. This may include adjusting the node positions, the direction and length of the connecting lines, etc., to meet specific performance requirements or constraints.

[0216] The layout scoring determination module 304 is used to determine the optimized H-tree layout score based on the optimized H-tree layout and the preset scoring rules.

[0217] After determining the layout of the H-tree, the next step is to evaluate whether the generated layout meets the requirements.

[0218] In one example, the scoring rule could be: E = w1·Delay + w2·Power + w3·Aesthetics, w1 + w2 + w3 = 1, where Delay is the sum of signal delays from the centroid to each child node, using an RC delay model. Where R i For the connected resistor, C i Power is used to calculate power consumption, taking into account the resistance and current of each connection. Aesthetics: Layout aesthetics can be quantified by calculating the distances and intersections between points.

[0219] The aesthetics of an H-tree layout can be evaluated through the distance between nodes, path intersections, symmetry, and balance. The uniformity of node distances can be calculated by taking the standard deviation of the distances between all nodes; a smaller standard deviation indicates a more even distribution of nodes. Path intersections can be measured by the number of intersections between all paths; a smaller number indicates a clearer layout. Symmetry and balance can be measured by the difference in node distribution on both sides of the symmetrical H-tree; better symmetry results in a more aesthetically pleasing layout. The aesthetics of the layout can be adjusted selectively based on project requirements. Here, the aesthetics of the layout is calculated as 0.5 × (standard deviation between nodes) + 0.3 × (number of intersections) + 0.2 × (number of differences in node distribution on both sides); smaller values ​​indicate a more aesthetically pleasing layout.

[0220] The RC delay model is based on a circuit consisting of a resistor (R) and a capacitor (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, the resistor restricts the flow of current, while the capacitor stores charge. When voltage passes through these two components, charge accumulates and is released, causing changes in current and voltage in the circuit, thus producing a delay effect.

[0221] The candidate layout determination module 305 is used to determine candidate H-tree layouts based on the optimized H-tree layout, provided that the optimized H-tree layout score meets a preset score threshold.

[0222] The calculated layout score is compared with a preset scoring threshold to determine whether the layout meets the requirements. The scoring threshold is generally designed based on business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.

[0223] The iteration termination determination module 306 is used to determine whether a preset termination iteration condition is met based on the candidate H-tree layout.

[0224] The termination condition can be an iteration count condition or a scoring threshold condition, which can be designed according to business needs.

[0225] The target layout determination module 307 is used to determine the target H-tree layout based on the candidate H-tree layout when the candidate H-tree layout satisfies the preset termination iteration condition.

[0226] Furthermore, if the candidate layout meets the requirements and the requirements for terminating the iteration, the current iteration is stopped, and the layout is output as the target H-tree layout.

[0227] In one embodiment, the iteration termination determination module includes:

[0228] The candidate scoring determination submodule is used to determine the candidate layout score based on the candidate H-tree layout and the preset scoring rules;

[0229] The scoring difference determination submodule is used to determine the scoring difference based on the candidate layout scores and the preset scoring threshold.

[0230] Once the score meets the initial acceptance threshold, the degree of optimization of this optimization result is determined. In this embodiment of the invention, the degree of layout optimization is judged by the difference between the layout score and the preset score.

[0231] In one example, the degree of layout optimization can be determined by the difference between the layout score and the score threshold updated based on the previous optimization result.

[0232] The termination submodule is used to determine that the candidate H-tree layout satisfies the preset termination iteration condition when the score difference is less than a preset difference threshold.

[0233] When the difference is less than a certain value, the current candidate H number layout can be considered to have met the termination iteration condition. Determining whether the current layout meets the requirements by using the scoring difference provides a direct way to determine the result of this optimization, making the optimization process clearer.

[0234] In one embodiment, the device further includes:

[0235] The iteration start submodule is used to return the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to a preset difference threshold.

[0236] If the current optimization result does not meet the difference required to terminate the iteration, the previous step will be returned to continue the iteration in order to obtain a better result.

[0237] In one embodiment, the iteration start submodule includes:

[0238] The processing count acquisition unit is used to acquire the processing count and processing count threshold of the H-tree;

[0239] In addition to determining whether to terminate the iteration based on the score difference, a limit is set on the number of iterations. This is to prevent endless iterations caused by unknown errors; furthermore, in practical applications, the model's runtime is usually an important consideration. By setting a threshold for the number of processing iterations, the maximum runtime of the algorithm can be roughly controlled, thereby meeting the time requirements in practical applications.

[0240] The confirmation iteration unit returns to the step of determining the optimization centroid based on the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to the preset difference threshold and the number of processing steps is less than the number of processing steps threshold, and updates the number of processing steps of the H-tree.

[0241] During model iteration, if the difference between the current layout score and the preset layout score is still relatively large, and the number of iterations has not yet reached the upper limit, the model will try to find a better solution based on the initial centroid of the H-tree and the preset optimization model, and update the number of iterations.

[0242] The device further includes:

[0243] The target layout determination submodule is used to determine the target H-tree layout based on the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold and the number of processing steps is equal to the preset number of processing steps threshold.

[0244] When the model reaches the preset maximum number of iterations, the iteration should be terminated even if the current layout score still differs from the preset layout score. This execution process ensures that the model has sufficient search space to find the optimal solution, while limiting the number of iterations prevents the model from falling into an infinite loop.

[0245] In one embodiment, the confirmation iteration unit further includes:

[0246] The termination iteration parameter determination subunit is used to determine the termination iteration parameter based on the number of times the H-tree has been processed and a preset adjustment factor;

[0247] In addition to the number of processing steps, additional parameters can be set to control the algorithm's execution.

[0248] In one example, when applying simulated annealing to an H-tree optimization model, the termination iteration parameter is temperature. Temperature, as a key control parameter of the simulated annealing algorithm, determines the degree of exploration in the solution space. At high temperatures, the algorithm is more inclined to accept new, potentially worse solutions, thus enhancing its exploration ability; at low temperatures, the algorithm is more inclined to retain the current better solutions, thus enhancing convergence. In this example, the initial temperature can be 1000 degrees Celsius, and the cooling strategy is either a 10% temperature decrease after a preset time or an exponential cooling based on a preset cooling index after a preset time. The preset cooling index can be adjusted according to the needs of the optimization problem; here it is 0.95.

[0249] The first confirmation iteration subunit is used to return to the step of determining the optimization centroid based on the initial centroid of the H-tree and the preset optimization model, and update the number of processing steps and the termination iteration parameter of the H-tree when the score difference is greater than or equal to the preset difference threshold, the number of processing steps is less than the number of processing steps threshold, and the termination iteration parameter does not meet the preset termination iteration parameter condition.

[0250] When neither the number of processing iterations nor the termination iteration parameter has reached the preset maximum value, the model will continue to iterate and update the termination iteration parameter.

[0251] The device further includes:

[0252] The first termination iteration submodule is used to determine the target H-tree layout based on the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold, the number of processing steps is less than the preset number of processing steps threshold, and the termination iteration parameters meet the preset termination iteration parameter conditions.

[0253] The optimization iteration will also terminate if the threshold for the number of processing iterations has not been reached but the termination iteration parameters have been met.

[0254] In one example, the iteration stops when the temperature drops to 1. The optimization process of the model can be further optimized by setting additional parameters to terminate the iteration.

[0255] In one embodiment, the device further includes:

[0256] The duration determination submodule is used to obtain the duration of the H-tree centroid optimization and the preset update time threshold.

[0257] The termination iteration parameter update submodule is used to update the termination iteration parameters based on the preset adjustment factor, the duration of the current optimized H-tree centroid, and the preset update time threshold.

[0258] The optimization of the termination iteration parameters can be achieved by updating data from multiple dimensions to improve the robustness of the model;

[0259] In one embodiment, the candidate layout determination module includes:

[0260] The first candidate layout determination submodule is used to determine candidate H-tree layouts based on the optimized H-tree layout when the layout score is greater than or equal to the score threshold.

[0261] The device further includes:

[0262] The acceptance condition determination submodule is used to obtain preset acceptance conditions when the layout score is less than the score threshold.

[0263] The second candidate layout determination submodule is used to determine candidate H-tree layouts based on the optimized H-tree layout, provided that the optimized H-tree layout meets the preset acceptance conditions.

[0264] The common problem of non-global optimization models getting stuck in local minima can be avoided by setting preset acceptance conditions.

[0265] In one example, this acceptance criterion could be the Metropolis criterion, whose core idea is to accept a new state with a certain probability, rather than accepting or rejecting it with complete certainty. By pre-setting acceptance conditions, the optimization model is prevented from getting trapped in local optima, thus ensuring the model's robustness.

[0266] In one embodiment, the initial centroid generation module includes:

[0267] The H-tree design information acquisition submodule is used to acquire the logic unit information that requires clock signals within the design area of ​​the H-tree; the logic unit includes: information on the H-tree root node, clock access point, and the logic units of the components that require clock signals on the child nodes;

[0268] When designing an H-tree structure, it's necessary to collect and understand information about all logic units within the design area that require clock signals. This information covers the root node of the H-tree, the clock access point, and all relevant logic units on its child nodes. This is done to ensure that the clock signal can be correctly and efficiently delivered to each logic unit, thereby meeting the design requirements of the entire circuit.

[0269] The design region refers to the specific area allocated to the H-tree structure in integrated circuit design. Logic cells are the basic building blocks of integrated circuits, used to perform logical operations (such as AND, OR, NOT, etc.).

[0270] The root node of an H-tree is the starting point of the tree and is typically the input point for clock signals. Clock access points are located on branches of the H-tree where clock signals are connected and then further distributed to child nodes. The logic units at the child nodes that require clock signals are those at the ends or middle levels of the H-tree; they directly receive clock signals to perform their functions. The information about each logic unit refers to specific details about each unit that requires a clock signal, including but not limited to: the unit's location, type, function, required clock frequency, and clock signal phase requirements.

[0271] The first initial centroid generation submodule is used to generate the initial centroid of the H-tree based on the logical unit information.

[0272] Based on business needs, preset algorithms, and logical unit information, the initial centroid of the H number is generated.

[0273] In one embodiment, the initial centroid generation module includes:

[0274] The H-tree structure acquisition submodule is used to acquire the structure of the H-tree;

[0275] To understand the overall layout and branching of an existing H-tree, one can use EDA (Electronic Design Automation) tools, ICC2 (IC Compiler II) tools, or perform manual analysis. The structure of the H-tree describes how the clock signal is distributed from the root node to each child node.

[0276] The H-tree root node acquisition submodule is used to determine the root node of the H-tree based on its structure.

[0277] In an H-tree structure, the root node is usually the only node without a parent node, or the node directly connected to the clock source.

[0278] The clock access point determination submodule is used to determine the distribution of clock access points based on the root node of the H-tree;

[0279] Starting from the root node, along the branches of the H-tree, determine the location of the clock access point according to the design requirements and clock signal distribution strategy.

[0280] The second initial centroid generation submodule is used to determine the initial centroid of the H-tree based on the distribution of the clock access points.

[0281] The initial centroid of the H-tree is determined based on the distribution of the clock access points.

[0282] In one example, given an H-tree, the structure of the H-tree can be obtained first, and the distribution of taps and the position of the root node can be further determined. Then, based on the tap information obtained from analyzing the H-tree structure, a preset clustering algorithm combined with automated tools such as ICC2, an initial centroid of an optimized H-tree can be generated. In this way, embodiments of the present invention can not only generate a target layout, but also obtain an optimized H-tree layout by analyzing the layout of an existing H-tree.

[0283] This invention, through a process of determining the optimized H-tree layout score based on the initial centroid of the H-tree, a preset optimization model, and the optimized H-tree layout and preset scoring rules, can more comprehensively evaluate the impact of different centroid choices on the overall H-tree layout. This global perspective helps determine a more reasonable optimized centroid, thus avoiding the problem of suboptimal global layout caused by local optimization. Combined with iterative conditions, this embodiment allows for continuous layout adjustments based on the scoring results through an iterative optimization process, further approaching the global optimum. Through the preset optimization model and scoring rules, this invention comprehensively considers global layout factors, such as node distribution and the direction of connecting lines, to ensure that the generated H-tree layout is globally optimal. This global consideration is unparalleled by traditional local optimization methods.

[0284] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0285] This invention also provides an electronic device, comprising:

[0286] It includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, it implements the various processes of the above-described H-tree layout optimization method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0287] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the above-described H-tree layout optimization method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0288] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0289] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0290] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0291] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0292] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0293] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0294] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0295] The present invention has provided a detailed description of an H-tree layout optimization method, apparatus, device, and medium. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, those skilled in the art will recognize that there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. An H-tree layout optimization method, characterized in that, The method includes: Obtain the initial centroid of the H-tree; Determine the optimized centroid based on the initial centroid of the H-tree and the preset optimization model; Based on the optimized centroid, determine the optimized H-tree layout; The optimized H-tree layout score is determined based on the optimized H-tree layout and the preset scoring rules. Under the condition that the optimized H-tree layout score meets the preset score threshold, candidate H-tree layouts are determined based on the optimized H-tree layout. Determine whether the preset termination iteration condition is met based on the candidate H-tree layout; If the candidate H-tree layouts satisfy the preset termination iteration conditions, the target H-tree layout is determined based on the candidate H-tree layouts. Obtaining the initial centroid of the H-tree includes: Obtain information on logic units within the design area of ​​the H-tree that require clock signals; the logic units include: information on the root node of the H-tree, clock access points, and logic units of components on child nodes that require clock signals; Based on the logical unit information, the initial centroid of the H-tree is generated; or; Obtain the structure of the H-tree; Based on the structure of the H-tree, determine the root node of the H-tree; The distribution of clock access points is determined based on the root node of the H-tree; The initial centroid of the H-tree is determined based on the distribution of the clock access points.

2. The method according to claim 1, characterized in that, The step of determining whether a preset termination iteration condition is met based on the candidate H-tree layout includes: Based on the candidate H-tree layout and the preset scoring rules, the candidate layout score is determined; The score difference is determined based on the candidate layout score and the preset score threshold; If the score difference is less than a preset difference threshold, the candidate H-tree layout is determined to meet a preset termination iteration condition.

3. The method according to claim 2, characterized in that, The method further includes: If the score difference is greater than or equal to the preset difference threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.

4. The method according to claim 3, characterized in that, The step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to the preset difference threshold includes: Obtain the number of times the H-tree is processed and the threshold number of times it is processed; When the score difference is greater than or equal to the preset difference threshold and the number of processing steps is less than the number of processing steps threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model, and update the number of processing steps of the H-tree; The method further includes: If the score difference is greater than or equal to the preset difference threshold and the number of processing steps is equal to the number of processing steps threshold, the target H-tree layout is determined based on the candidate H-tree layout.

5. The method according to claim 4, characterized in that, The step of returning to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to the preset difference threshold and the number of processing steps is less than the number of processing steps threshold, and updating the number of processing steps of the H-tree, includes: The termination iteration parameters are determined based on the number of times the H-tree has been processed and the preset adjustment factor. If the score difference is greater than or equal to the preset difference threshold, the number of processing steps is less than the number of processing steps threshold, and the termination iteration parameter does not meet the preset termination iteration parameter condition, return to the step of determining the optimization centroid based on the initial centroid of the H-tree and the preset optimization model, and update the number of processing steps and the termination iteration parameter of the H-tree. The method further includes: If the score difference is greater than or equal to the preset difference threshold, the number of processing steps is less than the number of processing steps threshold, and the termination iteration parameter meets the preset termination iteration parameter condition, the target H-tree layout is determined according to the candidate H-tree layout.

6. The method according to claim 5, characterized in that, The method further includes: Obtain the duration of the H-tree centroid optimization and the preset update time threshold; The termination iteration parameter is updated based on the preset adjustment factor, the duration of the current H-tree centroid optimization, and the preset update time threshold.

7. The method according to any one of claims 1-6, characterized in that, The step of determining candidate H-tree layouts based on the optimized H-tree layout, under the condition that the optimized H-tree layout score meets the preset score threshold, includes: If the layout score is greater than or equal to the preset score threshold, a candidate H-tree layout is determined based on the optimized H-tree layout. The method further includes: If the layout score is less than the preset score threshold, a preset acceptance condition is obtained; If the optimized H-tree layout meets the preset acceptance conditions, a candidate H-tree layout is determined based on the optimized H-tree layout.

8. An H-tree layout optimization device, characterized in that, The device includes: The initial centroid generation module is used to obtain the initial centroid of the H-tree; The centroid generation module is used to determine the optimized centroid based on the initial centroid of the H-tree and the preset optimization model. The H-tree layout generation module is used to determine the optimized H-tree layout based on the optimized centroid. The layout scoring determination module is used to determine the optimized H-tree layout score based on the optimized H-tree layout and the preset scoring rules. The candidate layout determination module is used to determine candidate H-tree layouts based on the optimized H-tree layout, provided that the score of the optimized H-tree layout meets a preset score threshold. The iteration termination determination module is used to determine whether a preset termination iteration condition is met based on the candidate H-tree layout. The target layout determination module is used to determine the target H-tree layout based on the candidate H-tree layout when the candidate H-tree layout satisfies the preset termination iteration condition. The initial centroid generation module includes: The H-tree design information acquisition submodule is used to acquire the logic unit information that requires clock signals within the design area of ​​the H-tree; the logic unit includes: information on the H-tree root node, clock access point, and the logic units of the components that require clock signals on the child nodes; The first initial centroid generation submodule is used to generate the initial centroid of the H-tree based on the logical unit information; or; The H-tree structure acquisition submodule is used to acquire the structure of the H-tree; The H-tree root node acquisition submodule is used to determine the root node of the H-tree based on its structure. The clock access point determination submodule is used to determine the distribution of clock access points based on the root node of the H-tree; The second initial centroid generation submodule is used to determine the initial centroid of the H-tree based on the distribution of the clock access points.

9. An electronic device, characterized in that, include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the steps of the H-tree layout optimization method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, which, when executed by a processor, implements the steps of the H-tree layout optimization method as described in any one of claims 1-7.

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