Grid mis-opening protection circuit in turn-off period of high-frequency GaN HEMT and design method

Abstract

The invention provides a grid mis-opening protection circuit in the turn-off period of a high-frequency GaN HEMT and a design method, and belongs to the technical field of novel storage and calculation. According to the circuit, the passive element auxiliary network is connected in series at the drain end of the GaN HEMT device, the passive element auxiliary network is a group of inductors and capacitors which are connected in parallel, and the passive element auxiliary network is used for forming a gate-drain connection link with a Miller capacitor CGD of the device to reach the gate of the device during the turn-off period of the GaN HEMT device, so that the equivalent Miller capacitor on the GaN HEMT device is reduced, and the reliability of the GaN HEMT device is improved. Therefore, the amplitude of the current passing through the Miller capacitor is suppressed, and the amplitude of the grid voltage oscillation of the GaN HEMT device is reduced. No resistive element needs to be added to the grid electrode, and the switching speed of the GaN HEMT cannot be reduced; according to the invention, the structure is simple, other semiconductor devices or circuits are not introduced, no extra reliability problem is caused, the existing inductor and capacitor can work under the condition of larger voltage and current, the realization of the technical effect of the invention can be supported, and the application prospect is wide.

Description

Technical Field

[0001] The present invention belongs to the field of circuit and system technology, and specifically relates to a circuit structure and a design method for suppressing Miller current in a GaN HEMT device operating in a high voltage change rate scenario to prevent the device from being mistakenly turned on due to gate voltage oscillation. Background Art

[0002] With the development of advanced magnetic integration technology, wide bandgap semiconductor devices such as gallium nitride high electron mobility transistors (GaNHEMT) have begun to become core devices for high-frequency power electronic circuits. Figure 1 The cross-sectional structure diagram of a commercial GaN HEMT device is given. The switching frequency of power converters has entered the megahertz level, but GaN HEMT faces more severe reliability issues at high switching frequencies. When the circuit operates at high voltage, there is a large voltage change rate dv / dt at the GaN HEMT drain, and the high-frequency component of the drain voltage will be coupled to the gate in the form of an AC current through the parasitic capacitance (Miller capacitance) between the GaN HEMT gate and the drain, causing voltage oscillation. The gate turn-on threshold voltage of existing commercial GaN HEMT devices is small. When the device is turned off, the device gate oscillation can easily cause a false turn-on phenomenon, which can cause the device to burn out due to overheating. Therefore, false turn-on protection technology is an important means to ensure the safe operation of GaN HEMT at high switching frequencies.

[0003] Currently reported mis-conduction protection technologies are mainly divided into two categories: one is the external resistor protection method, and the other is the external switch path method. Figure 2 The concept diagram of the external resistor protection method is shown. The technical content is to suppress the gate current and reduce the oscillation amplitude by connecting a resistor or a magnetic bead in series at the gate end of the GaN HEMT. The external resistor protection method is simple in design and low in cost, but it will significantly reduce the switching speed of the device, especially the switching circuit with a megahertz switching frequency. Figure 3 The conceptual diagram of the external switch path method is shown. The technical idea is to connect an independent switch device (MOS device or pnp transistor) in parallel to the gate of the GaN HEMT. When there is a large high-frequency AC current in the gate, the independent switch device is turned on to short-circuit part of the high-frequency current, thereby reducing the gate voltage oscillation. However, this method increases the design complexity of the gate drive, and this method increases the uncertainty of reliability, because the external switch of the protection function may also break down under excessive gate voltage changes. Therefore, it is of great significance to study a protection circuit for the gate to be opened incorrectly during the shutdown of the GaN HEMT device. Summary of the invention

[0004] In view of the problems existing in the above prior art, the present invention proposes a GaN HEMT gate mis-opening protection circuit and design method based on a passive component auxiliary network, which suppresses the amplitude of the Miller current from the voltage change rate of the device drain without changing the device gate drive circuit. This protection technology neither affects the switching speed of the power device nor introduces other semiconductor devices to reduce the reliability of the gate drive module. The present invention can realize the protection function against the gate mis-opening phenomenon in a wide frequency range, and can customize the design of circuit parameters according to various GaN HEMT application scenarios.

[0005] The technical solution of the present invention is as follows:

[0006] A gate error-on protection circuit during the shutdown period of a GaN HEMT is characterized in that a passive component auxiliary network is connected in series at the drain end of the GaN HEMT device, wherein the passive component auxiliary network is a group of inductors and capacitors connected in parallel, and is used to connect the device Miller capacitance C during the shutdown period of the GaN HEMT device. GD The gate-drain connection link is formed to reach the gate of the device, reducing the equivalent Miller capacitance on the GaN HEMT device, thereby suppressing the amplitude of the current passing through the Miller capacitance and reducing the amplitude of the gate voltage oscillation of the GaN HEMT device.

[0007] Furthermore, in the above-mentioned GaN HEMT off-period gate mis-opening protection circuit, when the GaN HEMT device is turned on, the passive component auxiliary network L m -C m Provides a conduction path without affecting the normal start-up of the device; during the shutdown of the GaN HEMT device, the voltage with a high voltage change rate dv / dt at the drain will pass through the passive component auxiliary network L m -C m and Miller capacitance C GD The gate-drain connection link L m -C m -C GD The impedance Z e The expression is:

[0008]

[0009] where ω m Represents the inductance L m With capacitor C m The resonant frequency, ω represents the GaN HEMT oscillation frequency. m When it is lower than ω, the network L m -C m -C GD The form is equivalent to two capacitors connected in series.

[0010] Only the resonant frequency ω m Higher than but close to the switching frequency of GaN HEMT, network L m -C m -C GD Equivalent to Miller capacitance C GD Smaller capacitance suppresses the Miller capacitance C GD The amplitude of the current reduces the amplitude of the gate voltage oscillation.

[0011] The present invention also provides a design method for a gate error-on protection circuit during the shutdown period of a GaN HEMT, which is characterized in that the amplitude of the Miller current is suppressed based on the voltage change rate of the device drain without changing the device gate drive circuit, and includes the following steps:

[0012] Step 1: Determine the maximum drain voltage of the GaN HEMT device under the designed operating conditions and select L accordingly m With C m The withstand voltage index of the component;

[0013] Step 2: Determine the switching frequency of the GaN HEMT device and the maximum dv / dt of the drain voltage to select the magnetic component L m The core material;

[0014] Step 3: Confirm the maximum current and effective value of the GaN HEMT device when it is turned on under the designed working conditions, and determine the magnetic component L m Size;

[0015] Step 4: Select the appropriate passive component auxiliary network L according to the GaN HEMT device switching frequency and maximum power of the designed working condition. m -C m Manufacturing process: If the switching frequency is lower than 10MHz, choose discrete integration to design the passive component auxiliary network; if the switching frequency is not lower than 10MHz, choose on-chip integration or package bonding to design the passive component auxiliary network;

[0016] Step 5: PCB production: solder the passive component auxiliary network close to the GaN HEMT device on the PCB board to reduce the parasitic effect between the passive component auxiliary network and the device drain. The gate of the GaN HEMT device is designed for charging / discharging circuit according to the traditional method.

[0017] The technical effects of the present invention are as follows:

[0018] (1) The passive component auxiliary network proposed in the present invention can reduce the equivalent capacitance between the drain and gate of the GaN HEMT in the high frequency range, thereby suppressing the gate voltage oscillation amplitude and supporting the suppression of oscillation in a wide frequency range;

[0019] (2) The present invention does not need to add any resistive element to the gate, so it will not reduce the switching speed of the GaN HEMT;

[0020] (3) The present invention does not introduce other semiconductor devices or circuits and will not bring additional reliability problems. Existing inductors and capacitors can operate under higher voltage and current conditions and can support the realization of the technical effects of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 The structure diagram of the GaN HEMT device involved in the present invention: 1. Source; 2. Gate; 3. Drain; 4. AlGaN barrier layer; 5. GaN channel layer; 6. GaN buffer layer; 7. Substrate layer (materials such as silicon, diamond, and silicon carbide); 8. Substrate electrode;

[0022] Figure 2 The technical schematic diagram of the external resistance protection method: 9. External resistive element;

[0023] Figure 3 The technical principle diagram of the external switch path method: 10. External semiconductor device switch;

[0024] Figure 4 The schematic diagram of the circuit of the present invention is as follows: 11. An external passive auxiliary network;

[0025] Figure 5 This is a comparison diagram of gate voltages measured when two prototypes are working in an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The present invention will be further clearly and completely described below through specific embodiments in conjunction with the accompanying drawings.

[0027] The present invention uses a group of parallel-connected inductors and capacitors as a resonant network connected to the drain of the GaN HEMT device. The circuit form is as shown in the attached figure. Figure 4 As shown in FIG. 1 , a passive component auxiliary network is connected in series at the drain end of the GaN HEMT device. The network is a set of inductors and capacitors connected in parallel. The core effect of this circuit structure is to increase the Miller capacitance C of the device. GD When starting to transfer charge to the gate, the Miller capacitance C is reduced GD The current in.

[0028] When the GaN HEMT device is in the off state and there is a large dv / dt at the drain, the external circuit of the device drain will affect the Miller capacitance C of the device. GD This process will cause the Miller capacitance C GD There is a continuous alternating current i GD, the mathematical expression of Miller current can be written as:

[0029] From (1), we can see that the current i GD and Miller capacitance C GD The size of the Miller capacitance C GD The size of the current i GD However, the parasitic capacitance of the device cannot be changed, and the passive component auxiliary network L m -C m When the device is turned on, the passive component auxiliary network L m -C m It can provide a conduction path without affecting the normal opening of the device. When the device is turned off, the high dv / dt voltage of the drain will pass through the passive component auxiliary network L m -C m and Miller capacitance C GD The passive components of the auxiliary network reach the gate, the network L m -C m -C GD The impedance Z e The expression can be written as:

[0030]

[0031] where ω m Represents the inductance L m With capacitor C m The resonant frequency of the GaN HEMT is represented by ω, and the oscillation frequency of the GaN HEMT is represented by ω. As can be seen from (2), the network L m -C m -C GD The form is similar to two capacitors in series, and the equivalent condition is the resonant frequency ω m In other words, as long as the resonant frequency is higher than but close to the switching frequency of the GaN HEMT, the network L m -C m -C GD can be equivalent to the value of Miller capacitance C GD Smaller capacitance. This can effectively suppress the GD The amplitude of the current and the amplitude of the gate voltage oscillation can also be effectively reduced.

[0032] The design method of the passive component auxiliary network-assisted GaN HEMT device mis-start protection circuit of the present invention is described.

[0033] Before starting the circuit hardware production, three preliminary designs need to be performed: 1. Confirm the maximum voltage of the GaN HEMT device under the designed working conditions, which is related to L m With C m 1. Select the withstand voltage index of the component; 2. Confirm the switching frequency and the maximum dv / dt of the drain voltage of the GaN HEMT device, which determines the magnetic component L m 3. Confirm the maximum current and effective value of the GaN HEMT device when it is turned on under the designed working conditions, which determines the magnetic component L m size design.

[0034] Select appropriate passive component auxiliary network L according to the switching frequency and maximum power of the designed working conditions m -C m Manufacturing process. If the switching frequency is low (less than 10MHz), discrete integration can be used to design the passive component auxiliary network; if the switching frequency is high (not less than 10MHz), on-chip integration or package bonding can be used to design the passive component auxiliary network.

[0035] The specific implementation method is described in the application scenario of switching frequency 6.72MHz, GaN HEMT drain dv / dt of about 6V / ns, and maximum drain voltage 100V: At the selected switching frequency, a discrete air-core inductor of 65nH and a ceramic capacitor of 570pF are used as the passive component auxiliary network L m -C m The passive component auxiliary network is soldered close to the GaN HEMT on the PCB board to reduce the parasitic effect between the network and the device drain. The device gate can be designed with a charge / discharge loop according to the traditional method.

[0036] In order to compare the technical effects achieved by the present invention, two groups of prototypes were designed, whose working conditions were exactly the same, and the only difference was that one prototype contained the passive component auxiliary network proposed by the present invention, while the other prototype did not contain the passive component auxiliary network. Figure 5 The gate voltages measured when the two prototypes are working are given. It can be seen that the addition of the passive component auxiliary network L m -C m The gate voltage oscillation amplitude of the prototype was reduced by nearly half, effectively avoiding the problem of false start-up during shutdown.

[0037] Finally, it should be noted that the purpose of publishing the embodiments is to help further understand the present invention, but those skilled in the art can understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the contents disclosed in the embodiments, and the scope of protection claimed by the present invention shall be subject to the scope defined in the claims.

Claims

1. A GaN HEMT gate turn-on protection circuit during shutdown, characterized in that: A passive component auxiliary network is connected in series at the drain end of the GaN HEMT device. The passive component auxiliary network is a set of inductors and capacitors connected in parallel, which are used to connect the GaN HEMT device to the Miller capacitance C during the turn-off period. GD The gate-drain connection link is formed to reach the gate of the device, reducing the equivalent Miller capacitance on the GaN HEMT device, thereby suppressing the amplitude of the current passing through the Miller capacitance and reducing the amplitude of the gate voltage oscillation of the GaN HEMT device.

2. The GaN HEMT turn-off period gate error turn-on protection circuit according to claim 1, characterized in that: When the GaN HEMT device is turned on, the passive component auxiliary network L m -C m Provides a conduction path without affecting the normal start-up of the device; during the shutdown of the GaN HEMT device, the voltage with a high voltage change rate dv / dt at the drain will pass through the passive component auxiliary network L m -C m and Miller capacitance C GD The gate-drain connection link L m -C m -C GD The impedance Z e The expression is: where ω m Represents the inductance L m With capacitor C m The resonant frequency, ω represents the GaN HEMT oscillation frequency. m When it is lower than ω, the network L m -C m -C GD The form is equivalent to two capacitors in series; only the resonant frequency ω m Higher than but close to the switching frequency of GaN HEMT, network L m -C m -C GD Equivalent to Miller capacitance C GD Smaller capacitance suppresses the Miller capacitance C GD The amplitude of the current reduces the amplitude of the gate voltage oscillation.

3. A design method for a protection circuit for gate mis-opening during the shutdown period of a GaN HEMT, characterized in that: Without changing the gate drive circuit of the device, the amplitude of the Miller current is suppressed based on the voltage change rate of the device drain, including the following steps: Step 1: Determine the maximum drain voltage of the GaN HEMT device under the designed operating conditions and select L accordingly m With C m The withstand voltage index of the component; Step 2: Determine the switching frequency of the GaN HEMT device and the maximum dv / dt of the drain voltage to select the magnetic component L m The core material; Step 3: Confirm the maximum current and effective value of the GaN HEMT device when it is turned on under the designed working conditions, and determine the magnetic component L m Size; Step 4: Select the appropriate passive component auxiliary network L according to the GaN HEMT device switching frequency and maximum power of the designed working condition. m -C m Manufacturing process: If the switching frequency is lower than 10MHz, choose discrete integration to design the passive component auxiliary network; if the switching frequency is not lower than 10MHz, choose on-chip integration or package bonding to design the passive component auxiliary network; Step 5: PCB production: solder the passive component auxiliary network close to the GaN HEMT device on the PCB board to reduce the parasitic effect between the passive component auxiliary network and the device drain. The gate of the GaN HEMT device is designed for charging / discharging circuit according to the traditional method.

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