An Automatic Negotiation and Link Training Architecture and Control Method Based on FPGA
Through the FPGA-based automatic negotiation and link training architecture, the flexibility and applicability of traditional ASIC Ethernet AN/LT circuits are solved, channel rebinding and multi-protocol support are realized, data transmission stability and accuracy are improved, and it is suitable for high-speed, large data volume communication scenarios.
Patent Information
- Application Number
- CN202510031128.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-08
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2045-01-08
AI Technical Summary
Traditional ASIC Ethernet AN/LT circuits have limitations in terms of flexibility and applicability, and cannot support channel rebinding and multi-protocol adaptation, and the integration of AN auxiliary logic in the PCS layer causes chip area and timing problems.
Using an FPGA-based automatic negotiation and link training architecture, the PMA physical media connection module, SWH switching and processing module, PCS physical coding sub-layer module, AN auxiliary logic module and AN/LT channel control logic module are implemented to realize channel rebinding and multi-protocol support. AN auxiliary logic is separated from the PCS layer to reduce chip area and timing delay.
It improves the system's ability to deal with complex and variable working conditions, reduces signal transmission delay and timing jitter, improves the stability and accuracy of data transmission, and adapts to high-speed, large data volume communication scenarios.
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Figure CN119865534B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of Ethernet communication, and particularly relates to an automatic negotiation and link training architecture and control method based on FPGA. Background Art
[0002] The AN / LT architecture, namely the Auto-negotiation (AN) and Link Training (LT) architecture, is a key technology for rate adaptation and signal optimization in high-speed Ethernet communication. In high-speed Ethernet communication, a series of preparatory works need to be carried out between communication terminals before data transmission to ensure smooth communication. Among them, Auto-negotiation (AN) is a method of finding the best configuration supported by both communication parties through negotiation, while Link Training (LT) is a process of adjusting the characteristics of the transmission signal to ensure the best transmission of the signal through the link.
[0003] Due to its customized characteristics, the traditional ASIC (Application Specific Integrated Circuit) Ethernet AN / LT architecture has limitations in many aspects. First, it does not support channel re-binding, which means that when it is necessary to change the channel configuration to adapt to different application scenarios, the traditional ASIC architecture cannot respond flexibly. Second, the auxiliary logic of the traditional ASIC Ethernet AN / LT circuit is integrated in the PCS (Physical Coding Sublayer) sublayer of the SerDes (Serializer / Deserializer), and this design is not only inflexible but also limits its application scenarios. In addition, the traditional ASIC Ethernet AN / LT circuit usually only supports a single protocol and cannot meet the requirements of the FPGA (Field Programmable Gate Array) scenario with flexible applicable scenarios.
[0004] As a programmable hardware platform, FPGA has a wide range of applications in the communication field. In the FPGA scenario, the AN / LT function of the SerDes needs to support each lane of the PMA (Physical Medium Attachment) as the main lane, and at the same time, the PMA needs to be able to support the MAC (Media Access Control) connection of multiple links, and any lane can be used as the master lane. In addition, the SerDes of the FPGA also needs to support protocols without the AN / LT function. However, the traditional ASIC Ethernet AN / LT circuit cannot meet these requirements. Therefore, a more flexible AN / LT architecture needs to be designed for the FPGA scenario. Summary of the Invention
[0005] In view of this, the present invention provides an automatic negotiation and link training architecture and control method based on FPGA to solve the problem that the traditional ASIC Ethernet AN / LT circuit has limitations in terms of flexibility and applicability.
[0006] In a first aspect, the present invention provides an automatic negotiation and link training architecture based on FPGA, and the automatic negotiation and link training architecture includes:
[0007] A PMA physical medium connection module, configured to establish a physical connection between a target communication device and a physical transmission medium; the PMA physical medium connection module includes a plurality of channels, and an AN / LT unit is arranged on each channel, and the AN / LT unit is configured to perform automatic negotiation and link training functions on the corresponding channel;
[0008] An SWH switching and processing module, located between the PMA physical medium connection module and the PCS physical coding sublayer module, is configured to receive the data of the plurality of channels of the PMA physical medium connection module, and distribute the data of the plurality of channels to the corresponding PCS physical coding sublayer module;
[0009] A PCS physical coding sublayer module, configured to perform encoding operations and decoding operations on the allocated channel data;
[0010] An AN auxiliary logic module and an AN / LT channel control logic module are respectively connected to the SWH switching and processing module and are independent of the PCS physical coding sublayer module; the AN auxiliary logic module is configured to assist the automatic negotiation function of the AN / LT unit, and the AN / LT channel control logic module is configured to control the automatic negotiation and link training process of the AN / LT unit, as well as channel re-binding processing.
[0011] In an optional implementation manner, the automatic negotiation is used to determine the best communication parameters supported by both communication parties, and the link training is used to optimize the transmission characteristics of signals on the channel link.
[0012] In an optional implementation manner, the SWH switching and processing module is further configured to distribute the data of the plurality of channels to the corresponding PCS physical coding sublayer module according to a preset data priority and a target transmission requirement.
[0013] In an optional implementation manner, the PCS physical coding sublayer module is further configured to be compatible with multiple coding formats to adapt to different communication protocols and data types.
[0014] In an optional implementation manner, the AN auxiliary logic module includes:
[0015] An AN status monitoring unit, configured to monitor various status information in the automatic negotiation process in real time;
[0016] An AN completion signal monitoring unit, configured to detect a successful completion signal of the automatic negotiation process;
[0017] The FEC protocol monitoring unit is used to monitor the FEC protocol to correct transmission errors during data transmission;
[0018] The AN protocol new page monitoring unit is used to track and detect newly emerging protocol pages;
[0019] The AN connection status output unit is used to output the connection status information after auto - negotiation processing.
[0020] In an optional implementation, the AN / LT channel control logic module includes:
[0021] The AN operation control unit is used to control the start, pause, stop of the auto - negotiation process and the switching operations in different stages;
[0022] The LT enable control unit is used to control the enabling and disabling of the link training function;
[0023] The signal handshake unit is used to control the signal handshake operation between the master channel and the slave channel.
[0024] In a second aspect, the present invention provides a control method for an auto - negotiation and link training architecture based on FPGA. The control method is applied to an auto - negotiation and link training architecture based on FPGA as described above, and the control method includes:
[0025] Through the SWH exchange and processing module, distribute the multi - channel data of the PMA physical medium connection module to the corresponding PCS physical coding sub - layer modules;
[0026] Through the AN / LT channel control logic module, based on the distribution result of the multi - channel data, perform the dynamic binding operation between the multi - channels; the dynamic binding operation includes adjusting the master - slave relationship and the signal transmission path of each channel.
[0027] In an optional implementation, the performing the dynamic binding operation between the multi - channels through the AN / LT channel control logic module based on the distribution result of the multi - channel data includes:
[0028] Obtain the target binding indication through the AN / LT channel control logic module and send the binding data to the PMA physical medium connection module based on the distribution result of the multi - channel data;
[0029] After the binding operation of the AN / LT unit in the PMA physical medium connection module is completed, return the binding success status signal to the AN / LT channel control logic module through the PMA physical medium connection module for subsequent data transmission processing;
[0030] Obtain a re-binding indication through the AN / LT channel control logic module, and send re-binding data to the PMA physical medium connection module based on the allocation result of the multiple channel data;
[0031] After the re-binding operation is completed in the AN / LT unit of the PMA physical medium connection module, return a re-binding success status signal to the AN / LT channel control logic module through the PMA physical medium connection module to re-perform subsequent data transmission processing.
[0032] In a third aspect, the present invention provides a computer device, including: a memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to execute a control method for an automatic negotiation and link training architecture based on FPGA according to the second aspect or any corresponding implementation manner thereof.
[0033] In a fourth aspect, the present invention provides a computer-readable storage medium, on which computer instructions are stored, and the computer instructions are used to cause a computer to execute a control method for an automatic negotiation and link training architecture based on FPGA according to the second aspect or any corresponding implementation manner thereof.
[0034] In a fifth aspect, the present invention provides a computer program product, including computer instructions, and the computer instructions are used to cause a computer to execute a control method for an automatic negotiation and link training architecture based on FPGA according to the second aspect or any corresponding implementation manner thereof.
[0035] The technical solution provided by the present invention may include the following beneficial effects:
[0036] In the aspect of the automatic negotiation and link training (AN / LT) process of Ethernet, the present invention allows flexible configuration through soft logic, breaks the relatively fixed setting mode in the past, and can adjust various parameters and links in the AN / LT process according to different network environments and device requirements, greatly improving the system's ability to cope with complex and changeable working conditions. Moreover, the present invention separates the AN auxiliary logic module from the PCS physical coding sublayer module of SerDes, reducing the chip area it occupies; after removing the AN auxiliary logic module in the PCS physical coding sublayer module, the logic path is reduced, significantly reducing the signal transmission delay, reducing the timing jitter in data transmission, and improving the stability and accuracy of data transmission. This enables the present invention to operate stably at a higher frequency, avoid communication failures such as error codes and packet losses caused by timing problems, ensure the high-quality operation of the communication link, and adapt to high-speed rate and large data volume communication scenarios. Description of the Drawings
[0037] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0038] Figure 1 is a schematic structural diagram according to the existing AN / LT architecture;
[0039] Figure 2 is a schematic structural diagram of a FPGA-based auto-negotiation and link training architecture according to an embodiment of the present invention;
[0040] Figure 3 is a flowchart of a control method for a FPGA-based auto-negotiation and link training architecture according to an embodiment of the present invention;
[0041] Figure 4 is a schematic diagram of channel re-binding of a flexible AN / LT architecture based on FPGA according to an embodiment of the present invention;
[0042] Figure 5 is a schematic hardware structure diagram of a computer device according to an embodiment of the present invention. Specific Embodiments
[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.
[0044] In the related art, most of the SerDes designed by ASIC are custom protocols and do not support channel re-binding. Only the SerDes that supports Ethernet supports AN / LT, and its AN auxiliary logic is integrated in the PCS layer. Its general schematic structural diagram is as Figure 1 shown. The AN auxiliary logic is solidified in the PCS layer, which is neither flexible enough, affects its area and timing, and cannot achieve multi-channel re-binding. For example, if the current application needs to bind lane0 and lane1, and the next application needs to bind lane0 and lane2, the traditional AN / LT architecture cannot perform the above functions.
[0045] It should be noted that in the ASIC (Application Specific Integrated Circuit) design of related technologies, most SerDes adopt custom protocols. Such SerDes with custom protocols have relatively single functions and do not have the ability to rebind channels. That is to say, they cannot flexibly adjust the combination relationship between channels according to the dynamic changes of the actual application scenario to meet different data transmission requirements. Only SerDes designed for Ethernet support auto-negotiation (AN) and link training (LT), which greatly limits the utilization of AN / LT functions in non-Ethernet application scenarios.
[0046] Please refer to Figure 1 the structural schematic diagram of the existing AN / LT architecture shown, the structural schematic diagram of the AN / LT architecture of the prior art. In SerDes that support Ethernet, the AN auxiliary logic is integrated in the PCS (Physical Coding Sublayer). This fixed layout brings many disadvantages:
[0047] Lack of flexibility: Since it is fixed in the PCS layer, the AN auxiliary logic cannot change its own configuration or call method as needed, making it difficult for technicians to optimize and adjust it according to the changing application scenarios, resulting in a significant reduction in the flexibility of the entire system.
[0048] Area and timing issues: Integrating in the PCS layer occupies a certain physical chip space, making it difficult to streamline the chip area; at the same time, it also lengthens the logical path of signal transmission, resulting in affected timing, and unstable conditions such as signal transmission delay and jitter are likely to occur, limiting the high-frequency stable operation ability of the system.
[0049] Insufficient channel binding ability: Under the traditional architecture, due to design limitations, multi-channel rebinding cannot be achieved. For example, in the face of different channel binding requirements proposed by different application scenarios, such as the current application needs to bind lane0 and lane1 together to transmit data, and the next application needs to bind lane0 and lane2, this dynamically changing requirement exceeds the capabilities of the traditional AN / LT architecture, making it unable to adapt to complex and changing actual business scenarios.
[0050] Based on this, a flexible AN / LT architecture design based on the FPGA solution proposed by the present invention utilizes the programmable characteristics of the FPGA, adds channel rebinding soft logic, and removes the AN auxiliary logic from the PCS layer and rebuilds it with soft logic, which can adjust various parameters and links in the AN / LT process according to different network environments and device requirements, greatly improving the system's ability to handle complex and changing working conditions.
[0051] In this embodiment, an auto-negotiation and link training architecture based on FPGA is provided. Figure 2FIG. 0 is a schematic structural diagram of an automatic negotiation and link training architecture based on FPGA according to an embodiment of the present invention. The automatic negotiation and link training architecture includes:
[0052] A PMA (Physical Medium Attachment) physical medium connection module, configured to establish a physical connection between a target communication device and a physical transmission medium; the PMA physical medium connection module includes a plurality of channels, and an AN / LT (Auto-Negotiation / Link Training) unit is provided on each of the channels, and the AN / LT unit is configured to perform auto-negotiation and link training functions on the corresponding channels;
[0053] An SWH (Switching and Handling) switching and processing module, located between the PMA physical medium connection module and the PCS (Physical Coding Sublayer) physical coding sublayer module, configured to receive data of a plurality of channels of the PMA physical medium connection module, and distribute the data of the plurality of channels to the corresponding PCS physical coding sublayer modules;
[0054] A PCS physical coding sublayer module, configured to perform encoding operations and decoding operations on the allocated channel data;
[0055] An AN (Auto-Negotiation) auxiliary logic module and an AN / LT channel control logic module are respectively connected to the SWH switching and processing module and are independent of the PCS physical coding sublayer module; the AN auxiliary logic module is configured to assist the auto-negotiation function of the AN / LT unit, and the AN / LT channel control logic module is configured to control the auto-negotiation and link training processes of the AN / LT unit, as well as channel re-binding processing.
[0056] Further, the PMA physical medium connection module includes a plurality of channels (such as lane0 to laneN), and each lane has an AN / LT unit. The PMA physical medium connection module is responsible for connecting to a physical transmission medium (such as a cable, an optical fiber, etc.), and is an interface for data to enter and leave the physical medium. The AN / LT unit performs auto-negotiation and link training functions on each lane. Auto-negotiation is used to determine the best communication parameters supported by both communication parties (such as transmission rate, duplex mode, etc.), and link training is used to optimize the transmission characteristics of signals on the link to ensure reliable data transmission.
[0057] The SWH switching and processing module is located between the PMA physical medium connection module and the PCS physical coding sublayer module, and plays a pivotal role in data transmission and processing. The SWH switching and processing module receives data of a plurality of lanes (i.e., channel data) from the PMA physical medium connection module, and distributes these data to subsequent PCS physical coding sublayer modules or other relevant modules for processing according to certain rules and requirements. At the same time, it can also perform some preliminary processing or switching operations on the data to meet the overall communication requirements of the system.
[0058] Figure 2It includes multiple PCS physical coding sublayer modules, which are respectively connected to the SWH switching and processing module. The PCS physical coding sublayer module is responsible for encoding and decoding data at the physical layer. Encoding is to convert the data from the upper layer into a signal format suitable for transmission on the physical medium, and decoding is to restore the signal received from the physical medium to the original data for subsequent processing and transmission.
[0059] The AN auxiliary logic module is mainly used to assist the auto-negotiation function of the AN / LT unit, such as monitoring the auto-negotiation status, providing relevant auxiliary information, etc., to ensure the smooth progress and accuracy of the auto-negotiation process. The AN / LT channel control logic module is used to control the link training process of the AN / LT unit and channel-related operations, such as controlling the start, stop, and parameter adjustment of link training, as well as managing and controlling some characteristics and states of the channel to optimize link performance and ensure the normal operation of the channel.
[0060] Figure 2 In it, each channel lane's AN / LT unit in the PMA physical medium connection module is connected to the SWH switching and processing module through an arrow, indicating that data is transmitted from each channel lane of the PMA physical medium connection module to the SWH switching and processing module. The SWH switching and processing module is connected to multiple PCS physical coding sublayer modules, and the arrow direction indicates that data flows from the SWH switching and processing module to the PCS physical coding sublayer module, realizing the transfer and interaction of data between different modules. The SWH switching and processing module is also respectively connected to the AN auxiliary logic module and the AN / LT channel control logic module. These connection relationships show that the AN auxiliary logic module and the AN / LT channel control logic module are removed from the PCS layer and cooperate with the PCS physical coding sublayer module to complete the relevant functions and operations in the entire communication process.
[0061] In an alternative embodiment, the auto-negotiation is used to determine the best communication parameters supported by both communication parties, and the link training is used to optimize the transmission characteristics of signals on the channel link.
[0062] In an alternative embodiment, the SWH switching and processing module is also used to allocate the multiple channel data to the corresponding PCS physical coding sublayer modules according to the preset data priority and target transmission requirements.
[0063] In an alternative embodiment, the PCS physical coding sublayer module is also used to be compatible with multiple coding formats to adapt to different communication protocols and data types.
[0064] In an alternative embodiment, the AN auxiliary logic module includes:
[0065] The AN status monitoring unit is used to monitor various status information in the auto-negotiation process in real time;
[0066] The AN completion signal monitoring unit is used to detect the successful completion signal of the auto-negotiation process;
[0067] The FEC protocol monitoring unit is used to monitor the FEC protocol to correct transmission errors during data transmission;
[0068] The AN protocol new page monitoring unit is used to track and detect newly emerging protocol pages;
[0069] The AN connection status output unit is used to output the connection status information after the auto-negotiation process.
[0070] Furthermore, the AN auxiliary logic of this embodiment includes AN status monitoring, AN completion signal monitoring, FEC protocol monitoring, AN protocol new page monitoring, and AN connection status output. That is to say, in the Ethernet AN / LT architecture of this embodiment, each component of the AN auxiliary logic module has the following meanings:
[0071] The AN status monitoring unit: It is used to monitor various status information in the auto-negotiation (AN) process in real time, such as the parameter matching progress between the two communication parties during the negotiation process, the current negotiation strategy status, etc., so as to timely understand the dynamic situation of the negotiation and provide a basis for subsequent decisions or adjustments.
[0072] The AN completion signal monitoring unit: It mainly detects the signal indicating whether the auto-negotiation is successfully completed. Once this signal is detected, it means that the two parties have determined appropriate communication parameters, such as transmission rate, duplex mode, etc., and can enter the normal data transmission stage or trigger subsequent related operations.
[0073] The FEC (Forward Error Correction) protocol monitoring unit: During data transmission, the forward error correction protocol can be used to correct transmission errors. Monitoring the FEC protocol can ensure the normal operation of the FEC mechanism in the AN process and subsequent data transmission, timely discover problems in the execution process of the FEC protocol, such as whether the error correction ability is normal, whether there is a protocol mismatch, etc., and ensure the reliable transmission of data.
[0074] The AN protocol new page monitoring unit: In some complex AN protocols, there may be multiple pages of protocol content. This monitoring function is responsible for tracking and detecting whether a new protocol page appears, ensuring that no important protocol information is missed, and ensuring that the negotiation process follows the complete protocol specification.
[0075] AN connection status output unit: Outputs the connection status information after auto-negotiation to other relevant modules or systems. This connection status information may include whether the connection is successfully established, the stability of the connection, the key parameters determined through negotiation, etc., so that other parts of the system can perform corresponding operations based on the connection status, such as adjusting resource allocation, starting the data transmission process, or conducting fault diagnosis.
[0076] In an optional implementation manner, the AN / LT channel control logic module includes:
[0077] AN operation control unit: Used to control the start, pause, stop, and switching operations at different stages of the auto-negotiation process.
[0078] LT enable control unit: Used to control the enabling and disabling of the link training function.
[0079] Signal handshake unit: Used to control the signal handshake operation between the master channel and the slave channel.
[0080] Furthermore, the AN / LT channel control logic of this embodiment includes AN operation control, LT enable control, and signal handshake (i.e., signal handshake between the master lane and the slave lane). That is to say, in the Ethernet AN / LT architecture of this embodiment, each component of the AN / LT channel control logic module has the following meanings:
[0081] AN operation control unit: Mainly responsible for controlling operations such as the start, pause, stop, and switching at different stages of the auto-negotiation (AN) process. For example, when the system needs to re-negotiate communication parameters or trigger the AN process under specific conditions, the AN operation control unit will issue corresponding instructions to drive the AN process to proceed according to the predetermined logic, ensuring the orderliness and effectiveness of the AN operation.
[0082] LT enable control unit: Used to control the enabling and disabling of the link training (LT) function. In some cases, such as system initialization, link state change, or according to specific application requirements, it is necessary to turn on or off the LT function to adjust the transmission signal characteristics to optimize the link performance. The LT enable control unit can accurately control the state transition of the link training (LT) function according to the system state and instructions, ensuring that the link training process occurs at the appropriate time.
[0083] Signal Handshaking Unit: In a multi-lane architecture, the concepts of master lane and slave lane exist. The signal handshaking mechanism ensures effective communication and coordination between the master lane and the slave lane. For example, before data transmission, signal handshaking is used to confirm whether both parties are ready. During the transmission process, it can also be used to transmit status information, error indications, etc., to maintain reliable transmission and collaborative work of data between different lanes, achieve effective interaction and cooperation between lanes during the channel re-binding process, and ensure the stability and flexibility of the system.
[0084] Furthermore, the SWH switching and processing module in this embodiment realizes data distribution through SWH logic. The SWH switching and processing module acts as a hub for data distribution here. It can distribute the data received from the PMA physical medium connection module to different PCS physical coding sub-layer modules. Through the reasonable allocation of the SWH switching and processing module in this embodiment, data can be sent to the most suitable PCS physical coding sub-layer module for subsequent processing according to different application requirements. The AN auxiliary logic of the AN auxiliary logic module is implemented by soft logic, realizing the decoupling of the PCS sub-layer and the AN auxiliary logic. The AN auxiliary logic module is no longer an inherent part of the PCS sub-layer, thus reducing the hardware implementation area of the PCS sub-layer. For chip design, this can save valuable chip area, reduce the manufacturing cost of the chip, improve the integration of the chip, and leave more space for other functional modules. Moreover, in this embodiment, the AN auxiliary logic is separated, reducing the logical path interference to the PCS sub-layer and the timing impact on it, enabling the encoding and decoding processes of data in the PCS sub-layer to be more accurate and faster, and improving the overall performance of the system. In addition, the AN auxiliary logic module and the AN / LT channel control logic module are built by FPGA soft logic. Since FPGA (Field Programmable Gate Array) soft logic is used to build the AN auxiliary logic and the AN / LT channel re-binding logic, they are no longer fixed hardware circuits but software logic that can be flexibly adjusted and modified through programming. This means that during the system operation or at different project development stages, technicians can conveniently modify the functions and behaviors of these logics according to specific requirements, greatly improving the flexibility and efficiency of development. This embodiment can be specially customized for different application scenarios, greatly increasing the flexibility of use, and can also be quickly transplanted for different hardware, greatly increasing the versatility.
[0085] In summary, in terms of the auto-negotiation and link training (AN / LT) process of Ethernet, this embodiment allows for flexible configuration through soft logic, breaking the relatively fixed setting mode in the past. It can adjust various parameters and links in the AN / LT process according to different network environments and device requirements, greatly enhancing the system's ability to handle complex and changing working conditions. Moreover, this embodiment separates the AN auxiliary logic module from the PCS physical coding sublayer module of the SerDes, reducing the chip area it occupies. After removing the AN auxiliary logic module from the PCS physical coding sublayer module, the logic path is reduced, significantly reducing signal transmission delay, reducing timing jitter in data transmission, and enhancing the stability and accuracy of data transmission. This enables this embodiment to operate stably at a higher frequency, avoiding communication failures such as error codes and packet losses caused by timing problems, ensuring the high-quality operation of the communication link, and adapting to high-speed and large-data-volume communication scenarios.
[0086] According to an embodiment of the present invention, there is provided an embodiment of a control method for an auto-negotiation and link training architecture based on FPGA. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. And although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.
[0087] In this embodiment, there is provided a control method for an auto-negotiation and link training architecture based on FPGA. This control method is applied to Figure 2 an auto-negotiation and link training architecture based on FPGA as shown in Figure 3 FIG. Figure 3 is a flowchart of a control method for an auto-negotiation and link training architecture based on FPGA according to an embodiment of the present invention. As shown in
[0088] Step S301, through the SWH switching and processing module, distribute the multiple-channel data of the PMA physical medium connection module to the corresponding PCS physical coding sublayer module.
[0089] Further, step S301 is mainly responsible for initially allocating and processing the channel data received from the PMA physical medium connection module. The PMA physical medium connection module contains multiple channels, and each channel carries data to be transmitted. This data may come from different data sources or have different characteristics. As the hub of data allocation, the SWH switching and processing module distributes this channel data to the corresponding PCS physical coding sublayer modules according to certain rules. Different PCS physical coding sublayer modules can be responsible for different types of data processing. Through reasonable allocation, the data can be allocated to the most suitable processing unit, improving the processing efficiency of the entire system. For example, according to the priority of the data, the data type, or the information of the target receiver, the SWH switching and processing module distributes the data to different PCS physical coding sublayer modules for more accurate encoding or decoding operations in the future.
[0090] Step S302, through the AN / LT channel control logic module, based on the allocation results of the multiple channel data, performs dynamic binding operations between the multiple channels; the dynamic binding operations include adjusting the master-slave relationship of each channel and the signal transmission path.
[0091] Further, step S302 aims to dynamically adjust the relationship between multiple channels and the signal transmission path according to the current channel data allocation situation to optimize the performance and reliability of the entire communication link. The AN / LT channel control logic module decides how to perform the binding operation on the channels based on the allocation results of the multiple channel data. In a multi-channel communication system, some channels may be set as master channels, while other channels are slave channels. By adjusting the master-slave relationship, the data transmission process can be optimized. Different signal transmission paths may have different performance characteristics, such as different bandwidths, delays, or reliabilities. By dynamically adjusting the signal transmission path, the data can select the most suitable path for transmission, avoiding congestion or failures on certain paths from affecting data transmission. For example, when it is detected that the performance of a certain transmission path decreases or a failure occurs, the data can be switched to other paths with better performance to ensure the continuity and efficiency of data transmission.
[0092] In an alternative embodiment, step S302 includes:
[0093] Obtain a target binding instruction through the AN / LT channel control logic module and send binding data to the PMA physical medium connection module based on the allocation results of the multiple channel data;
[0094] After the binding operation is completed in the AN / LT unit of the PMA physical medium connection module, the PMA physical medium connection module returns a binding success status signal to the AN / LT channel control logic module for subsequent data transmission processing;
[0095] The AN / LT channel control logic module obtains the re-binding indication and sends the re-binding data to the PMA physical medium connection module based on the allocation result of the multiple channel data;
[0096] After the re-binding operation is completed in the AN / LT unit of the PMA physical medium connection module, the PMA physical medium connection module returns the status signal of successful re-binding to the AN / LT channel control logic module to re-perform subsequent data transmission processing.
[0097] Furthermore, the AN / LT channel control logic module first receives the target binding indication from other parts of the system or the upper control unit. This indication contains information on how to bind channels, such as which channels need to be bound together and in what way. The AN / LT channel control logic module sends the corresponding binding data to the PMA physical medium connection module based on the received binding indication and the existing allocation result of the multiple channel data. The AN / LT unit in the PMA physical medium connection module completes the actual binding operation at the physical layer according to the received binding data, including adjusting the channel connection, configuration, etc. After the binding operation is completed, the PMA physical medium connection module sends a status signal of successful binding to the AN / LT channel control logic module to notify it that the binding operation has been completed. After receiving this status signal, the AN / LT channel control logic module performs subsequent data transmission processing according to this information, such as adjusting the data sending and receiving strategies according to the bound channel status to ensure stable data transmission on the bound channels. Similar to the acquisition of the target binding indication, the re-binding indication is generated when the system needs to re-adjust the channel binding relationship, which may be triggered by reasons such as changes in the link state, changes in the network environment, or dynamic adjustment requirements of system performance. The AN / LT channel control logic module sends the re-binding data containing the new binding requirements to the PMA physical medium connection module based on the re-binding indication and the channel data allocation result to guide the AN / LT unit to perform the re-binding operation. The AN / LT unit in the PMA physical medium connection module performs the re-binding operation according to the re-binding data and re-adjusts the channel connection and configuration. After the re-binding operation is completed, the PMA physical medium connection module returns the status signal of successful re-binding to the AN / LT channel control logic module. After receiving this signal, the AN / LT channel control logic module re-evaluates and optimizes the subsequent data transmission processing according to the new channel status, such as updating the data transmission route, reallocating bandwidth, or adjusting the transmission priority, etc., to adapt to the new channel binding situation and ensure the continuous efficiency and stability of data transmission.
[0098] Furthermore, please refer to Figure 4Schematic diagram of channel re-binding of the FPGA-based flexible AN / LT architecture shown. In this embodiment, by adding an AN / LT channel control logic module, arbitrary binding between multiple channels is achieved. For example, Figure 4 As shown, in a hardware device with 4 lanes, if the current application requires the binding of lane0 and lane1, the AN / LT channel control logic module sends re-binding data to the PMA (Physical Medium Attachment) physical medium connection module. After the AN / LT unit of the PMA physical medium connection module finishes running, it returns the status signal of successful binding to the AN / LT channel control logic module and proceeds with subsequent data transmission. If the subsequent application requires the binding of lane0 and lane2, the AN / LT channel control logic module sends re-binding data to the PMA physical medium connection module again. After the AN / LT unit of the PMA physical medium connection module finishes running, it returns the status signal of successful binding to the AN / LT channel control logic module and re-performs subsequent data transmission.
[0099] In summary, in terms of the auto-negotiation and link training (AN / LT) process of Ethernet, this embodiment allows for flexible configuration through soft logic, breaking the relatively fixed setting mode in the past. It can adjust various parameters and links in the AN / LT process according to different network environments and device requirements, greatly enhancing the system's ability to handle complex and changing working conditions. Moreover, this embodiment separates the AN auxiliary logic module from the PCS (Physical Coding Sublayer) module of SerDes, reducing the chip area it occupies. After removing the AN auxiliary logic module from the PCS physical coding sublayer module, the logical path is reduced, significantly reducing the signal transmission delay, reducing the timing jitter in data transmission, and enhancing the stability and accuracy of data transmission. This enables this embodiment to operate stably at a higher frequency, avoiding communication failures such as error codes and packet losses caused by timing problems, ensuring the high-quality operation of the communication link, and adapting to high-speed and large-data-volume communication scenarios.
[0100] An embodiment of the present invention also provides a computer device. Please refer to Figure 5 , Figure 5 which is a schematic structural diagram of a computer device provided by an optional embodiment of the present invention. As shown in Figure 5As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including a high-speed interface and a low-speed interface. Each component communicates with each other using different buses and can be installed on a common motherboard or installed in other ways as needed. The processor can process instructions executed within the computer device, including instructions stored in the memory or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some alternative embodiments, if needed, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a set of blade servers, or a multi-processor system). Figure 5 In the figure, a processor 10 is taken as an example.
[0101] The processor 10 can be a central processing unit, a network processor, or a combination thereof. Among them, the processor 10 can further include a hardware chip. The above hardware chip can be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The above programmable logic device can be a complex programmable logic device, a field-programmable gate array, a generic array logic, or any combination thereof.
[0102] Among them, the memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiments.
[0103] The memory 20 can include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created according to the use of the computer device, etc. In addition, the memory 20 can include a high-speed random access memory and can also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some alternative embodiments, the memory 20 can optionally include a memory remotely set relative to the processor 10, and these remote memories can be connected to the computer device through a network. Examples of the above network include but are not limited to the Internet, an enterprise intranet, a local area network, a mobile communication network, and a combination thereof.
[0104] The memory 20 can include a volatile memory, such as a random access memory; the memory can also include a non-volatile memory, such as a flash memory, a hard disk, or a solid-state drive; the memory 20 can also include a combination of the above types of memories.
[0105] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or communication networks.
[0106] Embodiments of the present invention also provide a computer-readable storage medium. The method according to the embodiments of the present invention can be implemented in hardware, firmware, or be implemented as computer code that can be recorded on a storage medium, or be implemented as computer code that is originally stored in a remote storage medium or a non-transitory machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored as such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method shown in the above embodiments is implemented.
[0107] A part of the present invention can be applied as a computer program product, such as computer program instructions. When executed by a computer, through the operation of the computer, the method and / or technical solution according to the present invention can be called or provided. Those skilled in the art should be able to understand that the forms of existence of computer program instructions in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Herein, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to the computer.
[0108] Although the embodiments of the present invention are described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations all fall within the defined scope.
Claims
1. An automatic negotiation and link training architecture based on FPGA, characterized in that, The automatic negotiation and link training architecture includes: A PMA (Physical Medium Attachment) physical medium connection module for establishing a physical connection between a target communication device and a physical transmission medium; the PMA physical medium connection module includes multiple channels, and an AN / LT (Auto-Negotiation / Link Training) unit is provided on each channel for performing auto-negotiation and link training functions on the corresponding channel; A SWH (Switching and Handling) switching and processing module located between the PMA physical medium connection module and the PCS (Physical Coding Sublayer) physical coding sublayer module for receiving the multiple channel data of the PMA physical medium connection module and distributing the multiple channel data to the corresponding PCS physical coding sublayer modules; A PCS physical coding sublayer module for performing encoding and decoding operations on the allocated channel data; An AN (Auto-Negotiation) auxiliary logic module and an AN / LT channel control logic module, which are respectively connected to the SWH switching and processing module and are independent of the PCS physical coding sublayer module; the AN auxiliary logic module is used to assist the auto-negotiation function of the AN / LT unit, and the AN / LT channel control logic module is used to control the auto-negotiation and link training processes of the AN / LT unit, as well as channel re-binding processing.
2. The automatic negotiation and link training architecture according to claim 1, wherein The auto-negotiation is used to determine the best communication parameters supported by both communication parties, and the link training is used to optimize the transmission characteristics of signals on the channel link.
3. The automatic negotiation and link training architecture according to claim 1, wherein The SWH switching and processing module is also used to distribute the multiple channel data to the corresponding PCS physical coding sublayer modules according to preset data priorities and target transmission requirements.
4. The automatic negotiation and link training architecture according to claim 1, characterized in that The PCS physical coding sublayer module is also used to be compatible with multiple coding formats to adapt to different communication protocols and data types.
5. The automatic negotiation and link training architecture according to claim 1, wherein The AN auxiliary logic module includes: An AN status monitoring unit for real-time monitoring of various status information during the auto-negotiation process; An AN completion signal monitoring unit for detecting the successful completion signal of the auto-negotiation process; An FEC (Forward Error Correction) protocol monitoring unit for monitoring the FEC protocol to correct transmission errors during data transmission; An AN protocol new page monitoring unit for tracking and detecting newly emerged protocol pages; An AN connection status output unit for outputting the connection status information after auto-negotiation processing.
6. The automatic negotiation and link training architecture according to claim 1, characterized in that, The AN / LT channel control logic module includes: An AN operation control unit for controlling the start, pause, stop, and switching operations at different stages of the auto-negotiation process; An LT (Link Training) enable control unit for controlling the enabling and disabling of the link training function; A signal handshake unit for controlling the signal handshake operation between the main channel and the slave channel.
7. A control method for an automatic negotiation and link training architecture based on FPGA, the control method being applied to an automatic negotiation and link training architecture based on FPGA according to any one of claims 1 to 6, characterized in that, The control method includes: Distributing the multiple channel data of the PMA physical medium connection module to the corresponding PCS physical coding sublayer modules through the SWH switching and processing module; Performing dynamic binding operations between the multiple channels based on the distribution results of the multiple channel data through the AN / LT channel control logic module; the dynamic binding operations include adjusting the master-slave relationship and signal transmission paths of each channel.
8. The control method according to claim 7, wherein The AN / LT channel control logic module performs dynamic binding operations among the multiple channels based on the allocation results of the multiple channel data, including: Obtaining a target binding indication through the AN / LT channel control logic module and sending binding data to the PMA physical medium connection module based on the allocation results of the multiple channel data; After the binding operation of the AN / LT unit of the PMA physical medium connection module is completed, returning a binding success status signal to the AN / LT channel control logic module through the PMA physical medium connection module for subsequent data transmission processing; Obtaining a re-binding indication through the AN / LT channel control logic module and sending re-binding data to the PMA physical medium connection module based on the allocation results of the multiple channel data; After the re-binding operation of the AN / LT unit of the PMA physical medium connection module is completed, returning a re-binding success status signal to the AN / LT channel control logic module through the PMA physical medium connection module to re-perform subsequent data transmission processing.
9. A computer device, characterized in that, Including: A memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to execute the control method of an automatic negotiation and link training architecture based on FPGA according to claim 7 or 8.
10. A computer-readable storage medium, characterized in that, Computer instructions are stored on the computer-readable storage medium, and the computer instructions are used to cause a computer to execute the control method of an automatic negotiation and link training architecture based on FPGA according to claim 7 or 8.
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