Semiconductor device with termination region and passivation layer and preparation method thereof

Abstract

The present invention relates to a semiconductor device with an edge termination region and a passivation layer and a preparation method thereof; the device comprises a substrate, a drift region is provided on the upper end surface of the substrate; a first insulating film is provided on the upper end surface of the substrate; a plurality of guard rings are also provided on the upper end surface of the substrate, each guard ring extends into the drift region, and two adjacent guard rings are separated by the first insulating film; a second insulating film is provided on the first insulating film and the guard rings, a second insulating film through-hole is provided on the second insulating film, and an angle between the inner wall of each second insulating film through-hole and the upper end surface of the substrate is an acute angle; a metal layer is provided in each second insulating film through-hole; a first passivation layer is provided on the second insulating film and the metal layer; a second passivation layer is provided on the first passivation layer; a semiconductor device structure with an edge termination region and a passivation layer is proposed to solve the technical problems that the passivation layer above the metal layer of the existing structure is prone to cracks, humidity and other pollution can penetrate and corrode the metal layer, and there is a high electric field to catalyze the destruction of the terminal.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device with an edge termination region and a passivation layer and a preparation method thereof. Background Art

[0002] Vertical power semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), or fast recovery diodes (FRDs), consist of an active region and a termination region surrounding the active region. The termination region electrically isolates and protects the device from high voltages. There may also be some transition region between the active region and the termination region. The presence of high fields accelerates chemical breakdown and may lead to premature failure of the device. As a result, Figure 1 A vertical power semiconductor device is shown, including a chip 93 having a transition area 91 and a termination area 92. A passivation layer is typically used to cover the termination area to prevent moisture or other corrosive substances in the environment from reaching the termination area. The combination of the termination area and the passivation layer must also operate within the required temperature range, typically -40°C to 150°C. Therefore, appropriate materials, structures, deposition, and etching processes need to be selected.

[0003] Traditional structures include multiple guard rings arranged around the active area (p-ring termination). Some guard rings are implemented through an implantation step followed by diffusion, some are trench structures (trench termination), and some are multiple overlapping impurity steps leading to a continuous reduction in steps (LVD termination). Currently, technical solutions are trending towards more planar solutions. LVD termination requires more silicon area to achieve blocking efficiency and higher patterning to achieve more compact designs.

[0004] like Figure 2 As shown, Figure 1A cross-sectional view of a substrate is shown, including a drift region 94 formed on the substrate. Multiple guard rings (p rings) 95 are also spaced apart on the substrate. Field oxide 96 is formed on the substrate, covered with borophosphosilicate glass (BPSG) 97. A metal plug (AlCu) 98 contacts the field oxide, passivated by silicon-rich nitride 99 and a polyimide film 100. Multiple guard rings 95 are arranged around the active area at increasing intervals, with the spacing between each guard ring determined by the field oxide structure. The field oxide can be formed by etching or selective growth, such as local oxidation of silicon (LOCOS). The guard rings contact a metal field plate, which is typically made from the same metallization layer as the top metal and can be AlCu, AlSi, AlSiCu, or similar materials. The metal rings are patterned by photolithography and then etched at selected locations. To keep feature sizes relatively small, the etch angles must be sharp. The thickness of the metal is typically several microns, as the same layer is used to contact devices in the active area, for example, by wire bonding. The passivation layers conform to the contours of the underlying layers, so they have the same sharp angles as the metal. Figure 3 As shown, in Figure 2 On the basis of the above, a semi-insulating layer 101 of amorphous silicon or similar material is added between the borophosphosilicate glass, metal plug and silicon-rich nitride to alleviate the mechanical stress, but this requires additional processing steps and seriously increases the leakage current of the device. Figure 4 In Figure 2 A partial view of the passivation layer, with Figure a showing the existing critical angle and Figure b showing passivation cracking. Passivation cracking is one of the most common failure mechanisms in power semiconductor devices. It occurs when humidity and other contaminants penetrate and reach the highly corroded aluminum metal structure, while high electric fields catalyze the destruction of the terminals.

[0005] Therefore, in order to solve the above problems, the present invention urgently needs to provide a semiconductor device having an edge termination region and a passivation layer and a preparation method thereof. Summary of the Invention

[0006] The purpose of the present invention is to provide a semiconductor device with an edge termination area and a passivation layer and a preparation method. By proposing a semiconductor device structure with an edge termination area and a passivation layer, the technical problems that the passivation layer above the metal layer of the existing structure is prone to cracks, humidity and other pollution can penetrate and corrode the metal layer, and there is a high electric field to catalyze the destruction of the terminal are solved.

[0007] The present invention provides a semiconductor device having a termination region and a passivation layer, comprising:

[0008] A substrate, the substrate comprising an upper end surface and a lower end surface, wherein the upper end surface of the substrate is provided with a drift region of a first conductive type;

[0009] A first insulating film is provided on the upper end surface of the substrate; a plurality of guard rings of the second conductive type are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film;

[0010] A second insulating film is provided on the first insulating film and the guard rings, and the second insulating film is provided with second insulating film through holes which are connected to the guard rings in a one-to-one correspondence, and an angle between the inner wall of each second insulating film through hole and the upper end surface of the substrate is an acute angle;

[0011] A metal layer is provided in each second insulating film through hole, and an upper end surface of the metal layer located in the second insulating film through hole is lower than an upper end surface of the second insulating film;

[0012] A first passivation layer is provided on the second insulating film and the metal layer;

[0013] A second passivation layer is provided on the first passivation layer.

[0014] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0015] Preferably, the second insulating film is made of phosphosilicate glass.

[0016] Preferably, the first insulating film is made of silicon dioxide;

[0017] The first passivation layer is made of silicon-rich nitride (SiNx);

[0018] The second passivation layer is made of polymer;

[0019] The metal layer is made of Al, AlCu or AlSiC;

[0020] The substrate is a silicon wafer.

[0021] Preferably, the polymer is a polyimide.

[0022] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer according to any one of the above methods, comprising the following steps:

[0023] Performing an oxidation treatment on the substrate and performing thermal growth to form a first insulating film, etching the first insulating film to form a first etching groove communicating with the substrate, implanting boron ions into the first etching groove, and forming guard rings on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film;

[0024] A second insulating film is deposited on the first insulating film and the guard rings, and the second insulating film is patterned and etched to form second insulating film through holes in one-to-one correspondence with each guard ring in the second insulating film, wherein the inner wall of each second insulating film through hole forms an acute angle with the upper end surface of the substrate;

[0025] Depositing metal on the second insulating film and the through hole of the second insulating film to form a metal layer, etching the metal layer to expose the second insulating film, wherein the upper end surface of the metal layer located in the through hole of the second insulating film is lower than the upper end surface of the second insulating film;

[0026] A first passivation layer is deposited on the second insulating film and the metal layer;

[0027] A second passivation layer is deposited on the first passivation layer to obtain a semiconductor device having a termination region and a passivation layer.

[0028] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0029] The present invention also provides a semiconductor device having a termination region and a passivation layer, comprising

[0030] A substrate, the substrate comprising an upper end surface and a lower end surface, wherein the upper end surface of the substrate is provided with a drift region of a first conductive type;

[0031] A first insulating film is provided on the upper end surface of the substrate; a plurality of guard rings of the second conductive type are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film;

[0032] An additional insulating film is provided on the first insulating film and the guard ring;

[0033] A silicon nitride layer is provided on the additional insulating film;

[0034] A second insulating film is provided on the silicon nitride layer;

[0035] Each protective ring is provided with a groove;

[0036] The second insulating film located above the guard ring is provided with a second insulating film through hole that is in one-to-one communication with the silicon nitride layer, and the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle;

[0037] The silicon nitride layer located above the guard ring is provided with a silicon nitride layer through hole connected to the additional insulating film, and the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate is 30° or 70-80°;

[0038] An additional insulating film through-hole communicating with the trench is provided on the additional insulating film located above the guard ring, and the second insulating film through-hole, the silicon nitride layer through-hole, the additional insulating film through-hole and the trench are coaxially arranged;

[0039] Metal tungsten is inserted into the additional insulating film through-holes and trenches;

[0040] A metal layer is provided in the silicon nitride layer through hole and the second insulating film through hole, and the upper end surface of the metal layer is lower than the upper end surface of the second insulating film;

[0041] A first passivation layer is provided on the second insulating film,

[0042] A second passivation layer is provided on the first passivation layer.

[0043] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0044] Preferably, the second insulating film is made of phosphosilicate glass.

[0045] Preferably, the additional insulating film is made of borophosphosilicate glass.

[0046] Preferably, each protective ring has one or more grooves on its upper end surface.

[0047] Preferably, the first insulating film is made of silicon dioxide;

[0048] The first passivation layer is made of silicon-rich nitride (SiNx);

[0049] The second passivation layer is made of polymer;

[0050] The metal layer is made of Al, AlCu or AlSiCu;

[0051] The polymer is polyimide.

[0052] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer according to any one of the above methods, comprising the following steps:

[0053] Performing an oxidation treatment on the substrate and performing thermal growth to form a first insulating film, etching the first insulating film to form a first etching groove communicating with the substrate, implanting boron ions into the first etching groove, forming guard rings on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film, and a trench is formed on each guard ring;

[0054] depositing an additional insulating film on the first insulating film and the guard ring;

[0055] depositing a silicon nitride layer on the additional insulating film;

[0056] A second insulating film is deposited on the silicon nitride layer;

[0057] The second insulating film is patterned and etched to form second insulating film through holes on the second insulating film above the guard ring, which are in one-to-one communication with the silicon nitride layer, and the angle between the inner wall of each second insulating film through hole and the upper end surface of the substrate is an acute angle;

[0058] Etching the silicon nitride layer below the second insulating film through hole to form a silicon nitride layer through hole connected to the additional insulating film, wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate is the same as the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate;

[0059] Etching the additional insulating film from within the through hole of the silicon nitride layer to form an additional insulating film through hole communicating with the trench;

[0060] inserting metal tungsten into the additional insulating film through-holes and trenches;

[0061] Depositing metal on the second insulating film and the through-hole of the second insulating film to form a metal layer, etching the metal layer to expose the second insulating film, wherein the upper end surface of the metal layer in the through-hole of the second insulating film is lower than the upper end surface of the second insulating film;

[0062] A first passivation layer is deposited on the second insulating film and the metal layer;

[0063] A second passivation layer is deposited on the first passivation layer to obtain a semiconductor device having a termination region and a passivation layer.

[0064] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0065] The present invention also provides a semiconductor device having a termination region and a passivation layer, comprising

[0066] A substrate, the substrate comprising an upper end surface and a lower end surface, wherein the upper end surface of the substrate is provided with a drift region of a first conductive type;

[0067] A first insulating film is provided on the upper end surface of the substrate; a plurality of guard rings of the second conductive type are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film;

[0068] An additional insulating film is provided on the first insulating film and the guard ring;

[0069] Each protective ring is provided with a groove;

[0070] An additional insulating film through hole communicating with the trench is provided on the additional insulating film located above the guard ring;

[0071] Metal tungsten is inserted into the additional insulating film through-holes and trenches;

[0072] A silicon nitride layer is provided on the additional insulating film and the additional insulating film through hole;

[0073] A second insulating film is provided on the silicon nitride layer;

[0074] The second insulating film located above the guard ring is provided with a second insulating film through hole that is in one-to-one communication with the silicon nitride layer, and the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle;

[0075] A first passivation layer is provided on the second insulating film and the through hole of the second insulating film, and a lower end surface of the first passivation layer is lower than a lower end surface of the second insulating film;

[0076] A second passivation layer is provided on the first passivation layer.

[0077] Preferably, a conductive polysilicon layer is further provided between the additional insulating film and the guard ring.

[0078] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0079] Preferably, the second insulating film is made of phosphosilicate glass.

[0080] Preferably, the additional insulating film is made of borophosphosilicate glass.

[0081] Preferably, each protective ring has one or more grooves on its upper end surface.

[0082] Preferably, the first insulating film is made of silicon dioxide;

[0083] The first passivation layer is made of silicon-rich nitride (SiNx);

[0084] The second passivation layer is made of polyimide;

[0085] The metal is Al, AlCu or AlSiCu.

[0086] The present invention further provides a method for preparing a semiconductor device having a termination region and a passivation layer according to any one of the above-mentioned methods, comprising the following steps:

[0087] Performing an oxidation treatment on the substrate and performing thermal growth to form a first insulating film, etching the first insulating film to form a first etching groove communicating with the substrate, implanting boron ions into the first etching groove, forming guard rings on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film, and a trench is formed on each guard ring;

[0088] depositing an additional insulating film on the first insulating film and the guard ring;

[0089] Etching the additional insulating film so as to form an additional insulating film through hole communicating with the trench on the additional insulating film above the guard ring;

[0090] inserting metal tungsten into the additional insulating film through-holes and trenches;

[0091] depositing a silicon nitride layer on the additional insulating film;

[0092] A second insulating film is deposited on the silicon nitride layer;

[0093] Etching a second insulating film through hole in one-to-one communication with the silicon nitride layer on the second insulating film above the guard ring, wherein the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle;

[0094] depositing a first passivation layer on the second insulating film,

[0095] A second passivation layer is provided on the first passivation layer, and an upper end surface of the second passivation layer is planarized to obtain a semiconductor device having a terminal region and a passivation layer.

[0096] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0097] Preferably, before depositing the additional insulating film, a conductive polysilicon layer is deposited on the first insulating film and the guard ring, and then etched to expose a portion of the guard ring, and then the additional insulating film is deposited;

[0098] The additional insulating film is etched so that an additional insulating film through hole communicating with the trench or an additional insulating film through hole penetrating the deposited additional insulating film is formed on the additional insulating film above the guard ring.

[0099] The semiconductor device with an edge termination region and a passivation layer and the manufacturing method provided by the present invention have the following improvements compared with the prior art:

[0100] 1. The present invention proposes a semiconductor device with a termination area and a passivation layer. Each guard ring is separated by a first insulating film. A thicker second insulating film is prepared on the first insulating film, and the thicker second insulating film is deposited on the first insulating film. A second insulating film through-hole connected to the guard ring is opened on the second insulating film, and metal is completely deposited in the through-hole to form a metal layer. The metal layer forms a plug-in structure, and the metal layer contacts the guard ring. The cross-section of the second insulating film through-hole is inverted trapezoidal. At the same time, the upper end surface of the metal layer is lower than the upper end surface of the second insulating film. The metal layer is no longer convex like the original structure. The first passivation layer is deposited on the second insulating film and the metal layer. The first passivation layer is flatter, will not have sharp angles, will not crack, and has very stable moisture resistance and chemical corrosion resistance. The design of the above structure has very small mechanical stress on the first passivation layer, and weak electric coupling is generated between the first passivation layer and the metal layer. The second passivation layer is set to further prevent mechanical damage and solid particle contamination.

[0101] 2. In the semiconductor device with a termination region and passivation layer provided by the present invention, the size and etching angle of the through-hole in the second insulating film determine the amount of metal remaining above the P-ring, which contributes to the electrical performance of the terminal. Forming the metal layer into a plug-in structure avoids the drawbacks of additional topology in the termination caused by a cracked first passivation layer.

[0102] 3. The semiconductor device with a termination region and a passivation layer provided by the present invention has a metal layer made of Al, AlCu or AlSiC. The metal layer usually needs to be made of a bondable material, such as Al, AlCu, AlSiCu or similar materials. The metal cannot be too hard. During operation, the chip with metal will heat and cool. Silicon and metal have different thermal expansion coefficients. If a hard metal is selected, the semiconductor may be damaged.

[0103] 4. In some structures of the semiconductor device with a termination region and a passivation layer provided by the present invention, an additional insulating film and a thinner silicon nitride layer are retained in order to save photolithography steps and masking steps. In the structure with the additional insulating film and the thinner silicon nitride layer, it is necessary to select a harder metal tungsten to be inserted into the additional insulating film and in contact with the guard ring. The metal tungsten forms a very strong contact with silicon, and the metal tungsten has strong chemical inertness.

[0104] 5. In the semiconductor device with a termination area and a passivation layer provided by the present invention, in some structures, the easily corroded metal layer is removed. The metal layer is usually the weak point of the terminal in terms of humidity robustness; metal tungsten is used to connect to the guard ring, and the first passivation layer is connected to the metal tungsten. The lower end surface of the first passivation layer is lower than the lower end surface of the second insulating film, and the high electric field is better shielded. BRIEF DESCRIPTION OF THE DRAWINGS

[0105] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0106] Figure 1 A schematic diagram (top view) of an existing power semiconductor chip;

[0107] Figure 2 for Figure 1 A cross-sectional view of the existing termination area, showing multiple p+ diffused guard rings separated by localized silicon oxide and contacted by floating metal plugs, with the metal passivated by silicon-rich nitride and polyimide films;

[0108] Figure 3Schematic diagram of the termination region structure of the prior art, with multiple p+ diffusion guard rings separated by local silicon oxidation and contacted by plugged metal. The metal plugs are weakly coupled to each other through a semi-insulating layer and then passivated by a silicon nitride layer and a polyimide film.

[0109] Figure 4 for Figure 2 A partial enlarged view of the Figure 4 Figure a is a cross-section of the metal plug structure. If the angle α or β is too small, cracks may occur in the silicon nitride film. Figure 4 Figure (b) shows a typical example of crack generation);

[0110] Figure 5 FIG1 is a diagram of a process for preparing a semiconductor device having a termination region and a passivation layer according to Example 1;

[0111] Figure 6 FIG2 is a diagram of a manufacturing process of a semiconductor device having a termination region and a passivation layer according to Example 1;

[0112] Figure 7 FIG3 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Example 1;

[0113] Figure 8 FIG4 is a process diagram of manufacturing a semiconductor device having a termination region and a passivation layer according to Example 1;

[0114] Figure 9 FIG1 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Example 2;

[0115] Figure 10 FIG2 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Example 2;

[0116] Figure 11 FIG3 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Example 2;

[0117] Figure 12 FIG4 is a diagram of the preparation process of the semiconductor device with the termination region and the passivation layer according to the second embodiment;

[0118] Figure 13 FIG5 is a diagram of the preparation process of the semiconductor device with the termination region and the passivation layer according to the second embodiment;

[0119] Figure 14 FIG6 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Example 2;

[0120] Figure 15 A schematic diagram of the structure of a semiconductor device having a termination region and a passivation layer obtained in Example 3;

[0121] Figure 16 This is a schematic structural diagram of a semiconductor device with a termination region and a passivation layer obtained in Example 4.

[0122] Description of reference numerals:

[0123] 1. Substrate; 2. Drift region; 3. Guard ring; 4. First insulating film; 5. Second insulating film; 51. Second insulating film through hole; 6. Metal layer; 7. First passivation layer; 8. Second passivation layer; 9. Additional insulating film; 10. Silicon nitride layer; 11. Metal tungsten; 12. Conductive polysilicon layer. DETAILED DESCRIPTION

[0124] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0125] In the description of the present invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0126] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0127] Example 1

[0128] like Figure 5 、 Figure 6 、 Figure 7 、 Figure 8As shown, the present embodiment provides a semiconductor device with a termination region and a passivation layer, comprising a substrate 1, the substrate 1 comprising an upper end face and a lower end face, the upper end face of the substrate 1 being provided with a drift region 2 of a first conductivity type; a first insulating film 4 being provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type being further provided on the upper end face of the substrate 1, each guard ring 3 extending deep into the drift region 2, two adjacent guard rings 3 being separated by the first insulating film 4, the upper end face of each guard ring 3 being lower than the upper end face of the first insulating film 4; a second insulating film 5 being provided on the first insulating film 4 and the guard rings 3, the second insulating film 5 being provided with second insulating film through holes 51 which are in one-to-one communication with each guard ring 3, the inner wall of each second insulating film through hole 51 being at an acute angle to the upper end face of the substrate 1; a metal layer 6 being provided in each second insulating film through hole 51, the upper end face of the metal layer 6 located in the second insulating film through hole 51 being lower than the upper end face of the second insulating film 5; a first passivation layer 7 being provided on the second insulating film 5 and the metal layer 6; a second passivation layer 8 being provided on the first passivation layer 7.

[0129] The present invention proposes a semiconductor device with a termination area and a passivation layer. Each guard ring is separated by a first insulating film 4. A thicker second insulating film 5 is prepared on the first insulating film 4, and the thicker second insulating film is deposited on the first insulating film 4; a second insulating film through-hole 51 connected to the guard ring 3 is opened on the second insulating film 5, and the metal is completely deposited in the through-hole to form a metal layer 6. The metal layer 6 forms a plug-in structure. The metal layer 6 contacts the guard ring 3. The cross-section of the second insulating film through-hole 51 is inverted trapezoidal. At the same time, the upper end surface of the metal layer 6 is lower than the upper end surface of the second insulating film 5. The metal layer 6 is no longer convex like the original structure. The first passivation layer 7 is deposited on the second insulating film 5 and the metal layer. The first passivation layer is flatter, has no sharp angles, will not crack, and has very stable moisture resistance and chemical corrosion resistance. The design of the above structure has very small mechanical stress in the first passivation layer 7, and weak electrical coupling is generated between the first passivation layer 7 and the metal layer 6. The second passivation layer is set to further prevent mechanical damage and solid particle contamination.

[0130] In this embodiment, the size and etching angle of the second insulating film through-hole 51 determine how much metal remains above the P-ring. This metal layer contributes to the electrical performance of the terminal. Forming the metal layer into a plug-in structure eliminates the additional topological drawbacks of the termination caused by a cracked first passivation layer.

[0131] The function of the metal layer 6 in this embodiment is to redirect the electric field under reverse bias to the field oxide. The critical electric field of the field oxide is several orders of magnitude higher than that of the semiconductor, which means that a well-designed metal layer can help achieve a more compact termination structure with excellent moisture resistance.

[0132] In this embodiment, the acute angle is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film 5 is greater than that of the metal layer 6 .

[0133] In this embodiment, wet etching and dry etching can be selected for etching the through hole of the second insulating film. The angle produced by wet etching is 30°, and the angle produced by dry etching is 70-80°. The etching method is selected according to needs.

[0134] The thickness of the second insulating film 5 of the present invention must be ensured to be within a set range, so as to ensure the amount of metal deposition. The thickness of the second insulating film 5 is greater than the thickness of the metal layer 6, but it cannot be too thick. The lateral size of the group cannot be very fine and should be kept within a certain range, which is determined by the thickness of the metal layer 6.

[0135] The second insulating film 5 of the present invention is made of phosphosilicate glass, which has strong insulation and chemical inertness, is not subject to stress in the termination structure, and can be deposited quickly and can help remove impurities on the silicon surface through gettering.

[0136] The first insulating film 4 of the present invention is made of field oxide (FOX), which is a strong insulating dielectric material, usually thermally grown silicon dioxide.

[0137] The first passivation layer of the present invention is made of silicon-rich nitride (SiNx);

[0138] The second passivation layer of the present invention is made of a polymer, and preferably, the polymer is polyimide.

[0139] The metal layer 6 of the present invention is made of Al, AlCu or AlSiC. The metal layer 6 usually needs to be made of a bondable material, such as Al, AlCu, AlSiCu or similar materials. The metal cannot be too hard. During operation, the chip with metal will heat and cool. Silicon and metal have different thermal expansion coefficients. If a hard metal is selected, the semiconductor may be damaged.

[0140] The substrate 1 of the present invention is a silicon wafer.

[0141] The thickness of the first passivation layer of the present invention is greater than 100 nm, preferably 0.5-3 μm.

[0142] like Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 As shown, this embodiment further provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps:

[0143] 101) performing an oxidation treatment on the substrate 1 and performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etching groove communicating with the substrate 1, implanting boron ions into the first etching groove, and forming guard rings 3 on the substrate 1, wherein the upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4;

[0144] 102) A second insulating film 5 is deposited on the first insulating film 4 and the guard rings 3. The second insulating film 5 is patterned and etched to form second insulating film through holes 51 in one-to-one communication with each guard ring 3. The inner wall of each second insulating film through hole 51 forms an acute angle with the upper end surface of the substrate 1.

[0145] 103) depositing metal on the second insulating film 5 and the second insulating film through hole 51 to form a metal layer 6, etching the metal layer 6 to expose the second insulating film 5, wherein the upper end surface of the metal layer 6 located in the second insulating film through hole 51 is lower than the upper end surface of the second insulating film 5;

[0146] 104) A first passivation layer 7 is deposited on the second insulating film 5 and the metal layer 6;

[0147] 105) A second passivation layer 8 is deposited on the first passivation layer 7 to obtain a semiconductor device having a termination region and a passivation layer.

[0148] The patterning and etching steps of the second insulating film 5 of the present invention are the most critical steps to achieve the desired structure. The size and etching angle of the second insulating film through hole 51 determine how much metal is retained above the P ring. Metal deposition and etching are completed without any pattern, simplifying the steps.

[0149] In order to retain the amount of metal in the through-hole, the thickness of the metal deposition needs to be greater than the height of the second insulating film through-hole 51 to ensure that the second insulating film through-hole 51 is completely filled. The metal deposition method requires a suitable material with strong surface adhesion to provide sufficient protective coating on the contour. Chemical vapor deposition (CVD) can be used, or cycling between less conformal deposition (sputtering) and etching can be used to make the coating uniform.

[0150] The second insulating film 5, the first passivation layer 7, and the second passivation layer 8 of the present invention are all prepared by a PECVD deposition process.

[0151] Example 2

[0152] like Figure 9 、 Figure 10 、 Figure 11 、 Figure 12 、 Figure 13 and 14As shown, the present embodiment provides a semiconductor device with a termination region and a passivation layer, including a substrate 1, the substrate 1 including an upper end face and a lower end face, the upper end face of the substrate 1 is provided with a drift region 2 of a first conductivity type; a first insulating film 4 is provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type are further provided on the upper end face of the substrate 1, each guard ring 3 extends deep into the drift region 2, two adjacent guard rings 3 are separated by the first insulating film 4, and the upper end face of each guard ring 3 is lower than the upper end face of the first insulating film 4; an additional insulating film 9 is provided on the first insulating film 4 and the guard rings 3; a silicon nitride layer 10 is provided on the additional insulating film 9; a second insulating film 5 is provided on the silicon nitride layer 10; a groove is provided on each guard ring 3; a second insulating film 5 located above the guard ring is provided with a second insulating film 5 that is connected to the silicon nitride layer 10 in a one-to-one correspondence. The protective ring 3 includes a silicon nitride layer through hole 51 and a second insulating film through hole 51, and the angle between the inner wall of the second insulating film through hole 51 and the upper end face of the substrate 1 is an acute angle; the silicon nitride layer 10 located above the protective ring 3 is provided with a silicon nitride layer through hole connected to the additional insulating film 9, and the angle between the inner wall of the silicon nitride layer through hole and the upper end face of the substrate 1 is 30° or 70-80°; the additional insulating film 9 located above the protective ring 3 is provided with an additional insulating film through hole connected to the groove, and the second insulating film through hole 51, the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged; metal tungsten 11 is inserted in the additional insulating film through hole and the groove; a metal layer 6 is provided in the silicon nitride layer through hole and the second insulating film through hole 51, and the upper end face of the metal layer 6 is lower than the upper end face of the second insulating film 5; a first passivation layer 7 is provided on the second insulating film 5, and a second passivation layer 8 is provided on the first passivation layer 7.

[0153] The present invention proposes a semiconductor device with a termination area and a passivation layer. Each guard ring 3 is separated by a first insulating film 4. An additional insulating film 9 and a thinner silicon nitride layer 10 are deposited on the first insulating film 4, and a thicker second insulating film is deposited on the silicon nitride layer 10. The second insulating film through hole 51, the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged. Metal tungsten 11 is inserted into the additional insulating film through hole and the groove. A metal layer 6 is provided in the silicon nitride layer through hole and the second insulating film through hole 51. The cross-section of the second insulating film through hole 51 is inverted trapezoidal. At the same time, the upper end surface of the metal layer 6 is lower than the upper end surface of the second insulating film 5, and the metal layer no longer protrudes. After the first passivation layer is deposited, the first passivation layer 7 is flatter, has no sharp angles, and will not crack, providing very stable moisture resistance and chemical corrosion resistance. The first passivation layer 7 has very small mechanical stress and generates weak electrical coupling between it and the metal layer 6. The second passivation layer 8 can prevent mechanical damage and solid particle contamination.

[0154] The additional insulating film 9 and the thinner silicon nitride layer 10 are not strictly required at the terminal, but are strictly required in the active part, gate and emitter of the IGBT. The additional insulating film 9 and the thinner silicon nitride layer 10 can be retained at the terminal, which can save photolithography steps and masks. The silicon nitride layer 10 can be deposited at the lower end of the second insulating film 5 as an etching stop layer.

[0155] Since the present invention has an additional insulating film 9, a harder metal tungsten 11 needs to be selected and inserted into the additional insulating film 9 and in contact with the guard ring 3. The metal tungsten 11 forms a very strong contact with silicon and has strong chemical inertness.

[0156] The acute angle of the present invention is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film is greater than that of the metal layer.

[0157] The second insulating film 5 of the present invention is made of phosphosilicate glass.

[0158] The material of the additional insulating film 9 of the present invention is borophosphosilicate glass.

[0159] Each protective ring 3 of the present invention has one or more grooves on its upper end surface.

[0160] The first insulating film 4 of the present invention is made of silicon dioxide;

[0161] The first passivation layer is made of silicon-rich nitride (SiNx);

[0162] The second passivation layer is made of polymer;

[0163] The metal layer is made of Al, AlCu or AlSiCu;

[0164] The polymer is polyimide.

[0165] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer according to any one of the above methods, comprising the following steps:

[0166] 201) Oxidizing the substrate 1 and performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etched groove communicating with the substrate 1, implanting boron ions into the first etched groove, and forming guard rings 3 on the substrate 1, wherein the upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4, and a trench is formed in each guard ring 3;

[0167] 202) depositing an additional insulating film 9 on the first insulating film 4 and the guard ring 3;

[0168] 203) depositing a silicon nitride layer 10 on the additional insulating film 9;

[0169] 204) A second insulating film 5 is deposited on the silicon nitride layer 10;

[0170] 205) The second insulating film 5 is patterned and etched to form second insulating film through holes 51 in one-to-one communication with the silicon nitride layer 10 on the second insulating film 5 above the guard ring 3. The inner wall of each second insulating film through hole 51 forms an acute angle with the upper end surface of the substrate 1.

[0171] 206) Etching the silicon nitride layer 10 below the second insulating film through hole 51 to form a silicon nitride layer through hole connected to the additional insulating film 9, wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate 1 is the same as the angle between the inner wall of the second insulating film through hole 51 and the upper end surface of the substrate 1;

[0172] 207) Etching the additional insulating film 9 from the through hole of the silicon nitride layer to form an additional insulating film through hole communicating with the trench;

[0173] 208) inserting metal tungsten 11 into the additional insulating film through-holes and trenches;

[0174] 209) Depositing metal on the second insulating film 5 and the second insulating film through hole 51 to form a metal layer 6, etching the metal layer 6 to expose the second insulating film 5, wherein the upper end surface of the metal layer 6 located in the second insulating film through hole 51 is lower than the upper end surface of the second insulating film 5;

[0175] 210) A first passivation layer 7 is deposited on the second insulating film 5 and the metal layer 6;

[0176] 211) A second passivation layer 8 is deposited on the first passivation layer 7 to obtain a semiconductor device having a termination region and a passivation layer.

[0177] In this embodiment, the second insulating film 5 , the first passivation layer 7 , and the second passivation layer 8 are all prepared by a PECVD deposition process.

[0178] Example 3

[0179] The present invention also provides a semiconductor device with a termination region and a passivation layer, comprising a substrate 1, the substrate 1 comprising an upper end face and a lower end face, the upper end face of the substrate 1 being provided with a drift region 2 of a first conductivity type; a first insulating film 4 being provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type being further provided on the upper end face of the substrate 1, each guard ring 3 being extended deep into the drift region 2, two adjacent guard rings 3 being separated by the first insulating film 4, the upper end face of each guard ring 3 being lower than the upper end face of the first insulating film 4; an additional insulating film 9 being provided on the first insulating film 4 and the guard rings 3; a groove being provided on each guard ring 3; and a plurality of guard rings 3 of a second conductivity type being provided on the upper end face of the substrate 1, wherein the plurality of guard rings 3 of a second conductivity type are further provided, the plurality of guard rings 3 of a second conductivity type being extended deep into the drift region 2, the plurality of adjacent guard rings 3 being separated by the first insulating film 4, the upper end face of each guard ring 3 being lower than the upper end face of the first insulating film 4; An additional insulating film through hole connected to the groove; metal tungsten 11 is inserted in the additional insulating film through hole and the groove; a silicon nitride layer 10 is provided on the additional insulating film 9 and the additional insulating film through hole; a second insulating film 5 is provided on the silicon nitride layer 10; a second insulating film through hole 51 is provided on the second insulating film 5 located above the guard ring 3 and is connected to the silicon nitride layer 10 in a one-to-one manner, and the angle between the inner wall of the second insulating film through hole 51 and the upper end face of the substrate 1 is an acute angle; a first passivation layer 7 is provided on the second insulating film 5 and the second insulating film through hole 51, and the lower end face of the first passivation layer 7 is lower than the lower end face of the second insulating film 5; a second passivation layer 8 is provided on the first passivation layer 7.

[0180] Compared to Examples 1 and 2, this embodiment eliminates the easily corroded metal layer, which is typically a weak point in the terminal's humidity robustness. Metal tungsten 11 is used to connect to the guard ring 3, and the first passivation layer 7 is connected to the metal tungsten 11. The lower surface of the first passivation layer 7 is lower than the lower surface of the second insulating film 5, providing better shielding against high electric fields. Furthermore, compared to using Al, AlCu, or AlSiCu, for functions such as forming plugs, metal tungsten has higher hardness and greater inertness, forming a very good ohmic contact with silicon.

[0181] Aluminum-based metal is used as the top metal because it needs to be soft enough to withstand mechanical stress without damaging the chip, but the metal itself is not ideal due to many reasons such as chemical reactivity and limited thermal stability. Compared with aluminum-based metal, tungsten is a better choice for contact with silicon.

[0182] In this embodiment, the acute angle is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film 5 is greater than that of the metal layer 6 .

[0183] The second insulating film 5 of this embodiment is made of phosphosilicate glass.

[0184] The material of the additional insulating film 9 in this embodiment is borophosphosilicate glass.

[0185] In this embodiment, each protective ring 3 has one or more grooves on its upper end surface.

[0186] The first insulating film 4 of this embodiment is made of silicon dioxide;

[0187] The first passivation layer is made of silicon-rich nitride (SiNx);

[0188] The second passivation layer is made of polyimide;

[0189] The metal is Al, AlCu or AlSiCu.

[0190] This embodiment further provides a semiconductor device having a termination region and a passivation layer according to any one of the above, comprising the following steps:

[0191] 301) Oxidizing the substrate 1 and performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etched groove communicating with the substrate 1, implanting boron ions into the first etched groove, and forming guard rings 3 on the substrate 1. The upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4, and a trench is formed in each guard ring 3;

[0192] 302) depositing an additional insulating film 9 on the first insulating film 4 and the guard ring 3;

[0193] 303) Etching the additional insulating film 9 to form an additional insulating film through hole communicating with the trench on the additional insulating film 9 above the guard ring 3;

[0194] 304) inserting metal tungsten 11 into the additional insulating film through-holes and trenches;

[0195] 305) depositing a silicon nitride layer 10 on the additional insulating film 9;

[0196] 306) A second insulating film 5 is deposited on the silicon nitride layer 10;

[0197] 307) Etching second insulating film through holes 51 in one-to-one communication with the silicon nitride layer 10 on the second insulating film 5 located above the guard ring 3, wherein the angle between the inner wall of the second insulating film through hole 51 and the upper end surface of the substrate 1 is an acute angle;

[0198] 308) depositing a first passivation layer 7 on the second insulating film 5,

[0199] 309) A second passivation layer 8 is provided on the first passivation layer 7, and an upper end surface of the second passivation layer 8 is planarized to obtain a semiconductor device having a termination region and a passivation layer.

[0200] The second insulating film 5, the first passivation layer 7 and the second passivation layer 8 of the present invention are all prepared by a PECVD deposition process.

[0201] Example 4

[0202] This embodiment is a further improvement on the basis of the third embodiment.

[0203] The only difference from the third embodiment is that a conductive polysilicon layer 12 is further provided between the additional insulating film 9 and the guard ring 3 .

[0204] like Figure 16 As shown, before depositing the additional insulating film 9, a conductive polysilicon layer 12 is deposited on the first insulating film 4 and the guard ring 3, and then etched to expose part of the guard ring 3, and then the additional insulating film 9 is deposited;

[0205] The additional insulating film 9 is etched so that an additional insulating film through-hole communicating with the trench or penetrating the deposited additional insulating film 9 is formed on the additional insulating film 9 above the guard ring 3 .

[0206] In this embodiment, the metal is replaced by a conductive polysilicon layer 12. The conductive polysilicon layer 12 is very stable chemically and is not as thick as a metal layer. It can keep the field smooth and remove corrosive elements from the terminal.

[0207] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductive type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); A second insulating film (5) is provided on the first insulating film (4) and the protective ring (3); the second insulating film (5) is provided with second insulating film through holes (51) that are in one-to-one communication with each protective ring (3); and the inner wall of each second insulating film through hole (51) forms an acute angle with the upper end surface of the substrate (1); A metal layer (6) is provided in each second insulating film through hole (51), and an upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than an upper end surface of the second insulating film (5); A first passivation layer (7) is provided on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is provided on the first passivation layer (7).

2. The semiconductor device having a termination region and a passivation layer according to claim 1, wherein: The acute angle is 30° or 70-80°; the thickness of the metal layer (6) is 1-8 μm, and the thickness of the second insulating film (5) is greater than the thickness of the metal layer (6).

3. The semiconductor device having a termination region and a passivation layer according to claim 1, wherein: The second insulating film (5) is made of phosphosilicate glass.

4. The semiconductor device having a termination region and a passivation layer according to claim 1, wherein: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride; The second passivation layer (8) is made of polymer; The metal layer (6) is made of Al, AlCu or AlSiC; The substrate (1) is a silicon wafer.

5. The semiconductor device having a termination region and a passivation layer according to claim 4, wherein: The polymer is polyimide.

6. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 1 to 5, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4), the first insulating film (4) is etched to form a first etching groove connected to the substrate (1), boron ions are implanted into the first etching groove, and protective rings (3) are formed on the substrate (1), wherein the upper end surface of each protective ring (3) is lower than the upper end surface of the first insulating film (4); A second insulating film (5) is deposited on the first insulating film (4) and the protective ring (3), and the second insulating film (5) is patterned and etched to form second insulating film through holes (51) in one-to-one communication with each protective ring (3) on the second insulating film (5), wherein the inner wall of each second insulating film through hole (51) forms an acute angle with the upper end surface of the substrate (1); Depositing metal on the second insulating film (5) and the second insulating film through hole (51) to form a metal layer (6), etching the metal layer (6) to expose the second insulating film (5), wherein the upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is deposited on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is deposited on the first passivation layer (7) to obtain a semiconductor device having a termination region and a passivation layer.

7. The method for preparing a semiconductor device having a termination region and a passivation layer according to claim 6, wherein: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared using a PECVD deposition process.

8. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductive type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); An additional insulating film (9) is provided on the first insulating film (4) and the protective ring (3); A silicon nitride layer (10) is provided on the additional insulating film (9); A second insulating film (5) is provided on the silicon nitride layer (10); Each protective ring (3) is provided with a groove; A second insulating film through hole (51) is provided on the second insulating film (5) above the protective ring and is in one-to-one communication with the silicon nitride layer (10); the angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; The silicon nitride layer (10) located above the protective ring is provided with a silicon nitride layer through hole connected to the additional insulating film (9), and the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate (1) is 30° or 70-80°; An additional insulating film through-hole communicating with the trench is provided on the additional insulating film (9) located above the protection ring (3); the second insulating film through-hole (51), the silicon nitride layer through-hole, the additional insulating film through-hole and the trench are coaxially arranged; Metal tungsten (11) is inserted into the additional insulating film through-hole and the groove; A metal layer (6) is provided in the silicon nitride layer through hole and the second insulating film through hole (51), and the upper end surface of the metal layer (6) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is provided on the second insulating film (5), A second passivation layer (8) is provided on the first passivation layer (7).

9. The semiconductor device having a termination region and a passivation layer according to claim 8, wherein: The acute angle is 30° or 70-80°; the thickness of the metal layer (6) is 1-8 μm, and the thickness of the second insulating film (5) is greater than the thickness of the metal layer (6).

10. The semiconductor device having a termination region and a passivation layer according to claim 8, wherein: The second insulating film (5) is made of phosphosilicate glass.

11. The semiconductor device having a termination region and a passivation layer according to claim 8, wherein: The material of the additional insulating film (9) is borophosphosilicate glass.

12. The semiconductor device having a termination region and a passivation layer according to claim 8, wherein: Each protective ring (3) has one or more grooves on its upper end surface.

13. The semiconductor device having a termination region and a passivation layer according to claim 8, wherein: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride; The second passivation layer (8) is made of polymer; The metal layer is made of Al, AlCu or AlSiCu; The polymer is polyimide.

14. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 8 to 13, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4), the first insulating film (4) is etched to form a first etching groove connected to the substrate (1), boron ions are implanted into the first etching groove, and a guard ring (3) is formed on the substrate (1), wherein the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4), and a groove is formed on each guard ring (3); depositing an additional insulating film (9) on the first insulating film (4) and the guard ring (3); depositing a silicon nitride layer (10) on the additional insulating film (9); A second insulating film (5) is deposited on the silicon nitride layer (10); The second insulating film (5) is patterned and etched to form second insulating film through holes (51) that are connected to the silicon nitride layer (10) in a one-to-one correspondence on the second insulating film (5) located above the protective ring (3), and the angle between the inner wall of each second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; The silicon nitride layer (10) below the second insulating film through hole (51) is etched to form a silicon nitride layer through hole connected to the additional insulating film (9), wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate (1) is the same as the angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1); Etching the additional insulating film (9) from the silicon nitride layer through hole to form an additional insulating film through hole connected to the trench; Inserting metal tungsten (11) into the additional insulating film through-holes and trenches; Depositing metal on the second insulating film (5) and in the second insulating film through hole (51) to form a metal layer (6), etching the metal layer (6) to expose the second insulating film (5), wherein the upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is deposited on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is deposited on the first passivation layer (7) to obtain a semiconductor device having a termination region and a passivation layer.

15. The preparation method according to claim 14, characterized in that: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared using a PECVD deposition process.

16. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductive type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); An additional insulating film (9) is provided on the first insulating film (4) and the protective ring (3); Each protective ring (3) is provided with a groove; An additional insulating film through-hole communicating with the groove is provided on the additional insulating film (9) located above the protective ring (3); Metal tungsten (11) is inserted into the additional insulating film through-hole and the groove; A silicon nitride layer (10) is provided on the additional insulating film (9) and the additional insulating film through-hole; A second insulating film (5) is provided on the silicon nitride layer (10); A second insulating film through hole (51) is provided on the second insulating film (5) above the protective ring (3) and is in one-to-one communication with the silicon nitride layer (10). The angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle. A first passivation layer (7) is provided on the second insulating film (5) and the second insulating film through hole (51), and a lower end surface of the first passivation layer (7) is lower than a lower end surface of the second insulating film (5); A second passivation layer (8) is provided on the first passivation layer (7).

17. The semiconductor device having a termination region and a passivation layer according to claim 16, wherein: A conductive polysilicon layer (12) is also provided between the additional insulating film (9) and the protection ring (3).

18. The semiconductor device having a termination region and a passivation layer according to claim 16, wherein: The second insulating film (5) is made of phosphosilicate glass.

19. The semiconductor device having a termination region and a passivation layer according to claim 16, wherein: The material of the additional insulating film (9) is borophosphosilicate glass.

20. The semiconductor device having a termination region and a passivation layer according to claim 16, wherein: Each protective ring (3) has one or more grooves on its upper end surface.

21. The semiconductor device having a termination region and a passivation layer according to claim 16, wherein: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride; The second passivation layer (8) is made of polyimide; The metal is Al, AlCu or AlSiCu.

22. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 16 to 21, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4), the first insulating film (4) is etched to form a first etching groove connected to the substrate (1), boron ions are implanted into the first etching groove, and a guard ring (3) is formed on the substrate (1), wherein the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4), and a groove is formed on each guard ring (3); depositing an additional insulating film (9) on the first insulating film (4) and the guard ring (3); Etching the additional insulating film (9) so that an additional insulating film through-hole communicating with the trench is formed on the additional insulating film (9) located above the protection ring (3); Inserting metal tungsten (11) into the additional insulating film through-holes and trenches; depositing a silicon nitride layer (10) on the additional insulating film (9); A second insulating film (5) is deposited on the silicon nitride layer (10); Etching a second insulating film through hole (51) on the second insulating film (5) located above the protective ring (3) and communicating with the silicon nitride layer (10) in a one-to-one correspondence, wherein the angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; depositing a first passivation layer (7) on the second insulating film (5), A second passivation layer (8) is provided on the first passivation layer (7), and the upper end surface of the second passivation layer (8) is planarized to obtain a semiconductor device having a terminal area and a passivation layer.

23. The preparation method according to claim 22, characterized in that: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared using a PECVD deposition process.

24. The preparation method according to claim 22, characterized in that: Before depositing the additional insulating film (9), a conductive polysilicon layer (12) is deposited on the first insulating film (4) and the guard ring (3), and etching is performed to expose a portion of the guard ring (3), and then the additional insulating film (9) is deposited; The additional insulating film (9) is etched so that an additional insulating film through-hole communicating with the trench or an additional insulating film through-hole penetrating the additional insulating film (9) is formed on the additional insulating film (9) above the protection ring (3).

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