Damping loop protection method, device and equipment for fixed series compensation device and medium

Abstract

The invention discloses a fixed series compensation device damping loop protection method, device, equipment and medium, and the method comprises the steps: obtaining a damping loop current absolute value maximum value Imax1 in a first time period [t0, t1], obtaining a damping loop current absolute value maximum value Imax3 in a third time period [t2, t3], t0 is the moment when the damping loop current instantaneous value is greater than a set value, t3 is the moment when the damping loop current instantaneous value is greater than a set value, and t3 is the moment when the damping loop current instantaneous value is greater than a set value; t1 is a first current zero-crossing point moment after the t0 moment, t2 is a second current zero-crossing point moment after the t0 moment, and t3 is a third current zero-crossing point moment after the t0 moment; comparing the maximum value Imax1 of the absolute value of the current of the damping loop in the first time period [t0, t1] with the maximum value Imax3 of the absolute value of the current of the damping loop in the third time period [t2, t3], if Imax3 is less than or equal to kImax1, judging that the damping loop is normal, otherwise, judging that the damping loop is abnormal; wherein k is a proportionality coefficient. The abnormal state of the damping loop can be found in time, and safe and stable operation of the fixed series compensation device is guaranteed.

Description

Technical Field

[0001] The present invention belongs to the field of flexible AC transmission systems (FACTS), and in particular relates to a damping circuit protection method, device, equipment and medium for a fixed series compensation device. Background Art

[0002] At present, ultra-high voltage (UHV) long lines play an important role in the allocation of inter-provincial and inter-regional power resources, and the inductive reactance of ultra-high voltage (UHV) long lines is a key factor restricting its transmission capacity. The series compensation device (abbreviated as series compensation) can effectively reduce the inductive reactance of long AC lines, significantly improve its transmission capacity and grid stability limit, and play a vital role in ensuring cross-regional interconnection of power grids and long-distance clean energy transmission. The series compensation is generally composed of a capacitor bank, a zinc oxide voltage limiter, a spark gap, a bypass switch, and a damping circuit. The capacitor bank and the zinc oxide voltage limiter are connected in parallel, and the spark gap is connected in parallel with the bypass switch and then in series with the damping circuit and then in series with the capacitor bank. The main functions of the damping circuit are: 1) When the normal operation series compensation system is shut down, the capacitor bank needs to discharge through the bypass switch and the damping circuit. At this time, the damping circuit plays a role in limiting the discharge current; 2) When the line fails or the series compensation system fails, overvoltage may be generated. At this time, the spark gap will be broken down to limit the overvoltage. At this time, the damping circuit plays a role in limiting the gap discharge current, ensuring the safe operation of the series capacitor bank, bypass switch and spark gap.

[0003] It can be seen that the damping circuit only works when the series compensation system is put into operation or fails. During the normal operation of the series compensation system, the damping circuit is in a disconnected state. Therefore, the fault of the damping circuit is highly concealed, and there is currently no special damping circuit protection device. Once the damping circuit fails, it is difficult to be discovered in time.

[0004] Based on this, the inventor of this case conducted in-depth research, and this case came into being. Summary of the invention

[0005] The purpose of the present invention is to provide a method, device, equipment and medium for protecting the damping circuit of a fixed series compensation device, which can promptly detect the abnormal state of the damping circuit and ensure the safe and stable operation of the fixed series compensation device.

[0006] In order to achieve the above object, the solution of the present invention is:

[0007] A method for protecting a damping circuit of a fixed series compensation device, wherein the fixed series compensation device comprises a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel with each other, wherein the discharge branch comprises a spark gap, a bypass switch, and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; comprising:

[0008] Get the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 , obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0;

[0009] Compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0010] Wherein, the damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

[0011] The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

[0012] This includes, when it is determined that a spark gap triggering conduction instruction is received,

[0013] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result;

[0014] Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result;

[0015] If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0016] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch,

[0017] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result;

[0018] Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result;

[0019] If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0020] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch.

[0021] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0022] A fixed series compensation device damping circuit protection device, the fixed series compensation device comprises a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel with each other, wherein the discharge branch comprises a spark gap, a bypass switch, and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; comprising:

[0023] The current data acquisition module is configured to obtain the maximum absolute value I of the damping loop current in the first time period [t0, t1] max1 , obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0; and,

[0024] The comparison and judgment module is configured to compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0025] Wherein, the damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

[0026] The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

[0027] This includes, when it is determined that a spark gap triggering conduction instruction is received,

[0028] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result;

[0029] Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23, compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result;

[0030] If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0031] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch,

[0032] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result;

[0033] Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result;

[0034] If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0035] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch.

[0036] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51, it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0037] A computer device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor; when the processor executes the computer program, the steps of the damping circuit protection method of a fixed series compensation device as described above are implemented.

[0038] A computer-readable storage medium stores a computer program; when the computer program is executed by a processor, the steps of the damping circuit protection method of a fixed series compensation device as described above are implemented.

[0039] After adopting the above scheme, the present invention determines whether the damping circuit is abnormal by detecting the amplitude attenuation degree of the discharge current of the capacitor group through the spark gap or the bypass switch in the fixed series compensation device, thereby providing a protection function for the damping circuit in the fixed series compensation device. The state of the damping circuit can be monitored during each discharge process of the capacitor group to prevent the expansion of equipment failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a structural schematic diagram of the fixed series compensation device described in the damping circuit protection method of the fixed series compensation device of the present invention. DETAILED DESCRIPTION

[0041] The present invention provides a damping circuit protection method for a fixed series compensation device, wherein the fixed series compensation device comprises a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel with each other, wherein the discharge branch comprises a spark gap, a bypass switch, and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; the method comprises:

[0042] Get the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 , obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0;

[0043] Compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1, it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient, which can be set to k≤0.5.

[0044] Wherein, the damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

[0045] The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

[0046] This includes, when it is determined that a spark gap triggering conduction instruction is received,

[0047] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result;

[0048] Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result;

[0049] If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0050] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch,

[0051] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result;

[0052] Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result;

[0053] If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0054] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch.

[0055] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0056] like Figure 1 As shown, the present invention provides a specific embodiment of a damping circuit protection method for a fixed series compensation device, wherein the fixed series compensation device includes a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel, wherein the discharge branch includes a spark gap, a bypass switch, and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit, and the damping circuit protection method includes the following steps:

[0057] (1) Collect the damping loop current. When the instantaneous value of the damping loop current is greater than the set value, proceed to the next step;

[0058] (2) Record the sampling values ​​from the moment the instantaneous value of the damping circuit current is greater than the set value to the first current zero crossing point, and count the maximum absolute value among them, which is recorded as I max1 ;

[0059] (3) Record the sampling values ​​between the first current zero crossing point and the second current zero crossing point after the instantaneous value of the damping circuit current is greater than the set value, and count the maximum absolute value among them, which is recorded as I max2 ;

[0060] (4) Record the sampling values ​​between the second current zero crossing point and the third current zero crossing point after the instantaneous value of the damping circuit current is greater than the set value, and count the maximum absolute value among them, which is recorded as I max3 ;

[0061] (5) Comparison I max1 with I max3 , if I max3 No more than 0.5I max1 , then the damping circuit is normal; if I max3 Greater than 0.5I max1 , then the damping circuit is abnormal.

[0062] The damping circuit comprises a damping reactance and a damping resistance branch connected in parallel, and the damping resistance branch is a damping resistor or a damping resistor connected in series with a nonlinear resistor or a damping resistor connected in series with an air gap.

[0063] The capacitor bank, zinc oxide lightning arrester and spark gap are equipped with current transformers, the bypass switch may be equipped with or not equipped with current transformers, and the damping circuit has no current transformer.

[0064] The damping circuit current is selected by the following method:

[0065] (1) If a spark gap triggers a conduction command, the damping circuit current uses the capacitor current and the gap current. The two sets of currents are used to perform the above steps respectively, and the results are cross-checked. Only when both sets of results meet the requirements, the damping circuit is judged to be abnormal;

[0066] (2) There is no spark gap triggering conduction command, but there is a bypass switch closing command. If the bypass switch is equipped with a current transformer, the damping circuit current uses the capacitor current and the bypass switch current. The above steps are performed using the two sets of currents, and the results are cross-checked. Only when both sets of results meet the requirements, the damping circuit is judged to be abnormal.

[0067] (3) There is no spark gap triggering conduction command, but there is a bypass switch closing command. If the bypass switch is not equipped with a current transformer, the damping circuit current uses the capacitor current. The above steps are executed. When the conditions are met, it is determined that the damping circuit is abnormal.

[0068] The present invention also provides a fixed series compensation device damping circuit protection device, the fixed series compensation device comprises a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel with each other, wherein the discharge branch comprises a spark gap, a bypass switch, and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; comprising:

[0069] The current data acquisition module is configured to obtain the maximum absolute value I of the damping loop current in the first time period [t0, t1] max1, obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0; and,

[0070] The comparison and judgment module is configured to compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient, which can be set to k≤0.5.

[0071] Wherein, the damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

[0072] The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

[0073] This includes, when it is determined that a spark gap triggering conduction instruction is received,

[0074] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result;

[0075] Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result;

[0076] If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0077] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch,

[0078] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result;

[0079] Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result;

[0080] If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

[0081] The method includes: determining that no spark gap triggering conduction instruction is received, a bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch.

[0082] Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

[0083] An embodiment of the present invention further provides another computer device, including a processor and a memory configured to store a computer program that can be run on the processor; wherein, when the processor is configured to run the computer program, the method steps in the aforementioned embodiment are executed.

[0084] In practical applications, the processor includes a field programmable gate array (FPGA), and the processor may be a central processing unit (CPU) or a digital signal processor (DSP). It is understandable that for different devices, the electronic device used to implement the function of the processor may be other, and the embodiment of the present invention does not specifically limit it.

[0085] The above-mentioned memory can be a volatile memory (volatile memory), such as a random access memory (RAM); or a non-volatile memory (non-volatile memory), such as a read-only memory (ROM), a flash memory, a hard disk (HDD) or a solid-state drive (SSD); or a combination of the above-mentioned types of memory, and provide instructions and data to the processor.

[0086] In an exemplary embodiment, an embodiment of the present invention further provides a computer-readable storage medium for storing a computer program.

[0087] Optionally, the computer-readable storage medium can be applied to any one of the methods in the embodiments of the present invention, and the computer program enables the computer to execute the corresponding processes implemented by the processor in each method in the embodiments of the present invention. For the sake of brevity, they are not described here.

[0088] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0089] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes. The schemes in the embodiments of the present invention may be implemented in various computer languages, for example, object-oriented programming language Java and literal scripting language JavaScript, etc.

[0090] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0091] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0092] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0093] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0094] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A method for protecting a damping circuit of a fixed series compensation device, wherein the fixed series compensation device comprises a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel to each other, wherein: The discharge branch includes a spark gap, a bypass switch and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; the characteristics include: Get the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 , obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0; Compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

2. The method according to claim 1, characterized in that: The damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

3. The method according to claim 2, characterized in that: The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

4. The method according to claim 1, characterized in that: include, When the spark gap trigger conduction command is received, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result; Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result; If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

5. The method according to claim 1, characterized in that: Including, when it is judged that the spark gap triggering conduction instruction is not received, the bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result; Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result; If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

6. The method according to claim 1, characterized in that: Including, when it is judged that the spark gap triggering conduction instruction is not received, the bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

7. A damping circuit protection device for a fixed series compensation device, the fixed series compensation device comprising a capacitor bank, a zinc oxide voltage limiter, and a discharge branch connected in parallel, wherein: The discharge branch includes a spark gap, a bypass switch and a damping circuit, wherein the spark gap is connected in parallel with the bypass switch and then connected in series with the damping circuit; the characteristics include: The current data acquisition module is configured to obtain the maximum absolute value I of the damping loop current in the first time period [t0, t1] max1 , obtain the maximum absolute value I of the damping circuit current in the third time period [t2, t3] max3 , where t0 is the moment when the instantaneous value of the damping circuit current is greater than the set value, t1 is the first moment when the current crosses zero after t0, t2 is the second moment when the current crosses zero after t0, and t3 is the third moment when the current crosses zero after t0; and, The comparison and judgment module is configured to compare the maximum absolute value I of the damping circuit current in the first time period [t0, t1] max1 and the maximum absolute value of the damping circuit current I in the third time period [t2, t3] max3 , if I max3 ≤kI max1 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

8. The device according to claim 7, characterized in that: The damping circuit includes a damping reactance and a damping resistance branch, and the damping reactance and the damping resistance branch are connected in parallel.

9. The device according to claim 8, characterized in that: The damping resistor branch includes a damping resistor; or includes a damping resistor and a nonlinear resistor connected in series; or includes a damping resistor and an air gap connected in series.

10. The device according to claim 7, characterized in that: include, When the spark gap trigger conduction command is received, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max11 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max13 , obtain the first judgment result; Get the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , compare the maximum absolute value I of the gap current in the first time period [t0, t1] max21 and the maximum absolute value of the gap current I in the third time period [t2, t3] max23 , obtain the second judgment result; If both the first judgment result and the second judgment result indicate that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

11. The device according to claim 7, characterized in that: Including, when it is judged that the spark gap triggering conduction instruction is not received, the bypass switch closing instruction is received, and there is a current transformer in the bypass switch branch, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max31 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max33 , and obtain a third judgment result; Get the maximum absolute value I of the bypass switch current in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , compare the bypass switch current absolute maximum value I in the first time period [t0, t1] max41 and the maximum absolute value of the bypass switch current I in the third time period [t2, t3] max43 , and obtain the fourth judgment result; If the third judgment result and the fourth judgment result are both that the damping circuit is abnormal, it is determined that the damping circuit is abnormal; otherwise, it is determined that the damping circuit is normal.

12. The device according to claim 7, characterized in that: Including, when it is judged that the spark gap triggering conduction instruction is not received, the bypass switch closing instruction is received, and there is no current transformer in the bypass switch branch, Get the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , compare the maximum absolute value I of the capacitor current in the first time period [t0, t1] max51 and the maximum absolute value I of the capacitor current in the third time period [t2, t3] max53 , if I max53 ≤kI max51 , it is judged that the damping circuit is normal, otherwise it is judged that the damping circuit is abnormal; where k is the proportional coefficient.

13. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that: When the processor executes the computer program, the steps of the damping circuit protection method of the fixed series compensation device according to any one of claims 1 to 6 are implemented.

14. A computer-readable storage medium storing a computer program; characterized in that: When the computer program is executed by a processor, the steps of the damping circuit protection method of a fixed series compensation device according to any one of claims 1 to 6 are implemented.

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