Low-dropout linear voltage stabilizing circuit, low-dropout linear voltage stabilizing electric appliance and electronic equipment

Abstract

The invention provides a low-dropout linear voltage stabilizing circuit, a low-dropout linear voltage regulator and electronic equipment, and relates to the technical field of integrated circuits. One end of the voltage ripple suppression unit is connected with the input stage of an error amplifier in the low-dropout voltage stabilization unit, and the other end of the voltage ripple suppression unit is connected with the transient response unit and the common bias unit; one end of the transient response unit is connected with the output end of the low-dropout voltage stabilization unit, and the other end of the transient response unit is connected with the voltage ripple suppression unit and the common bias unit. One end of the common bias unit is connected with the second end of the power tube in the low-dropout voltage stabilization unit, and the other end of the common bias unit is connected with the voltage ripple suppression unit and the transient response unit. According to the low-dropout linear voltage stabilizing circuit, the bandwidth of the low-dropout linear voltage stabilizing circuit is expanded, the PSR drop frequency of the whole circuit is pushed to a higher frequency position, and the value of the PSR at a high frequency is increased. The transient response is enhanced, so that the transient response speed of the whole circuit is increased, the overshoot voltage is reduced, the compensation requirement of the whole circuit is reduced, and the response speed of a loop is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a low voltage drop linear voltage regulator circuit, a low voltage drop linear regulator and an electronic device. Background Art

[0002] Currently, in LDO (Low-dropout regulator, low-voltage linear regulator) circuits, PSR (power supply rejection ratio, generally refers to the ability to suppress input voltage ripples, also known as power supply rejection ratio) will decrease as the frequency increases, causing the circuit's PSR to drop very low at high frequencies. This is because PSR is affected by the error amplifier gain in the LDO circuit. The higher the error amplifier gain, the greater the PSR. When the frequency is higher than the main pole frequency of the error amplifier, its gain will decrease as the frequency increases, causing the PSR of the LDO circuit to decrease as the error amplifier gain decreases.

[0003] In the current circuit structure, in order to solve the above problems, the traditional way is to adopt PSR enhancement technology, but the circuit structure of this type of PSR enhancement technology is relatively complex, and more components are used, resulting in more static current consumption. Summary of the invention

[0004] In view of the above problems, the present invention is proposed to provide a low voltage dropout linear voltage regulator circuit, a low voltage dropout linear regulator and an electronic device that solve the above problems or partially solve the above problems.

[0005] A first aspect of an embodiment of the present invention provides a low voltage dropout linear voltage regulator circuit, the low voltage dropout linear voltage regulator circuit comprising: A low-dropout voltage stabilization unit, a voltage ripple suppression unit, a transient response unit, and a common bias unit; One end of the voltage ripple suppression unit is connected to the error amplifier input stage in the low voltage dropout voltage stabilizing unit, and the other end is connected to the transient response unit and the common bias unit respectively; One end of the transient response unit is connected to the output end of the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the common bias unit respectively; One end of the common bias unit is connected to the second end of the power tube in the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the transient response unit respectively; The voltage ripple suppression unit is used to obtain a target current and inject the target current into the tail current of the differential input stage of the error amplifier, wherein the target current is a current having the same change trend as the second load current generated by the power tube; The transient response unit is used to generate a first load current, which together with the second load current provides a load current for the load, and the first load current is greater than the second load current; The common bias unit is used to provide bias current for the voltage ripple suppression unit and the transient response unit.

[0006] Optionally, the voltage ripple suppression unit comprises: a current mirror structure; The first end of the input branch and the first end of the replica branch in the current mirror structure are both connected to the power supply end; The third end of the replica branch is connected to the error amplifier input stage; The input branch is connected to the transient response unit and the common bias unit respectively through the second end of the first target tube, and the first target tube is a transistor in the input branch whose first end is grounded; The input branch is used to not work when no-load, and when the load current gradually increases, the current flowing through the input branch has the same change trend as the second load current; The replica branch is used to not work when the load is unloaded, and when the load current gradually increases, to replicate the current flowing through the input branch to obtain the target current.

[0007] Optionally, the current mirror structure includes: a sixth transistor, a seventh transistor and a ninth transistor; The first end of the sixth transistor is connected to the power supply end, the second end is connected to the second end of the seventh transistor, and the third end is connected to the error amplifier input stage; The third end of the seventh transistor is connected to the second end of the seventh transistor and the third end of the ninth transistor respectively; The ninth transistor serves as the first target transistor, a second end of which is connected to the transient response unit and the common bias unit respectively, and a first end of which is grounded.

[0008] Optionally, the transient response unit comprises: a current limiting structure and a large current structure; the current limiting structure comprises: a current providing branch and a controlled branch, the controlled branch replicates the current of the current providing branch; The current providing branch, the controlled branch and the first end of the large current structure are all connected to the power supply end; The third end of the current branch is grounded via a current source; The third end of the high current structure is connected to the output end of the low voltage difference voltage stabilizing unit; The second end of the high current structure is connected to the controlled branch; The controlled branch is connected to the second end of the first target tube and the common bias unit respectively through the second end of the second target tube, and the second target tube is a transistor in the controlled branch whose first end is grounded; The current providing branch is used to provide a preset current; The controlled branch is used to not work when no-load, and when the load current gradually increases, gradually increase the current flowing through itself, and reduce the voltage at the second end of the large current structure; The high current structure is used for not working when no-load, and for providing a gradually increasing current when the load current gradually increases, so as to obtain the first load current.

[0009] Optionally, the current providing branch includes: a twelfth transistor and a fourth current source; the controlled branch includes: an eighth transistor and a thirteenth transistor; The third terminal of the eighth transistor is connected to the third terminal of the thirteenth transistor and the large current structure respectively; The eighth transistor serves as the second target transistor, a second end of which is connected to the second end of the first target transistor and the common bias unit respectively, and a first end of which is grounded; The first end of the thirteenth transistor is connected to the power supply end, and the second end is connected to the second end and the third end of the twelfth transistor respectively; The first terminal of the twelfth transistor is connected to the power supply terminal, and the third terminal is grounded through the fourth current source.

[0010] Optionally, the high current structure includes: a fourteenth transistor; The first end of the fourteenth transistor is connected to the power supply end, and the second end is connected to the third end of the thirteenth transistor and the third end of the eighth transistor respectively; The third terminal of the fourteenth transistor is connected to the output terminal of the low voltage difference stabilizing unit.

[0011] Optionally, the common bias unit includes: a tenth transistor and an eleventh transistor; The second end of the tenth transistor is connected to the third end of the tenth transistor, the second end of the eighth transistor, and the second end of the ninth transistor respectively; The third terminal of the tenth transistor is connected to the third terminal of the eleventh transistor, and the first terminal is grounded; The first end of the eleventh transistor is connected to the power supply end, and the second end is connected to the second end of the power tube.

[0012] Optionally, the low voltage dropout stabilizing unit includes: the error amplifier, the power tube, a negative feedback structure, a first current source, a second current source and a third current source; The error amplifier input stage is connected to the third terminal of the sixth transistor, and is connected to the power supply terminal through the first current source; The error amplifier is connected to the reference voltage terminal and the negative feedback structure respectively; The output end of the error amplifier is connected to the second end of the power tube, and is connected to the power supply end through the second current source; The first end of the power tube is connected to the power supply end; The third end of the power tube is connected to the negative feedback structure and the third end of the fourteenth transistor respectively, and is grounded through the third current source; The error amplifier is used to receive the target current in the tail current of its own input stage when the load current gradually increases, so that the total tail current gradually increases, thereby causing the main pole frequency of the error amplifier to increase along with the output pole frequency of the low-dropout voltage regulator unit; The size of the power tube is smaller than that of the fourteenth transistor. When the load current changes rapidly, the voltage at the second end of the power tube is rapidly adjusted by the error amplifier, thereby rapidly stabilizing the output voltage of the power tube.

[0013] Optionally, the error amplifier includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; the negative feedback structure includes: a first resistor and a second resistor; The first end of the first transistor and the first end of the second transistor are both connected to the third end of the sixth transistor, and are connected to the power supply end through the first current source; The second end of the first transistor is connected to the second end of the first resistor and the first end of the second resistor respectively; The second terminal of the second transistor is connected to the reference voltage terminal; The third end of the first transistor is connected to the third end and the second end of the third transistor and the second end of the fourth transistor respectively; The third end of the second transistor is connected to the third end of the fourth transistor and the second end of the fifth transistor respectively, and is connected to the first end of the first resistor and the third end of the power transistor respectively through a compensation capacitor; The first end of the third transistor and the first end of the fourth transistor are grounded; The first end of the fifth transistor is connected to the second end of the power tube and the second end of the eleventh transistor respectively, and is connected to the power supply end through the second current source; The third terminal of the fifth transistor is grounded; The first end of the power tube is connected to the power supply end; The third end of the power tube serves as the output end of the low voltage difference voltage stabilizing unit, and is respectively connected to the first end of the first resistor and the third end of the fourteenth transistor, and is grounded through the third current source; A second terminal of the second resistor is grounded.

[0014] Optionally, when unloaded, the voltage at the second terminal of the eleventh transistor is set to a preset value so that the eleventh transistor is in subthreshold conduction; The voltage at the second end of the power tube remains unchanged, the voltage at the second end of the eleventh transistor remains unchanged, and the voltage at the third end of the eleventh transistor is insufficient to turn on the tenth transistor, then: the eighth transistor, the ninth transistor, and the tenth transistor are all in the off state; The ninth transistor is in the off state, the current flowing through the seventh transistor is 0, the current copied by the sixth transistor flowing through the seventh transistor is also 0, and no additional current flows into the differential input stage of the error amplifier; The eighth transistor is in an off state, and the current flowing through the twelfth transistor is equal to the current provided by the fourth current source, and the thirteenth transistor has no current path; The thirteenth transistor replicates the current flowing through the twelfth transistor, and the thirteenth transistor has no current path, the thirteenth transistor is in a deep linear region, and the voltage of the third terminal thereof is close to the voltage provided by the power supply terminal, the voltage of the second terminal of the fourteenth transistor is close to the voltage provided by the power supply terminal, and the fourteenth transistor is cut off; The voltage ripple suppression unit and the common bias unit do not work, and only the twelfth transistor and the fourth current source in the transient response unit work.

[0015] Optionally, when working with load and the load current gradually increases, the voltage at the second end of the power tube gradually decreases, and then the voltage at the second end of the eleventh transistor gradually decreases; The voltage at the second terminal of the eleventh transistor gradually decreases, and then the eleventh transistor enters a saturation region, and the voltage at the third terminal thereof gradually increases; The voltage at the third terminal of the eleventh transistor gradually increases, and then the eighth transistor, the ninth transistor, and the tenth transistor are turned on, and the current flowing through the eighth transistor, the ninth transistor, and the tenth transistor gradually increases; The current flowing through the seventh transistor is the same as the current flowing through the ninth transistor, and the current flowing through the seventh transistor gradually increases; The current flowing through the seventh transistor gradually increases, and the replica current flowing through the seventh transistor copied by the sixth transistor gradually increases, which is injected into the tail current of the differential input stage of the error amplifier.

[0016] Optionally, when working with load and the load current gradually increases, the voltage at the second end of the power tube gradually decreases, and then the voltage at the second end of the eleventh transistor gradually decreases; The voltage at the second terminal of the eleventh transistor gradually decreases, and then the eleventh transistor enters a saturation region, and the voltage at the third terminal thereof gradually increases; The voltage at the third terminal of the eleventh transistor gradually increases, and then the eighth transistor is turned on, and the current flowing through the eighth transistor gradually increases; The current flowing through the eighth transistor gradually increases, and the current flowing through the thirteenth transistor in the deep linear region also gradually increases, and the third terminal voltage of the thirteenth transistor gradually decreases, so that the fourteenth transistor is turned on, and the thirteenth transistor enters the saturation region; When the load current further increases, the voltage at the second end of the power tube further decreases, and the current flowing through the eighth transistor further increases; When the current flowing through the eighth transistor further increases until it is greater than the maximum current copied by the thirteenth transistor, the eighth transistor enters the linear region, and the second terminal voltage of the fourteenth transistor further decreases, thereby providing the larger load current.

[0017] A second aspect of an embodiment of the present invention provides a low voltage dropout linear regulator, and the low voltage dropout linear regulator comprises: a low voltage dropout linear regulator circuit as described in any one of the first aspects.

[0018] A third aspect of an embodiment of the present invention provides an electronic device, wherein the electronic device includes the low voltage dropout linear regulator as described in the second aspect.

[0019] The low voltage difference linear voltage stabilization circuit provided by the present invention comprises: a low voltage difference voltage stabilization unit, a voltage ripple suppression unit, a transient response unit and a common bias unit. One end of the voltage ripple suppression unit is connected to the input stage of the error amplifier in the low voltage difference voltage stabilization unit, and the other end is connected to the transient response unit and the common bias unit respectively; the voltage ripple suppression unit is used to obtain a target current and inject the target current into the tail current of the differential input stage of the error amplifier, and the target current is a current having the same change trend as the second load current generated by the power tube.

[0020] One end of the transient response unit is connected to the output end of the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the common bias unit respectively; the transient response unit is used to generate a first load current, which together with the second load current provides a load current for the load, wherein the first load current is greater than the second load current.

[0021] One end of the common bias unit is connected to the second end of the power tube in the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the transient response unit respectively; the common bias unit is used to provide bias current for the voltage ripple suppression unit and the transient response unit.

[0022] The low voltage difference linear voltage regulator circuit proposed in the present invention creatively proposes a voltage ripple suppression unit, a transient response unit and a common bias unit on the basis of the traditional LDO circuit. Under the premise of not increasing the static power consumption, the voltage ripple suppression unit is used to generate a current with the same change trend as the second load current generated by the power tube, and is injected into the tail current of the differential input stage of the error amplifier, so that the main pole frequency of the error amplifier increases along with the output pole frequency of the low voltage difference linear voltage regulator circuit, and the bandwidth of the low voltage difference linear voltage regulator circuit is expanded, and the PSR drop frequency of the low voltage difference linear voltage regulator circuit is pushed to a higher frequency, thereby improving the value of the PSR at high frequency. The voltage ripple suppression unit uses fewer components and consumes very little static current. In addition, the increase in the tail current of the differential input stage of the error amplifier will also enable the error amplifier to handle a larger input voltage range, and can also cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0023] The transient response unit generates a first load current, which is larger than the second load current, and the two together provide load current for the load. Since the transient response unit can generate a larger load current, the size of the power tube driven by the error amplifier can be reduced while maintaining the large load driving capability of the low voltage difference linear voltage regulator circuit. When the size of the power tube is reduced, the parasitic capacitance is naturally reduced, thereby enhancing the transient response of the low voltage difference linear voltage regulator circuit, improving the transient response speed of the low voltage difference linear voltage regulator circuit, reducing the overshoot voltage, and reducing the compensation requirements of the low voltage difference linear voltage regulator circuit loop, thereby improving the response speed of the loop.

[0024] In addition, since the fluctuation range of the voltage at the first and second terminals of the power tube (i.e., the gate-source voltage) is reduced, the minimum swing limit required by the output terminal of the error amplifier is also reduced, leaving more options for the output stage design of the error amplifier. In summary, the low voltage difference linear voltage regulator circuit proposed by the present invention has a high practical value. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0026] Figure 1 It is a modular schematic diagram of a low voltage difference linear voltage stabilization circuit according to an embodiment of the present invention; Figure 2 It is a structural schematic diagram of a preferred low voltage difference linear voltage stabilizing circuit in an embodiment of the present invention; Figure 3 1 is a schematic diagram of a PSR curve obtained by actually measuring a conventional LDO circuit and a circuit proposed in the present invention in an embodiment of the present invention; Figure 4 It is a schematic diagram of transient response curves obtained by measuring a traditional LDO circuit and the circuit proposed in the present invention in an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, are only part of the embodiments of the present invention, not all of the embodiments, and are not used to limit the present invention.

[0028] The inventors have found that in the current traditional LDO circuit, in order to solve the problem of PSR reduction at high frequencies, the circuit structure of the proposed PSR improvement technology is relatively complex, and more components are used, resulting in more static current consumption, which is obviously not in line with the design and development trend of the LDO circuit.

[0029] In addition, the inventors also found that in traditional LDO circuits, in order to have fast transient response capabilities, it is usually necessary to quickly adjust the gate-source voltage of the power tube when the load current changes continuously, control the conduction degree of the power tube, and then adjust the output current of the power tube to restore the output voltage to a stable value as quickly as possible. The faster this process is, the smaller the overshoot voltage and reverse overshoot voltage values ​​caused.

[0030] The circuit structure of the PSR enhancement circuit and slew rate enhancement circuit used to improve PSR and transient response is complex and consumes a lot of static power, which obviously does not meet the development needs of low power consumption. In addition, in the LDO circuit, the circuit is required to have a large load capacity and a low voltage difference, and a large load capacity and a low voltage difference often require a power tube with a huge size (width-to-length ratio), so the power tube driven by the error amplifier is generally larger in size. The large size represents a large parasitic capacitance, which will also make the compensation of the error amplifier difficult and increase the compensation requirements, which will reduce the operating speed of the LDO circuit.

[0031] Based on the above problems, the inventor creatively proposed a low voltage drop linear voltage regulator circuit, a low voltage drop linear voltage regulator and an electronic device of the present invention. The technical solution of the present invention is explained and illustrated in detail below.

[0032] The low voltage difference linear voltage stabilizing circuit of the embodiment of the present invention refers to Figure 1 The modular schematic diagram of the low voltage difference linear voltage regulator circuit shown in the figure includes: a low voltage difference voltage regulator unit, a voltage ripple suppression unit, a transient response unit and a common bias unit. One end of the voltage ripple suppression unit is connected to the input stage of the error amplifier in the low voltage difference voltage regulator unit, and the other end is connected to the transient response unit and the common bias unit respectively.

[0033] The voltage ripple suppression unit is used to obtain the target current and inject the target current into the tail current of the differential input stage of the error amplifier. The target current is a current with the same change trend as the second load current generated by the power tube, that is, the voltage ripple suppression unit can obtain a current with the same change trend as the second load current generated by the power tube, and then inject the current into the tail current of the differential input stage of the error amplifier, so that the main pole frequency of the error amplifier follows the pole frequency of the LDO output (that is, the output of the power tube) and increases, expanding the bandwidth of the LDO, pushing the PSR drop frequency of the LDO to a higher frequency, thereby improving the value of the PSR at high frequencies. And because the tail current of the differential input stage of the error amplifier increases, it will also enable the error amplifier to handle a larger input voltage range, and can also cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0034] One end of the transient response unit is connected to the output end of the low voltage difference voltage regulator unit, and the other end is connected to the voltage ripple suppression unit and the common bias unit respectively. The transient response unit is used to generate a first load current, which together with the second load current provides a load current for the load, and the first load current is greater than the second load current. That is, the transient response unit can generate a larger current than the power tube, so that while meeting the load current demand, it can also reduce the load current required by the power tube as much as possible, and the load current required by the power tube is reduced, and the size of the power tube (generally refers to the width-to-length ratio) can be reduced. When the size of the power tube is reduced, the parasitic capacitance is naturally reduced, the transient response of the LDO is enhanced, the transient response speed of the LDO is improved, and the overshoot voltage is reduced. At the same time, the compensation requirements of the LDO loop are also reduced, and the response speed of the loop is improved. In addition, since the load current required to be provided by the power tube is reduced, the corresponding fluctuation range of its gate-source voltage is also reduced, which also reduces the minimum swing limit required by the output end of the error amplifier, leaving more room for choice for the output stage design of the error amplifier.

[0035] One end of the common bias unit is connected to the second end of the power tube in the low voltage difference voltage regulator unit, and the other end is connected to the voltage ripple suppression unit and the transient response unit respectively. The common bias unit is used to provide bias current for the voltage ripple suppression unit and the transient response unit. At the same time, by cleverly setting the common bias unit, the voltage ripple suppression unit, the transient response unit, and the common bias unit do not work when the low voltage difference linear voltage regulator unit is unloaded (that is, when the entire low voltage difference linear voltage regulator circuit is not loaded), and only consume a small static current.

[0036] In one embodiment of the present invention, the voltage ripple suppression unit can be implemented in a variety of ways, which are not described one by one. One of the preferred structures of the voltage ripple suppression unit includes: a current mirror structure. In the current mirror structure, the first end of the input branch and the first end of the replica branch are both connected to the power supply end; the third end of the replica branch is connected to the error amplifier input stage; the input branch is connected to the transient response unit and the common bias unit respectively through the second end of the first target tube. Among them, the first target tube is a transistor with the first end of the input branch grounded.

[0037] The input branch is used to not work when it is no-load, and when the load current gradually increases, the current flowing through it has the same changing trend as the second load current; the copy branch is used to not work when it is no-load, and when the load current gradually increases, copy the current flowing through the input branch. Since the current flowing through the input branch has the same changing trend as the second load current, the current copied by the copy branch naturally has the same changing trend as the second load current, thereby obtaining the target current in the copy branch.

[0038] The above-mentioned current mirror structure can be composed of a variety of basic electronic components, and one of the preferred construction methods is that the current mirror structure is composed of transistors. Transistors generally refer to all single components based on semiconductor materials. Transistors have multiple functions such as detection, rectification, amplification, switching, voltage regulation, signal modulation, etc. Transistors can be used for various digital and analog functions. It includes but is not limited to diodes, triodes, field effect transistors, thyristors (the latter three are three-terminal), etc. made of various semiconductor materials. Due to its fast response speed and high accuracy, transistors can be used for various digital and analog functions. Transistors can be packaged independently or in a very small area, which can accommodate 100 million or more transistors as part of an integrated circuit. The transistors mentioned in the present invention are all three-terminal structures, that is, devices with three-terminal structures such as triodes, field effect transistors, and thyristors. The first end, the second end, and the third end of the transistor described in the embodiment of the present invention, if the transistor uses a field effect transistor or a thyristor, the first end, the second end, and the third end correspond to the source, the gate, and the drain respectively; if the transistor uses a triode, the first end, the second end, and the third end correspond to the base, the emitter, and the collector respectively. The above correspondence is obtained from the current flow angles of the field effect transistor and the transistor respectively.

[0039] In a field effect transistor, the gate is responsible for controlling the current between the source and the drain. Similarly, in a triode, the base plays the role of controlling the current between the emitter and the collector. Therefore, from a functional point of view, the gate is quite similar to the base of a triode, and both play the role of controlling the current. The source is the starting point of the current in the field effect transistor, which is similar to the emitter of the triode. The emitter is the emission end of the current in the triode and is responsible for the output of the current. Although there are differences in the physical structure and working principle between the two, from the perspective of current flow, the source and the emitter play the role of current output in their respective devices. The drain is the end point of the current in the field effect transistor, similar to the collector in the triode. The collector is responsible for collecting the current emitted from the emitter in the triode. Therefore, from the perspective of current flow, the drain and the collector play the role of current receiving in their respective devices. Based on this principle, other similar devices (including existing devices or similar functional devices that may be designed in the future) can be equivalent to the above-mentioned transistor as long as they have the same or similar current relationship.

[0040] Based on the above transistors, a preferred current mirror structure includes: a sixth transistor, a seventh transistor and a ninth transistor; the first end of the sixth transistor is connected to the power supply end, the second end is connected to the second end of the seventh transistor, and the third end is connected to the error amplifier input stage; the third end of the seventh transistor is connected to the second end of itself and the third end of the ninth transistor respectively; the ninth transistor is used as the first target transistor, and its second end is connected to the transient response unit and the common bias unit respectively, and the first end of the ninth transistor is grounded. The specific working principle is described below in conjunction with the attached Figure 2 I won’t go into details about the explanation for now.

[0041] In one embodiment of the present invention, the transient response unit can be implemented in a variety of ways, which are not described one by one. One preferred transient response unit includes: a current limiting structure and a large current structure; the current limiting structure includes: a current providing branch and a controlled branch, and the controlled branch replicates the current of the current providing branch, that is, the current limiting structure can also be regarded as a current mirror structure, but the specific structure is slightly different from the current mirror structure corresponding to the aforementioned voltage ripple suppression unit.

[0042] The first end of the current branch, the controlled branch and the large current structure are all connected to the power supply end; the third end of the current branch is grounded through a current source; the third end of the large current structure is connected to the output end of the low voltage difference voltage stabilizing unit (that is, the output end of the power tube); the second end of the large current structure is connected to the controlled branch; the controlled branch is connected to the second end of the first target tube and the common bias unit through the second end of the second target tube. Among them, the second target tube is a transistor with the first end grounded in the controlled branch.

[0043] The current branch is provided to provide a preset current (i.e., the current provided by the current source connected thereto); the controlled branch is used to not work when unloaded, and when the load current gradually increases, gradually increase the current flowing through itself, and reduce the second terminal voltage of the large current structure; the large current structure is used to not work when unloaded, and when the load current gradually increases, provide a gradually increasing current to obtain a first load current. That is, the large current structure generates a first load current, which is greater than the second load current output by the power tube.

[0044] The above-mentioned current providing branch, controlled branch and high current structure can also be composed of a variety of basic electronic components, wherein a preferred structure of the current providing branch includes: a twelfth transistor and a fourth current source; wherein a preferred structure of the controlled branch includes: an eighth transistor and a thirteenth transistor. In terms of specific connection relationship: The third end of the eighth transistor is connected to the third end of the thirteenth transistor and the high current structure respectively; the eighth transistor serves as the second target transistor, and its second end is connected to the second end of the first target transistor and the common bias unit respectively, and the first end of the eighth transistor is grounded.

[0045] The first end of the thirteenth transistor is connected to the power supply end, the second end of the thirteenth transistor is connected to the second end of the twelfth transistor and the third end of the twelfth transistor respectively; the first end of the twelfth transistor is connected to the power supply end, and the third end of the twelfth transistor is grounded through the fourth current source.

[0046] One of the better high current structures includes: a fourteenth transistor; the first end of the fourteenth transistor is connected to the power supply end, the second end of the fourteenth transistor is connected to the third end of the thirteenth transistor and the third end of the eighth transistor respectively; the third end of the fourteenth transistor is connected to the output end of the low voltage difference voltage stabilizing unit, that is, the output end of the power tube.

[0047] In one embodiment of the present invention, the common bias unit includes: a tenth transistor and an eleventh transistor; the second end of the tenth transistor is connected to the third end of the tenth transistor, the second end of the eighth transistor, and the second end of the ninth transistor respectively; the third end of the tenth transistor is connected to the third end of the eleventh transistor, and the first end of the tenth transistor is grounded; the first end of the eleventh transistor is connected to the power supply end, and the second end of the eleventh transistor (that is, the output end of the large current structure and the output end of the transient response unit) is connected to the second end of the power tube (that is, the output end of the power tube).

[0048] In one embodiment of the present invention, for the low voltage dropout voltage regulator unit, it can use a traditional LDO circuit, or it can use other circuit structures with similar functions to the traditional LDO circuit. A preferred structure of the low voltage dropout voltage regulator unit includes: an error amplifier, a power tube, a negative feedback structure, a first current source, a second current source, and a third current source.

[0049] The input stage of the error amplifier is connected to the third end of the sixth transistor, and is connected to the power supply end through the first current source; the error amplifier is connected to the reference voltage end and the negative feedback structure respectively; the output end of the error amplifier is connected to the second end of the power tube, and the output end of the error amplifier is connected to the power supply end through the second current source. In addition to realizing the functions that the error amplifier in the traditional LDO circuit already has, the error amplifier in the circuit structure proposed by the present invention is also used to receive the target current in the tail current of its own input stage when the load current gradually increases, so that the total tail current gradually increases, and then the main pole frequency of the error amplifier increases together with the output pole frequency of the low-voltage difference voltage regulator unit; the frequency band of the entire circuit is expanded, so that the PSR of the entire circuit decreases more slowly at high frequencies, thereby improving the PSR at high frequencies. At the same time, the input voltage range of the error amplifier is also increased.

[0050] The first end of the power tube is connected to the power supply end; the third end of the power tube is connected to the negative feedback structure and the third end of the fourteenth transistor respectively, and is grounded through the third current source. The size of the power tube is smaller than that of the fourteenth transistor. Therefore, in addition to realizing the functions that the power tube in the traditional LDO circuit already has, the power tube is also used in the circuit structure of the present invention to quickly adjust the voltage at its second end when the load current changes rapidly, thereby making the output voltage of the power tube quickly stabilized, improving the transient response speed of the entire circuit, and reducing the overshoot voltage. At the same time, due to the small size of the power tube, its parasitic capacitance is also small, thereby raising the pole frequency of the output end of the error amplifier, reducing the compensation requirements of the entire circuit loop, and improving the response speed of the loop.

[0051] In one embodiment of the present invention, for the error amplifier, a preferred structure of the error amplifier includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; the negative feedback structure includes: a first resistor and a second resistor.

[0052] The first end of the first transistor and the first end of the second transistor are connected to the third end of the sixth transistor, and are connected to the power supply end through the first current source; the second end of the first transistor is connected to the second end of the first resistor and the first end of the second resistor respectively; the second end of the second transistor is connected to the reference voltage end; the third end of the first transistor is connected to the third end and the second end of the third transistor and the second end of the fourth transistor respectively; the third end of the second transistor is connected to the third end of the fourth transistor and the second end of the fifth transistor respectively, and is connected to the first end of the first resistor and the third end of the power tube respectively through a compensation capacitor.

[0053] The first end of the third transistor and the first end of the fourth transistor are grounded; the first end of the fifth transistor is connected to the second end of the power tube and the second end of the eleventh transistor respectively, and is connected to the power supply end through the second current source; the third end of the fifth transistor is grounded.

[0054] The first end of the power tube is connected to the power supply end; the third end of the power tube (that is, the output end of the power tube) serves as the output end of the low voltage difference voltage stabilizing unit, which is respectively connected to the first end of the first resistor and the third end of the fourteenth transistor, and is grounded through the third current source; the second end of the second resistor is grounded.

[0055] In order to better understand the structures of the above-mentioned low voltage difference voltage regulator unit, voltage ripple suppression unit, transient response unit and common bias unit and the working principle of the entire voltage difference linear voltage regulator circuit, refer to Figure 2 A schematic structural diagram of a preferred low voltage difference linear voltage stabilizing circuit is shown. Figure 2The specific NMOS and PMOS tubes are used as examples. MOS tubes (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET is generally abbreviated as MOS, Chinese name: Metal-Oxide Semiconductor Field Effect Transistor, referred to as metal-oxide semiconductor field effect transistor). MOS tubes are generally divided into two categories: PMOS tubes (P channel type) and NMOS (N channel type), which belong to insulated gate field effect tubes.

[0056] PMOS tube refers to a MOS tube with an n-type substrate and a p-channel, which transports current by the flow of holes. The P-channel silicon MOS tube has two P+ regions on the N-type silicon substrate, which are called the source and the drain. There is no conduction between the two electrodes. When a sufficient positive voltage is applied to the source (the gate is grounded), the surface of the N-type silicon under the gate presents a P-type inversion layer, which becomes a channel connecting the source and the drain. Changing the gate voltage can change the hole density in the channel, thereby changing the resistance of the channel. This MOS tube is called a P-channel enhancement field effect transistor. If there is a P-type inversion layer channel on the surface of the N-type silicon substrate without applying a gate voltage, the resistance of the channel can be increased or decreased by adding an appropriate bias voltage. Such a MOS field effect transistor is called a P-channel depletion field effect transistor. The two are collectively referred to as PMOS tubes. The hole mobility of the PMOS tube is low, so when the geometric size of the MOS tube and the absolute value of the operating voltage are equal, the transconductance of the PMOS tube is smaller than that of the NMOS tube. In addition, the absolute value of the threshold voltage of the PMOS tube is generally high, requiring a higher operating voltage. The voltage and polarity of its power supply are incompatible with bipolar transistors - transistor logic circuits. Because the circuit technology of PMOS tubes is simple and cheap, most medium-scale and small-scale digital control circuits use PMOS tube circuit technology.

[0057] The NMSO tube is made on a P-type silicon substrate with a low doping concentration (providing a large number of movable holes), with two high-doping concentration N+ regions (there are a large number of electron sources in the N+ region that provide free electrons for the flow of current), and two electrodes are drawn out with metal, which are used as the drain D and the source S. Then a very thin layer of silicon dioxide (SiO2) insulating layer is covered on the surface of the semiconductor, and a metal electrode (usually polysilicon) is installed on the insulating layer between the drain and the source as the gate G. An electrode B is also drawn out on the substrate, which constitutes an N-channel enhancement MOS tube. The main difference between the NMOS tube and the PMOS tube is that when the gate G is at a high level, the NMOS tube is turned on, and when it is at a low level, the NMOS tube is turned off, while the PMOS tube is just the opposite.

[0058] Based on the above PMOS tube, NMOS tube, combined with Figure 2The circuit structure and working principle are explained using the gate (corresponding to the second end of the transistor), source (corresponding to the first end of the transistor), and drain (corresponding to the third end of the transistor) commonly used in MOS tubes: Figure 2 The portion within the middle black frame 10 is a circuit structure of a low voltage dropout voltage regulator unit, which can be regarded as a traditional LDO circuit; the black frame 20 is a circuit structure of a voltage ripple suppression unit, a transient response unit, and a common bias unit.

[0059] The error amplifier includes: a first transistor (a PMOS tube) M1, a second transistor M2 (a PMOS tube), a third transistor M3 (an NMOS tube), a fourth transistor M4 (an NMOS tube), and a fifth transistor M5 (a PMOS tube); the negative feedback structure includes: a first resistor R1 and a second resistor R2.

[0060] The source of the first transistor M1 and the source of the second transistor M2 are both connected to the drain of the sixth transistor M6 , and the source of the first transistor M1 and the source of the second transistor M2 are connected to the power supply terminal AVDD through the first current source I1 .

[0061] The gate of the first transistor M1 is connected to the second end of the first resistor R1 and the first end of the second resistor R2 respectively; the gate of the second transistor M2 is connected to the reference voltage terminal VREF; the drain of the first transistor M1 is connected to the drain and gate of the third transistor M3 and the gate of the fourth transistor M4 respectively; the drain of the second transistor M2 is connected to the drain of the fourth transistor M4 and the gate of the fifth transistor M5 respectively, and is connected to the first end of the first resistor R1 and the drain of the power tube MPOW respectively through a compensation capacitor CM.

[0062] The source of the third transistor M3 and the source of the fourth transistor M4 are both grounded GND; the source of the fifth transistor M5 is connected to the gate of the power tube MPOW and the gate of the eleventh transistor M11 respectively, and is connected to the power supply terminal AVDD through the second current source I2; the drain of the fifth transistor M5 is grounded GND.

[0063] The first end of the power tube MPOW is connected to the power supply end AVDD; the drain of the power tube MPOW (that is, the output end of the power tube MPOW) is used as the output end of the low voltage difference voltage regulator unit, that is, the output of the entire low voltage difference linear voltage regulator circuit, which is respectively connected to the first end of the first resistor R1 and the drain of the fourteenth transistor M14, and is grounded to GND through the third current source I3; the second end of the second resistor R2 is grounded to GND. At the same time, Figure 2 In order to indicate the load condition of the low voltage difference linear voltage regulator circuit, the load resistance RL and the load capacitance CL are used to indicate the load it carries.

[0064] The source of the sixth transistor M6 is connected to the power supply terminal AVDD, the gate of the sixth transistor M6 is connected to the gate of the seventh transistor M7, and the drain of the sixth transistor M6 is connected to the error amplifier input stage (that is, the source of the first transistor M1 and the second transistor M2); the drain of the seventh transistor M7 is connected to its own gate and the drain of the ninth transistor M9 respectively; the gate of the ninth transistor is connected to the gate of the eighth transistor M8 and the gate of the tenth transistor M10 respectively, and the first end of the ninth transistor M9 is grounded GND.

[0065] The drain of the eighth transistor M8 is connected to the drain of the thirteenth transistor M13 and the gate of the fourteenth transistor M14 respectively; the source of the eighth transistor is connected to the ground GND. The source of the thirteenth transistor M13 is connected to the power supply terminal AVDD, and the gate of the thirteenth transistor M13 is connected to the gate of the twelfth transistor M12 and the drain of the twelfth transistor M12 respectively; the source of the twelfth transistor M12 is connected to the power supply terminal AVDD, and the drain of the twelfth transistor M12 is connected to the ground GND through the fourth current source I4. The source of the fourteenth transistor M14 is connected to the power supply terminal AVDD, and the drain of the fourteenth transistor M14 is connected to the drain of the power tube MPOW.

[0066] Its working principle is as follows: assuming that only the low voltage difference voltage stabilizing unit is working with load, and there are no other units, the first resistor R1 and the second resistor R2 detect the change of the output voltage VOUT, and then compare it with the reference voltage VREF (VREF is usually provided by the previous stage circuit such as the bandgap reference) received by the gate of the second transistor M2, and adjust the gate voltage of the power tube MPOW through the error amplifier (the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, and the fifth transistor M5) to control the conduction current flowing through the power tube MPOW, so as to adjust the output voltage VOUT. For example: when the load current suddenly increases, the current flowing through the power tube MPOW remains unchanged at this time, which will inevitably cause the current flowing through the first resistor R1 and the second resistor R2 to decrease, resulting in a decrease in VOUT, and the feedback voltage VFB, that is, the gate voltage of the first transistor M1, also decreases, the gate voltage of the fourth transistor M4 increases, and the gate voltage of the fifth transistor M5 decreases, causing the gate voltage of the power tube MPOW to also decrease. At this time, the current flowing through the power tube MPOW increases, so that the output voltage VOUT rises back to keep the output voltage unchanged. When the load current decreases, the above feedback process changes in the opposite direction.

[0067] However, when the frequency is higher than the main pole frequency of the error amplifier, the gain will decrease as the frequency increases, causing the PSR of the low-dropout voltage regulator circuit to decrease with the gain of the error amplifier. At the same time, when the load current is constantly changing, it is necessary to be able to quickly adjust the gate-source voltage of the power tube MPOW, control the conduction degree of the power tube MPOW, and then adjust the output current of the power tube MPOW to restore the output voltage to a stable value as soon as possible. The faster this process is, the smaller the overshoot voltage and reverse overshoot voltage values ​​caused. Since the circuit is required to have a large load capacity and a low voltage difference, and a large load capacity and a low voltage difference often require a power tube MPOW with a huge size (width-to-length ratio), the power tube MPOW driven by the error amplifier is generally larger in size. The large size represents a large parasitic capacitance, which makes the gate-source voltage of the power tube unable to quickly establish in place, and the transient response is slow. It also makes the compensation of the error amplifier difficult, increasing the compensation requirements, which will reduce the working speed of the LDO.

[0068] In the low voltage difference linear voltage regulator circuit after adding the voltage ripple suppression unit, the transient response unit and the common bias unit, when no-load, the gate voltage of the eleventh transistor M11 is set to a preset value so that the eleventh transistor M11 is in a subthreshold conduction state; since the gate voltage of the power tube MPOW remains unchanged, the gate voltage of the eleventh transistor M11 remains unchanged, and the drain voltage of the eleventh transistor M11 is not enough to turn on the tenth transistor M10, so: the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 are all in the off state.

[0069] The ninth transistor M9 is in the off state, and the current flowing through the seventh transistor M7 is 0, and the current copied by the sixth transistor M6 flowing through the seventh transistor M7 is also 0, and no additional current flows into the differential input stage of the error amplifier.

[0070] The eighth transistor M8 is in the off state, and the current flowing through the twelfth transistor M12 is equal to the current provided by the fourth current source I4. Therefore, even if the thirteenth transistor M13 copies the current flowing through the twelfth transistor M12, it has no current path due to the turning off of the eighth transistor M8.

[0071] The thirteenth transistor M13 replicates the current flowing through the twelfth transistor M12 but has no current path, so the thirteenth transistor M13 is in a deep linear region, and its drain voltage is close to the voltage provided by the power supply terminal AVDD, which makes the gate voltage of the fourteenth transistor M14 close to the voltage provided by the power supply terminal AVDD, so that the fourteenth transistor M14 can be turned off.

[0072] In this way, the voltage ripple suppression unit and the common bias unit do not work, and only the twelfth transistor M12 and the fourth current source I4 in the transient response unit work, consuming very low static current.

[0073] When the low voltage difference linear voltage regulator circuit works with load and the load current gradually increases from 0, the gate voltage of the power tube MPOW starts to gradually decrease, and the gate voltage of the eleventh transistor M11 also starts to gradually decrease.

[0074] The gate voltage of the eleventh transistor M11 gradually decreases, and the eleventh transistor M11 enters the saturation region from the subthreshold region, and its drain voltage begins to gradually increase; the drain voltage of the eleventh transistor M11 gradually increases, and the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 are turned on, and the current flowing through the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 begins to gradually increase.

[0075] Since the current flowing through the seventh transistor M7 is the same as the current flowing through the ninth transistor M9, the current flowing through the seventh transistor M7 gradually increases; the current flowing through the seventh transistor M7 gradually increases, and the sixth transistor M6 copies the current flowing through the seventh transistor M7 and gradually increases from 0, which is injected into the tail current of the differential input stage of the error amplifier.

[0076] The above process shows that: as the load current gradually increases, the tail current of the differential input stage of the error amplifier also gradually increases. Its advantages are: as the load current gradually increases, the main pole frequency of the error amplifier increases along with the output pole frequency of the entire circuit, expanding the bandwidth of the entire circuit, pushing the PSR drop frequency of the entire circuit to a higher frequency, thereby improving the value of PSR at high frequencies. The increase in the tail current of the differential input stage of the error amplifier will also enable the error amplifier to handle larger input signals and cope with a larger fluctuation range of the feedback voltage VFB.

[0077] At the same time, when the low voltage difference linear voltage regulator circuit works with load and the load current gradually increases from 0, it can be seen from the above description that: the gate voltage of the power tube MPOW gradually decreases, the gate voltage of the eleventh transistor M11 gradually decreases, the eighth transistor M8 is turned on, and the current flowing through the eighth transistor M8 gradually increases.

[0078] The current flowing through the eighth transistor M8 gradually increases, and the thirteenth transistor M13 in the deep linear region has a current path, and the current flowing through it also begins to gradually increase, and the drain voltage of the thirteenth transistor M13 begins to gradually decrease, so that the fourteenth transistor M14 is turned on, and the thirteenth transistor M13 enters the saturation region from the deep linear region.

[0079] Since the size of the fourteenth transistor M14 is relatively large, it can be used to replace the power tube MPOW to provide a larger load current. The power tube MPOW only needs to increase a smaller load current to meet the load current demand. When the load current further increases, the gate voltage of the power tube MPOW further decreases, and the current flowing through the eighth transistor M8 further increases.

[0080] When the current flowing through the eighth transistor M8 further increases until the current is greater than the maximum current copied by the thirteenth transistor M13, the eighth transistor M8 enters the linear region, and the gate voltage of the fourteenth transistor M14 further decreases, thereby providing a larger load current. In this process, the gate voltage of the power tube MPOW changes only within a very small range, and the change in the current of the remaining circuit is controlled by this small range change, thereby causing the gate voltage of the fourteenth transistor M14 to change within a large range, from the thirteenth transistor M13 entering the deep linear region when close to the power supply voltage AVDD, to the eighth transistor M8 entering the linear region when close to the ground GND, driving the fourteenth transistor M14 to provide an output current change from 0 to a wide range to meet the load current requirements.

[0081] The advantages of the above regulation are as follows: the power tube MPOW does not need a large size to provide a large current, so that the power tube MPOW can be selected in a smaller size. The small size means that the power tube MPOW has a smaller parasitic capacitance. When the load current changes rapidly, the error amplifier needs to charge the gate capacitance of the power tube MPOW for a shorter time, which makes the gate voltage of the power tube MPOW adjust faster, thereby making the output voltage tend to stabilize faster, reducing the amplitude of the overshoot voltage, and greatly improving the transient response of the entire circuit. At the same time, since the power tube MPOW reduces the parasitic capacitance, the pole frequency at the output end of the error amplifier is raised, the compensation requirements of the entire circuit loop are reduced, and the response speed of the loop is improved. The traditional slew rate enhancement circuit realizes the rapid charging and discharging of the gate voltage of the power tube MPOW by injecting an additional charge and discharge current into the gate of the power tube MPOW when the load current changes, without changing the large size of the power tube MPOW. Therefore, the large size represents a large parasitic capacitance, which makes the compensation of the traditional LDO circuit loop difficult and increases the compensation requirements, which will reduce the operating speed of the traditional LDO. At the same time, the slew rate enhancement circuit usually consumes more static current.

[0082] When using a traditional LDO circuit, since the power tube MPOW needs to drive a load current range from zero to hundreds of mA or even higher, the gate-source voltage of the power tube MPOW is required to have a large swing range. Usually, the power tube of the LDO is PMOS, and its source is generally connected to the power supply, so the gate of the power tube MPOW must have sufficient voltage swing. The gate of the power tube MPOW is connected to the output end of the error amplifier. In order to meet the swing of the gate voltage of the power tube MPOW, the output voltage swing of the error amplifier is required to be greater than the swing of the gate voltage of the power tube MPOW. Otherwise, if the swing of the gate voltage of the power tube MPOW exceeds the output voltage swing of the error amplifier, the error amplifier gain will decrease, thereby affecting the output voltage accuracy of the traditional LDO. Due to this limitation, the design difficulty of the error amplifier is increased or the ability of the traditional LDO to drive a large load is limited. At this time, if you choose to reduce the swing of the gate voltage of the power tube by increasing the size of the power tube, increasing the size of the power tube will bring about a large parasitic capacitance. The addition of the circuit proposed in the present invention solves this problem very well. Since the power tube MPOW is not needed to output a large load current, the gate voltage of the power tube MPOW does not need a large swing, which effectively eliminates or weakens the above limitation.

[0083] In order to verify the effectiveness of the low voltage drop linear voltage regulator circuit proposed in the present invention, the traditional LDO circuit and the circuit proposed in the present invention were tested and the following results were obtained: Figure 3 The PSR curve shown, Figure 3 The horizontal axis is the frequency freq, in Hertz (Hz), and the vertical axis is the PSR value, in decibels (dB). The black solid line is the PSR curve of the traditional LDO circuit, and the black dotted line is the PSR curve of the circuit proposed in the present invention. It can be seen that the PSR of the circuit proposed in the present invention is significantly improved in the medium and high frequency bands.

[0084] like Figure 4 The transient response curve shown is Figure 4 The horizontal axis is time, in microseconds (μs), and the vertical axis is the overshoot voltage value v, in volts (V). The upper part is the overshoot voltage value curve of the traditional LDO circuit, and the lower part is the overshoot voltage value curve of the circuit proposed in the present invention. It can be seen that the amplitude of the overshoot voltage value of the circuit proposed in the present invention is significantly reduced.

[0085] It should be noted that the structure of the above-mentioned low voltage difference linear voltage regulator circuit can be applied to various traditional LDO circuits through appropriate modification and adjustment, including but not limited to transistor type replacement, for example: simple replacement of NMOS tube and PMOS tube, replacement of MOS tube by triode, etc. Circuit structures that can be realized by those skilled in the art through simple reasoning or replacement on the basis of the technical solutions described above are all within the protection scope of the present invention.

[0086] Based on the above low voltage dropout linear voltage regulator circuit, an embodiment of the present invention further provides a low voltage dropout linear voltage regulator, and the low voltage dropout linear voltage regulator includes: any low voltage dropout linear voltage regulator circuit as described above.

[0087] Based on the above-mentioned low voltage dropout linear regulator, an embodiment of the present invention further provides an electronic device, wherein the electronic device includes the above-mentioned low voltage dropout linear regulator.

[0088] In summary, the low voltage difference linear voltage regulator circuit proposed in the present invention creatively proposes a voltage ripple suppression unit, a transient response unit and a common bias unit on the basis of the traditional LDO circuit. Under the premise of not increasing the static power consumption, the voltage ripple suppression unit is used to generate a current with the same change trend as the second load current generated by the power tube, and is injected into the tail current of the differential input stage of the error amplifier, so that the main pole frequency of the error amplifier increases along with the output pole frequency of the low voltage difference linear voltage regulator circuit, and the bandwidth of the low voltage difference linear voltage regulator circuit is expanded, and the PSR drop frequency of the low voltage difference linear voltage regulator circuit is pushed to a higher frequency, thereby improving the value of the PSR at high frequency. The voltage ripple suppression unit uses fewer components and consumes very little static current. In addition, the increase in the tail current of the differential input stage of the error amplifier will also enable the error amplifier to handle a larger input voltage range, and can also cope with a larger fluctuation range of the feedback voltage provided by the feedback structure.

[0089] The transient response unit generates a first load current, which is larger than the second load current, and the two together provide load current for the load. Since the transient response unit can generate a larger load current, the size of the power tube driven by the error amplifier can be reduced while maintaining the large load driving capability of the low voltage difference linear voltage regulator circuit. When the size of the power tube is reduced, the parasitic capacitance is naturally reduced, thereby enhancing the transient response of the low voltage difference linear voltage regulator circuit, improving the transient response speed of the low voltage difference linear voltage regulator circuit, reducing the overshoot voltage, and reducing the compensation requirements of the low voltage difference linear voltage regulator circuit loop, thereby improving the response speed of the loop.

[0090] In addition, since the fluctuation range of the voltage at the first and second terminals of the power tube (i.e., the gate-source voltage) is reduced, the minimum swing limit required by the output terminal of the error amplifier is also reduced, leaving more options for the output stage design of the error amplifier. In summary, the low voltage difference linear voltage regulator circuit proposed by the present invention has a high practical value.

[0091] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0092] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0093] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A low voltage drop linear voltage regulator circuit, characterized in that: The low voltage difference linear voltage stabilization circuit comprises: a low voltage difference voltage stabilization unit, a voltage ripple suppression unit, a transient response unit and a common bias unit; One end of the voltage ripple suppression unit is connected to the error amplifier input stage in the low voltage dropout voltage stabilizing unit, and the other end is connected to the transient response unit and the common bias unit respectively; One end of the transient response unit is connected to the output end of the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the common bias unit respectively; One end of the common bias unit is connected to the second end of the power tube in the low voltage difference voltage stabilizing unit, and the other end is connected to the voltage ripple suppression unit and the transient response unit respectively; The voltage ripple suppression unit is used to obtain a target current and inject the target current into the tail current of the differential input stage of the error amplifier, wherein the target current is a current having the same change trend as the second load current generated by the power tube; The transient response unit is used to generate a first load current, which together with the second load current provides a load current for the load, and the first load current is greater than the second load current; The common bias unit is used to provide bias current for the voltage ripple suppression unit and the transient response unit.

2. The low voltage difference linear voltage regulator circuit according to claim 1, characterized in that: The voltage ripple suppression unit comprises: a current mirror structure; The first end of the input branch and the first end of the replica branch in the current mirror structure are both connected to the power supply end; The third end of the replica branch is connected to the error amplifier input stage; The input branch is connected to the transient response unit and the common bias unit respectively through the second end of the first target tube, and the first target tube is a transistor in the input branch whose first end is grounded; The input branch is used to not work when no-load, and when the load current gradually increases, the current flowing through the input branch has the same change trend as the second load current; The replica branch is used to not work when the load is not in operation, and when the load current gradually increases, to replicate the current flowing through the input branch to obtain the target current.

3. The low voltage difference linear voltage regulator circuit according to claim 2, characterized in that: The current mirror structure comprises: a sixth transistor, a seventh transistor and a ninth transistor; The first end of the sixth transistor is connected to the power supply end, the second end is connected to the second end of the seventh transistor, and the third end is connected to the error amplifier input stage; The third end of the seventh transistor is connected to the second end of the seventh transistor and the third end of the ninth transistor respectively; The ninth transistor serves as the first target transistor, a second end of which is connected to the transient response unit and the common bias unit respectively, and a first end of which is grounded.

4. The low voltage difference linear voltage regulator circuit according to claim 2, characterized in that: The transient response unit includes: a current limiting structure and a large current structure; the current limiting structure includes: a current providing branch and a controlled branch, the controlled branch replicates the current of the current providing branch; The current providing branch, the controlled branch and the first end of the large current structure are all connected to the power supply end; The third end of the current branch is grounded via a current source; The third end of the high current structure is connected to the output end of the low voltage difference voltage stabilizing unit; The second end of the high current structure is connected to the controlled branch; The controlled branch is connected to the second end of the first target tube and the common bias unit respectively through the second end of the second target tube, and the second target tube is a transistor in the controlled branch whose first end is grounded; The current providing branch is used to provide a preset current; The controlled branch is used to not work when no-load, and when the load current gradually increases, gradually increase the current flowing through itself, and reduce the voltage at the second end of the large current structure; The high current structure is used for not working when no-load, and for providing a gradually increasing current when the load current gradually increases, so as to obtain the first load current.

5. The low voltage difference linear voltage regulator circuit according to claim 4, characterized in that: The current providing branch includes: a twelfth transistor and a fourth current source; the controlled branch includes: an eighth transistor and a thirteenth transistor; The third terminal of the eighth transistor is connected to the third terminal of the thirteenth transistor and the large current structure respectively; The eighth transistor serves as the second target transistor, a second end of which is connected to the second end of the first target transistor and the common bias unit respectively, and a first end of which is grounded; The first end of the thirteenth transistor is connected to the power supply end, and the second end is connected to the second end and the third end of the twelfth transistor respectively; The first terminal of the twelfth transistor is connected to the power supply terminal, and the third terminal is grounded through the fourth current source.

6. The low voltage difference linear voltage regulator circuit according to claim 5, characterized in that: The high current structure includes: a fourteenth transistor; The first end of the fourteenth transistor is connected to the power supply end, and the second end is connected to the third end of the thirteenth transistor and the third end of the eighth transistor respectively; The third terminal of the fourteenth transistor is connected to the output terminal of the low voltage difference stabilizing unit.

7. The low voltage drop linear regulator according to claim 6, characterized in that: The common bias unit includes: a tenth transistor and an eleventh transistor; The second end of the tenth transistor is connected to the third end of the tenth transistor, the second end of the eighth transistor, and the second end of the ninth transistor respectively; The third terminal of the tenth transistor is connected to the third terminal of the eleventh transistor, and the first terminal is grounded; The first end of the eleventh transistor is connected to the power supply end, and the second end is connected to the second end of the power tube.

8. The low voltage difference linear voltage regulator circuit according to claim 6, characterized in that: The low voltage dropout voltage stabilizing unit comprises: the error amplifier, the power tube, a negative feedback structure, a first current source, a second current source and a third current source; The error amplifier input stage is connected to the third terminal of the sixth transistor, and is connected to the power supply terminal through the first current source; The error amplifier is connected to the reference voltage terminal and the negative feedback structure respectively; The output end of the error amplifier is connected to the second end of the power tube, and is connected to the power supply end through the second current source; The first end of the power tube is connected to the power supply end; The third end of the power tube is connected to the negative feedback structure and the third end of the fourteenth transistor respectively, and is grounded through the third current source; The error amplifier is used to receive the target current in the tail current of its own input stage when the load current gradually increases, so that the total tail current gradually increases, thereby causing the main pole frequency of the error amplifier to increase along with the output pole frequency of the low-dropout voltage regulator unit; The size of the power tube is smaller than that of the fourteenth transistor. When the load current changes rapidly, the voltage at the second end of the power tube is rapidly adjusted by the error amplifier, thereby rapidly stabilizing the output voltage of the power tube.

9. The low voltage difference linear voltage regulator circuit according to claim 8, characterized in that: The error amplifier includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; the negative feedback structure includes: a first resistor and a second resistor; The first end of the first transistor and the first end of the second transistor are both connected to the third end of the sixth transistor, and are connected to the power supply end through the first current source; The second end of the first transistor is connected to the second end of the first resistor and the first end of the second resistor respectively; The second terminal of the second transistor is connected to the reference voltage terminal; The third end of the first transistor is connected to the third end and the second end of the third transistor and the second end of the fourth transistor respectively; The third end of the second transistor is connected to the third end of the fourth transistor and the second end of the fifth transistor respectively, and is connected to the first end of the first resistor and the third end of the power transistor respectively through a compensation capacitor; The first end of the third transistor and the first end of the fourth transistor are grounded; The first end of the fifth transistor is connected to the second end of the power tube and the second end of the eleventh transistor respectively, and is connected to the power supply end through the second current source; The third terminal of the fifth transistor is grounded; The first end of the power tube is connected to the power supply end; The third end of the power tube serves as the output end of the low voltage difference voltage stabilizing unit, and is respectively connected to the first end of the first resistor and the third end of the fourteenth transistor, and is grounded through the third current source; A second terminal of the second resistor is grounded.

10. The low voltage difference linear voltage regulator circuit according to claim 9, characterized in that: When no-load, setting the voltage of the second terminal of the eleventh transistor to a preset value so that the eleventh transistor is in subthreshold conduction; The voltage at the second end of the power tube remains unchanged, the voltage at the second end of the eleventh transistor remains unchanged, and the voltage at the third end of the eleventh transistor is insufficient to turn on the tenth transistor, then: the eighth transistor, the ninth transistor, and the tenth transistor are all in the off state; The ninth transistor is in the off state, the current flowing through the seventh transistor is 0, the current copied by the sixth transistor flowing through the seventh transistor is also 0, and no additional current flows into the differential input stage of the error amplifier; The eighth transistor is in an off state, and the current flowing through the twelfth transistor is equal to the current provided by the fourth current source, and the thirteenth transistor has no current path; The thirteenth transistor replicates the current flowing through the twelfth transistor, and the thirteenth transistor has no current path, the thirteenth transistor is in a deep linear region, and the voltage of the third terminal thereof is close to the voltage provided by the power supply terminal, the voltage of the second terminal of the fourteenth transistor is close to the voltage provided by the power supply terminal, and the fourteenth transistor is cut off; The voltage ripple suppression unit and the common bias unit do not work, and only the twelfth transistor and the fourth current source in the transient response unit work.

11. The low voltage difference linear voltage regulator circuit according to claim 9, characterized in that: When the load current gradually increases while the second terminal voltage of the power tube gradually decreases, the second terminal voltage of the eleventh transistor gradually decreases; The voltage at the second terminal of the eleventh transistor gradually decreases, and then the eleventh transistor enters a saturation region, and the voltage at the third terminal thereof gradually increases; The voltage at the third terminal of the eleventh transistor gradually increases, and then the eighth transistor, the ninth transistor, and the tenth transistor are turned on, and the current flowing through the eighth transistor, the ninth transistor, and the tenth transistor gradually increases; The current flowing through the seventh transistor is the same as the current flowing through the ninth transistor, and the current flowing through the seventh transistor gradually increases; The current flowing through the seventh transistor gradually increases, and the replica current flowing through the seventh transistor copied by the sixth transistor gradually increases, which is injected into the tail current of the differential input stage of the error amplifier.

12. The low voltage difference linear voltage regulator circuit according to claim 9, characterized in that: When the load current gradually increases while the second terminal voltage of the power tube gradually decreases, the second terminal voltage of the eleventh transistor gradually decreases; The voltage at the second terminal of the eleventh transistor gradually decreases, and then the eleventh transistor enters a saturation region, and the voltage at the third terminal thereof gradually increases; The voltage at the third terminal of the eleventh transistor gradually increases, and then the eighth transistor is turned on, and the current flowing through the eighth transistor gradually increases; The current flowing through the eighth transistor gradually increases, and the current flowing through the thirteenth transistor in the deep linear region also gradually increases, and the third terminal voltage of the thirteenth transistor gradually decreases, so that the fourteenth transistor is turned on, and the thirteenth transistor enters the saturation region; When the load current further increases, the voltage at the second end of the power tube further decreases, and the current flowing through the eighth transistor further increases; When the current flowing through the eighth transistor further increases until it is greater than the maximum current copied by the thirteenth transistor, the eighth transistor enters the linear region, and the second terminal voltage of the fourteenth transistor further decreases, thereby providing the larger load current.

13. A low voltage dropout linear regulator, characterized in that: The low voltage dropout linear regulator comprises: a low voltage dropout linear regulator circuit as described in any one of claims 1-12.

14. An electronic device, characterized in that: The electronic device comprises: the low voltage dropout linear regulator as claimed in claim 13.

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