Fully Reconfigurable General-Purpose Intelligent Optical Computing Chip Architecture and System
By introducing a fully reconstructible general intelligent optical computing chip architecture into the optical computing chip architecture, and using the transmitting and receiving modules to perform optical matrix operations, the problem that existing optical computing architectures cannot achieve large-scale integration and reconfigurability at the same time is solved, and efficient optical computing capabilities are achieved to support the computing requirements of artificial intelligence large models.
Patent Information
- Application Number
- CN202510379735.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2045-03-28
AI Technical Summary
The existing optical computing architecture cannot achieve large-scale integration and reconfigurability at the same time, and cannot effectively meet the needs of artificial intelligence large-scale computing.
A fully reconstructible general intelligent optical computing chip architecture is proposed, which beam-divides and modulates broadband light through the transmitting module, and the receiving module performs matrix calculations based on the optical propagation matrix of the target task, realizing a single layer to complete large-scale optical matrix operations.
It breaks through the contradiction between reconfigurable and scale integration, realizes the optical computing capabilities that meet both integration and reconfigurable, and can effectively support the computing needs of artificial intelligence large models.
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Figure CN119882931B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of optical computing technologies, and in particular, to a fully reconfigurable general intelligent optical computing chip architecture and system. Background Art
[0002] With the rapid development of the fields of artificial intelligence and scientific computing, the complexity and scale of computing requirements are also constantly increasing. However, existing electronic computing technologies are limited by Moore's Law, and their performance is gradually approaching saturation, making it difficult to effectively meet the increasingly stringent requirements for computing power and power consumption of large-scale complex algorithms. Light has natural advantages such as high throughput and low latency during propagation. Optical computing technology that uses photons instead of electrons as the computing carrier is regarded as the key to breaking the existing computing bottleneck. Summary of the Invention
[0003] The present disclosure aims to solve at least one of the technical problems in the related art to some extent.
[0004] To this end, the first object of the present disclosure is to propose a fully reconfigurable general intelligent optical computing chip architecture to simultaneously meet the integrated and reconfigurable use of a single layer to complete large-scale optical matrix operations.
[0005] The second object of the present disclosure is to propose a fully reconfigurable general intelligent optical computing chip system.
[0006] To achieve the above object, an embodiment of the first aspect of the present disclosure proposes a fully reconfigurable general intelligent optical computing chip architecture, including:
[0007] A transmitting module, configured to split each first single-wavelength light in a first broadband light corresponding to a target task to obtain and emit at least one single-wavelength split light set, where the first single-wavelength light corresponds to the single-wavelength split light set one by one;
[0008] A receiving module, configured to receive the at least one single-wavelength split light set, and perform matrix calculation on the at least one single-wavelength split light set according to an optical propagation matrix corresponding to the target task to obtain a second broadband light after optical computing, where the second broadband light includes at least one second single-wavelength light, the second single-wavelength light corresponds to the first single-wavelength light one by one, the single-wavelength split light set corresponds to a row in the optical propagation matrix, and the single-wavelength split lights in the single-wavelength split light set correspond to the row elements in the row one by one.
[0009] Optionally, when the transmitting module is configured to split each first single-wavelength light in a first broadband light corresponding to a target task to obtain at least one single-wavelength split light set, it is specifically configured to:
[0010] Split each type of first single - wavelength light in the first broadband light corresponding to the target task to obtain at least one initial set of split single - wavelength lights;
[0011] Modulate the at least one initial set of split single - wavelength lights according to the target task to obtain at least one set of split single - wavelength lights.
[0012] Optionally, when the transmitting module is used to modulate the at least one initial set of split single - wavelength lights according to the target task, it is specifically used for:
[0013] Perform phase modulation on the at least one initial set of split single - wavelength lights according to the target task.
[0014] Optionally, before performing matrix calculation on the at least one set of split single - wavelength lights according to the optical propagation matrix corresponding to the target task, the receiving module is further used for:
[0015] Determine the number of wavelengths corresponding to the first single - wavelength light in the target task and the number of splits corresponding to the set of split single - wavelength lights;
[0016] Construct an initial optical propagation matrix with the number of wavelengths as the number of rows and the number of splits as the number of columns;
[0017] According to the target task, determine the value of each element in the initial optical propagation matrix to obtain the optical propagation matrix corresponding to the target task.
[0018] Optionally, when the receiving module is used to determine the value of each element in the initial optical propagation matrix according to the target task, it is specifically used for:
[0019] Train the value of each element in the initial optical propagation matrix according to the target task.
[0020] Optionally, when the receiving module is used to perform matrix calculation on the at least one set of split single - wavelength lights according to the optical propagation matrix corresponding to the target task, it is specifically used for:
[0021] Use the light intensity corresponding to each split single - wavelength light in the at least one set of split single - wavelength lights as the input and perform matrix multiplication with the optical propagation matrix.
[0022] Optionally, when the transmitting module is used to emit the at least one set of split single - wavelength lights, it is specifically used for:
[0023] Emit the at least one set of split single - wavelength lights through a transmitting grating.
[0024] To achieve the above object, an embodiment of the second aspect of the present disclosure provides a fully reconfigurable general-purpose intelligent optical computing chip system, including: at least one fully reconfigurable general-purpose intelligent optical computing chip architecture shown in any one of the foregoing first aspects.
[0025] Optionally, the architecture includes: a plurality of the fully reconfigurable general-purpose intelligent optical computing chip architectures.
[0026] Optionally, the connection manner between the plurality of fully reconfigurable general-purpose intelligent optical computing chip architectures includes at least one of the following:
[0027] Series connection;
[0028] Parallel connection.
[0029] In summary, for the fully reconfigurable general-purpose intelligent optical computing chip architecture and system provided by the present disclosure, when performing matrix calculations on at least one set of single-wavelength split light according to the optical propagation matrix corresponding to the target task, by performing optical calculations on the single-wavelength split light in the set of single-wavelength split light and the corresponding row elements, the contradiction between reconfigurability and scale integration can be broken through, and it is possible to achieve large-scale optical matrix operations that simultaneously meet integration and reconfigurability using a single layer.
[0030] Additional aspects and advantages of the present disclosure will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The above and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description of the embodiments in conjunction with the accompanying drawings, where:
[0032] Figure 1 is a schematic structural diagram of a fully reconfigurable general-purpose intelligent optical computing chip architecture provided by an embodiment of the present disclosure;
[0033] Figure 2 is a schematic principle diagram of a fully reconfigurable general-purpose intelligent optical computing chip architecture provided by an embodiment of the present disclosure;
[0034] Figure 3 is a simulation result diagram of a fully reconfigurable general-purpose intelligent optical computing chip architecture provided by an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0035] Embodiments of the present disclosure will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present disclosure and should not be construed as limiting the present disclosure.
[0036] With the rapid development of artificial intelligence technology, especially the breakthroughs in large models (such as large language models, text-to-video models, etc.), the computing demand is increasing exponentially. The scale of large models has gradually grown from the earliest few million parameters to hundreds of billions or even trillions of parameters today. These models have demonstrated great potential in fields such as natural language processing, computer vision, and autonomous driving. However, training and inferring such large-scale models pose unprecedented challenges to computing power. The bottleneck of traditional electronic computing architectures lies in their high power consumption and limited computing speed, which cannot fully meet the growing demand for artificial intelligence large model computing.
[0037] In addition, the current optical computing architectures face the contradiction that it is impossible to have both large computing scale and reconfigurability; at the same time, the designed and determined optical chips have fixed computing modes and do not have the ability of reconfigurable computing modes; moreover, optical chip computing cannot implement arbitrary matrices in the case of single-layer propagation and usually requires multi-layer multiplexing to complete. These limitations make optical computing unable to meet the current computing needs of large models that require reconfigurability and large-scale integration, and the potential of optical computing has not been fully exploited.
[0038] Therefore, how to make the optical computing chip simultaneously meet the requirements of integrated, reconfigurable, and large-scale matrix operations using a single layer has become a technical problem to be solved urgently.
[0039] The following will describe the present disclosure in detail with specific embodiments.
[0040] Figure 1 The following is a schematic structural diagram of a fully reconfigurable general intelligent optical computing chip architecture provided by an embodiment of the present disclosure. As Figure 1 shown, the fully reconfigurable general intelligent optical computing chip architecture includes:
[0041] A transmitting module, configured to split each first single-wavelength light in the first broadband light corresponding to the target task to obtain and emit at least one single-wavelength split light set;
[0042] A receiving module, configured to receive at least one single-wavelength split light set and perform matrix calculation on the at least one single-wavelength split light set according to the optical propagation matrix corresponding to the target task to obtain the second broadband light after optical computing.
[0043] According to some embodiments, the high-speed signal corresponding to the target task can be loaded into the broadband spectrum to obtain the first broadband light, and the first broadband light can be reused into the transmitting module.
[0044] In some embodiments, the first single-wavelength light corresponds one-to-one with the set of single-wavelength split lights; in the transmitting module, each first single-wavelength light in the input first broadband light needs to be transmitted and diffracted on the same waveguide, so as to be split from one waveguide to multiple waveguides, obtaining a set of single-wavelength split lights composed of multiple single-wavelength split lights. Among them, during the splitting process, equal splitting can be performed or not, and it can be specifically adjusted according to the application scenario.
[0045] According to some embodiments, the second broadband light includes at least one second single-wavelength light, and the second single-wavelength light corresponds one-to-one with the first single-wavelength light. The "first" in the first broadband light, the second broadband light, the first single-wavelength light, and the second single-wavelength light, as well as the "second" in the second computing and optical conversion chip, have no special meaning and are only used for distinction.
[0046] In some embodiments, the set of single-wavelength split lights corresponds one-to-one with the rows in the optical propagation matrix, and the single-wavelength split lights in the set of single-wavelength split lights correspond one-to-one with the row elements in the rows. That is to say, when performing matrix calculation on at least one set of single-wavelength split lights according to the optical propagation matrix corresponding to the target task, the single-wavelength split lights in the set of single-wavelength split lights perform optical calculations with the corresponding row elements.
[0047] It is easy to understand that when this architecture performs matrix calculation on at least one set of single-wavelength split lights according to the optical propagation matrix corresponding to the target task, by performing optical calculations with the single-wavelength split lights in the set of single-wavelength split lights and the corresponding row elements, the contradiction between reconfigurability and scale integration can be broken through, and it can be realized to simultaneously satisfy the integrated and reconfigurable use of a single layer to complete large-scale optical matrix operations.
[0048] Optionally, when the transmitting module is used to split each first single-wavelength light in the first broadband light corresponding to the target task to obtain at least one set of single-wavelength split lights, it is specifically used for:
[0049] Split each first single-wavelength light in the first broadband light corresponding to the target task to obtain at least one initial set of single-wavelength split lights;
[0050] Modulate at least one initial set of single-wavelength split lights according to the target task to obtain at least one set of single-wavelength split lights.
[0051] According to some embodiments, when the transmitting module is used to modulate at least one initial set of single-wavelength split lights according to the target task, it can perform phase modulation on at least one initial set of single-wavelength split lights according to the target task.
[0052] In some embodiments, a dedicated application specific integrated circuit (ASIC) interface may be employed to perform phase modulation on at least one initial set of single-wavelength split light.
[0053] In some embodiments, after being led out by electrodes, the ASIC interface may be driven by a voltage source to achieve phase modulation on the initial set of single-wavelength split light.
[0054] Optionally, when the transmitting module is used to transmit at least one set of single-wavelength split light, it is specifically configured to:
[0055] Transmit at least one set of single-wavelength split light through a transmitting grating.
[0056] According to some embodiments, the set of single-wavelength split light may be emitted from the grating end of the corresponding transmitting grating and received by the next-level receiving module.
[0057] Optionally, before performing matrix calculation on at least one set of single-wavelength split light according to the optical propagation matrix corresponding to the target task, the receiving module is further configured to:
[0058] Determine the number of wavelengths corresponding to the first single-wavelength light in the target task and the number of split beams corresponding to the set of single-wavelength split light;
[0059] Construct an initial optical propagation matrix with the number of wavelengths as the number of rows and the number of split beams as the number of columns;
[0060] According to the target task, determine the value of each element in the initial optical propagation matrix to obtain the optical propagation matrix corresponding to the target task.
[0061] It should be noted that Figure 2 is a schematic diagram of the principle of a fully reconfigurable general intelligent optical computing chip architecture provided by the embodiments of the present disclosure. As Figure 2 shown, the element values of the traditional optical computing matrix architecture are very close when the wavelength intervals are close, so the column vectors of this matrix are highly linearly correlated, resulting in a small matrix rank implemented by the chip. The multi-wavelength decoupling theory originates from two parts: the decoupling of different wavelengths of the shared waveguide on the chip waveguide and the spatial phase decoupling of waveguides at different spatial positions. For a single transmitting waveguide, the distance traveled on the waveguide from the input light to the final output is , and this distance will make the phase decoupling of different wavelength lights at the output random, because after wavelength propagation and the phase difference between two wavelengths can be described as , the long waveguide causes the originally close phase differences to be amplified, so that the initial phases of the emissions of different wavelengths in a single waveguide are inconsistent; for the emitted light at different positions, after the previous emission grating, the waveguide light is phase-modulated by the waveguide for a period with different responses to different wavelengths , thus realizing that for the emitted light on the entire emission surface (assuming there are 256 emission gratings in total), the propagation matrices corresponding to lights of different wavelengths are highly nonlinearly correlated, thus providing theoretical and architectural support for realizing any matrix in a single layer.
[0062] In some embodiments, such as Figure 2 shown, existing optical calculations only reconstruct trainable parameters, and their architectures are fixed and non-reconfigurable. At the same time, the computing scale can only achieve scale under the condition of a limited chip area. The architecture provided in this embodiment can achieve matrix input output under the condition of obtaining effective waveguide multi-wavelength phase perturbations. Under the condition of satisfying DoF , the present invention can achieve matrix implementation with arbitrary dimension input and output under the full degree of freedom limitation. The dimension of the input depends on the number of input wavelengths, and the wavelength interval should meet the minimum perturbation standard , while the dimension of the output can be adaptively adjusted by changing the number of receiving positions. That is to say, the architecture provided in this embodiment can achieve general intelligent optical computing with reconfigurable arbitrary matrix architectures including parameter reconfiguration. For example, it can achieve
[0063] In some embodiments, Figure 3 is a simulation result diagram of a fully reconfigurable general intelligent optical computing chip architecture provided by an embodiment of the present disclosure. As Figure 3 shown, it shows that the relative error of the realized matrix is significantly reduced in the case of chip phase perturbation compared with the case without perturbation. Through simulation and experiments, it is proved that there is a relationship as Figure 3 shown between the input and output degrees of freedom of an arbitrary matrix and the accuracy of matrix implementation. The boundary function between high and low accuracy is , and the part below this function is all effective high-precision matrix implementations.
[0064] According to some embodiments, when the receiving module is used to determine the value of each element in the initial optical propagation matrix according to the target task, the value of each element in the initial optical propagation matrix can be trained according to the target task.
[0065] In some embodiments, the value of this element is the response value of the corresponding single-wavelength split beam under unit intensity. This value can also be determined according to the following formula:
[0066]
[0067] Among them, the single-wavelength beam-splitting light set includes N single-wavelength beam-splitting lights, N where W i is a positive integer greater than 1, and i is the value of the element corresponding to the G 0i refers to the propagation matrix in space of the i th single-wavelength beam-splitting light in the single-wavelength beam-splitting light set. refers to the optical propagation parameter corresponding to the i th single-wavelength beam-splitting light in the single-wavelength beam-splitting light set.
[0068] It is easy to understand that by designing waveguide interval spectrum perturbation on the chip and jointly modeling the space and spectrum of light at the input end, a fully reconfigurable diffraction calculation model for any dimension in space of an optical computing chip can be constructed, enabling the realization of a single-layer optical computing chip with an arbitrarily shaped matrix that utilizes full degrees of freedom and breaking through the contradiction between reconfigurability and scale integration.
[0069] Optionally, when the receiving module is used to perform matrix calculation on at least one single-wavelength beam-splitting light set according to the optical propagation matrix corresponding to the target task, specifically:
[0070] Take the light intensity corresponding to each single-wavelength beam-splitting light in at least one single-wavelength beam-splitting light set as the input and perform matrix multiplication operation with the optical propagation matrix.
[0071] Taking one scenario as an example, when only one first single-wavelength light is included in the first broadband light and the first single-wavelength light is split into N single-wavelength beam-splitting lights, the input of the optical propagation matrix can be expressed as follows:
[0072]
[0073] where x represents the light intensity of the single-wavelength beam-splitting light.
[0074] The optical propagation matrix corresponding to the first single-wavelength light can be expressed as follows:
[0075]
[0076] Next, the second single-wavelength light obtained after performing matrix multiplication on X and W can be expressed as follows:
[0077]
[0078] According to some embodiments, after performing matrix multiplication operations to obtain x 1 W 1 , x 2 W 2 …x i W i it can be added through incoherent superposition to complete the calculation process of the entire matrix.
[0079] In summary, the architecture provided in this embodiment is supported by the multi-wavelength decoupling theory. By using the wavelength information of the optical field, the phase is decoupled through waveguide perturbation on the chip, realizing spatial phase decoupling. Thus, the modulation degrees of freedom are maximally utilized, and a fully reconfigurable general matrix calculation that reaches the theoretical matrix calculation upper limit is achieved. This can greatly expand the application scope of photonic computing, lay a solid foundation for the optical computing of artificial intelligence large models, and is expected to bring new opportunities for the high-performance artificial intelligence large model computing in the post-Moore era, realizing the optical chip-side deployment of artificial intelligence large models.
[0080] To implement the above embodiments, the present disclosure also proposes a fully reconfigurable general intelligent optical computing chip system, including: at least one fully reconfigurable general intelligent optical computing chip architecture provided in the foregoing embodiments.
[0081] Optionally, the architecture includes: a plurality of fully reconfigurable general intelligent optical computing chip architectures. Among them, the connection manners between the plurality of fully reconfigurable general intelligent optical computing chip architectures include at least one of the following:
[0082] Series connection;
[0083] Parallel connection.
[0084] The collection, storage, use, processing, transmission, provision, and disclosure of the user's personal information involved in the present disclosure and other processing all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.
[0085] It should be noted that the personal information from users should be collected for legal and reasonable purposes and not shared or sold outside these legal uses. In addition, such collection / sharing should be carried out after obtaining the informed consent of the users, including but not limited to notifying the users to read the user agreement / user notice and signing an agreement / authorization including authorizing the relevant user information before the users use this function. In addition, any necessary steps need to be taken to protect and safeguard access to such personal information data and ensure that others with the right to access the personal information data comply with their privacy policies and procedures.
[0086] The present disclosure is expected to provide embodiments in which users can selectively block the use or access of personal information data. That is, the present disclosure is expected to provide hardware and / or software to prevent or block access to such personal information data. Once the personal information data is no longer needed, the risk can be minimized by restricting data collection and deleting the data. In addition, when applicable, personal identifiers are removed from such personal information to protect the privacy of users.
[0087] In the technical solutions of the present disclosure, the acquisition, transmission, storage, use, processing, etc. of data all comply with the relevant provisions of national laws and regulations.
[0088] It should be noted that in the embodiments of the present disclosure, some industry-existing solutions such as certain software, components, models, etc. may be mentioned. They should be regarded as exemplary, and their purpose is only to illustrate the feasibility in the implementation of the technical solutions of this application, but it does not mean that the applicant has already or necessarily used this solution.
[0089] In the description of the foregoing embodiments, the descriptions referring to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.
[0090] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.
[0091] Any process or method description in the flowchart or described in other ways herein can be understood as representing a module, segment, or part of code including one or more executable instructions for implementing a customized logic function or process. The scope of the preferred embodiments of the present disclosure includes additional implementations, where the functions can be executed in a substantially simultaneous manner or in a reverse order according to the involved functions, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of the present disclosure belong.
[0092] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definite ordered list of executable instructions for implementing logical functions, which can be embodied specifically in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, a system including a processor, or other systems that can fetch instructions from and execute the instructions of the instruction execution system, apparatus, or device. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include the following: an electrical connection portion having one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable medium on which a program can be printed, as the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpretation, or other suitable processing as necessary, and then stored in a computer memory.
[0093] It should be understood that various parts of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application specific integrated circuits having appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), and the like.
[0094] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried by the method of implementing the above embodiments can be completed by a program instructing relevant hardware. The program can be stored in a computer-readable storage medium, and when executed, includes one or a combination of the steps of the method embodiments.
[0095] In addition, in each embodiment of the present disclosure, each functional unit can be integrated into one processing module, or each unit can exist physically alone, or two or more units can be integrated into one module. The above-mentioned integrated module can be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
[0096] The above-mentioned storage medium can be a read-only memory, a magnetic disk, an optical disc, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.
Claims
1. A fully reconfigurable general-purpose intelligent optical computing chip architecture, characterized in that: include: A transmitting module, used for splitting each first single wavelength light in the first broadband light corresponding to the target task, obtaining and transmitting at least one single wavelength split light set, wherein the first single wavelength light corresponds to the single wavelength split light set one by one; A receiving module, used to determine the number of wavelengths corresponding to the first single wavelength light in the target task, and the number of beams corresponding to the single wavelength beam split light set; construct an initial optical propagation matrix with the number of wavelengths as the number of rows and the number of beams as the number of columns; determine the value of each element in the initial optical propagation matrix according to the target task, and obtain the optical propagation matrix corresponding to the target task; wherein, according to the target task, the value of each element in the initial optical propagation matrix is trained to determine the value of each element in the initial optical propagation matrix; the value of the element is the response value of the single wavelength beam split light corresponding to the element at unit intensity; The receiving module is further used to receive the at least one single-wavelength split light set, and perform matrix calculation on the at least one single-wavelength split light set according to the optical propagation matrix corresponding to the target task to obtain a second broadband light after optical calculation, wherein the second broadband light includes at least one second single-wavelength light, the second single-wavelength light corresponds to the first single-wavelength light in a one-to-one manner, the single-wavelength split light set corresponds to a row in the optical propagation matrix in a one-to-one manner, and the single-wavelength split lights in the single-wavelength split light set correspond to row elements in the row in a one-to-one manner; The receiving module is used to perform matrix calculation on the at least one single-wavelength split light set according to the optical propagation matrix corresponding to the target task, take the light intensity corresponding to each single-wavelength split light in the at least one single-wavelength split light set as input, and perform matrix multiplication operation with the optical propagation matrix, wherein, for any single-wavelength split light set in the at least one single-wavelength split light set, the light intensity corresponding to each single-wavelength split light in the any single-wavelength split light set is multiplied by the row element corresponding to the light intensity to obtain a product set corresponding to the any single-wavelength split light set, and all products in the product set are added to obtain a second single-wavelength light corresponding to the any single-wavelength split light set.
2. The architecture according to claim 1, characterized in that The transmitting module is used to split each first single wavelength light in the first broadband light corresponding to the target task to obtain at least one single wavelength split light set, specifically used to: Splitting each first single-wavelength light in the first broadband light corresponding to the target task to obtain at least one initial single-wavelength split light set; The at least one initial single-wavelength split light set is modulated according to the target task to obtain at least one single-wavelength split light set.
3. The architecture according to claim 2, characterized in that: When the transmitting module is used to modulate the at least one initial single-wavelength split light set according to the target task, it is specifically used to: The at least one initial single-wavelength split light beam set is phase modulated according to the target task.
4. The architecture according to claim 1, characterized in that When the transmitting module is used to transmit the at least one single-wavelength split light set, it is specifically used to: The at least one single wavelength split light set is emitted through an emission grating.
5. A fully reconfigurable universal intelligent optical computing chip system, characterized in that: include: At least one fully reconfigurable universal intelligent optical computing chip architecture as described in any one of claims 1 to 4.
6. The system according to claim 5, characterized in that include: Multiple fully reconfigurable general intelligent optical computing chip architectures.
7. The system according to claim 6, characterized in that The connection mode between the multiple fully reconfigurable universal intelligent optical computing chip architectures includes at least one of the following: Series connection; in parallel.
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