Automatic model selection system and method for SPI FLASH

Abstract

The invention discloses an automatic model selection system and method for an SPI (Serial Peripheral Interface) FLASH. The system comprises an MCU (Microprogrammed Control Unit) controller module, a voltage output control module and an SOC + SPI-FLASH test module, the MCU controller module is used for controlling other modules to work according to a test program, communicating with the voltage output control module through the I2C interface module, and communicating with the SOC + SPI-FLASH test module through the UART serial port module; the voltage output control module is used for outputting a variable voltage to the SOC + SPI-FLASH test module according to an instruction requirement of the MCU controller module and providing a working power supply for the SOC + SPI-FLASH test module; the SOC + SPI-FLASH test module is used as a tested module, and the current state of the SOC + SPI-FLASH test module is reported to the MCU controller module through the UART serial port module in the test process. According to the method, the problem of evaluation of multiple performance indexes of the SPI FLASH supporting the XIP mode in the model selection process is solved.

Description

Technical Field

[0001] The invention belongs to the technical field of embedded storage, and in particular relates to an automatic selection system and method for SPI FLASH. Background Art

[0002] Barcode technology is the abbreviation of barcode auto-identification technology. Barcode technology is a symbol automatic recognition technology that has been generated and developed on the basis of contemporary information technology. It integrates the functions of symbol encoding, data collection, automatic recognition, input, and information storage, and can effectively solve the problem of collecting and automatically inputting a large amount of data in real work and life.

[0003] Barcode reading is a technology that converts barcode images into data information. It mainly consists of two parts: barcode image acquisition and decoding processing. Barcode image acquisition scans the barcode image through an optical image sensor and converts the optical signal into an electrical signal. Decoding processing is the process of translating the collected electrical signal into corresponding data information according to certain rules. Barcode reading equipment can be divided into laser reading equipment, linear CCD reading equipment, and area array CMOS / CCD reading equipment according to different reading principles.

[0004] In order to achieve the best cost-effectiveness of the barcode decoding solution, a combination of software and hardware is usually required, such as SOC architecture MCU + hard decoding. However, in order for the MCU to run software programs, a FLASH storage device is required. At present, single-chip MCUs usually use two storage methods: one is EFLASH, which has a high process cost and the capacity after packaging cannot be adjusted. The other is to integrate SPI Flash through SIP, which is cheaper and can flexibly adjust the capacity of FLASH according to specific application requirements. However, there is still a lack of qualified SPI Flash devices that can meet the requirements of running as XIP.

[0005] The Chinese patent with the publication number CN114035853A discloses an MCU boot system and chip with an SPI interface. The MCU boot system includes a state machine circuit and two alternating buffers. The state machine circuit is connected to a flash memory with an SPI interface through an SPI bus, and is used to read a boot instruction segment from the flash memory. When the two boot instruction segments read successively by the state machine circuit are continuous, the two boot instruction segments read successively are sent to one of the alternating buffers, and then the two boot instruction segments received successively in the same alternating buffer are sent to the MCU in sequence. Otherwise, the boot instruction segment read first is sent to one of the alternating buffers, and the boot instruction segment read later is sent to the other alternating buffer. In this working state, one of the alternating buffers sends a received boot instruction segment to the MCU, and then the other alternating buffer sends a received boot instruction segment to the MCU. Although the MCU boot system proposed in the invention reads instructions by using a Flash memory with an SPI interface, the Flash memory cannot provide a sufficient signal transmission rate to implement XIP and improve the execution rate. Summary of the invention

[0006] The present invention provides an automatic selection system and method for SPI FLASH, aiming to solve the problem of evaluating multiple performance indicators in the selection process of SPI FLASH supporting XIP mode.

[0007] The technical solution of the present invention is as follows:

[0008] On the one hand, the present invention provides an automatic selection system for SPI FLASH, the system comprising: an MCU controller module, a voltage output control module and a SOC+SPI-FLASH test module.

[0009] The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module.

[0010] The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instructions of the MCU controller module, and provide working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module, and reports its current state to the MCU controller module through the UART serial port module during the test.

[0011] Preferably, the system performs voltage testing specifically as follows:

[0012] S10: After writing the voltage test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.

[0013] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to a preset voltage, starting from an initial test voltage value and gradually increasing according to a set step size.

[0014] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.

[0015] S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.

[0016] S14: If the MCU controller module receives a confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it outputs a test error message and terminates the test.

[0017] Preferably, the system performs the erase power-off test specifically as follows:

[0018] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally.

[0019] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.

[0020] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module.

[0021] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.

[0022] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.

[0023] Preferably, the erase power-off procedure is specifically as follows: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether a normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during a cyclic erase operation on an unused storage block.

[0024] On the other hand, the present invention provides an automatic selection method for SPI FLASH, comprising the following steps:

[0025] S10: After writing the voltage test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.

[0026] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to a preset voltage, starting from an initial test voltage value and gradually increasing according to a set step size.

[0027] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.

[0028] S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.

[0029] S14: If the MCU controller module receives a confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it outputs a test error message and terminates the test.

[0030] Preferably, the method further comprises the following steps:

[0031] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally.

[0032] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.

[0033] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module.

[0034] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.

[0035] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.

[0036] Preferably, the erase power-off procedure is specifically as follows: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether a normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during a cyclic erase operation on an unused storage block.

[0037] On the other hand, the present invention also provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the automatic selection method for SPI FLASH as described in any embodiment of the present invention is implemented.

[0038] In yet another aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the automatic selection method for SPI FLASH as described in any embodiment of the present invention is implemented.

[0039] Compared with the prior art, the present invention has the following technical effects:

[0040] The present invention dynamically adjusts the voltage and monitors the startup and stability of SPI FLASH in multiple voltage test intervals to ensure that the SPI FLASH device can still reliably read and write data and execute operations under different voltage environments. In addition, by performing an erase power-off test on the SPI FLASH, the impact of voltage fluctuations on the storage device is simulated to further verify its durability and reliability under extreme conditions. The high-precision test process and real-time feedback mechanism proposed in the present invention not only improve the test efficiency, but also ensure the accuracy and consistency of the test data, thereby providing a more scientific and comprehensive performance evaluation for the selection of SPI FLASH. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is the overall architecture diagram of the automatic selection system of SPI FLASH described in the present invention. DETAILED DESCRIPTION

[0042] In order to make the objectives, technical solutions and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in combination with specific embodiments of the present application and with reference to the accompanying drawings.

[0043] Embodiment 1

[0044] This embodiment provides an automatic selection system for SPI FLASH. Figure 1 As shown, it includes an MCU controller module, a voltage output control module and a SOC+SPI-FLASH test module. The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module.

[0045] The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instructions of the MCU controller module, and provide working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module, and reports its current state to the MCU controller module through the UART serial port module during the test.

[0046] Furthermore, the SPI-FLASH in the SOC+SPI-FLASH test module is connected in the form of a SOCKET socket, so as to perform replacement verification of FLASH of different models and types.

[0047] As a preferred implementation of this embodiment, the system performs voltage testing specifically as follows:

[0048] S10: After the SOC+SPI-FLASH test module writes the voltage test program and is powered on, the core function of the voltage test program is to report the real-time status of the current SOC+SPI-FLASH test module to the MCU controller module. After the SOC+SPI-FLASH test module is powered on, the SOC module will read the voltage test program from the SPI-FLASH module. After initializing each interface of the test module, the voltage test program sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally.

[0049] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size. Specifically, in order to achieve the purpose of traversing various voltages, the MCU controller module can output in the form of KV->nV->KV. Among them, K is the normal working voltage of FLASH, and n can increase upward from 0V according to the preset step size (for example, 0.01V). The MCU controller module can flexibly change the voltage at both ends of the FLASH range to KV->nV->KV for different models.

[0050] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.

[0051] S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.

[0052] S14: If the MCU controller module receives the confirmation signal, it will output the next round of test voltage instructions, repeating steps S11, S12, and S13 until the voltage test of the preset voltage range is completed; if the MCU controller module does not receive the confirmation signal, it will output the test error information and terminate the test. The test error information may specifically include the test voltage change that causes the dead zone.

[0053] As a preferred implementation of this embodiment, the system performs the erase power-off test specifically as follows:

[0054] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally.

[0055] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.

[0056] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module.

[0057] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.

[0058] S24: If the MCU controller module receives the confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive the confirmation signal, it will output the test error information and terminate the test. The test error information indicates that the SPI-FLASH has an erase power-off problem.

[0059] As a preferred implementation manner of this embodiment, the erase power-off procedure is specifically: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.

[0060] The FLASH working in XIP mode is usually used as the program memory of the MCU. In XIP mode, each time the MCU executes an instruction, it needs to read the instruction data from the FLASH, so the correctness of the data extracted from the FLASH must be ensured. Through strict voltage testing and power-off erase testing, the stability of the internal data of the FLASH can be effectively ensured, and data error output can be avoided, thereby ensuring the normal operation of the program.

[0061] In order to verify the effectiveness and superiority of the method provided in this embodiment, some specific cases are provided below:

[0062] The MCU controller module uses the STM32103CBT6 chip of ST Company, which has multiple peripheral interfaces such as USB, I2C, and UART, and can meet the needs of testing the main control chip. The voltage output control module is composed of the ADC chip MCP4716A0T with an I2C interface and the voltage drive amplifier chip AD8531ARTZ. The internal register of the ADC chip MCP4716A0T controls its variable analog voltage output, and its internal register can be accessed through the I2C interface; the output analog voltage has a current drive capability of 300mA under the action of the voltage drive chip AD8531ARTZ, which can provide a strong load capacity for the output voltage. In the SOC+SPI-FLASH test module, the SOC module uses the IOTC0610 barcode decoding chip, and its internal MCU reads the SPI-FLASH in the XIP mode to run the program. The SPI-FLASH module to be tested is GigaDevice's GD25Q40C, which supports the XIP mode and can run in a four-wire mode with a rate of 108MHZ.

[0063] The system described in this application example was operated at room temperature of 25 degrees Celsius to conduct two types of experimental tests.

[0064] Voltage test: The voltage drop test is from 3.3V->nV->3.3V. The value of n is between 0 and 2.8V, and a test is performed every 0.01V. A total of 290 voltage values ​​are taken, and each n voltage value corresponds to 100 voltage drop tests. Through the above voltage test, during the test, the IOTC0610 barcode decoding chip reads SPI-FLASH in XIP mode to run the program and works normally. The MCU controller module STM32103CBT6 chip can receive the correct information sent by the SOC+SPI-FLASH test module through the UART serial port module, which fully demonstrates that the GD25Q40C has no voltage drop dead zone problem.

[0065] Erase power-off test: A Sector 16k BYTE space is selected in GD25Q40C for cyclic erase operation. The power-off time position of FLASH is also randomly performed within 0 to 10 seconds after power-on. The overall power-off test number is 1000 times. Through the above erase power-off test, during the test, the IOTC0610 barcode decoding chip reads SPI-FLASH in XIP mode to run the program and works normally. The MCU controller module STM32103CBT6 chip can receive the correct information sent by the SOC+SPI-FLASH test module through the UART serial port module, which fully demonstrates that GD25Q40C has a strong anti-interference ability against power-off during the erase process, and can ensure the integrity and reliability of the data.

[0066] Embodiment 2

[0067] Accordingly, this embodiment provides an automatic selection method for SPI FLASH, which is implemented based on the automatic selection system for SPI FLASH described in Embodiment 1 and includes the following steps:

[0068] S10: After writing the voltage test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.

[0069] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to a preset voltage, starting from an initial test voltage value and gradually increasing according to a set step size.

[0070] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.

[0071] S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.

[0072] S14: If the MCU controller module receives a confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it outputs a test error message and terminates the test.

[0073] As a preferred implementation of this embodiment, the method further includes the following steps:

[0074] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally.

[0075] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.

[0076] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module.

[0077] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.

[0078] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.

[0079] As a preferred implementation manner of this embodiment, the erase power-off procedure is specifically: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.

[0080] Embodiment 3

[0081] This embodiment provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the automatic selection method for SPI FLASH as described in any embodiment of the present invention when executing the computer program.

[0082] Embodiment 4

[0083] This embodiment provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the automatic selection method for SPI FLASH as described in any embodiment of the present invention is implemented.

[0084] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can be represented by: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, c can be single or multiple.

[0085] Those of ordinary skill in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented in a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0086] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0087] In several embodiments provided in the present application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory; hereinafter referred to as: ROM), random access memory (Random Access Memory; hereinafter referred to as: RAM), disk or optical disk, and other media that can store program codes.

[0088] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An automatic selection system for SPI FLASH, characterized in that: The system includes: an MCU controller module, a voltage output control module and a SOC+SPI-FLASH test module; The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module; The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instructions of the MCU controller module, and provide working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module, and reports its current state to the MCU controller module through the UART serial port module during the test.

2. The automatic selection system of SPI FLASH according to claim 1, characterized in that: The voltage test of the system is specifically as follows: S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally; S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size; S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as the working power supply and performs a preset number of tests on each voltage value; S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes; S14: If the MCU controller module receives a confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it outputs a test error message and terminates the test.

3. The automatic selection system of SPI FLASH according to claim 1, characterized in that: The system performs the erase power-off test specifically as follows: S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally; S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage command to the voltage output control module to adjust the voltage output to a low level; S22: After a random delay period, the MCU controller module sends a voltage command to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module; S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change; S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.

4. The automatic selection system of SPI FLASH according to claim 3, characterized in that: The erase power-off procedure is specifically as follows: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.

5. An automated SPI FLASH selection method, characterized in that: The method is implemented based on the automatic selection system of SPI FLASH according to any one of claims 1 to 4, and comprises the following steps: S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally; S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size; S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as the working power supply and performs a preset number of tests on each voltage value; S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes; S14: If the MCU controller module receives a confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it outputs a test error message and terminates the test.

6. The automatic selection method of SPI FLASH according to claim 5, characterized in that: The method further comprises the following steps: S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is running normally; S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage command to the voltage output control module to adjust the voltage output to a low level; S22: After a random delay period, the MCU controller module sends a voltage command to the voltage output control module to restore the voltage to a normal level, so as to re-power on the SOC+SPI-FLASH test module; S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change; S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.

7. The automatic selection method of SPI FLASH according to claim 6, characterized in that: The erase power-off procedure is specifically as follows: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.

8. An electronic device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the automatic selection method for SPI FLASH as described in any one of claims 5 to 7 when executing the computer program.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the automatic selection method of the SPI FLASH as claimed in any one of claims 5 to 7 is implemented.

Images