Modeling method, device, equipment, product and storage medium

Abstract

The embodiment of the invention discloses a modeling method, device, equipment, product and storage medium, which are applied to an active neutral point clamped (ANPC) converter. The method comprises the following steps: determining an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter; determining a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module according to a coupling relationship among the upper capacitor module, the lower capacitor module and the bridge arm module; and establishing a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a modeling method, device, equipment, product and storage medium. Background Art

[0002] The active neutral point clamped (ANPC) three-level topology effectively overcomes the problem of uneven loss distribution of the neutral point clamped three-level NPC topology, and is simple to control. It is increasingly used in power supply, industrial frequency conversion and energy storage.

[0003] Hardware-in-the-loop semi-physical simulation test is a typical test method in the power electronics industry. Hardware-in-the-loop simulation connects the real controller hardware with the virtual controlled object model (implemented with real-time simulation hardware), which can realize the function and performance test of the controller under multiple working conditions at low cost and high efficiency. There are two ways to implement real-time simulation, one is the central processing unit (CPU) and the other is the field-programmable gate array (FPGA). The CPU-based model can be built using the power system (SimPowerSystems) module library of MATLAB simulation software. It is easy to model, but the disadvantage is that the simulation step is long, usually at the us level; the digital model based on FPGA needs to be developed, but the simulation step is small, up to the ns level. For power switching devices that are gradually becoming more high-frequency, the FPGA-based model describes the changes in electrical quantities during the switching process with higher accuracy.

[0004] Therefore, establishing a three-phase three-level ANPC bidirectional converter digital model can solve the problem that there is currently no high-precision digital model based on FPGA and that high-precision hardware-in-the-loop semi-physical simulation testing cannot be performed. Summary of the invention

[0005] In view of this, embodiments of the present application hope to provide a modeling method, apparatus, device, product and storage medium.

[0006] The technical embodiment of the embodiment of the present application is implemented as follows:

[0007] The present application provides a modeling method, which is applied to an ANPC converter; the method comprises:

[0008] Determine an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter;

[0009] Determine, according to the coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module, a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module;

[0010] A digital model of the ANPC converter is established based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter, and the third output parameter.

[0011] In the above solution, establishing the digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter includes:

[0012] Determine a first digital model of the upper capacitor module based on the first input parameter and the first output parameter;

[0013] Determine a second digital model of the lower capacitor module based on the second input parameter and the second output parameter;

[0014] Determine a third digital model of the bridge arm module based on the third input parameter and the third output parameter;

[0015] The first digital model, the second digital model and the third digital model are used as digital models of the ANPC converter.

[0016] In the above solution, the third output parameter includes a first current output by an upper bridge arm module in the bridge arm module; the first input parameter includes the first current and a second current on the DC side of the ANPC converter; the first output parameter includes a first voltage of the upper capacitor module; and the first digital model of the upper capacitor module is determined based on the first input parameter and the first output parameter, including:

[0017] Determine a first relational expression of the upper capacitor module according to the first current, the second current, and the first voltage;

[0018] The first relational expression is discretized to obtain the first digital model.

[0019] In the above solution, the third output parameter includes a third current output by the lower bridge arm module in the bridge arm module; the second input parameter includes the third current and a second current on the DC side of the ANPC converter; the second output parameter includes a second voltage of the lower capacitor module; and the second digital model of the lower capacitor module is determined based on the second input parameter and the second output parameter, including:

[0020] Determine a second relational expression of the lower capacitor module according to the third current, the second current, and the second voltage;

[0021] The second relational expression is discretized to obtain the second digital model.

[0022] In the above scheme, the bridge arm module includes a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module; the current calculation logic module is respectively connected to the controllable state current module and the uncontrollable state current module; the third input parameter includes the first output parameter and the second output parameter; the first output parameter includes the first voltage of the upper capacitor module; the second output parameter includes the second voltage of the lower capacitor module; the third output parameter includes the first current output by the upper bridge arm module and the second current output by the lower bridge arm module in the bridge arm module; the third digital model of the bridge arm module is determined based on the third input parameter and the third output parameter, including:

[0023] Acquire the input pulse signal of the bridge arm module and the three-phase output line current and three-phase output phase voltage of the ANPC converter;

[0024] Determine a first digital sub-model of the voltage module based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage, and the three-phase output phase voltage;

[0025] Determine a second digital sub-model of the controllable state current module according to the input pulse signal, the three-phase output line current, the first current and the second current;

[0026] Determine a third digital sub-model of the uncontrollable state current module based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current;

[0027] Determine a fourth digital sub-model of the current calculation logic module according to the input pulse signal, the first current and the second current;

[0028] The first digital sub-model, the second digital sub-model, the third digital sub-model, and the fourth digital sub-model are used as the third digital model.

[0029] In the above solution, the first digital sub-model of the voltage module is determined based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage, including:

[0030] Determining whether the value of the input pulse signal of any phase among the three phases is all zero;

[0031] If the values ​​of the input pulse signals are all zero, determining whether the value of the output line current of any phase of the three-phase output line current is greater than zero;

[0032] When the value of the output line current of any phase is greater than zero, determining the output phase voltage of the voltage module to be the first voltage;

[0033] When the value of the output line current of any phase is less than zero, determining the output phase voltage of the voltage module to be the second voltage;

[0034] If the value of the input pulse signal is not all zero, and the input pulse signal satisfies a first preset condition, determining that the output phase voltage of the voltage module is the first voltage;

[0035] When the input pulse signal satisfies a second preset condition, determining that the output phase voltage of the voltage module is the second voltage;

[0036] When the input pulse signal does not satisfy the first preset condition and the second preset condition, determining that the output phase voltage of the voltage module is zero;

[0037] The output phase voltage of the voltage module is the first voltage, the output phase voltage of the voltage module is the second voltage, and the output phase voltage of the voltage module is zero as the first digital sub-model.

[0038] In the above solution, the second digital sub-model of the controllable state current module is determined according to the input pulse signal, the three-phase output line current, the first current and the second current, including:

[0039] Determine the magnitude and direction of the output current of the bridge arm module according to the conditions satisfied by the input pulse signal, the direction of conduction of the switch sequence in the ANPC converter, and the relationship between the three-phase output line current and the first current and the second current;

[0040] The magnitude and direction of the output current of the bridge arm module are used as the second digital sub-model of the controllable state current module.

[0041] In the above solution, the third digital sub-model of the uncontrollable state current module is determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current, including:

[0042] determining a third voltage according to the first voltage and the second voltage;

[0043] Determine the magnitude and direction of the output current of the bridge arm module based on the relationship between the three-phase output phase voltage and the third voltage, and the relationship between the three-phase output line current and the first current and the second current;

[0044] The magnitude and direction of the output current of the bridge arm module are used as the third digital sub-model of the uncontrollable state current module.

[0045] In the above solution, the fourth digital sub-model of the current calculation logic module is determined according to the input pulse signal, the first current and the second current, including:

[0046] Determining whether the values ​​corresponding to the input pulse signals are all zero;

[0047] When all values ​​corresponding to the input pulse signals are zero, determining that the output current of the current calculation logic module is the output current of the uncontrollable state current module; the output current of the uncontrollable state current module, the first current and the second current are all the same;

[0048] In the case where the values ​​corresponding to the input pulse signals are not all zero, determining that the output current of the current calculation logic module is the output current of the controllable state current module; the output current of the controllable state current module is equal to the first current or the second current;

[0049] The output current of the current calculation logic module is the output current of the uncontrollable state current module, and the output current of the current calculation logic module is the output current of the controllable state current module as the fourth digital sub-model.

[0050] The present application provides a modeling device, which is arranged on an ANPC converter; the modeling device comprises:

[0051] A first determining unit, used to determine an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter;

[0052] A second determining unit is used to determine a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module according to a coupling relationship among the upper capacitor module, the lower capacitor module and the bridge arm module;

[0053] A building unit is used to build a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

[0054] The present application provides a modeling device, including:

[0055] A memory for storing executable instructions;

[0056] The processor is used to implement any step of the above-mentioned method when executing the executable instructions stored in the memory.

[0057] An embodiment of the present application provides a computer program product, including a computer program, which implements any step of the above-mentioned method when executed by a processor.

[0058] An embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, any step of the above-described method is implemented.

[0059] A modeling method, apparatus, device, product and storage medium provided in an embodiment of the present application are applied to an ANPC converter; the method includes: determining an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter; determining a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module according to a coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module; and establishing a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter. By adopting the technical solution of the embodiment of the present application, an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter are determined; and then according to the coupling relationship between each module, a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module are determined; a digital model of the ANPC converter is established based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter, thereby solving the problem that there is currently no high-precision digital model based on FPGA. At the same time, considering the modeling of the upper capacitor module, the lower capacitor module and the bridge arm module, a high-precision hardware-in-the-loop semi-physical simulation test is performed. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] Figure 1 A schematic diagram of a modeling method implementation flow in an embodiment of the present application;

[0061] Figure 2 Schematic diagram of the input and output voltage and current coupling relationship model between modules in the embodiment of the present application;

[0062] Figure 3 Schematic diagram of the main circuit topology of the ANPC converter described in the embodiment of the present application;

[0063] Figure 4 Schematic diagram of the structure of the bridge arm module described in the embodiment of the present application;

[0064] Figure 5 A schematic diagram of the calculation logic of the U-phase bridge arm voltage module in an embodiment of the present application;

[0065] Figure 6 A schematic diagram of a current calculation logic module according to an embodiment of the present application;

[0066] Figure 7 This is a flow chart of digital modeling of a three-phase three-level ANPC bidirectional converter according to an embodiment of the present application;

[0067] Figure 8This is a schematic diagram of a three-phase three-level ANPC inverter with an asynchronous motor digital model according to an embodiment of the present application;

[0068] Fig. 9 This is a schematic diagram of a three-phase three-level ANPC inverter with an asynchronous motor model built based on MATLAB / Simpower in an embodiment of the present application;

[0069] Fig.10 A schematic diagram showing a comparison of output waveforms of controllable inverter working conditions in an embodiment of the present application;

[0070] Fig.11 A schematic diagram of a partially enlarged output waveform of a controllable inverter working condition according to an embodiment of the present application;

[0071] Fig.12 A schematic diagram of a three-phase three-level ANPC uncontrolled rectification digital model according to an embodiment of the present application;

[0072] Fig.13 This is a schematic diagram of a three-phase three-level ANPC uncontrolled rectification digital model built based on MATLAB / Simpower in the embodiment of the present application;

[0073] Fig.14 A schematic diagram showing a comparison of output waveforms under uncontrolled rectification conditions in an embodiment of the present application;

[0074] Fig.15 A schematic diagram of a partially enlarged output waveform of an uncontrolled rectifier according to an embodiment of the present application;

[0075] Fig.16 A schematic diagram of a three-phase controlled rectifier simulation control algorithm module according to an embodiment of the present application;

[0076] Fig.17 A schematic diagram showing a comparison of output waveforms of a three-phase controlled rectifier working condition in an embodiment of the present application;

[0077] Fig.18 A schematic diagram of a partially enlarged output waveform of a three-phase controlled rectifier according to an embodiment of the present application;

[0078] Fig.19 This is a schematic diagram of the structure of a modeling device according to an embodiment of the present application;

[0079] Fig. 20 A schematic diagram of the structure of the modeling device according to an embodiment of the present application. DETAILED DESCRIPTION

[0080] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the invention will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application.

[0081] This embodiment proposes a modeling method, which can be applied to a modeling device. The function implemented by the method can be implemented by calling a program code by a processor in the modeling device. Of course, the program code can be stored in a memory of the processing device. It can be seen that the processing device at least includes a processor and a memory.

[0082] Figure 1 FIG. 1 is a flow chart of a modeling method for implementing an embodiment of the present application, which is applied to an ANPC converter; Figure 1 As shown, the method includes:

[0083] Step S101: determining an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter.

[0084] Step S102: Determine the first input parameter and the first output parameter of the upper capacitor module, the second input parameter and the second output parameter of the lower capacitor module, and the third input parameter and the third output parameter of the bridge arm module according to the coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module.

[0085] Step S103: establishing a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

[0086] It should be noted that the ANPC converter can be determined according to actual conditions, and is not limited here. As an example, the ANPC converter can be an ANPC bidirectional converter. In practical applications, the ANPC bidirectional converter can be a three-phase three-level ANPC bidirectional converter.

[0087] The modeling method can be determined according to actual conditions, and is not limited here. As an example, the modeling method can be a digital modeling method. In practical applications, the digital modeling method can be a three-phase three-level ANPC bidirectional converter digital modeling method.

[0088] In step S101, the upper capacitor module, the lower capacitor module and the bridge arm module of the ANPC converter can be determined according to actual conditions, and no limitation is made here. As an example, the upper capacitor module, the lower capacitor module and the bridge arm module of the ANPC converter can be understood as dividing the ANPC converter into an upper capacitor module, a lower capacitor module and a bridge arm module. In practical applications, the ANPC converter can be a three-phase three-level ANPC bidirectional converter, and the three-phase three-level ANPC bidirectional converter can be divided into three models of an upper capacitor module, a lower capacitor module and a bridge arm module according to the modular concept. The bridge arm module is connected to the upper capacitor module and the lower capacitor module respectively.

[0089] In step S102, the coupling relationship may be determined according to actual conditions, which is not limited here. As an example, the coupling relationship may be an interactive coupling relationship.

[0090] The first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter can all be determined according to actual conditions, and are not limited here. As an example, the third input parameter can be the voltage of the upper capacitor module and the voltage of the lower capacitor module; wherein the voltage of the upper capacitor module can be recorded as Uh; the voltage of the lower capacitor module can be recorded as Ul. The third output parameter can be the output current of the upper bridge arm module and the output current of the lower bridge arm module in the bridge arm module; wherein the output current of the upper bridge arm module can be recorded as ih; the output current of the lower bridge arm module can be recorded as il. The first input parameter can be the output current of the upper bridge arm module and the DC side current; wherein the DC side current can be recorded as idc; the first output parameter can be the voltage of the upper capacitor module. The second input parameter can be the output current of the lower bridge arm module and the DC side current; wherein the DC side current can be recorded as idc; the second output parameter can be the voltage of the lower capacitor module.

[0091] For ease of understanding, here you can combine Figure 2 To understand, Figure 2 Schematic diagram of the input and output voltage and current coupling relationship model between modules in the embodiment of the present application. Figure 2 In the figure, Uh and Ul are the voltages of the upper and lower capacitor modules, ih and il are the output currents of the upper and lower bridge arm modules, and idc is the DC side current. In practical applications, the voltages of the upper and lower capacitor modules can also be referred to as the upper and lower capacitor voltages. The output currents of the upper and lower bridge arm modules can also be referred to as the upper and lower bridge arm output currents.

[0092] The specific determination process of determining the first input parameter and the first output parameter of the upper capacitor module, the second input parameter and the second output parameter of the lower capacitor module, and the third input parameter and the third output parameter of the bridge arm module according to the coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module can be determined according to actual conditions and is not limited here. As an example, determining the first input parameter and the first output parameter of the upper capacitor module, the second input parameter and the second output parameter of the lower capacitor module, and the third input parameter and the third output parameter of the bridge arm module according to the coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module can be understood as analyzing the interactive coupling relationship between the modules to obtain the input and output of each module.

[0093] In step S103, the specific establishment process in establishing the digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter can be determined according to actual conditions and is not limited here. As an example, the establishment of the digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter may include determining the first digital model of the upper capacitor module based on the first input parameter and the first output parameter; determining the second digital model of the lower capacitor module based on the second input parameter and the second output parameter; determining the third digital model of the bridge arm module based on the third input parameter and the third output parameter; and using the first digital model, the second digital model and the third digital model as the digital model of the ANPC converter.

[0094] In practical applications, the corresponding expressions of voltage and current can be established for each module, and finally the voltages and currents of the input and output of the three modules are coupled to obtain the digital model of the entire main circuit.

[0095] In this embodiment, an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter are determined; and then according to the coupling relationship between the modules, a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module are determined; a digital model of the ANPC converter is established based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter, thereby solving the problem that there is currently no high-precision digital model based on FPGA. At the same time, considering the modeling of the upper capacitor module, the lower capacitor module and the bridge arm module, a high-precision hardware-in-the-loop semi-physical simulation test is performed.

[0096] In an optional embodiment of the present application, establishing the digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter includes:

[0097] Determine a first digital model of the upper capacitor module based on the first input parameter and the first output parameter;

[0098] Determine a second digital model of the lower capacitor module based on the second input parameter and the second output parameter;

[0099] Determine a third digital model of the bridge arm module based on the third input parameter and the third output parameter;

[0100] The first digital model, the second digital model and the third digital model are used as digital models of the ANPC converter.

[0101] In this embodiment, the specific determination process in the first digital model of the upper capacitor module determined based on the first input parameter and the first output parameter can be determined according to actual conditions and is not limited here. As an example, the third output parameter includes the first current output by the upper bridge arm module in the bridge arm module; the first input parameter includes the first current and the second current on the DC side of the ANPC converter; the first output parameter includes the first voltage of the upper capacitor module; the first digital model of the upper capacitor module determined based on the first input parameter and the first output parameter may include determining the first relationship expression of the upper capacitor module according to the first current, the second current, and the first voltage; and discretizing the first relationship expression to obtain the first digital model.

[0102] The specific determination process in the second digital model of the lower capacitor module determined based on the second input parameter and the second output parameter can be determined according to actual conditions and is not limited here. As an example, the third output parameter includes the third current output by the lower bridge arm module in the bridge arm module; the second input parameter includes the third current and the second current on the DC side of the ANPC converter; the second output parameter includes the second voltage of the lower capacitor module; the second digital model of the lower capacitor module determined based on the second input parameter and the second output parameter may include determining the second relationship expression of the lower capacitor module according to the third current, the second current and the second voltage; and discretizing the second relationship expression to obtain the second digital model.

[0103] The specific determination process in the third digital model of the bridge arm module determined based on the third input parameter and the third output parameter can be determined according to actual conditions and is not limited here. As an example, the bridge arm module includes a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module; the current calculation logic module is respectively connected to the controllable state current module and the uncontrollable state current module; the third input parameter includes the first output parameter and the second output parameter; the first output parameter includes the first voltage of the upper capacitor module; the second output parameter includes the second voltage of the lower capacitor module; the third output parameter includes the first current output by the upper bridge arm module and the second current output by the lower bridge arm module in the bridge arm module; the third digital model of the bridge arm module determined based on the third input parameter and the third output parameter may include obtaining the bridge arm module The invention relates to an input pulse signal and a three-phase output line current and a three-phase output phase voltage of the ANPC converter; determining a first digital sub-model of the voltage module based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage; determining a second digital sub-model of the controllable state current module according to the input pulse signal, the three-phase output line current, the first current and the second current; determining a third digital sub-model of the uncontrollable state current module based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current; determining a fourth digital sub-model of the current calculation logic module according to the input pulse signal, the first current and the second current; and using the first digital sub-model, the second digital sub-model, the third digital sub-model and the fourth digital sub-model as the third digital model.

[0104] In an optional embodiment of the present application, the third output parameter includes a first current output by an upper bridge arm module in the bridge arm module; the first input parameter includes the first current and a second current on a DC side of the ANPC converter; the first output parameter includes a first voltage of the upper capacitor module; and the first digital model of the upper capacitor module is determined based on the first input parameter and the first output parameter, including:

[0105] Determine a first relational expression of the upper capacitor module according to the first current, the second current, and the first voltage;

[0106] The first relational expression is discretized to obtain the first digital model.

[0107] In this embodiment, the first current can be recorded as ih; the second current can be recorded as idc; the first voltage can be recorded as Uh;

[0108] The specific determination process in the first relationship expression for determining the upper capacitor module according to the first current, the second current, and the first voltage can be determined according to actual conditions, and is not limited here. As an example, the first relationship expression for determining the upper capacitor module according to the first current, the second current, and the first voltage can be a first relationship expression for establishing the upper capacitor module according to the first current, the second current, and the first voltage. Among them, the first relationship expression can be understood as a voltage-current relationship expression. For ease of understanding, an example is given here, and the capacitance of the upper capacitor module is denoted as C1. The voltage-current relationship expression can be understood as referring to the following formula (1) based on the voltage-current relationship of the capacitor:

[0109]

[0110] The specific processing process of discretizing the first relational expression to obtain the first digital model can be determined according to actual conditions and is not limited here. As an example, for ease of understanding, the discretization step length is recorded as T s ; Discretize formula (1) to obtain a first digital model; the first digital model can refer to the following formula (2):

[0111]

[0112] In formula (2), T s is the discretization step size.

[0113] In an optional embodiment of the present application, the third output parameter includes a third current output by a lower bridge arm module in the bridge arm module; the second input parameter includes the third current and a second current on a DC side of the ANPC converter; the second output parameter includes a second voltage of the lower capacitor module; and determining a second digital model of the lower capacitor module based on the second input parameter and the second output parameter includes:

[0114] Determine a second relational expression of the lower capacitor module according to the third current, the second current, and the second voltage;

[0115] The second relational expression is discretized to obtain the second digital model.

[0116] In this embodiment, the third current can be recorded as il; the second current can be recorded as idc; the second voltage can be recorded as Ul;

[0117] The specific determination process in the second relational expression for determining the lower capacitor module according to the third current, the second current, and the second voltage can be determined according to actual conditions, and is not limited here. As an example, the second relational expression for determining the lower capacitor module according to the third current, the second current, and the second voltage can be a second relational expression for establishing the lower capacitor module according to the third current, the second current, and the second voltage. Among them, the second relational expression can be understood as a voltage-current relationship expression. For ease of understanding, an example is given here, and the capacitance of the lower capacitor module is denoted as C2. The voltage-current relationship expression can be understood as referring to the following formula (3) based on the voltage-current relationship of the capacitor:

[0118]

[0119] The specific processing process of discretizing the second relational expression to obtain the second digital model can be determined according to actual conditions and is not limited here. As an example, for ease of understanding, the discretization step length is recorded as T s ; Discretize formula (3) to obtain a second digital model; the second digital model can refer to the following formula (4):

[0120]

[0121] In formula (4), T s is the discretization step size.

[0122] In an optional embodiment of the present application, the bridge arm module includes a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module; the current calculation logic module is respectively connected to the controllable state current module and the uncontrollable state current module; the third input parameter includes the first output parameter and the second output parameter; the first output parameter includes the first voltage of the upper capacitor module; the second output parameter includes the second voltage of the lower capacitor module; the third output parameter includes the first current output by the upper bridge arm module and the second current output by the lower bridge arm module in the bridge arm module; the third digital model of the bridge arm module is determined based on the third input parameter and the third output parameter, including:

[0123] Acquire the input pulse signal of the bridge arm module and the three-phase output line current and three-phase output phase voltage of the ANPC converter;

[0124] Determine a first digital sub-model of the voltage module based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage, and the three-phase output phase voltage;

[0125] Determine a second digital sub-model of the controllable state current module according to the input pulse signal, the three-phase output line current, the first current and the second current;

[0126] Determine a third digital sub-model of the uncontrollable state current module based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current;

[0127] Determine a fourth digital sub-model of the current calculation logic module according to the input pulse signal, the first current and the second current;

[0128] The first digital sub-model, the second digital sub-model, the third digital sub-model, and the fourth digital sub-model are used as the third digital model.

[0129] In this embodiment, the voltage module can be determined according to actual conditions and is not limited here. As an example, the voltage module can include a U-phase bridge arm voltage module, a V-phase bridge arm voltage module and a W-phase bridge arm voltage module.

[0130] The controllable state current module can be determined according to actual conditions and is not limited here. As an example, the controllable state current module can include a U-phase bridge arm current module, a V-phase bridge arm current module and a W-phase bridge arm current module.

[0131] The uncontrollable state current module can be determined according to actual conditions and is not limited here. In practical applications, the uncontrollable state current module can be referred to as an uncontrolled state current module.

[0132] The first voltage can be recorded as Uh; the second voltage can be recorded as Ul; the first current can be recorded as ih; the second current can be recorded as il;

[0133] The input pulse signal can be determined according to the actual situation, and is not limited here. As an example, the input pulse signal can be recorded as g1~g18. In practical applications, there is an input pulse signal to calculate the controllable state current of the controllable state current module; the output of the controllable state current module can be recorded as ih_kekong and il_kekong; there is no input pulse signal to calculate the uncontrollable state current of the uncontrollable state current module; the output of the uncontrollable state current module can be recorded as ihl_bukong.

[0134] The three-phase output line current and the three-phase output phase voltage can be determined according to actual conditions and are not limited here. As an example, the three-phase output line current can be U-phase, V-phase, and W-phase output line currents, which can be respectively recorded as ia, ib, and ic; the three-phase output line voltage can be U-phase, V-phase, and W-phase voltages, which can be respectively recorded as Uao, Ubo, and Uco.

[0135] For ease of understanding, you can combine Figure 3 and Figure 4 To understand, Figure 3 Schematic diagram of the main circuit topology of the ANPC converter described in the embodiment of the present application; Figure 4 Schematic diagram of the structure of the bridge arm module described in the embodiment of the present application.

[0136] The specific determination process in the first digital sub-model of the voltage module determined based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage can be determined according to actual conditions and is not limited here. As an example, the first digital sub-model of the voltage module determined based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage may include determining whether the value of the input pulse signal of any phase in the three phases is all zero; if the value of the input pulse signal is all zero, determining whether the value of the output line current of any phase in the three-phase output line current is greater than zero; and when the value of the output line current of any phase is greater than zero, determining that the output phase voltage of the voltage module is the first voltage; when the value of the output line current of any phase is less than zero, the output phase voltage of the voltage module is determined to be the second voltage; if the value of the input pulse signal is not all zero, when the input pulse signal satisfies a first preset condition, the output phase voltage of the voltage module is determined to be the first voltage; when the input pulse signal satisfies a second preset condition, the output phase voltage of the voltage module is determined to be the second voltage; when the input pulse signal does not satisfy both the first preset condition and the second preset condition, the output phase voltage of the voltage module is determined to be zero; the output phase voltage of the voltage module is the first voltage, the output phase voltage of the voltage module is the second voltage, and the output phase voltage of the voltage module is zero as the first digital sub-model.

[0137] The specific determination process in the second digital sub-model of the controllable state current module determined according to the input pulse signal, the three-phase output line current, the first current and the second current can be determined according to actual conditions and is not limited here. As an example, the second digital sub-model of the controllable state current module determined according to the input pulse signal, the three-phase output line current, the first current and the second current may include determining the magnitude and direction of the output current of the bridge arm module according to the conditions satisfied by the input pulse signal, the direction of conduction of the switch sequence in the ANPC converter, and the relationship between the three-phase output line current and the first current and the second current; and using the magnitude and direction of the output current of the bridge arm module as the second digital sub-model of the controllable state current module.

[0138] The specific determination process in the third digital sub-model of the uncontrollable state current module determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current can be determined according to actual conditions, and is not limited here. As an example, the third digital sub-model of the uncontrollable state current module determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current may include determining the third voltage based on the first voltage and the second voltage; determining the magnitude and direction of the output current of the bridge arm module based on the relationship between the three-phase output phase voltage and the third voltage, and the relationship between the three-phase output line current and the first current and the second current; and using the magnitude and direction of the output current of the bridge arm module as the third digital sub-model of the uncontrollable state current module.

[0139] The specific determination process in the fourth digital sub-model of the current calculation logic module determined according to the input pulse signal, the first current and the second current can be determined according to actual conditions, and is not limited here. As an example, the fourth digital sub-model of the current calculation logic module determined according to the input pulse signal, the first current and the second current may include judging whether the values ​​corresponding to the input pulse signal are all zero; when the values ​​corresponding to the input pulse signal are all zero, determining that the output current of the current calculation logic module is the output current of the uncontrollable state current module; the output current of the uncontrollable state current module, the first current and the second current are the same; when the values ​​corresponding to the input pulse signal are not all zero, determining that the output current of the current calculation logic module is the output current of the controllable state current module; the output current of the controllable state current module is equal to the first current or the second current; taking the output current of the current calculation logic module as the output current of the uncontrollable state current module and the output current of the current calculation logic module as the output current of the controllable state current module as the fourth digital sub-model.

[0140] In an optional embodiment of the present application, the first digital sub-model of the voltage module is determined based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage, including:

[0141] Determining whether the value of the input pulse signal of any phase among the three phases is all zero;

[0142] If the values ​​of the input pulse signals are all zero, determining whether the value of the output line current of any phase of the three-phase output line current is greater than zero;

[0143] When the value of the output line current of any phase is greater than zero, determining the output phase voltage of the voltage module to be the first voltage;

[0144] When the value of the output line current of any phase is less than zero, determining the output phase voltage of the voltage module to be the second voltage;

[0145] If the value of the input pulse signal is not all zero, and the input pulse signal satisfies a first preset condition, determining that the output phase voltage of the voltage module is the first voltage;

[0146] When the input pulse signal satisfies a second preset condition, determining that the output phase voltage of the voltage module is the second voltage;

[0147] When the input pulse signal does not satisfy the first preset condition and the second preset condition, determining that the output phase voltage of the voltage module is zero;

[0148] The output phase voltage of the voltage module is the first voltage, the output phase voltage of the voltage module is the second voltage, and the output phase voltage of the voltage module is zero as the first digital sub-model.

[0149] In this embodiment, the three phases can be respectively recorded as U phase, V phase, and W phase. Any of the three phases can be described by taking the U phase bridge arm as an example, and the corresponding input pulse signal can be recorded as g1 to g6. Any phase of the three-phase output line current can be recorded as ia; the first voltage can be recorded as Uh; the second voltage can be recorded as Ul; the output phase voltage of the voltage module can be recorded as Uao.

[0150] The first preset condition and the second preset condition can be determined according to actual conditions and are not limited here. As an example, the first preset condition may be g1*g2-g3*g4=1; the second preset condition may be g1*g2-g3*g4=-1.

[0151] In actual applications, the U-phase, V-phase, and W-phase bridge arm voltage modules are exactly the same. Take the U-phase bridge arm as an example. First, determine whether the input pulses g1 to g6 are all 0: ① If they are 0, then determine the current ia. If ia ≥ 0, then the output voltage Uao = Uh; if ia < 0, then Uao = Ul; ② If it is not 0, then calculate g1*g2-g3*g4. If g1*g2-g3*g4 = 1, then Uao = Uh; if g1*g2-g3*g4 = -1, then Uao = Ul; otherwise, Uao = 0. For ease of understanding, you can combine Figure 5 To understand, Figure 5 Schematic diagram of the calculation logic of the U-phase bridge arm voltage module in an embodiment of the present application.

[0152] In an optional embodiment of the present application, the second digital sub-model of the controllable state current module is determined according to the input pulse signal, the three-phase output line current, the first current and the second current, including:

[0153] Determine the magnitude and direction of the output current of the bridge arm module according to the conditions satisfied by the input pulse signal, the direction of conduction of the switch sequence in the ANPC converter, and the relationship between the three-phase output line current and the first current and the second current;

[0154] The magnitude and direction of the output current of the bridge arm module are used as the second digital sub-model of the controllable state current module.

[0155] In this embodiment, the conditions satisfied by the input pulse signal can be determined according to actual conditions and are not limited here. As an example, the conditions satisfied by the input pulse signal may be g1*g2-g3*g4=1; g1*g2-g3*g4=0; g1*g2-g3*g4=-1.

[0156] The direction of conduction of the switch sequence in the ANPC converter can be determined according to actual conditions and is not limited here. As an example, the U-phase bridge arm is taken as an example, and it is stipulated that the positive direction is from the collector to the emitter.

[0157] The relationship between the three-phase output line current and the first current and the second current can be determined according to actual conditions and is not limited here.

[0158] In practical applications, the U-phase, V-phase, and W-phase bridge arm current modules are exactly the same. Taking the U-phase bridge arm as an example, it is stipulated that the positive direction is from the collector to the emitter. The 6 IGBT / Diode currents are calculated by the switching sequence table shown in Table 1. Table 1 is the U-phase ANPC bridge arm current calculation table under controllable state; then according to iah=iaT1+iaD1; ial=iaT4+iaD4; iah and ial are obtained, and finally the three-phase currents are added to obtain the total bridge arm output current: ih_kekong=iah+ibh+ich; il_kekong=ial+ibl+icl.

[0159] Table 1 U-phase ANPC bridge arm current calculation table under controllable state

[0160]

[0161] In an optional embodiment of the present application, the third digital sub-model of the uncontrollable state current module is determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current, including:

[0162] determining a third voltage according to the first voltage and the second voltage;

[0163] Determine the magnitude and direction of the output current of the bridge arm module based on the relationship between the three-phase output phase voltage and the third voltage, and the relationship between the three-phase output line current and the first current and the second current;

[0164] The magnitude and direction of the output current of the bridge arm module are used as the third digital sub-model of the uncontrollable state current module.

[0165] In this embodiment, the first voltage may be recorded as Uh; the second voltage may be recorded as Ul; and the third voltage may be recorded as Uo.

[0166] The specific determination process of determining the third voltage according to the first voltage and the second voltage can be determined according to actual conditions and is not limited here. As an example, the third voltage determined according to the first voltage and the second voltage can be Uo=Uh+Ul.

[0167] In practical applications, the uncontrolled state current module needs to be modeled as a whole, and the output current is calculated according to the operating condition list shown in Table 2. Table 2 is the ANPC bridge arm current calculation table under the uncontrolled state; finally, the three-phase currents are added to obtain the total bridge arm output current ihl_bukong=iaD1+ibD1+icD1.

[0168] Table 2 ANPC bridge arm current calculation table under uncontrolled state

[0169] Voltage relationship Current relationship Current direction Uab≥Uo or Uac≥Uo -iaD1=-iaD2=-ia ia≤0 Ubc≥Uo or Uba≥Uo -ibD1=-ibD2=-ib ib≤0 Uca ≥ Uo or Ucb ≥ Uo -icD1=-icD2=-ic ic≤0

[0170] Among them, Uo=Uh+Ul.

[0171] In an optional embodiment of the present application, the fourth digital sub-model of the current calculation logic module is determined according to the input pulse signal, the first current and the second current, including:

[0172] Determining whether the values ​​corresponding to the input pulse signals are all zero;

[0173] When all values ​​corresponding to the input pulse signals are zero, determining that the output current of the current calculation logic module is the output current of the uncontrollable state current module; the output current of the uncontrollable state current module, the first current and the second current are all the same;

[0174] In the case where the values ​​corresponding to the input pulse signals are not all zero, determining that the output current of the current calculation logic module is the output current of the controllable state current module; the output current of the controllable state current module is equal to the first current or the second current;

[0175] The output current of the current calculation logic module is the output current of the uncontrollable state current module, and the output current of the current calculation logic module is the output current of the controllable state current module as the fourth digital sub-model.

[0176] In this embodiment, the input pulse signal can be recorded as g1~g18; the first current can be recorded as ih; the second current can be recorded as il; the output current of the uncontrollable state current module can be recorded as ihl_bukong; the output current of the controllable state current module can be recorded as ih_kekong and il_kekong.

[0177] The output current of the uncontrollable state current module, the first current and the second current are all the same, which can be understood as ih=il=ihl_bukong.

[0178] The output current of the controllable state current module being equal to the first current or the second current can be understood as ih=ih_kekong or il=il_kekong.

[0179] In practical applications, the current calculation logic module can be combined with Figure 6 To understand, Figure 6 This is a schematic diagram of the current calculation logic module of the embodiment of the present application; the corresponding current is selected according to the pulse state.

[0180] In order to facilitate the understanding of the present application, the modeling method exemplified here is specifically a three-phase three-level ANPC bidirectional converter digital model modeling method.

[0181] The modeling method of the present invention is based on the modular concept. It divides the three-phase three-level ANPC bidirectional converter into three models: the upper capacitor module, the lower capacitor module and the bridge arm module. The interactive coupling relationship between the modules is analyzed to obtain the input and output of each module. Then, the voltage and current corresponding expressions of each module are established. Finally, the voltage and current of the three modules are coupled to obtain the digital model of the entire main circuit. The modeling process is as follows: Figure 7 As shown, Figure 7 This is a flow chart of the digital modeling of the three-phase three-level ANPC bidirectional converter in the embodiment of the present application; the voltage and current coupling relationship model between the input and output of each module can be combined Figure 2 To understand, Uh and Ul are the upper and lower capacitor voltages respectively, ih and il are the upper and lower bridge arm output currents respectively, and idc is the DC side current.

[0182] The three-level ANPC bridge arm circuit topology can be combined with Figure 3 For understanding, ia, ib, ic are the U-phase, V-phase, and W-phase output line currents respectively, and Uao, Ubo, and Uco are the three-phase output phase voltages respectively.

[0183] (1) Upper capacitor module.

[0184] The upper capacitor module has the following characteristics according to the relationship between the voltage and current of the capacitor: Discretization yields Among them, T s is the discretization step size.

[0185] (2) Lower capacitor module.

[0186] The lower capacitor module has the following characteristics according to the relationship between the voltage and current of the capacitor: Discretization yields

[0187]

[0188] (3) Bridge arm module.

[0189] The bridge arm module is divided into four parts: voltage module, controllable state current module, uncontrolled state current module, and current calculation logic module. Figure 4 To understand.

[0190] The U-phase, V-phase, and W-phase bridge arm voltage modules are completely identical. Take the U-phase bridge arm as an example. First, determine whether the input pulses g1 to g6 are all 0: ① If they are 0, then determine the current ia. If ia ≥ 0, then the output voltage Uao = Uh; if ia < 0, then Uao = Ul; ② If it is not 0, then calculate g1*g2-g3*g4. If g1*g2-g3*g4 = 1, then Uao = Uh; if g1*g2-g3*g4 = -1, then Uao = Ul; otherwise, Uao = 0. The calculation logic can be combined with Figure 5 To understand.

[0191] The controllable state U-phase, V-phase, and W-phase bridge arm current modules are exactly the same. Take the U-phase bridge arm as an example. It is stipulated that the positive direction is from the collector to the emitter. The 6 IGBT / Diode currents are calculated through the switch sequence table shown in Table 1. Then, according to iah=iaT1+iaD1; ial=iaT4+iaD4; iah and ial are obtained. Finally, the three-phase currents are added to obtain the total bridge arm output current: ih_kekong=iah+ibh+ich; il_kekong=ial+ibl+icl. The calculation of the U-phase ANPC bridge arm current in the controllable state can be understood in conjunction with the previous Table 1.

[0192] The uncontrolled state current module needs to be modeled as a whole, and the output current is calculated according to the operating condition list shown in Table 2 above, and finally the three-phase currents are added to obtain the total bridge arm output current ihl_bukong=iaD1+ibD1+icD1. Among them, Uo=Uh+Ul.

[0193] The current calculation logic module can be combined with Figure 6 Understand and select the corresponding current according to the pulse state.

[0194] For ease of understanding, a specific implementation example is given here: Implementation example of a three-phase controllable inverter model.

[0195] Build a three-phase ANPC inverter circuit digital model, the load is a three-phase induction asynchronous motor, such as Figure 8 As shown, Figure 8Schematic diagram of the digital model of the three-phase three-level ANPC inverter with asynchronous motor in the embodiment of the present application; in order to verify the correctness of the constructed digital model, the same circuit model built based on MATLAB / Simpower is used for comparison, as shown in FIG. Fig. 9 As shown, Fig. 9 This is a schematic diagram of a three-phase three-level ANPC inverter with an asynchronous motor model built based on MATLAB / Simpower in the embodiment of this application. Given the same parameters, the simulation results are as follows Fig.10 and Fig.11 shown. Fig.10 A schematic diagram showing a comparison of output waveforms of controllable inverter working conditions in an embodiment of the present application; Fig.11 This is a schematic diagram of a local amplification of the output waveform of the controllable inverter working condition of an embodiment of the present application; wherein 1 is a digital model and 2 is a Simpower model.

[0196] An example of implementation of a three-phase uncontrolled rectifier simulation model.

[0197] Build a digital model of a three-phase ANPC uncontrolled rectifier circuit with a resistor as the load, such as Fig.12 As shown, Fig.12 Schematic diagram of the three-phase three-level ANPC uncontrolled rectifier digital model of the embodiment of the present application; in order to verify the correctness of the constructed digital model, the same circuit model built based on MATLAB / Simpower is used for comparison, such as Fig.13 As shown, Fig.13 This is a schematic diagram of a three-phase three-level ANPC uncontrolled rectifier digital model based on MATLAB / Simpower built in this application embodiment. Given the same parameters, the simulation results are as follows Fig.14 and Fig.15 shown. Fig.14 A schematic diagram showing a comparison of output waveforms under uncontrolled rectification conditions in an embodiment of the present application; Fig.15 This is a schematic diagram of a local magnification of the uncontrolled rectifier output waveform of an embodiment of the present application; wherein 1 is a digital model and 2 is a Simpower model.

[0198] An example of the implementation of a three-phase controlled rectifier simulation model.

[0199] exist Fig.12 The three-phase ANPC uncontrolled rectifier circuit digital model and Fig.13 Given the same rectifier pulse in the same circuit model built based on MATLAB / Simpower as shown in the figure, the controllable rectifier working condition can be simulated. The rectifier pulse is given by a double closed-loop control algorithm, such as Fig.16 As shown, Fig.16 Schematic diagram of the three-phase controlled rectifier simulation control algorithm module of the embodiment of the present application; the simulation results are as follows Fig.17 and Fig.18 As shown, Fig.17 A schematic diagram showing a comparison of output waveforms of a three-phase controlled rectifier working condition in an embodiment of the present application; Fig.18 The schematic diagram is a partial enlarged schematic diagram of the output waveform of the three-phase controlled rectifier according to the embodiment of the present application, wherein 1 is a digital model and 2 is a Simpower model.

[0200] The present invention provides a three-phase three-level ANPC bidirectional converter digital model modeling method, which considers the modeling of upper and lower capacitors and the modeling under uncontrolled state. It can simulate three working conditions of uncontrolled rectification, controlled rectification and controlled inversion, and can be downloaded to an FPGA board for real-time simulation, so as to perform controller testing.

[0201] The digital modeling method of three-phase three-level ANPC bidirectional converter has the following beneficial effects:

[0202] 1) Considering the modeling of upper and lower capacitors, it is possible to simulate the charging and discharging process of the capacitors and to perform simulation verification of the capacitor voltage balancing control algorithm;

[0203] 2) It can simulate three working conditions: uncontrolled rectification, controlled rectification and controlled inversion, covering all normal working conditions;

[0204] 3) The bridge arm model uses logical operations instead of physical formula derivation, which is easy to implement engineering applications. The model can be compiled and downloaded to the FPGA board and can be used in conjunction with the controller for real-time semi-physical simulation verification.

[0205] The modeling method proposed in the present invention establishes a three-phase three-level ANPC bidirectional converter digital model, which can be compiled and downloaded to an FPGA board and used in conjunction with a controller to perform real-time semi-physical simulation verification, thus solving the problem that there is currently no high-precision digital model based on FPGA and that high-precision hardware-in-the-loop semi-physical simulation testing cannot be performed.

[0206] The modeling method proposed in the present invention takes into account the modeling of upper and lower capacitors, can simulate the capacitor charging and discharging process, and can perform capacitor dynamic simulation.

[0207] The modeling method proposed in the present invention can simulate three operating conditions of three-phase three-level ANPC: uncontrolled rectification, controlled rectification, and controlled inversion, and can cover all normal operating conditions.

[0208] The modeling method proposed in the present invention divides the bridge arm module into four parts: a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module. The voltage-current relationship is directly obtained according to the pulse state and the current direction without considering the device parasitic parameters, and can simulate the steady-state response of the switching device.

[0209] The embodiment of the present application also provides a modeling device, which is arranged on the ANPC converter; Fig.19 As shown, Fig.19 This is a schematic diagram of the structure of a modeling device according to an embodiment of the present application. The modeling device 1900 includes:

[0210] A first determining unit 1901 is used to determine an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter;

[0211] A second determining unit 1902 is used to determine a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module according to a coupling relationship among the upper capacitor module, the lower capacitor module, and the bridge arm module;

[0212] The establishing unit 1903 is used to establish a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

[0213] In one embodiment, the establishing unit 1903 is also used to determine a first digital model of the upper capacitor module based on the first input parameter and the first output parameter; determine a second digital model of the lower capacitor module based on the second input parameter and the second output parameter; determine a third digital model of the bridge arm module based on the third input parameter and the third output parameter; and use the first digital model, the second digital model, and the third digital model as digital models of the ANPC converter.

[0214] In one embodiment, the third output parameter includes the first current output by the upper bridge arm module in the bridge arm module; the first input parameter includes the first current and the second current on the DC side of the ANPC converter; the first output parameter includes the first voltage of the upper capacitor module; the establishment unit 1903 is also used to determine the first relationship expression of the upper capacitor module based on the first current, the second current, and the first voltage; and the first relationship expression is discretized to obtain the first digital model.

[0215] In one embodiment, the third output parameter includes the third current output by the lower bridge arm module in the bridge arm module; the second input parameter includes the third current and the second current on the DC side of the ANPC converter; the second output parameter includes the second voltage of the lower capacitor module; the establishment unit 1903 is also used to determine the second relationship expression of the lower capacitor module based on the third current, the second current, and the second voltage; the second relationship expression is discretized to obtain the second digital model.

[0216] In one embodiment, the bridge arm module includes a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module; the current calculation logic module is respectively connected to the controllable state current module and the uncontrollable state current module; the third input parameter includes the first output parameter and the second output parameter; the first output parameter includes the first voltage of the upper capacitor module; the second output parameter includes the second voltage of the lower capacitor module; the third output parameter includes the first current output by the upper bridge arm module and the second current output by the lower bridge arm module in the bridge arm module; the establishment unit 1903 is also used to obtain the input pulse signal of the bridge arm module and the three-phase output line current and three-phase output phase voltage of the ANPC converter; based on the input pulse signal, the The first digital sub-model of the voltage module is determined according to the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage; the second digital sub-model of the controllable state current module is determined according to the input pulse signal, the three-phase output line current, the first current and the second current; the third digital sub-model of the uncontrollable state current module is determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current; the fourth digital sub-model of the current calculation logic module is determined according to the input pulse signal, the first current and the second current; the first digital sub-model, the second digital sub-model, the third digital sub-model and the fourth digital sub-model are used as the third digital model.

[0217] In one embodiment, the establishing unit 1903 is also used to determine whether the value of the input pulse signal of any phase among the three phases is all zero; if the value of the input pulse signal is all zero, determine whether the value of the output line current of any phase among the three-phase output line current is greater than zero; when the value of the output line current of any phase is greater than zero, determine that the output phase voltage of the voltage module is the first voltage; when the value of the output line current of any phase is less than zero, determine that the output phase voltage of the voltage module is the second voltage; if the value of the input pulse signal is not all zero, when the input pulse signal satisfies the first preset condition, determine that the output phase voltage of the voltage module is the first voltage; when the input pulse signal satisfies the second preset condition, determine that the output phase voltage of the voltage module is the second voltage; when the input pulse signal does not satisfy both the first preset condition and the second preset condition, determine that the output phase voltage of the voltage module is zero; and use the output phase voltage of the voltage module as the first voltage, the output phase voltage of the voltage module as the second voltage, and the output phase voltage of the voltage module as zero as the first digital sub-model.

[0218] In one embodiment, the establishing unit 1903 is also used to determine the magnitude and direction of the output current of the bridge arm module according to the conditions satisfied by the input pulse signal, the direction of conduction of the switch sequence in the ANPC converter, and the relationship between the three-phase output line current and the first current and the second current; and use the magnitude and direction of the output current of the bridge arm module as the second digital sub-model of the controllable state current module.

[0219] In one embodiment, the establishing unit 1903 is also used to determine a third voltage based on the first voltage and the second voltage; determine the magnitude and direction of the output current of the bridge arm module based on the relationship between the three-phase output phase voltage and the third voltage, and the relationship between the three-phase output line current and the first current and the second current; and use the magnitude and direction of the output current of the bridge arm module as the third digital sub-model of the uncontrollable state current module.

[0220] In one embodiment, the establishing unit 1903 is also used to determine whether the values ​​corresponding to the input pulse signals are all zero; when the values ​​corresponding to the input pulse signals are all zero, the output current of the current calculation logic module is determined to be the output current of the uncontrollable state current module; the output current of the uncontrollable state current module, the first current and the second current are all the same; when the values ​​corresponding to the input pulse signals are not all zero, the output current of the current calculation logic module is determined to be the output current of the controllable state current module; the output current of the controllable state current module is equal to the first current or the second current; the output current of the current calculation logic module is the output current of the uncontrollable state current module, and the output current of the current calculation logic module is the output current of the controllable state current module as the fourth digital sub-model.

[0221] It should be noted that in the embodiments of the present application, if the above-mentioned modeling method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical embodiment of the embodiment of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a modeling system (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiments of the present application are not limited to any specific combination of hardware and software.

[0222] Based on the hardware implementation of the above-mentioned program module, an embodiment of the present application also provides a modeling device, including a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, the steps in the modeling method provided in the above-mentioned embodiment are implemented.

[0223] Correspondingly, an embodiment of the present application provides a computer program product, which implements the steps in the modeling method provided in the above embodiment when executed by a processor.

[0224] Correspondingly, an embodiment of the present application provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the modeling method provided in the above embodiment are implemented.

[0225] It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0226] Based on the hardware implementation of the above-mentioned program module, an embodiment of the present application also provides an information transmission device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of any one of the methods described above on the network device side are implemented; or, when the processor executes the program, the steps of any one of the methods described above on the terminal side are implemented;.

[0227] Correspondingly, an embodiment of the present application provides a computer program product, including a computer program, on which a computer program is stored, and when the computer program is executed by a processor, the steps of any one of the methods described in the above-mentioned network device side are implemented; or, when the processor executes the program, the steps of any one of the methods described in the above-mentioned terminal side are implemented.

[0228] Correspondingly, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of any one of the methods described in the above-mentioned network device side are implemented; or, when the processor executes the program, the steps of any one of the methods described in the above-mentioned terminal side are implemented.

[0229] It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0230] It should be noted that Fig. 20This is a schematic diagram of the structure of the modeling device in the embodiment of the present application, such as Fig. 20 As shown, the modeling device 2000 includes: a processor 2001 and a memory 2003 . Optionally, the modeling device 2000 may also include a communication interface 2002 .

[0231] It can be understood that the memory 2003 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a ferromagnetic random access memory, a flash memory, a magnetic surface memory, an optical disk, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAMbus random access memory (DRRAM, Direct Rambus Random Access Memory).The memory 2003 described in the embodiments of the present application is intended to include but is not limited to these and any other suitable types of memories.

[0232] The method disclosed in the above embodiment of the present application can be applied to the processor 2001, or implemented by the processor 2001. The processor 2001 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 2001. The above processor 2001 can be a general processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The processor 2001 can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general processor can be a microprocessor or any conventional processor, etc. In combination with the steps of the method disclosed in the embodiment of the present application, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium, which is located in the memory 2003, and the processor 2001 reads the information in the memory 2003 and completes the steps of the above method in combination with its hardware.

[0233] In an exemplary embodiment, the device may be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD), field programmable gate array (FPGA), general processor, controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.

[0234] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned sequence numbers of the embodiments of the present application are only for description and do not represent the advantages and disadvantages of the embodiments.

[0235] It should be noted that, in this application, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0236] The methods disclosed in several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0237] The features disclosed in several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0238] The features disclosed in several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0239] The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A modeling method, characterized in that: Applied to an active neutral point clamped ANPC converter; the method comprises: Determine an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter; Determine, according to the coupling relationship between the upper capacitor module, the lower capacitor module and the bridge arm module, a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module; A digital model of the ANPC converter is established based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

2. The method according to claim 1, characterized in that: The method of establishing a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter comprises: Determine a first digital model of the upper capacitor module based on the first input parameter and the first output parameter; Determine a second digital model of the lower capacitor module based on the second input parameter and the second output parameter; Determine a third digital model of the bridge arm module based on the third input parameter and the third output parameter; The first digital model, the second digital model and the third digital model are used as digital models of the ANPC converter.

3. The method according to claim 2, characterized in that The third output parameter includes a first current output by an upper bridge arm module in the bridge arm module; the first input parameter includes the first current and a second current on the DC side of the ANPC converter; the first output parameter includes a first voltage of the upper capacitor module; The determining a first digital model of the upper capacitor module based on the first input parameter and the first output parameter includes: Determine a first relational expression of the upper capacitor module according to the first current, the second current, and the first voltage; The first relational expression is discretized to obtain the first digital model.

4. The method according to claim 2, characterized in that: The third output parameter includes a third current output by the lower bridge arm module in the bridge arm module; the second input parameter includes the third current and a second current on the DC side of the ANPC converter; the second output parameter includes a second voltage of the lower capacitor module; and the second digital model of the lower capacitor module is determined based on the second input parameter and the second output parameter, including: Determine a second relational expression of the lower capacitor module according to the third current, the second current, and the second voltage; The second relational expression is discretized to obtain the second digital model.

5. The method according to claim 2, characterized in that: The bridge arm module includes a voltage module, a controllable state current module, an uncontrollable state current module, and a current calculation logic module; the current calculation logic module is respectively connected to the controllable state current module and the uncontrollable state current module; the third input parameter includes the first output parameter and the second output parameter; the first output parameter includes the first voltage of the upper capacitor module; the second output parameter includes the second voltage of the lower capacitor module; the third output parameter includes the first current output by the upper bridge arm module and the second current output by the lower bridge arm module in the bridge arm module; the third digital model of the bridge arm module is determined based on the third input parameter and the third output parameter, including: Acquire the input pulse signal of the bridge arm module and the three-phase output line current and three-phase output phase voltage of the ANPC converter; Determine a first digital sub-model of the voltage module based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage, and the three-phase output phase voltage; Determine a second digital sub-model of the controllable state current module according to the input pulse signal, the three-phase output line current, the first current and the second current; Determine a third digital sub-model of the uncontrollable state current module based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current; Determine a fourth digital sub-model of the current calculation logic module according to the input pulse signal, the first current and the second current; The first digital sub-model, the second digital sub-model, the third digital sub-model, and the fourth digital sub-model are used as the third digital model.

6. The method according to claim 5, characterized in that The first digital sub-model of the voltage module is determined based on the input pulse signal, the three-phase output line current, the first voltage, the second voltage and the three-phase output phase voltage, including: Determining whether the value of the input pulse signal of any phase among the three phases is all zero; If the values ​​of the input pulse signals are all zero, determining whether the value of the output line current of any phase of the three-phase output line current is greater than zero; When the value of the output line current of any phase is greater than zero, determining the output phase voltage of the voltage module to be the first voltage; When the value of the output line current of any phase is less than zero, determining the output phase voltage of the voltage module to be the second voltage; If the value of the input pulse signal is not all zero, and the input pulse signal satisfies a first preset condition, determining that the output phase voltage of the voltage module is the first voltage; When the input pulse signal satisfies a second preset condition, determining that the output phase voltage of the voltage module is the second voltage; When the input pulse signal does not satisfy the first preset condition and the second preset condition, determining that the output phase voltage of the voltage module is zero; The output phase voltage of the voltage module is the first voltage, the output phase voltage of the voltage module is the second voltage, and the output phase voltage of the voltage module is zero as the first digital sub-model.

7. The method according to claim 5, characterized in that The second digital sub-model of the controllable state current module is determined according to the input pulse signal, the three-phase output line current, the first current and the second current, including: Determine the magnitude and direction of the output current of the bridge arm module according to the conditions satisfied by the input pulse signal, the direction of conduction of the switch sequence in the ANPC converter, and the relationship between the three-phase output line current and the first current and the second current; The magnitude and direction of the output current of the bridge arm module are used as the second digital sub-model of the controllable state current module.

8. The method according to claim 5, characterized in that The third digital sub-model of the uncontrollable state current module is determined based on the three-phase output phase voltage, the three-phase output line current, the first voltage and the second voltage, the first current and the second current, including: determining a third voltage according to the first voltage and the second voltage; Determine the magnitude and direction of the output current of the bridge arm module based on the relationship between the three-phase output phase voltage and the third voltage, and the relationship between the three-phase output line current and the first current and the second current; The magnitude and direction of the output current of the bridge arm module are used as the third digital sub-model of the uncontrollable state current module.

9. The method according to claim 5, characterized in that The fourth digital sub-model of the current calculation logic module is determined according to the input pulse signal, the first current and the second current, comprising: Determining whether the values ​​corresponding to the input pulse signals are all zero; When all values ​​corresponding to the input pulse signals are zero, determining that the output current of the current calculation logic module is the output current of the uncontrollable state current module; the output current of the uncontrollable state current module, the first current and the second current are all the same; In the case where the values ​​corresponding to the input pulse signals are not all zero, determining that the output current of the current calculation logic module is the output current of the controllable state current module; the output current of the controllable state current module is equal to the first current or the second current; The output current of the current calculation logic module is the output current of the uncontrollable state current module, and the output current of the current calculation logic module is the output current of the controllable state current module as the fourth digital sub-model.

10. A modeling device, characterized in that: The modeling device is arranged on an active neutral point clamped ANPC converter; the modeling device comprises: A first determining unit, used to determine an upper capacitor module, a lower capacitor module and a bridge arm module of the ANPC converter; A second determining unit is used to determine a first input parameter and a first output parameter of the upper capacitor module, a second input parameter and a second output parameter of the lower capacitor module, and a third input parameter and a third output parameter of the bridge arm module according to a coupling relationship among the upper capacitor module, the lower capacitor module and the bridge arm module; A building unit is used to build a digital model of the ANPC converter based on the first input parameter, the first output parameter, the second input parameter, the second output parameter, the third input parameter and the third output parameter.

11. A modeling device, characterized in that: include: A memory for storing executable instructions; A processor, configured to implement the modeling method described in any one of claims 1 to 9 when executing the executable instructions stored in the memory.

12. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the computer program implements the modeling method according to any one of claims 1 to 9.

13. A computer-readable storage medium, characterized in that: Executable instructions are stored, which are used to implement the modeling method described in any one of claims 1 to 9 when executed by a processor.

Images