Graphics pipeline sampling method, graphics processor and electronic equipment

Abstract

The embodiment of the invention provides a graphics assembly line sampling method, a graphics processor and electronic equipment, the method is applied to the graphics processor, the graphics assembly line comprises an instruction processing front end and a plurality of levels of function modules connected with the instruction processing front end in sequence, and a sampling module is preset in each level of function module. The method comprises the steps that an instruction processing front end reads to-be-executed instructions from an instruction buffer area in sequence, if the to-be-executed instructions are recognized as sampling instructions, the to-be-executed instructions are converted into target instruction streams, and all levels of function modules of an input graph assembly line are sequentially processed; and for the target sampling module receiving the target instruction stream, if it is identified that the target event hits the event corresponding to the functional module at the level, after it is determined that the functional module at the level is emptied, obtaining a sampling value of the target event, inserting the sampling value into the target instruction stream, obtaining an updated target instruction stream, and forwarding the updated target instruction stream. According to the invention, unnecessary waiting can be reduced, and the performance of the graph assembly line is improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a graphics pipeline sampling method, a graphics processor and an electronic device. Background Art

[0002] The graphics pipeline is a series of processing steps to draw a 3D scene into a 2D image displayed on the screen. The graphics pipeline includes multiple pipeline stages, such as Input Assembler, Vertex Shader, Rasterization, Pixel Shader, Output Merger, etc.

[0003] Among them, the input assembly level is the first pipeline level of the graphics pipeline. It is a fixed-function pipeline level used to package the vertex information sent by the application into processing tasks required by the subsequent pipeline. Its output is the input of the vertex shader. The vertex shader receives the vertex data provided by the input assembly level and processes each vertex, including the transformation of position coordinates and the calculation of attributes such as color. It calculates the final position, color, normal and other attributes for each vertex, and passes the vertex data to the rasterizer after processing. The rasterizer takes the vertex data output by the vertex shader as input, converts it into pixels on the screen, and provides the pixel shader with the pixel information to be processed. The pixel shader is used to process each pixel generated by the rasterizer, calculate the final display color of each pixel, and pass the calculated pixel color and other information to the output blending level. Its output result determines the color of each pixel displayed on the screen. The output blending level is used to blend the pixel color with the value in the rendering target buffer to generate the final image.

[0004] The graphics pipeline is a general model of the operation of a graphics processing unit (GPU), which takes a three-dimensional scene represented in some form as input and outputs two-dimensional raster images to the display. During the graphics drawing process, it may be necessary to use sampling instructions to sample events in the graphics pipeline to check the execution status of the graphics pipeline in real time. Several events are defined in the graphics pipeline, such as the number of vertices, the number of primitives, the number of clipped primitives, etc. To ensure that the sampling value of the event is correct, when a sampling instruction is parsed, it is necessary to wait until the entire graphics pipeline is emptied before executing the sampling instruction. In other words, the sampling process needs to pause the entire graphics pipeline, which may introduce unnecessary waiting and reduce the performance of the graphics pipeline. Summary of the invention

[0005] In view of the above problems, an embodiment of the present invention is proposed to provide a graphics pipeline sampling method that overcomes the above problems or at least partially solves the above problems, which can achieve a more sophisticated event sampling process, reduce unnecessary waiting, and improve the performance of the graphics pipeline.

[0006] Correspondingly, an embodiment of the present invention further provides a graphics processor, an electronic device, a readable storage medium and a computer program product to ensure the implementation and application of the above method.

[0007] In a first aspect, an embodiment of the present invention discloses a graphics pipeline sampling method, which is applied to a graphics processor, wherein the graphics processor includes a graphics pipeline, wherein the graphics pipeline includes an instruction processing front end and several levels of functional modules sequentially connected to the instruction processing front end, and a sampling module is pre-installed in each level of the functional module. The method includes: The instruction processing front end sequentially reads the to-be-executed instructions from the instruction buffer, and if the to-be-executed instructions are identified as sampling instructions, converts the sampling instructions into a target instruction stream, and inputs the target instruction stream into the functional modules of each level of the graphics pipeline for sequential processing; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction; For the target sampling module that receives the target instruction stream, if it is identified that the target event hits the event corresponding to the functional module of this level, after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; The target sampling module forwards the updated target instruction stream to the next module.

[0008] In a second aspect, an embodiment of the present invention discloses an instruction processing method, which is applied to a graphics processor, wherein the graphics processor includes a graphics pipeline, and the graphics pipeline includes a plurality of levels of functional modules connected in sequence, and the method includes: Identify whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of a memory into which a sampling value of the target event is to be written; If the instruction to be executed is identified as a sampling instruction, a first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, so as to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; The target instruction stream is processed in sequence by the functional modules of each level of the graphics pipeline, and is updated based on the sampled value of the target event after the corresponding functional module hitting the target event is emptied.

[0009] In a third aspect, an embodiment of the present invention discloses a graphics processor, the graphics processor comprising a graphics pipeline, the graphics pipeline comprising an instruction processing front end and a plurality of levels of functional modules sequentially connected to the instruction processing front end, each level of the functional module being pre-installed with a sampling module, wherein: The instruction processing front end is used to read the instructions to be executed from the instruction buffer in sequence, and if the instructions to be executed are identified as sampling instructions, the sampling instructions are converted into a target instruction stream, and input into the functional modules of each level of the graphics pipeline for processing in sequence; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction; The sampling module is used to receive the target instruction stream. If it is identified that the target event hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded to the next module.

[0010] In a fourth aspect, an embodiment of the present invention discloses a graphics processor, the graphics processor comprising a graphics pipeline, the graphics pipeline comprising an instruction recognition module, an instruction conversion module, and a plurality of levels of functional modules sequentially connected to the instruction conversion module; The instruction recognition module is used to identify whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of the memory into which the sampling value of the target event is to be written; The instruction conversion module is used to generate a first instruction according to the first operand and a second instruction according to the second operand if the instruction to be executed is identified as a sampling instruction, so as to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; The functional module is used to process the target instruction stream passing through, and update the target instruction stream based on the sampled value of the target event after the corresponding functional module hitting the target event is emptied.

[0011] In a fifth aspect, an embodiment of the present invention discloses an electronic device, comprising: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the steps of the graphics pipeline sampling method as described in any of the above.

[0012] In a sixth aspect, an embodiment of the present invention discloses a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the graphics pipeline sampling method as described in any of the above can be implemented.

[0013] In a seventh aspect, an embodiment of the present invention discloses a computer program product, including a computer program, which, when executed by a processor, performs the steps of any of the aforementioned graphics pipeline sampling methods.

[0014] The embodiments of the present invention include the following advantages: In the embodiment of the present invention, the target event to be sampled is specified in the sampling instruction, and the instruction processing front end converts the sampling instruction into a target instruction stream that can be identified by the sampling module, and the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction. The target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of each level of the graphics pipeline. When the built-in sampling module of a certain level of functional module receives the target instruction stream and identifies that the target event to be sampled hits the event corresponding to the functional module of this level, the sampling value of the hit target event is obtained and inserted into the target instruction stream. After the target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of each level of the graphics pipeline, the sampling values ​​of all target events indicated by the sampling instruction can be obtained by statistics. In the whole process, there is no need to wait for the entire graphics pipeline to be emptied. When the target instruction stream reaches a certain sampling module, it only needs to wait for the functional module of this level to be emptied, that is, it only needs to suspend the execution of the functional module of this level, and does not affect the execution of other functional modules. The embodiment of the present invention distributes sampling points in functional modules of various levels in the graphics pipeline, which can reduce the granularity of sampling, so that the sampling instructions are executed in the specified functional modules without blocking other functional modules in the graphics pipeline, and can realize a more sophisticated event sampling process, which can reduce unnecessary waiting, improve the performance of the graphics pipeline, and thus improve the efficiency of GPU drawing graphics. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a flowchart of steps of an embodiment of a graphics pipeline sampling method of the present invention; Figure 2 It is a schematic diagram of the structure of a functional module at a certain level in the graphics pipeline of the present invention; Figure 3It is a schematic diagram of the steps of a sampling module in the present invention; Figure 4 This is an example schematic diagram of obtaining a current-stage water draining signal of the present invention; Figure 5 It is a structural schematic diagram of setting an event counter in a certain functional module of the present invention; Figure 6 It is a structural schematic diagram of a graphics pipeline in the present invention; Figure 7 is a flowchart of steps of an instruction processing method embodiment of the present invention; Figure 8 is a structural block diagram of an embodiment of a graphics processor 300 of the present invention; Fig. 9 is a structural block diagram of an embodiment of a graphics processor 400 of the present invention; Fig.10 It is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0016] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0017] The terms "first", "second", etc. in the specification and claims of the present invention are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable when appropriate, so that the embodiments of the present invention can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. In the embodiments of the present invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0018] Reference Figure 1 , shows a flow chart of steps of an embodiment of a graphics pipeline sampling method of the present invention, the method is applied to a graphics processor GPU, the GPU includes a graphics pipeline, the graphics pipeline includes an instruction processing front end and several levels of functional modules sequentially connected to the instruction processing front end, each level of the functional module is pre-installed with a sampling module, the method may include the following steps: Step 101, the instruction processing front end reads the to-be-executed instructions from the instruction buffer in sequence, and if the to-be-executed instructions are identified as sampling instructions, the sampling instructions are converted into a target instruction stream, and input into the functional modules of each level of the graphics pipeline for processing in sequence; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction; Step 102: For the target sampling module that receives the target instruction stream, if it is identified that the target event hits the event corresponding to the current-level functional module, after determining that the current-level functional module is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; Step 103: The target sampling module forwards the updated target instruction stream to the next module.

[0019] The graphics pipeline sampling method of the present invention can be applied to a graphics processor GPU, and can realize sampling of specified events of specified functional modules in a graphics pipeline. The graphics pipeline includes an instruction processing front end and several levels of functional modules sequentially connected to the instruction processing front end.

[0020] For example, the graphics pipeline may include the following modules from front to back: a command processing front end (CF), a geometry engine (GE), a primitive engine (PE), and a rendering output unit (OM).

[0021] In a specific implementation, the graphics drawing tasks generated by the application are stored in the instruction buffer in the form of an instruction stream. The instruction processing front end CF can be used to sequentially take out instructions from the instruction stream from the instruction buffer to prepare for subsequent processing and ensure the orderly supply of instructions. The instruction processing front end CF sequentially takes out instructions from the instruction stream from the instruction buffer and sends them to the first-level functional module of the graphics pipeline (such as the geometry engine GE) for processing, and then passes through the various functional modules of the primitive engine PE and the rendering output unit OM for processing. Among them, the geometry engine GE, the primitive engine PE, and the rendering output unit OM are the three main functional modules of the graphics pipeline, which are respectively used for vertex task assembly and shading, rasterization and pixel shading, and output post-processing.

[0022] The functional modules at each level in the graphics pipeline refer to the relatively independent and interrelated processing units or subsystems that divide the entire graphics processing flow into according to a certain processing order and logic in order to achieve specific graphics processing tasks during the graphics processing process. In different processor architectures and application scenarios, the functional modules at each level in the graphics pipeline may be different.

[0023] It should be noted that the above-mentioned functional modules at each level are only used as an application example of the present invention, and the present invention does not limit the number and types of functional modules included in the graphics pipeline. For example, the graphics pipeline can also be a graphics pipeline defined by a graphics programming interface such as OpenGL or Direct3D, and the functional modules included therein can be functional modules included in a graphics pipeline defined by a graphics programming interface such as OpenGL or Direct3D.

[0024] Furthermore, each level of the functional module in the graphics pipeline may include one or more sub-modules, and each level of the functional module implements the function of the functional module at that level through one or more sub-modules inside it. In the embodiment of the present invention, a sampling module (or sampling point) is pre-set in each level of the functional module. For example, a sampling module is pre-set before the first sub-module in each level of the functional module. Figure 2 , shows a schematic diagram of the structure of a certain level of functional modules in the graphics pipeline of the present invention. Figure 2 A sampling module is preset before the first submodule in the functional module shown. The present invention adds a sampling module to each level of the functional module of the graphics pipeline. It can be understood that Figure 2 The functional module shown may be any functional module such as a geometry engine GE, a primitive engine PE, or a rendering output unit OM.

[0025] The instruction processing front end CF reads the instructions to be executed from the instruction buffer in sequence, inputs them into the first-level functional module of the graphics pipeline (such as the geometry engine GE), and executes the instructions to be executed in sequence through the functional modules at each level in the graphics pipeline. The instructions to be executed refer to the instructions in the instruction stream corresponding to the graphics drawing task generated by the application. In the embodiment of the present invention, sampling modules are pre-installed in the functional modules at each level. When an instruction to be executed flows through the functional modules at each level in the graphics pipeline for processing, when entering a certain level of functional module, it will first enter the sampling module in the functional module at that level for identification and processing.

[0026] In an embodiment of the present invention, the instructions to be executed may be instructions defined at the level of graphics hardware and related graphics programming interfaces. For example, the instructions to be executed may include any of the following: sampling (Opcode1) instructions, DRAW (drawing) instructions, SYNC (synchronization) instructions, CFGW (register write) instructions, etc.

[0027] Among them, the sampling (Opcode1) instruction is used to sample the specified event (that is, the target event), that is, to obtain the sampling value of the target event. In the process of executing the drawing instruction in the graphics pipeline, the functional modules at each level are used to perform different operations, that is, corresponding to different events. Exemplarily, the geometry engine GE is used to assemble and color vertex tasks, so the events corresponding to the geometry engine GE can be defined to include: the number of vertices, the number of primitives, and the number of vertex shader calls. The primitive engine PE is used for rasterization and pixel shading, so the events corresponding to the primitive engine PE can be defined to include: the number of clipping calls, the number of clipping generated primitives, and the number of fragment shader calls. Among them, Opcode1 in the sampling (Opcode1) instruction represents the opcode of the sampling instruction; all opcode encoding forms described in the embodiments of the present invention can be set according to the characteristics of the instruction system.

[0028] Furthermore, the sampling instruction may include a first operand and a second operand, wherein the first operand is used to indicate a target event, and the second operand is used to indicate a target address, wherein the target address is a first memory address of a sampling value to be written into the target event.

[0029] Exemplarily, the sampling instruction may be as follows: Opcode first operand, second operand The opcode is used to indicate that the instruction type is a sampling instruction, and the opcode can be represented by a preset keyword. For example, the opcode Opcode1 is used to indicate that the instruction type is a sampling instruction. The first operand is used to indicate a target event, and for example, Operand1 is used to represent the first operand. The second operand is used to indicate a target address, and for example, Operand2 is used to represent the second operand.

[0030] Exemplarily, the sampling instruction may be expressed as follows: Opcode1 Operand1, Operand2 The instruction processing front end CF reads the to-be-executed instructions from the instruction buffer in sequence, and if it is recognized that the currently read to-be-executed instruction contains a preset operation code “Opcode1”, it is determined that the to-be-executed instruction is a sampling instruction.

[0031] Furthermore, the first operand Operand1 can be a vector (called an event vector), and each bit of the event vector has a mapping relationship with the events corresponding to each level of functional modules. The event vector can be in the form of binary code or hexadecimal code. The embodiment of the present invention does not limit the specific form of the event vector. It only needs to represent multiple bits. Different bits can be used to represent different events, so that one vector can be used to represent multiple events at the same time. For example, the 0th, 1st and 2nd bits of Operand1 correspond to three events in the geometry engine GE respectively; the 3rd, 4th and 5th bits correspond to three events in the primitive engine PE respectively; and so on.

[0032] If a bit in the event vector is a preset value, it means that the event corresponding to the bit is the target event. For example, assuming that the preset value is 1, if the value of a bit is 1, it means that the event corresponding to the bit needs to be sampled, that is, the event corresponding to the bit is the target event. If the value of a bit is 0, it means that the event corresponding to the bit does not need to be sampled, that is, the event corresponding to the bit is not the target event.

[0033] Exemplarily, the mapping relationship between each bit of the event vector Operand1 and the corresponding events of each level of functional modules is shown in Table 1.

[0034] Table 1

[0035] As shown in Table 1, the bits of the event vector Operand1 count from low to high, starting from 0. The event corresponding to the 0th bit is the "number of vertices", which is an event in the functional module GE. The event corresponding to the 1st bit is the "number of primitives", which is an event in the functional module GE. The event corresponding to the 2nd bit is the "number of vertex shader calls", which is an event in the functional module GE. The event corresponding to the 3rd bit is the "number of clipping calls", which is an event in the functional module PE. The event corresponding to the 4th bit is the "number of clipping generated primitives", which is an event in the functional module PE. The event corresponding to the 5th bit is the "number of fragment shader calls", which is an event in the functional module PE.

[0036] It is understandable that the embodiment of the present invention does not limit the length of the event vector Operand1, nor does it limit the events corresponding to each bit of Operand1. In the example shown in Table 1, 6 consecutive bits of the event vector Operand1 starting from the lowest bit are used to represent events corresponding to different functional modules. Each bit represents an event. The events responsible for a sampling module are placed continuously in the event vector, and the events responsible for different sampling modules are placed from low to high in the order of the graphics pipeline. For example, in the graphics pipeline, the first-level functional module is the geometry engine GE, then the lowest bit of Operand1 represents the events corresponding to the geometry engine GE, such as the 0th, 1st and 2nd bits. The next-level functional module is the primitive engine PE, then Operand1 represents the events corresponding to the primitive engine PE starting from the 3rd bit, such as the 3rd, 4th and 5th bits. The next-level functional module is the rendering output unit OM, then Operand1 represents the events corresponding to the rendering output unit OM starting from the 6th bit, such as the 6th, 7th bit, etc. (not shown in Table 1), and so on.

[0037] In an example, assume a sampling instruction is as follows: Opcode1 0x1a, 0x10012345600 Among them, 0x1a is the first operand, and 0x10012345600 is the second operand. The sampling instruction is used to obtain the sampling value of the target event indicated by 0x1a and write it into the memory space with the target address of 0x10012345600. The number of target events can be greater than or equal to 1. The binary representation of 0x1a is 011010, and each bit in 011010 corresponds to an event. As shown in Table 1, the event corresponding to the 0th bit is "number of vertices", which is an event in the functional module GE. Since the value of the 0th bit is 0, the "number of vertices" is not a target event. The event corresponding to the 1st bit is "number of primitives", which is an event in the functional module GE. Since the value of the 1st bit is 1, the "number of primitives" is a target event. Similarly, the values ​​of the 3rd and 4th bits in 011010 are 1, so the "number of clipping calls" and the "number of clipping generated primitives" are also target events. That is, the target events to be sampled by the sampling instruction include the following three events: number of primitives, number of clipping calls, and number of clipping generated primitives. Among them, "number of primitives" is an event in the geometry engine GE. "Number of clipping calls" and "number of clipping generated primitives" are events in the primitive engine PE.

[0038] It should be noted that the embodiment of the present invention does not limit the number of events and event types in the sampling instruction. The event type may be an event type defined in accordance with an API specification (such as OpenGL / Direct3D), or may be an event type customized as needed. When generating a sampling instruction, the first operand in the sampling instruction, such as 0x1a, is generated according to the event to be sampled and the correspondence between the event to be sampled and the predefined event type.

[0039] Furthermore, the first operand in the embodiment of the present invention may be in vector form, and each bit in a vector may correspond to an event, thereby multiple events may be specified by a vector. The event types corresponding to the bits at different positions may be predefined, as shown in Table 1. When generating a sampling instruction, the bit position of the event to be sampled may be determined according to Table 1, and then the corresponding first operand may be generated. The first operand is in vector form, and multiple different types of events may be sampled using one sampling instruction. Taking Table 1 as an example, one sampling instruction may sample 6 different types of events.

[0040] Furthermore, when there are many types of events to be sampled, for example, one vector is not enough to represent the events to be sampled, in this case, the first operand can be in the form of a number. Specifically, the number corresponding to each event type can be pre-defined. When generating a sampling instruction, the corresponding first operand is generated according to the pre-defined correspondence between the event type and the number. One first operand uses one number, and one number corresponds to one type of event. The first operand uses the numbered form, and one sampling instruction can be used to sample one type of event. Ten different types of events require 10 sampling instructions.

[0041] In a specific implementation, when the event types to be sampled are relatively small and one vector is sufficient to represent them, a first operand in vector form may be used. When the event types to be sampled are relatively large and one vector is insufficient to represent them, a first operand in number form may be used. Of course, the specific form of the first operand may also be in other forms, and the present invention does not limit this.

[0042] In the related art, the instruction processing front end CF reads the to-be-executed instructions from the instruction buffer in sequence. If the to-be-executed instruction currently read is identified as a sampling (Opcode1) instruction, in order to avoid the situation where the previous drawing operation has not been processed and causes inaccurate sampling results, it is necessary to wait until the entire graphics pipeline is emptied. At this time, it can be ensured that the previous drawing operation has been processed and completed before executing the sampling instruction and obtaining the sampling value of the target event, which can ensure that the obtained sampling value of the target event is correct.

[0043] In an embodiment of the present invention, if the instruction processing front end CF identifies that the currently read instruction to be executed is a sampling instruction, the sampling instruction is converted into a target instruction stream and input into the functional modules of each level of the graphics pipeline for processing in sequence. The target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction. The target instruction stream can be an instruction that can be recognized by each module in the graphics pipeline. For the target sampling module that receives the target instruction stream, if it is identified that the target event to be sampled by the target instruction stream hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream.

[0044] Exemplarily, assuming that the target event is the number of vertices drawn by the geometry engine GE, the instruction processing front end CF takes out the instruction to be executed as a sampling (Opcode1) instruction, which is then converted into a target instruction stream recognizable by the sampling module and input into the geometry engine GE. After receiving the target instruction stream, the sampling module built into the geometry engine GE recognizes that the target event to be sampled by the target instruction stream hits the event corresponding to the functional module at this level. After determining that the functional module at this level (geometry engine GE) is empty, the sampling value of the target event is obtained, that is, the sampling value of the event "number of vertices" is obtained, and the sampling value is inserted into the target instruction stream to obtain an updated target instruction stream. The updated target instruction stream is forwarded to the next module to pass the inserted sampling value of the target event "number of vertices" downward in the graphics pipeline, so that the sampling value can be used in subsequent steps.

[0045] The next module may be the first submodule of the functional module of the current level, or the next module may be a sampling module built into the functional module of the next level, or the next module may be an instruction processing backend. For example, when the target sampling module is a sampling module in the functional module of the current level, the next module refers to the first submodule of the functional module of the current level. When the target sampling module is the last submodule of the functional module of the current level, the next module refers to the sampling module built into the functional module of the next level. When the target sampling module is the last submodule in the functional module of the last level in the graphics pipeline, the next module refers to the instruction processing backend.

[0046] Among them, the emptying of the functional module at this level means that the functional module where the target sampling module is located has completed the operation it needs to process, so that it can be guaranteed that the sampling value of the target event is obtained after the operation of the functional module at this level has been completed, so as to ensure that the correct sampling value is obtained. For example, in this example, it is necessary to obtain the number of vertices drawn by the geometry engine GE. If the sampling instruction is executed upon receiving the sampling instruction, the operation of drawing the vertices by the geometry engine GE may not have been completed at this time, and the number of vertices drawn by the geometry engine GE may be inaccurate. In addition, since it is only necessary to obtain the sampling value of the target event (number of vertices) of the functional module at this level (geometry engine GE), it is only necessary to wait for the functional module at this level (geometry engine GE) to be emptied, without waiting for the entire graphics pipeline to be emptied, which will not affect the normal execution of other functional modules outside the geometry engine GE, can reduce unnecessary waiting, and improve the performance of the graphics pipeline.

[0047] The target sampling module obtains the sampling value of the target event and inserts it into the target instruction stream to obtain an updated target instruction stream. The updated target instruction stream carries the sampling value of the target event in the functional module of the current level inserted by the target sampling module. The target sampling module forwards the updated target instruction stream to the next module, and the next module can continue to identify whether it needs to process the updated target instruction stream. Therefore, after the sampling instruction is converted into a target instruction stream by the instruction processing front end CF, it flows through the functional modules of each level of the graphics pipeline, and is identified and processed by the sampling modules preset in the functional modules of each level in turn. If the event corresponding to the functional module of the current level is hit, the sampling module inserts the sampling value of the hit target event. After being processed by the functional modules of each level of the graphics pipeline, the sampling value of the specified event of the specified module in the functional modules of each level can be obtained. And when sampling the event corresponding to a certain level of functional module, it is only necessary to suspend the execution of the functional module of this level and wait for the functional module of this level to be emptied, which will not affect the execution of other functional modules.

[0048] Furthermore, the instruction processing front end reads the to-be-executed instructions from the instruction buffer in sequence, and if it is identified that the to-be-executed instructions are not sampling instructions, the to-be-executed instructions are input into the functional modules of each level of the graphics pipeline for sequential processing.

[0049] In an optional embodiment of the present invention, converting the sample instruction into a target instruction stream may include: A first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, to obtain a target instruction stream consisting of the first instruction and the second instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address. In an embodiment of the present invention, the graphics pipeline can be used to process the sampling instruction.

[0050] In the embodiment of the present invention, it is assumed that the instruction processing front end CF reads the instruction to be executed as "Opcode1 0x1a, 0x10012345600", and the instruction processing front end CF recognizes that this is a sampling instruction, generates a first instruction according to the first operand (0x1a), and generates a second instruction according to the second operand (0x10012345600), and obtains a target instruction stream consisting of the first instruction and the second instruction. The first instruction is used to transfer the target event, and the second instruction is used to transfer the target address.

[0051] In the embodiment of the present invention, internal instructions and external instructions of the graphics pipeline are distinguished. The sampling instruction is an external instruction received by the graphics pipeline (such as the sampling instruction from the application program), and the instruction processing front end CF processes the external instruction and converts it into an instruction to be actually executed in the graphics pipeline (internal instructions of the graphics pipeline), such as a first instruction and a second instruction, and inputs it into the graphics pipeline for processing.

[0052] Exemplarily, the first instruction is expressed as follows: Opcode2 first operand (such as Operand1) The operation code Opcode2 indicates that the instruction type is a first instruction, which is used to transfer the target event indicated by the first operand. The first operand is the same as the first operand in the sampling instruction.

[0053] Exemplarily, the second instruction is expressed as follows: Opcode3 Second operand (such as Operand2) The operation code Opcode3 indicates that the instruction type is a second instruction, which is used to transfer the target address indicated by the second operand. The second operand is the same as the second operand in the sampling instruction.

[0054] For example, the instruction processing front end CF converts the above sample instructions into the following target instruction stream: Opcode3 0x10012345600 Opcode2 0x1a Among them, "Opcode2 0x1a" is the first instruction, "0x1a" is the first operand, and "Opcode2" is the operation code of the first instruction; "Opcode3 0x10012345600" is the second instruction, "0x10012345600" is the second operand, and "Opcode3" is the operation code of the second instruction. The first instruction and the second instruction can be custom instructions, which can be recognized and processed by the modules in the graphics pipeline. The first instruction is used to transfer the target event, such as transferring the event vector. The second instruction is used to transfer the target address, that is, to transfer the starting address to be written by the sampling instruction.

[0055] Reference Figure 3 , shows a schematic flow chart of the steps of a sampling module in the present invention. Figure 3 As shown, a sampling module receives the current instruction. If the current instruction is identified as the first instruction, the first instruction can carry an event vector to indicate the target event to be sampled. Therefore, after the sampling module recognizes that the first instruction has been received, it further determines whether the target event indicated by the first instruction hits the event corresponding to the functional module at this level; if it hits, it waits until the functional module at this level is emptied, obtains the sampling value of the hit target event and inserts it into the target instruction stream, obtains the updated target instruction stream, and forwards the updated target instruction stream to the next module. If the sampling module recognizes that the target event indicated by the first instruction does not hit the event corresponding to the functional module at this level after receiving the first instruction, it forwards the instruction to the next module. Figure 3 The sampling module shown may be a sampling module built into any functional module.

[0056] In a specific implementation, the sampling module built into each level of the functional module can record the mapping relationship between the event corresponding to the functional module at this level and the bit position of the event vector. The identification of the event corresponding to the target event hitting the functional module at this level may include: The target sampling module determines whether the bit with the preset value belongs to the functional module of this level. If so, it determines to identify that the target event hits the event corresponding to the functional module of this level.

[0057] For example, as shown in Table 1, the events corresponding to the geometry engine GE include: the number of vertices, the number of primitives, and the number of vertex shader calls, which correspond to the 0th, 1st, and 2nd bits of the event vector, respectively. The mapping relationship is recorded in the sampling module built into the geometry engine GE. The events corresponding to the primitive engine PE include: the number of clipping calls, the number of clipping generated primitives, and the number of fragment shader calls, which correspond to the 3rd, 4th, and 5th bits of the event vector, respectively. The mapping relationship is recorded in the sampling module built into the primitive engine PE.

[0058] When the instruction processing front end CF reads the sample instruction "Opcode1 0x1a, 0x10012345600", it converts the sample instruction into the following target instruction stream: Opcode3 0x10012345600 Opcode2 0x1a The instruction processing front end CF sends the target instruction stream to the geometry engine GE. The sampling module built into the geometry engine GE (referred to as the target sampling module at this time) receives the target instruction stream and identifies the first instruction, and then further determines whether the target event indicated by the first instruction hits the event corresponding to the functional module at this level. The target event indicated by the operand "0x1a" (that is, the event vector "011010") of the first instruction includes: the number of primitives, the number of clipping calls, and the number of clipping generated primitives. The 0th, 1st, and 2nd bits of the operand 0x1a correspond to the events of the functional module at this level (geometry engine GE). Since the value of the first bit of the event vector "011010" is 1, that is, the event "number of primitives" is the target event; and the event corresponding to the first bit of the event vector belongs to the functional module at this level (geometry engine GE), it is determined that the target event "number of primitives" hits the event corresponding to the functional module at this level (geometry engine GE). After determining that the functional module at this level (geometry engine GE) is emptied, the sampling module built into the geometry engine GE obtains the sampling value of the target event (number of primitives) and inserts it into the target instruction stream to obtain an updated target instruction stream.

[0059] For example, the following custom instructions can be used to obtain the sample value of the target event: Opcode4 Operand3 The operation code Opcode4 indicates that the instruction type is a custom instruction for obtaining the sampled value of the target event. Operand3 is the operand of the custom instruction, indicating the sampled value of the target event.

[0060] In an example, after inserting the sample value of the target event (number of primitives), the following updated target instruction stream is obtained: Opcode3 0x10012345600 Opcode4 Number of graphics elements Opcode2 0x1a Among them, the Opcode4 instruction is a custom instruction that can be recognized and processed by the modules in the graphics pipeline. The inserted Opcode4 instruction is used to pass the sampled value of the target event. As in the above example, by inserting the "Opcode4 Number of Primitives" instruction in the target instruction stream, the sampled value of the target event "Number of Primitives" is inserted into the target instruction stream.

[0061] In an optional embodiment of the present invention, each level of functional module of the graphics pipeline may include an event counter, and the event counter is used to record the sampling value of the event corresponding to the functional module; The acquiring the sampling value of the target event may include: The value of the event counter corresponding to the target event in the current-level functional module is read to obtain a sampling value of the target event.

[0062] In a specific implementation, each functional module of the graphics pipeline may include several event counters, which have a one-to-one correspondence with the event and are used to implement the counting function of the corresponding event. For example, for the geometry engine GE, a counter for maintaining the event "number of primitives" may be included, and the value of the counter is increased by 1 each time a primitive is processed. Obtaining the sample value of an event is the process of reading the value of the corresponding event counter.

[0063] Exemplarily, the geometry engine GE includes an event counter corresponding to the "number of vertices" (e.g., recorded as counter 0), an event counter corresponding to the "number of primitives" (e.g., recorded as counter 1), and an event counter corresponding to the "number of vertex shader calls" (e.g., recorded as counter 2). The process of the sampling module built into the geometry engine GE obtaining the sampling value of the hit target event "number of primitives" is the process of reading the value of counter 1.

[0064] In an optional embodiment of the present invention, determining that the functional modules at this level are empty may include: Step S11, obtaining a pipeline emptying signal of this level; the pipeline emptying signal of this level is determined according to the pipeline busy signals of each submodule inside the functional module of this level, and the value of the pipeline busy signal indicates the execution state of the corresponding module; Step S12: If the value of the current-stage pipeline drain signal is a preset value, it is determined that the current-stage functional module is drained.

[0065] In an embodiment of the present invention, each level of functional modules in the graphics pipeline (including submodules of each level of functional modules) can output respective pipeline busy signals. The value of the pipeline busy signal can represent the execution state of the corresponding module. Exemplarily, the value of the pipeline busy signal is 1, indicating that the corresponding module is in a busy state (i.e., in an executing state), indicating that the module has not yet completed the required processing operation; the value of the pipeline busy signal is 0, indicating that the corresponding module is not in a busy state (i.e., in an execution completion state), indicating that the module has completed the required processing operation, i.e., the module has been emptied.

[0066] The pipeline drain signal of a functional module at this level is determined according to the pipeline busy signals of each submodule inside the functional module. In one example, the pipeline drain signal of the functional module at this level can be the pipeline busy signal of all submodules inside the functional module at this level and then negated after execution or operation. If the value of the pipeline drain signal at this level is a preset value (assuming the preset value is 1), it means that the pipeline busy signals of all submodules inside the functional module at this level are 0, that is, all submodules inside the functional module at this level have been drained, so the functional module at this level has been drained.

[0067] Reference Figure 4 , shows an example schematic diagram of obtaining a current-stage water drain signal of the present invention. Figure 4 As shown, a certain level of functional module (such as functional module GE) of the graphics pipeline includes a sampling module and each submodule of the functional module from front to back. In an embodiment of the present invention, the functional module of this level executes or operates the pipeline busy signal of each submodule inside itself and then inverts it to obtain the pipeline emptying signal of this level. The functional module of this level sends the pipeline emptying signal of this level to the built-in sampling module. If the sampling module recognizes that the value of the pipeline emptying signal of this level is a preset value, it determines that the functional module of this level has been emptied.

[0068] It should be noted that Figure 4 Each level of the functional module may also include several event counters (not shown in the figure). The embodiment of the present invention does not limit the number and position of the event counters. Exemplarily, several event counters may be set outside the sampling module, and the event counters have a one-to-one correspondence with the events. The event counters may be set inside each submodule, or outside the submodule, or at the top level of the pipeline level. Figure 5 , shows a schematic diagram of the structure of setting an event counter in a certain functional module of the present invention, and the functional module can be any functional module in the graphics pipeline. Figure 5 As shown, multiple event counters are set outside the sampling module and the submodule, and the values ​​of the multiple event counters are sent to the sampling module, and the sampling module can statistically obtain the sampling values ​​of the target events in the functional module at this level.

[0069] In the embodiment of the present invention, when forwarding instructions for sampling target events, such as sampling instructions, or target instruction streams obtained after conversion of sampling instructions, or updated target instruction streams obtained after processing by sampling modules, in the graphics processor, they may be forwarded to each module in sequence (including sampling modules built into each level of functional modules and each submodule of each level of functional modules), or may be forwarded only to sampling modules built into each level of functional modules in sequence.

[0070] For example, the sampling module built into the geometry engine GE inserts the sampling value of the target event "number of primitives" into the target instruction stream, and after obtaining the above-mentioned updated target instruction stream, forwards the updated target instruction stream to the next module. The next module may be the first submodule of the functional module at this level (such as the geometry engine GE), or the next module may be the sampling module built into the next level functional module (such as the primitive engine PE).

[0071] After the sampling module built into the geometry engine GE sends the updated target instruction stream to the first submodule of the functional module (geometry engine GE) at the same level, the first submodule recognizes that the received instruction is not the instruction to be processed by itself, and then continues to forward it downward until the sampling module built into the next level functional module (graphics primitive engine PE) receives the updated target instruction stream. Alternatively, the sampling module built into the geometry engine GE directly sends the updated target instruction stream to the sampling module built into the next level functional module (graphics primitive engine PE).

[0072] After the sampling module built into the primitive engine PE receives the updated target instruction stream, since the updated target instruction stream contains the first instruction "Opcode2 0x1a", the sampling module built into the primitive engine PE recognizes the first instruction and further determines whether the target event indicated by the operand "0x1a" hits the event corresponding to the functional module (primitive engine PE) at this level. Since the 3rd, 4th and 5th bits of the operand "0x1a" (i.e., the event vector "011010") correspond to the events of the functional module (primitive engine PE) at this level, respectively. The values ​​of the 3rd and 4th bits of "011010" are 1, so the target events corresponding to the 3rd and 4th bits hit the events corresponding to the functional module (primitive engine PE) at this level, and the hit target events include "number of clipping calls" and "number of clipping generated primitives". After determining that the functional module at this level (the primitive engine PE) is empty, the sampling module built into the primitive engine PE obtains the sampling values ​​of the target events ("number of clipping calls" and "number of clipping generated primitives") respectively and inserts them into the updated target instruction stream in sequence, and obtains the updated target instruction stream as follows: Opcode3 0x10012345600 Opcode4 Number of graphics elements Opcode4 pruning call count Opcode4 Number of primitives generated by cropping Opcode2 0x1a In the above updated target instruction stream, after the inserted "Opcode4 Number of primitives" instruction, the "Opcode4 Number of cropping calls" instruction and the "Opcode4 Number of cropping generated primitives" instruction are inserted in sequence, which are used to transfer the sampling value of the target event "Number of cropping calls" and the sampling value of the target event "Number of cropping generated primitives" respectively.

[0073] Therefore, after the target instruction stream is processed in sequence by each level of functional modules (built-in sampling modules) of the graphics pipeline, the sampling values ​​of all target events indicated by the sampling instruction can be statistically obtained based on the target instruction stream updated by the last sampling module.

[0074] In an optional embodiment of the present invention, the graphics pipeline may further include an instruction processing backend after the last-stage functional module, and the method may further include: After receiving the updated target instruction stream and identifying the second instruction, the instruction processing backend sequentially writes the sampling values ​​of each target event inserted in the updated target instruction stream, taking the target address indicated by the second instruction as the first address.

[0075] In an embodiment of the present invention, the graphics pipeline may further include a command processing backend CB located at the tail. Figure 6 , shows a schematic diagram of the structure of a graphics pipeline of the present invention. Figure 6 As shown, the graphics pipeline includes, from front to back, a command processing front end CF, a geometry engine GE, a primitive engine PE, a rendering output unit OM and a command processing back end CB.

[0076] In an embodiment of the present invention, the target instruction stream includes a first instruction and a second instruction. In the process of the target instruction stream flowing through the graphics pipeline, the sampling module built into each level of functional modules identifies the first instruction therein, and when the target event indicated by the first instruction hits the event corresponding to the functional module at this level, the first instruction is processed, the sampling value of the hit target event is obtained and inserted into the target instruction stream. When the second instruction in the target instruction stream reaches the instruction processing backend CB, the instruction processing backend CB processes the second instruction when it recognizes that the second instruction has been received, and writes the sampling values ​​of each target event inserted in the updated target instruction stream in sequence with the target address indicated by the second instruction as the first address. Other modules do not process the second instruction when they receive it.

[0077] Taking the above example as an example, the updated target instruction stream received by the instruction processing backend CB is as follows: Opcode3 0x10012345600 Opcode4 Number of graphics elements Opcode4 pruning call count Opcode4 Number of primitives generated by cropping Opcode2 0x1a After the instruction processing backend CB recognizes the second instruction "Opcode3 0x10012345600", it takes the target address "0x10012345600" as the first address, and writes the sampling values ​​of each target event inserted in the updated target instruction stream in sequence, that is, writes the sampling value of the event "number of primitives", the sampling value of the event "number of cropping calls" and the sampling value of the event "number of cropping generated primitives" into the memory space with the first address "0x10012345600" in sequence.

[0078] Specifically, in an embodiment of the present invention, after the instruction processing backend CB recognizes that it has received the second instruction, it can perform the following operations: update the write target address register according to the target address indicated by the second instruction; write the sampling value of the first target event inserted in the target instruction stream to the first address pointed to by the value in the target address register, and update the target address register, and the value in the updated target address register points to the first address to which the next sampling value is to be written; and so on, until the sampling values ​​of all target events inserted in the target instruction stream are written. Among them, updating the target address register refers to increasing the value in the target address register by the length of the event sampling value, and the length is set according to actual needs. For example, if the sampling value of an event is stored using 64 bits, updating the target address register means increasing the value in the target address register by 8 (bytes).

[0079] Specifically, in this example, after the instruction processing backend CB recognizes that the second instruction has been received, the target address register is updated according to the target address "0x10012345600" indicated by the second instruction, that is, the target address "0x10012345600" is written into the target address register. First, the first target event is processed, and the sampled value of the target event "number of primitives" is written into the memory space with the first address "0x10012345600" pointed to by the value in the target address register, and the target address register is updated, and the value in the target address register is added by 8 and updated to "0x10012345608". Then the second target event is processed, and the sampled value of the target event "number of cropping calls" is written into the memory space with the first address "0x10012345608" pointed to by the value in the target address register, and the value of the target address register is updated to "0x10012345610". Next, the third target event is processed, and the sampled value of the target event "Number of primitives generated by clipping" is written into the memory space with the first address "0x10012345610" pointed to by the value in the target address register, and the target address register is updated. Thus, the sampled value of the target event "Number of primitives", the sampled value of the target event "Number of clipping calls", and the sampled value of the target event "Number of clipping generated primitives" are stored in sequence in the memory space with the target address "0x10012345600" as the first address.

[0080] In an optional embodiment of the present invention, the instructions to be executed may include, in sequence: a first sampling instruction, a drawing instruction, and a second sampling instruction.

[0081] Example 1: Assume that the number of primitives processed by a drawing instruction, the number of clipping calls, and the number of clipping generated primitives need to be sampled, and the sampled values ​​are written to the memory at the target address 0x10012345670. Then, the instruction stream to be executed can be generated as follows: … Opcode1 0x1a, 0x10012345600 DRAW Opcode1 0x1a, 0x10012345620 … Here, ... indicates omitted instructions.

[0082] The instruction stream shown in Example 1 includes: sampling (Opcode1) instruction, drawing (DRAW) instruction and sampling (Opcode1) instruction in sequence. Among them, the first Opcode1 instruction is called the first sampling instruction, which is used to sample the event before the DRAW instruction (called the old event) and write the sampled value to the memory space with the target address "0x10012345600". In the first Opcode1 instruction, 0x1a is the first operand, which is used to indicate the target event to be sampled.

[0083] The second Opcode1 instruction is used to sample the event after the DRAW instruction (called the new event) and write the sampled value to the memory space with the target address "0x10012345620".

[0084] After the execution of the above two Opcode1 instructions is completed, the sampling value of the new event can be read from the memory space with the target address of 0x10012345600, and the sampling value of the old event can be read from the memory space with the target address of 0x10012345600. By subtracting the sampling value of the old event from the sampling value of the new event, the number of primitives processed, the number of cropping calls and the number of cropping generated primitives in the process of the graphics pipeline executing the DRAW instructions between the two Opcode1 instructions can be obtained.

[0085] In an optional embodiment of the present invention, the method may further include: Step S21, obtaining a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and obtaining a second sampling value obtained by the graphics pipeline executing the second sampling instruction; Step S22: subtract the first sampling value from the second sampling value to obtain a sampling value of a target event generated when the graphics pipeline executes the drawing instruction.

[0086] In Example 1, first, the instruction processing front end CF reads the instruction to be executed from the instruction buffer as the first sampling instruction "Opcode1 0x1a, 0x10012345600". The above embodiment describes the specific process of the graphics pipeline of the present invention processing the first sampling instruction "Opcode1 0x1a, 0x10012345600". After the processing is completed, the memory space with the target address "0x10012345600" as the first address stores the sampling value of the target event "number of primitives", the sampling value of the target event "number of clipping calls", and the sampling value of the target event "number of clipping generated primitives" in sequence. The sampling value stored at the target address "0x10012345600" is called the first sampling value.

[0087] Then, the instruction processing front end CF reads the to-be-executed instruction from the instruction buffer as a DRAW instruction, and inputs it into the functional modules of each level of the graphics pipeline for processing in sequence.

[0088] Next, the instruction processing front end CF reads the instruction to be executed from the instruction buffer as the second sampling instruction "Opcode1 0x1a, 0x10012345620". The processing process of the second sampling instruction is the same as that of the first sampling instruction, which will not be repeated here. After the second sampling instruction flow chart pipeline processing is completed, the memory space with the target address "0x10012345620" as the first address stores the sampling value of the target event "number of primitives", the sampling value of the target event "number of clipping calls", and the sampling value of the target event "number of clipping generated primitives" in sequence. The sampling value stored at the target address "0x10012345620" is called the second sampling value.

[0089] Subtracting the first sampling value from the second sampling value can obtain the sampling value of the target event generated by the graphics pipeline executing the drawing instruction. For example, starting from the target address "0x10012345600", 8 bytes are read to obtain the first sampling value, which is the sampling value of the "number of primitives" before the DRAW instruction; starting from the target address "0x10012345620", 8 bytes are read to obtain the second sampling value, which is the sampling value of the "number of primitives" after the DRAW instruction; the latter minus the former is the number of primitives drawn by the DRAW instruction. For another example, adding 8 bytes to the target address "0x10012345600" and then reading 8 bytes, the first sampling value is the sampling value of the "number of cropping calls" before the DRAW instruction; adding 8 bytes to the target address "0x10012345620" and then reading 8 bytes, the second sampling value is the sampling value of the "number of cropping calls" after the DRAW instruction; the latter minus the former is the number of cropping calls executed by the DRAW instruction.

[0090] The embodiment of the present invention also provides an instruction processing method, referring to Figure 7 , shows a flowchart of a method for processing instructions according to an embodiment of the present invention, the method is applied to a graphics processor, the graphics processor includes a graphics pipeline, the graphics pipeline includes a plurality of levels of functional modules connected in sequence, the method may include the following steps: Step 201, identifying whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event, and a second operand for indicating a target address; the target address is the first address of the memory into which the sampling value of the target event is to be written; Step 202: If the instruction to be executed is identified as a sampling instruction, a first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; Step 203: the target instruction stream is processed in sequence by the functional modules of each level of the graphics pipeline, and the sampling value based on the target event is updated after the corresponding functional module hitting the target event is emptied.

[0091] The embodiment of the present invention uses a custom sampling instruction. When the instruction to be executed is identified as a custom sampling instruction, the sampling instruction is converted into a target instruction stream, which is input into the functional modules of each level of the graphics pipeline for processing in sequence; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction. The target instruction stream includes a custom first instruction and a second instruction. The first instruction is used to transfer the target event, and the second instruction is used to transfer the target address.

[0092] In the process of the target instruction stream being processed in sequence by the functional modules of each level of the graphics pipeline in the graphics processor, for the functional module currently entered by the target instruction stream, it can be identified whether the target event hits the event corresponding to the functional module of this level; if it is identified that the target event hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event can be obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded backward.

[0093] Thus, when the target instruction stream passes through the functional modules of each level of the graphics pipeline in the graphics processor, the corresponding functional module that hits the target event will process the target instruction stream, and after the functional modules of this level are emptied, the target instruction stream is updated based on the sampled value of the hit target event, and then continues to be passed until the last functional module is processed, and the sampled value of each target event can be written into the memory space indicated by the target address. When the corresponding functional module that hits the target event processes the target instruction stream, it only needs to suspend the execution of the functional module of this level and wait for the functional module of this level to be emptied, which will not affect the execution of other functional modules.

[0094] Among them, emptying the functional modules at this level means that the corresponding functional modules that hit the target event have completed the operations they need to process, thereby ensuring that the sampling value of the target event is obtained after the operations of the functional modules at this level have been executed, so as to ensure that the correct sampling value is obtained.

[0095] Furthermore, the graphics pipeline may include an instruction processing front end before the first-level functional module, and a sampling module may be preset in each level of the functional module; before identifying whether the instruction to be executed is a sampling instruction, the method may also include the following steps: Step S31, the instruction processing front end reads the instructions to be executed from the instruction buffer in sequence; Step S32, after converting the sampled instruction into a target instruction stream, the sampled instruction is input into the functional modules of each level of the graphics pipeline for processing in sequence; Step S33: for the target sampling module that receives the target instruction stream, if it is identified that the target event hits the event corresponding to the current-level functional module, after determining that the current-level functional module is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; Step S34: The target sampling module forwards the updated target instruction stream to the next module.

[0096] Optionally, the first operand is an event vector, and each bit of the event vector has a mapping relationship with an event corresponding to each level of functional module, wherein the event corresponding to the bit whose value is a preset value is a target event; The identifying that the target event hits the event corresponding to the functional module at this level may include: The target sampling module determines whether the bit with the preset value belongs to the functional module of this level. If so, it determines to identify that the target event hits the event corresponding to the functional module of this level.

[0097] Optionally, the number of the target events may be greater than 1, the last level functional module of the graphics pipeline further includes an instruction processing backend, and the method may further include: After receiving the updated target instruction stream and identifying the second instruction, the instruction processing backend sequentially writes the sampling values ​​of each target event inserted in the updated target instruction stream, taking the target address indicated by the second instruction as the first address.

[0098] Optionally, the instructions to be executed may include, in sequence: a first sampling instruction, a drawing instruction, and a second sampling instruction; the method may further include: Step S41, obtaining a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and obtaining a second sampling value obtained by the graphics pipeline executing the second sampling instruction; Step S42: Subtract the first sampling value from the second sampling value to obtain a sampling value of a target event generated when the graphics pipeline executes the drawing instruction.

[0099] In summary, the embodiment of the present invention specifies the target event to be sampled in the sampling instruction, and the instruction processing front end CF converts the sampling instruction into a target instruction stream that can be recognized by the sampling module, and the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction. The target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of the graphics pipeline at all levels. When the built-in sampling module of a certain level of functional module receives the target instruction stream and identifies that the target event to be sampled hits the event corresponding to the functional module of this level, the sampling value of the hit target event is obtained and inserted into the target instruction stream. After the target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of the graphics pipeline at all levels, the sampling values ​​of all target events indicated by the sampling instruction can be obtained by statistics. In the whole process, there is no need to wait for the entire graphics pipeline to be emptied. When the target instruction stream reaches a certain sampling module, it only needs to wait for the functional module of this level to be emptied, that is, it only needs to suspend the execution of the functional module of this level, and does not affect the execution of other functional modules. The embodiment of the present invention distributes sampling points in functional modules of various levels in the graphics pipeline, which can reduce the granularity of sampling, so that the sampling instructions are executed in the specified functional modules without blocking other functional modules in the graphics pipeline, and can realize a more sophisticated event sampling process, which can reduce unnecessary waiting, improve the performance of the graphics pipeline, and thus improve the efficiency of GPU drawing graphics.

[0100] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0101] Reference Figure 8 , shows a structural block diagram of an embodiment of a graphics processor 300 of the present invention, the graphics processor 300 includes a graphics pipeline, the graphics pipeline includes an instruction processing front end 301 and a plurality of levels of functional modules 302 sequentially connected to the instruction processing front end, each level of the functional module is pre-installed with a sampling module 303, wherein: The instruction processing front end 301 is used to read the instructions to be executed from the instruction buffer in sequence. If the instructions to be executed are identified as sampling instructions, the sampling instructions are converted into target instruction streams and input into the functional modules 302 of each level of the graphics pipeline for processing in sequence; the target instruction streams are used to obtain the sampling values ​​of the target events indicated by the sampling instructions; The sampling module 303 is used to receive the target instruction stream. If it is identified that the target event hits the event corresponding to the functional module at this level, then after determining that the functional module at this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded to the next module.

[0102] Optionally, the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is a first memory address of a sampling value to be written into the target event; The instruction processing front end is specifically used for: A first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, to obtain a target instruction stream consisting of the first instruction and the second instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address.

[0103] Optionally, the first operand is an event vector, and each bit of the event vector has a mapping relationship with an event corresponding to each level of functional module, wherein the event corresponding to the bit whose value is a preset value is a target event; The sampling module is specifically used for: It is determined whether the bit whose value is the preset value belongs to the functional module of this level. If so, it is determined that the target event hits the event corresponding to the functional module of this level.

[0104] Optionally, the number of the target events is greater than 1, and the last-level functional module of the graphics pipeline further includes an instruction processing backend; The instruction processing backend is used to receive the updated target instruction stream and identify the second instruction, and then write the sampling values ​​of each target event inserted in the updated target instruction stream in sequence with the target address indicated by the second instruction as the first address.

[0105] Optionally, the instructions to be executed include, in sequence: a first sampling instruction, a drawing instruction, and a second sampling instruction; and the graphics processor further includes: a value reading module, used for acquiring a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquiring a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The numerical processing module is used to subtract the first sampling value from the second sampling value to obtain the sampling value of the target event generated by the graphics pipeline executing the drawing instruction.

[0106] Optionally, each level of the functional module of the graphics pipeline includes an event counter, and the event counter is used to record the sampling value of the event corresponding to the functional module; The sampling module is specifically used for: The value of the event counter corresponding to the target event in the current-level functional module is read to obtain a sampling value of the target event.

[0107] Optionally, the sampling module is specifically used to: Obtain a pipeline drain signal for this level; the pipeline drain signal for this level is determined based on pipeline busy signals of each submodule within the functional module for this level, and the value of the pipeline busy signal represents the execution state of the corresponding module; if the value of the pipeline drain signal for this level is a preset value, it is determined that the functional module for this level is drained.

[0108] Reference Fig. 9 , shows a structural block diagram of an embodiment of a graphics processor 400 of the present invention, the graphics processor 400 includes a graphics pipeline, the graphics pipeline includes an instruction recognition module 4011, an instruction conversion module 4012 and a plurality of levels of functional modules 402 sequentially connected to the instruction conversion module; The instruction identification module 4011 is used to identify whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first memory address of the sampling value to be written into the target event; The instruction conversion module 4012 is used for generating a first instruction according to the first operand and a second instruction according to the second operand if the instruction to be executed is identified as a sampling instruction, so as to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; The functional module 402 is used to process the target instruction stream passing through, and update the target instruction stream based on the sampled value of the target event after the corresponding functional module hitting the target event is emptied.

[0109] Optionally, the graphics pipeline further includes an instruction processing front end before the first-level functional module, and the instruction processing front end includes: an instruction reading module, the instruction recognition module and the instruction conversion module in sequence; a sampling module is preset in each level of the functional module; The instruction reading module is used to read the instructions to be executed from the instruction buffer in sequence and input them into the instruction recognition module; The instruction conversion module is further used for, after converting the sampled instruction into a target instruction stream, inputting the target instruction stream into the first-level functional module, so that the target instruction stream is processed in sequence by the functional modules of each level of the graphics pipeline; The sampling module is used to receive the target instruction stream. If it is identified that the target event hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded to the next module.

[0110] Optionally, the first operand is an event vector, and each bit of the event vector has a mapping relationship with an event corresponding to each level of functional module, wherein the event corresponding to the bit whose value is a preset value is a target event; The sampling module is specifically used for: It is determined whether the bit whose value is the preset value belongs to the functional module of this level. If so, it is determined that the target event hits the event corresponding to the functional module of this level.

[0111] Optionally, the number of the target events is greater than 1, and the last-level functional module of the graphics pipeline further includes an instruction processing backend; The instruction processing backend is used to receive the updated target instruction stream and identify the second instruction, and then write the sampling values ​​of each target event inserted in the updated target instruction stream in sequence with the target address indicated by the second instruction as the first address.

[0112] Optionally, the instructions to be executed include, in sequence: a first sampling instruction, a drawing instruction, and a second sampling instruction; and the graphics processor further includes: a value reading module, used for acquiring a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquiring a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The numerical processing module is used to subtract the first sampling value from the second sampling value to obtain the sampling value of the target event generated by the graphics pipeline executing the drawing instruction.

[0113] In the embodiment of the present invention, a sampling module is preset in each level of the functional module of the graphics pipeline. By specifying the target event to be sampled in the sampling instruction, the instruction processing front end CF converts the sampling instruction into a target instruction stream that can be identified by the sampling module, and the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction. The target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of each level of the graphics pipeline. When the built-in sampling module of a certain level of functional module receives the target instruction stream and identifies that the target event to be sampled hits the event corresponding to the functional module of this level, the sampling value of the hit target event is obtained and inserted into the target instruction stream. After the target instruction stream is processed in sequence by the functional modules (built-in sampling modules) of each level of the graphics pipeline, the sampling values ​​of all target events indicated by the sampling instruction can be obtained by statistics. In the whole process, there is no need to wait for the entire graphics pipeline to be emptied. When the target instruction stream reaches a certain sampling module, it only needs to wait for the functional module of this level to be emptied, that is, it only needs to suspend the execution of the functional module of this level, and does not affect the execution of other functional modules. The embodiment of the present invention distributes sampling points in functional modules of various levels in the graphics pipeline, which can reduce the granularity of sampling, so that the sampling instructions are executed in the specified functional modules without blocking other functional modules in the graphics pipeline, and can realize a more sophisticated event sampling process, which can reduce unnecessary waiting, improve the performance of the graphics pipeline, and thus improve the efficiency of GPU drawing graphics.

[0114] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0115] Reference Fig.10 , is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Fig.10 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the steps of the graphics pipeline sampling method of the above-mentioned embodiment.

[0116] An embodiment of the present invention provides a non-transitory computer-readable storage medium. When instructions in the storage medium are executed by a program or a processor of a terminal, the terminal is enabled to execute the steps of the graphics pipeline sampling method of the aforementioned embodiment. The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0117] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0118] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0119] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0120] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0121] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0122] Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A graphics pipeline sampling method, characterized in that: Applied to a graphics processor, the graphics processor includes a graphics pipeline, the graphics pipeline includes an instruction processing front end and several levels of functional modules sequentially connected to the instruction processing front end, each level of the functional module is pre-installed with a sampling module, the method includes: The instruction processing front end sequentially reads the to-be-executed instructions from the instruction buffer, and if the to-be-executed instructions are identified as sampling instructions, converts the sampling instructions into a target instruction stream, and inputs the target instruction stream into the functional modules of each level of the graphics pipeline for sequential processing; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction; For the target sampling module that receives the target instruction stream, if it is identified that the target event hits the event corresponding to the functional module of this level, after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; The target sampling module forwards the updated target instruction stream to the next module.

2. The method according to claim 1, characterized in that: The sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of a memory into which a sampling value of the target event is to be written; The converting the sampled instruction into a target instruction stream comprises: Generate a first instruction according to the first operand, and generate a second instruction according to the second operand, to obtain a target instruction stream consisting of the first instruction and the second instruction; The first instruction is used to transfer the target event, and the second instruction is used to transfer the target address.

3. The method according to claim 2, characterized in that The first operand is an event vector, and each bit of the event vector has a mapping relationship with the events corresponding to the functional modules at each level, wherein the event corresponding to the bit whose value is a preset value is the target event; The identifying that the target event hits the event corresponding to the functional module at this level includes: The target sampling module determines whether the bit with the preset value belongs to the functional module of this level. If so, it determines to identify that the target event hits the event corresponding to the functional module of this level.

4. The method according to claim 2, characterized in that: The number of the target events is greater than 1, the last level functional module of the graphics pipeline further includes an instruction processing backend, and the method further includes: After receiving the updated target instruction stream and identifying the second instruction, the instruction processing backend sequentially writes the sampling values ​​of each target event inserted in the updated target instruction stream, taking the target address indicated by the second instruction as the first address.

5. The method according to any one of claims 1 to 4, characterized in that: The instructions to be executed include: a first sampling instruction, a drawing instruction, and a second sampling instruction in sequence; the method further includes: Acquire a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquire a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The first sampling value is subtracted from the second sampling value to obtain a sampling value of a target event generated when the graphics pipeline executes the drawing instruction.

6. The method according to any one of claims 1 to 4, characterized in that: Each level of the functional module of the graphics pipeline includes an event counter, and the event counter is used to record the sampling value of the event corresponding to the functional module; The obtaining of the sampled value of the target event includes: The value of the event counter corresponding to the target event in the current-level functional module is read to obtain a sampling value of the target event.

7. The method according to any one of claims 1 to 4, characterized in that: The step of determining that the functional modules at this level are emptied includes: Obtaining a pipeline emptying signal of this level; the pipeline emptying signal of this level is determined according to pipeline busy signals of each submodule inside the functional module of this level, and the value of the pipeline busy signal indicates the execution state of the corresponding module; If the value of the current-stage pipeline drain signal is a preset value, it is determined that the current-stage functional module is drained.

8. A command processing method, characterized in that: Applied to a graphics processor, the graphics processor includes a graphics pipeline, the graphics pipeline includes several levels of functional modules connected in sequence, the method includes: Identify whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of a memory into which a sampling value of the target event is to be written; If the instruction to be executed is identified as a sampling instruction, a first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, so as to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; The target instruction stream is processed in sequence by the functional modules of each level of the graphics pipeline, and is updated based on the sampled value of the target event after the corresponding functional module hitting the target event is drained.

9. The method according to claim 8, characterized in that The graphics pipeline also includes an instruction processing front end before the first-level functional module, and a sampling module is preset in each level of the functional module; Before identifying whether the instruction to be executed is a sampling instruction, the method further includes: The instruction processing front end sequentially reads the instructions to be executed from the instruction buffer; After converting the sampled instructions into a target instruction stream, the sampled instructions are input into the functional modules of each level of the graphics pipeline for processing in sequence; For the target sampling module that receives the target instruction stream, if it is identified that the target event hits the event corresponding to the functional module of this level, after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; The target sampling module forwards the updated target instruction stream to the next module.

10. The method according to claim 9, characterized in that The first operand is an event vector, and each bit of the event vector has a mapping relationship with the events corresponding to the functional modules at each level, wherein the event corresponding to the bit whose value is a preset value is the target event; The identifying that the target event hits the event corresponding to the functional module at this level includes: The target sampling module determines whether the bit with the preset value belongs to the functional module of this level. If so, it determines to identify that the target event hits the event corresponding to the functional module of this level.

11. The method according to claim 9, characterized in that The number of the target events is greater than 1, the last level functional module of the graphics pipeline further includes an instruction processing backend, and the method further includes: After receiving the updated target instruction stream and identifying the second instruction, the instruction processing backend sequentially writes the sampling values ​​of each target event inserted in the updated target instruction stream, taking the target address indicated by the second instruction as the first address.

12. The method according to any one of claims 8 to 11, characterized in that The instructions to be executed include: a first sampling instruction, a drawing instruction, and a second sampling instruction in sequence; the method further includes: Acquire a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquire a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The first sampling value is subtracted from the second sampling value to obtain a sampling value of a target event generated when the graphics pipeline executes the drawing instruction.

13. A graphics processor, characterized in that: The graphics processor includes a graphics pipeline, which includes an instruction processing front end and several levels of functional modules sequentially connected to the instruction processing front end, and a sampling module is preset in each level of the functional module, wherein: The instruction processing front end is used to read the instructions to be executed from the instruction buffer in sequence, and if the instructions to be executed are identified as sampling instructions, the sampling instructions are converted into a target instruction stream, and input into the functional modules of each level of the graphics pipeline for processing in sequence; the target instruction stream is used to obtain the sampling value of the target event indicated by the sampling instruction; The sampling module is used to receive the target instruction stream. If it is identified that the target event hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded to the next module.

14. The graphics processor according to claim 13, characterized in that: The sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of a memory into which a sampling value of the target event is to be written; The instruction processing front end is specifically used for: A first instruction is generated according to the first operand, and a second instruction is generated according to the second operand, to obtain a target instruction stream consisting of the first instruction and the second instruction; the first instruction is used to transfer the target event, and the second instruction is used to transfer the target address.

15. The graphics processor according to claim 14, characterized in that: The first operand is an event vector, and each bit of the event vector has a mapping relationship with the events corresponding to the functional modules at each level, wherein the event corresponding to the bit whose value is a preset value is the target event; The sampling module is specifically used for: It is determined whether the bit whose value is the preset value belongs to the functional module of this level. If so, it is determined that the target event hits the event corresponding to the functional module of this level.

16. The graphics processor according to claim 14, characterized in that: The number of the target events is greater than 1, and the last level functional module of the graphics pipeline further includes an instruction processing backend; The instruction processing backend is used to receive the updated target instruction stream and identify the second instruction, and then write the sampling values ​​of each target event inserted in the updated target instruction stream in sequence with the target address indicated by the second instruction as the first address.

17. The graphics processor according to any one of claims 13 to 16, characterized in that: The instructions to be executed include: a first sampling instruction, a drawing instruction, and a second sampling instruction in sequence; the graphics processor also includes: a value reading module, used for acquiring a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquiring a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The numerical processing module is used to subtract the first sampling value from the second sampling value to obtain the sampling value of the target event generated by the graphics pipeline executing the drawing instruction.

18. The graphics processor according to any one of claims 13 to 16, characterized in that: Each level of the functional module of the graphics pipeline includes an event counter, and the event counter is used to record the sampling value of the event corresponding to the functional module; The sampling module is specifically used for: The value of the event counter corresponding to the target event in the current-level functional module is read to obtain a sampling value of the target event.

19. The graphics processor according to any one of claims 13 to 16, characterized in that: The sampling module is specifically used for: Obtain a pipeline drain signal for this level; the pipeline drain signal for this level is determined based on pipeline busy signals of each submodule within the functional module for this level, and the value of the pipeline busy signal represents the execution state of the corresponding module; if the value of the pipeline drain signal for this level is a preset value, it is determined that the functional module for this level is drained.

20. A graphics processor, characterized in that: The graphics processor includes a graphics pipeline, which includes an instruction recognition module, an instruction conversion module, and several levels of functional modules sequentially connected to the instruction conversion module; The instruction recognition module is used to identify whether the instruction to be executed is a sampling instruction; the sampling instruction includes a first operand for indicating a target event and a second operand for indicating a target address; the target address is the first address of the memory into which the sampling value of the target event is to be written; The instruction conversion module is used to generate a first instruction according to the first operand and a second instruction according to the second operand if the instruction to be executed is identified as a sampling instruction, so as to obtain a target instruction stream consisting of the first instruction and the second instruction; the target instruction stream is used to obtain a sampling value of a target event indicated by the sampling instruction; The first instruction is used to transfer the target event, and the second instruction is used to transfer the target address; The functional module is used to process the target instruction stream passing through, and update the target instruction stream based on the sampled value of the target event after the corresponding functional module hitting the target event is emptied.

21. The graphics processor according to claim 20, characterized in that The first-level functional module of the graphics pipeline also includes an instruction processing front end, which includes the instruction recognition module, the instruction conversion module and the instruction reading module; each level of the functional module is pre-installed with a sampling module; The instruction reading module is used to read the instructions to be executed from the instruction buffer in sequence and input them into the instruction recognition module; The instruction conversion module is further used for, after converting the sampled instruction into a target instruction stream, inputting the target instruction stream into the first-level functional module, so that the target instruction stream is processed in sequence by the functional modules of each level of the graphics pipeline; The sampling module is used to receive the target instruction stream. If it is identified that the target event hits the event corresponding to the functional module of this level, then after determining that the functional module of this level is empty, the sampling value of the target event is obtained and inserted into the target instruction stream to obtain an updated target instruction stream; and the updated target instruction stream is forwarded to the next module.

22. The graphics processor according to claim 21, characterized in that The first operand is an event vector, and each bit of the event vector has a mapping relationship with the events corresponding to the functional modules at each level, wherein the event corresponding to the bit whose value is a preset value is the target event; The sampling module is specifically used for: It is determined whether the bit whose value is the preset value belongs to the functional module of this level. If so, it is determined that the target event hits the event corresponding to the functional module of this level.

23. The graphics processor according to claim 21, characterized in that The number of the target events is greater than 1, and the last level functional module of the graphics pipeline further includes an instruction processing backend; The instruction processing backend is used to receive the updated target instruction stream and identify the second instruction, and then write the sampling values ​​of each target event inserted in the updated target instruction stream in sequence with the target address indicated by the second instruction as the first address.

24. The graphics processor according to any one of claims 20 to 23, characterized in that: The instructions to be executed include: a first sampling instruction, a drawing instruction, and a second sampling instruction in sequence; the graphics processor also includes: a value reading module, used for acquiring a first sampling value obtained by the graphics pipeline executing the first sampling instruction, and acquiring a second sampling value obtained by the graphics pipeline executing the second sampling instruction; The numerical processing module is used to subtract the first sampling value from the second sampling value to obtain the sampling value of the target event generated by the graphics pipeline executing the drawing instruction.

25. An electronic device, characterized in that: include: A processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other via the communication bus; The memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the steps of the graphics pipeline sampling method according to any one of claims 1 to 7 or the steps of the instruction processing method according to any one of claims 8 to 12.

26. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the steps of the graphics pipeline sampling method described in any one of claims 1 to 7 or the steps of the instruction processing method described in any one of claims 8 to 12 are implemented.

27. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the graphics pipeline sampling method according to any one of claims 1 to 7 or the steps of the instruction processing method according to any one of claims 8 to 12 are implemented.

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