Bonded wafer thinning method and heterogeneous film
By forming a step structure at the edge of the bonded wafer, the problem of wafer shedding or fragmentation during the thinning process is solved, and process efficiency and product yield are improved.
Patent Information
- Application Number
- CN202411886059.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-04-25
AI Technical Summary
During the thinning process of bonded wafers, the prior art can easily cause wafers to fall off or debris, affecting process efficiency and product yield.
By forming a step structure at the edge of the first wafer and controlling the width and distance of the step structure, it is ensured that it falls off naturally during the thinning process and avoids damage and rupture.
It effectively reduces damage to the wafer by trimming treatment, avoids the rupture of the wafer edge during the thinning process, and improves the efficiency of the thinning process and product yield.
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Figure CN119890030A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a method for thinning a bonded wafer and a heterogeneous film. Background Art
[0002] In the post-Moore era, monolithic integrated multifunctional devices are one of the new development directions, and bonding is an effective method to achieve monolithic integration. Bonding technology can be used to achieve heterogeneous integration between heterogeneous wafers. At the same time, grinding, chemical mechanical polishing, chemical etching and other methods can be used to achieve the integration of micron or even nano-scale thin films with heterogeneous substrates. However, if the grinding thinning process or chemical mechanical polishing process is directly used after the wafer is bonded, it may cause the wafer to fall off or even break. Therefore, how to efficiently thin the bonded wafer has become an urgent problem to be solved. Summary of the invention
[0003] In view of the above problems in the prior art, the present application provides a method for thinning a bonded wafer and a heterogeneous film, and the specific technical solutions are as follows:
[0004] In one aspect, the present application provides a method for thinning a bonded wafer, comprising:
[0005] Providing a bonding wafer, the bonding wafer comprising a first wafer and a second wafer, wherein a bonding interface is provided between the first wafer and the second wafer;
[0006] Trimming the edge of the first wafer to form a step structure, wherein the step width of the step structure is a first preset width, and there is a preset distance between the step surface of the step structure and the bonding interface;
[0007] The first wafer is thinned to obtain a bonding layer stacked on the second wafer, the first preset width and the preset distance are related to the thickness of the bonding layer, and the thinning thickness of the thinning process is greater than the step depth of the step structure.
[0008] In a possible implementation manner, the first preset width is 0-1.5 mm.
[0009] In a possible implementation manner, the preset distance is 20-50 μm.
[0010] In a possible implementation manner, the edge of the first wafer has an arc-shaped chamfered area and a platform area,
[0011] In a possible implementation manner, the process of trimming the edge of the first wafer includes:
[0012] The first wafer is trimmed based on a chamfering process, and a chamfering grinding wheel is used to grind from the edge of the first wafer to the inside of the first wafer to a preset depth and a second preset width to form a step structure.
[0013] In a possible implementation manner, the first wafer has an arc-shaped chamfered area and a platform area, the step structure is formed in the platform area, and the width of the arc-shaped chamfered area is less than or equal to the second preset width.
[0014] In a possible implementation manner, the thinning process includes at least one of mechanical grinding and chemical mechanical grinding.
[0015] In a possible implementation manner, the thickness of the bonding layer after the thinning process is 10-40 μm.
[0016] In a possible implementation manner, the bonding strength between the first wafer and the second wafer is greater than or equal to a preset strength, and the preset strength is 0.8-1.2 J / cm 2 .
[0017] In a possible implementation manner, the first wafer and the second wafer satisfy at least one of the following characteristics:
[0018] The thickness of the first wafer is 350-750 μm;
[0019] The material of the first wafer includes at least one of gallium oxide, gallium nitride, III-V compound semiconductors, lithium niobate, lithium tantalate, and silicon carbide;
[0020] The material of the second wafer includes at least one of silicon, silicon oxide, silicon carbide, sapphire and diamond.
[0021] On the other hand, the present application provides a heterogeneous film, which is obtained by thinning a bonded wafer using the thinning method as described above and polishing the thinned bonded wafer.
[0022] Based on the above technical solution, this application has the following beneficial effects:
[0023] The present application forms a step structure on the first wafer, and controls the step width of the step structure to be a first preset width, and a preset distance is provided between the step surface of the step structure and the bonding interface, so that the edge portion of the first wafer can fall off naturally during the formation of the step structure, thereby ensuring the integrity of the first wafer and the corresponding portion of the bonding interface, reducing damage to the first wafer during the trimming process, and avoiding the rupture of the edge portion of the first wafer during the subsequent thinning process, thereby causing stratification or fragmentation inside the first wafer, which is beneficial to improving the efficiency of the thinning process and the yield of the product. In addition, during the thinning process, the thinning thickness is greater than the depth of the step structure, and the step structure can be removed through the thinning process, thereby avoiding the abnormal morphology of the step structure from affecting the formation of the bonding layer, reducing damage to the first wafer during the thinning process, and helping to improve the thinning quality of the bonded wafer and ensure the yield of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0025] Figure 1 : A cross-sectional view of a bonded wafer during a thinning process provided in an embodiment of the present application;
[0026] Figure 2 : A cross-sectional view of a bonded wafer during another thinning process provided by an embodiment of the present application;
[0027] Figure 3 : A cross-sectional view of a bonded wafer during another thinning process provided by an embodiment of the present application;
[0028] Figure 4 : A cross-sectional view of a bonded wafer during another thinning process provided by an embodiment of the present application;
[0029] Figure numerals: 1-first wafer, 2-second wafer, 3-step structure, 4-bonding layer, 5-irregular structure. DETAILED DESCRIPTION
[0030] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0031] It should be noted that in the description of the present application, for the following defined terms, unless a different definition is given in the claims or elsewhere in this specification, these definitions should be applied. All numerical values, whether or not explicitly indicated, are defined herein as being modified by the term "about". The term "about" generally refers to a numerical range that a person of ordinary skill in the art would consider to be equivalent to the stated value to produce substantially the same properties, functions, results, etc. A numerical range indicated by a low value and a high value is defined to include all numerical values included in the numerical range and all subranges included in the numerical range.
[0032] It should be noted that, in the description of the present application, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.
[0033] It should be noted that, in the description of the present application, the meaning of the terms "on", "above", "above", and "above" should be interpreted in the broadest sense, meaning that the description containing these terms is interpreted as "the component can be set on another component in direct contact, or there can be an intermediate component or layer between the components". In addition, for the convenience of description, the present application may also use spatial relative terms such as "under", "below", "under", "on", "above", "above", "lower", "upper", etc. to describe the relationship between an element or component and another element or component shown in the drawings. In addition to the orientations described in the figures, the spatially relative terms are also intended to cover different orientations of the device in use or operation. The device can be oriented in other ways (rotated 90° or in other orientations), and the spatially relative descriptors used in the present application can be interpreted accordingly.
[0034] The term "layer" as used in this application refers to a portion of a material that includes an area with a certain thickness. A layer can extend over the entire underlying or superstructure, or can extend over a local area of the underlying or superstructure. In addition, a layer can be an area of a homogeneous or inhomogeneous continuous structure, whose thickness is less than the thickness of the continuous structure. For example, a layer can be located between the top and bottom surfaces of the continuous structure or between any pair of horizontal planes therebetween. A layer can extend horizontally, vertically and / or along a tapered surface. A layer can include multiple layers.
[0035] It should be understood that the “surface” used in this application, such as the “first surface”, “second surface”, etc., refers to the XY plane of the first wafer 1, etc., and the “thickness direction” refers to the Z direction perpendicular to the XY plane. The “thickness” or “height” mentioned in this application all refer to the Z-direction thickness or Z-direction height.
[0036] The following combination Figure 1-4 A method for thinning a bonded wafer provided in an embodiment of the present application is introduced. This specification provides method operation steps as in the embodiment, but may include more or fewer operation steps based on conventional or non-creative labor. The order of steps listed in the embodiment is only one way of executing the order of many steps and does not represent the only execution order. When the actual preparation method is executed, it can be executed in the order of the method shown in the embodiment or the accompanying drawings or in parallel. The method for thinning a bonded wafer may include S1-S3:
[0037] S1: Reference Figure 1 , providing a bonding wafer, the bonding wafer comprising a first wafer 1 and a second wafer 2, and a bonding interface being provided between the first wafer 1 and the second wafer 2;
[0038] Specifically, step S1 also includes bonding the first wafer 1 and the second wafer 2, and the bonding process used may include at least direct wafer bonding, anodic wafer bonding, adhesive wafer bonding, eutectic wafer bonding, transient liquid phase wafer bonding, metal hot pressing wafer bonding, surface activated wafer bonding and plasma activated bonding, or other processes that can achieve wafer bonding.
[0039] Specifically, the bonding strength between the first wafer 1 and the second wafer 2 is greater than or equal to a preset strength, which is 0.8-1.2 J / cm 2 In this way, if the bonding strength is lower than the preset strength, the wafer may warp or break due to stress concentration during the thinning process, and may also cause the wafer to detach or be damaged. Controlling the bonding strength within the above range is conducive to improving the stability of the bonded wafer.
[0040] Specifically, the thickness of the first wafer 1 is 350-750 μm; it can be understood that the thickness of the first wafer 1 is any point value in 350-775 μm; illustratively, the thickness of the first wafer 1 can be 350 μm, 450 μm, 550 μm, 650 μm, 750 μm, etc. If the thickness of the first wafer 1 is less than 350 μm, the first wafer 1 is easily affected by thermal expansion during wafer bonding, and mechanical failures such as wafer deformation and cracks may occur; if the thickness of the first wafer 1 is greater than 750 μm, the first wafer 1 will generate greater internal stress during the thinning process, which may cause the wafer to break, or may cause defects such as edge collapse and corner collapse during the chamfering process. Controlling the thickness of the first wafer 1 within the above range helps to reduce the internal stress of the wafer and improve the reliability and durability of the bonded wafer. Preferably, the thickness of the first wafer 1 is 350-450 μm.
[0041] In the subsequent thinning process, a step structure 3 is formed through a chamfering process. The step depth of the step structure 3 is related to the thickness of the first wafer 1. If the thickness of the first wafer 1 is larger, the depth of the step structure 3 increases, and then the chamfering depth increases, which may cause the chamfering grinding wheel used in the chamfering process to deform, resulting in abnormal chamfering surface morphology, which is not conducive to the formation of the step structure 3.
[0042] Specifically, the material of the first wafer 1 includes at least one of gallium oxide, gallium nitride, III-V compound semiconductors, lithium niobate, lithium tantalate, and silicon carbide, which can be used to integrate the functional structure of semiconductor devices, so that the first wafer 1 serves as a functional integration layer, which helps to improve the performance of semiconductor devices.
[0043] Specifically, the thickness of the second wafer 2 is 350-750 μm; it can be understood that the thickness of the second wafer 2 is any point value in the range of 350-775 μm; illustratively, the thickness of the second wafer 2 can be 350 μm, 450 μm, 550 μm, 650 μm, 750 μm, etc. Specifically, the thickness of the second wafer 2 can be the same as the thickness of the first wafer 1, or can be different from the thickness of the first wafer 1.
[0044] Specifically, the material of the second wafer 2 includes at least one of silicon, silicon oxide, silicon carbide, sapphire, and diamond, can be used as a substrate layer of a semiconductor device, has good durability and stability, and can be used to integrate functional structures or provide mechanical support.
[0045] S2: Reference Figure 2 , trimming the edge of the first wafer 1 to form a step structure 3, the step width of the step structure 3 is a first preset width, and there is a preset distance between the step surface of the step structure 3 and the bonding interface, and the first preset width and the preset distance are related to the thickness of the bonding layer 4;
[0046] In some embodiments, the edge of the first wafer 1 is trimmed by a chamfering process, and the trimming process includes: providing a chamfering grinding wheel, making the chamfering grinding wheel reach a preset rotation speed, contacting and grinding the working surface of the chamfering grinding wheel with the edge of the first wafer 1, and the chamfering grinding wheel grinds from the edge of the first wafer 1 to the inside of the first wafer 1 to a preset depth and a second preset width to form a step structure 3.
[0047] Specifically, the preset depth of the chamfering wheel grinding is less than the thickness of the first wafer 1. In this way, the chamfering wheel can be prevented from passing through the bonding interface and the second wafer 2. If the grinding depth exceeds the thickness of the first wafer 1, it will cause serious damage to the chamfering wheel, causing the chamfering wheel to deform in a short time, thereby causing abnormal chamfer surface morphology and affecting the subsequent thinning process.
[0048] Specifically, the chamfering grinding wheel is rotated around the first wafer 1 to grind a peripheral edge of the first wafer 1, forming a step structure 3 in the circumferential direction of the first wafer 1, which can effectively remove the arc-shaped chamfer of the first wafer 1 and ensure that no edge collapse or damage occurs when the first wafer 1 is thinned.
[0049] In some embodiments, the first wafer 1 has an arc-shaped chamfered area and a platform area, wherein the platform area corresponds to the bonding interface, the arc-shaped chamfered area is the suspended edge portion of the first wafer 1, and the arc-shaped chamfered area is used to ensure the strength of the wafer during transportation or process flow. The arc-shaped force-bearing area is large and has no edges and corners, so that the wafer is not easily damaged by force during transportation.
[0050] Specifically, the step structure 3 is formed at the edge of the platform area of the first wafer 1. During the formation of the step structure, the arc-shaped chamfer can fall off naturally, so that the area of the upper surface of the platform area is reduced, thereby reducing the contact area between the platform area and the grinding machine during the thinning process, which is beneficial to reducing the mechanical stress on the first wafer 1, avoiding stratification or fragmentation of the first wafer 1 during the thinning process, and is beneficial to improving the integrity of the bonding layer 4.
[0051] Specifically, the second preset width of the chamfering wheel is greater than or equal to the width of the arc chamfer. In this way, during the grinding process of the chamfering wheel, the arc chamfer can be effectively removed to form a step structure 3, thereby avoiding chipping of the arc chamfer area during the wafer thinning process, resulting in stratification or fragmentation inside the first wafer 1, affecting the subsequent thinning process.
[0052] Specifically, the arc-shaped chamfered area can fall off naturally during the trimming process. Since the arc-shaped chamfered area is a suspended part of the edge of the first wafer 1, the arc-shaped chamfered area has no mechanical support. When the chamfering wheel grinds from the edge of the first wafer 1 to the inside of the first wafer 1 to a preset depth and a second preset width, the chamfering wheel continues to apply pressure to the edge of the first wafer 1. The pressure of the chamfering wheel is greater than the mechanical fracture energy of the edge of the first wafer 1 after grinding, causing the arc-shaped chamfered area to fall off. In this way, the arc-shaped chamfer can be effectively removed while avoiding affecting the bonding interface of the bonding wafer. Since the area of the bonding layer is increased, it is used to integrate more semiconductor functional devices.
[0053] In some embodiments, an etching process can be used to trim the edge of the first wafer 1, and the depth and width of the step structure can be controlled by controlling the etching rate and etching time of the etching solution, thereby preparing a step structure 3 with a first preset width, and making the step surface of the step structure 3 have a preset distance from the bonding interface.
[0054] In some embodiments, the first preset width of the step structure 3 is 0-1.5 mm; it can be understood that the first preset width is any point value in the range of 0-1.5 mm; illustratively, the first preset width can be 0.1 mm, 0.3 mm, 0.5 mm, 1 mm, 1.5 mm, etc. In this way, by controlling the first preset width within the above range, the step surface of the step structure 3 can be formed while completely removing the arc chamfer, thereby reducing the area of the upper surface of the platform area, which is conducive to reducing the force on the first wafer 1 during the thinning process, thereby reducing the risk of wafer fragmentation. Preferably, the first preset width is 1-1.5 mm.
[0055] Specifically, the step structure 3 has a step surface parallel to the bonding interface, and the preset distance between the step surface of the step structure 3 and the bonding interface is 20-50 μm; it can be understood that the preset distance is any point value in 20-50 μm; illustratively, the preset distance can be 20 μm, 25 μm, 30 μm, 40 μm, 50 μm, etc. In this way, controlling the preset distance within the above range can reserve part of the thickness for the subsequent thinning process, which is conducive to controlling the thickness of the bonding layer 4 and avoiding damage to the bonding interface caused by the thinning process. Preferably, the preset distance is 40-50 μm.
[0056] In some embodiments, by trimming the edge of the first wafer 1, at least two step structures can be formed. The at least two step structures are beneficial for dispersing the force in the z direction acting on the grinding surface of the first wafer 1, so that the force in the z direction of the grinding and thinning process will be smaller than the mechanical force in the z direction of the grinding and thinning process, thereby reducing the risk of damage or breakage of the wafer.
[0057] Specifically, at least two layers of step structures are distributed in a stepped manner on the edge of the first wafer 1, which can reduce the force on the grinding surface of the wafer. At the same time, the step structure away from the grinding surface can provide mechanical support to prevent cracks on the grinding surface, which is beneficial to improving the quality of wafer surface processing and preventing wafer breakage.
[0058] In some embodiments, the step structure may be in the shape of a vertical step, and it is understood that the slope of the step structure is perpendicular to the step surface. In other embodiments, the step structure may be in the shape of a beveled step structure, and it is understood that there is a preset angle between the slope of the step structure and the step surface, which can effectively reduce the surface area of the platform area, thereby reducing the contact area between the surface of the platform area and the grinding machine, which is beneficial to the force area of the platform area during the grinding process and avoids the risk of wafer damage. It is understood that the shape of the step structure can be determined according to actual needs.
[0059] In some embodiments, the second wafer 2 has a chamfered area and a functional area, and the bonding layer 4 is formed above the functional area. The functional area can be used to integrate a functional structure and can provide mechanical support for the bonding layer 4 .
[0060] Specifically, a chamfered area is formed at the edge of the second wafer 2, and the chamfered area may include but is not limited to a T-shaped chamfer and an R-shaped chamfer, which can be used to prevent the second wafer 2 from being hit during manufacturing or use and causing edge breakage, thereby affecting product yield.
[0061] S3: Reference Figure 3 The first wafer 1 is thinned to obtain a bonding layer 4 stacked on the second wafer 2, the first preset width and the preset distance are related to the thickness of the bonding layer 4, and the thinning thickness of the thinning process is greater than the step depth of the step structure 3.
[0062] Specifically, the thinning process includes at least one of mechanical grinding and chemical mechanical grinding. In this way, the grinding surface of the grinding machine is brought into contact with the upper surface of the first wafer 1, and the first wafer 1 is ground from top to bottom in the thickness direction. During the grinding process, the step structure 3 can be removed to obtain the bonding layer 4. Preferably, chemical mechanical grinding is used to thin the first wafer, which is conducive to reducing scratches generated on the wafer surface during the thinning process, can effectively reduce the heat and mechanical stress applied to the wafer during the thinning process, and can accurately grind to the required thickness.
[0063] Specifically, the thickness of the bonding layer 4 after the thinning process is 10-40μm; it can be understood that the thickness of the bonding layer 4 after the thinning process is any point value in the range of 10-40μm; illustratively, the thickness of the bonding layer 4 after the thinning process can be 10μm, 20μm, 30μm, 35μm, 40μm, etc. If the thickness of the bonding layer 4 after the thinning process is less than 10μm, the bonding layer 4 is too thin, the mechanical strength of the bonding layer 4 is reduced, and it is not conducive to integrating functional structures on the bonding layer 4; if the thickness of the bonding layer 4 after the thinning process is greater than 40μm, the thickness of the bonding layer 4 is too large, resulting in an increase in the thermal resistance of the bonded wafer, thereby causing a decrease in thermal performance, affecting the long-term stability and life of the semiconductor device integrated by the bonded wafer.
[0064] Specifically, the thinning thickness of the thinning treatment is greater than the step depth of the step structure 3, so that the thickness of the bonding layer 4 after the thinning treatment is less than the preset distance between the step surface and the bonding interface. In this way, the step structure 3 can be removed through the thinning process to obtain a flat surface of the bonding layer 4, thereby avoiding the abnormal morphology of the step structure 3 from affecting the bonding layer 4.
[0065] For example, refer to Figure 4 During the trimming process, the chamfering wheel may damage the working surface of the chamfering wheel when grinding the edge of the first wafer 1. The damaged chamfering wheel will leave corresponding damage marks on the first wafer 1 during the subsequent trimming process, or an irregular structure 5 may be formed on the first wafer 1 due to an abnormal chamfering process. When the thickness of the thinning process is greater than the chamfering depth, the irregular structure 5 can be completely removed during the thinning process to prevent the irregular structure 5 from affecting the flatness and strength of the bonding layer 4, which is beneficial to improving the yield of the wafer.
[0066] To sum up, the above technical scheme forms a step structure 3 on the first wafer 1, controls the step width of the step structure 3 to be a first preset width, and has a preset distance between the step surface of the step structure 3 and the bonding interface, so that the arc-shaped chamfer of the first wafer 1 can fall off naturally during the formation of the step structure 3, thereby ensuring the integrity of the first wafer 1 and reducing damage to the first wafer 1 during the trimming process. At the same time, it avoids the breakage of the arc-shaped chamfer in the subsequent thinning process, which further causes stratification or fragmentation inside the first wafer 1, which is beneficial to improving the efficiency of the thinning process and the yield of the product.
[0067] Moreover, during the thinning process, the thinning thickness is greater than the depth of the step structure 3, and the step structure 3 can be removed through the thinning process, thereby avoiding the abnormal morphology of the step structure 3 from affecting the formation of the bonding layer 4. The damage to the first wafer 1 during the thinning process can be reduced, which helps to improve the thinning quality of the bonded wafer and ensure the yield of the product.
[0068] The embodiment of the present application also provides a heterogeneous film, which is thinned by the above-mentioned thinning method on the bonded wafer, and the upper surface of the thinned bonding layer is polished to obtain the heterogeneous film. This is conducive to forming a heterogeneous film with a stable structure.
[0069] Specifically, the polishing method includes but is not limited to chemical mechanical polishing, mechanical polishing, ion beam polishing, etc., which can effectively remove the rough layer and excess material on the surface of the bonding layer 4, ensure that the surface of the bonding layer 4 has high flatness, and reduce damage to the surface of the bonding layer 4.
[0070] Specifically, the heterogeneous film includes a bonding layer and a substrate layer. The substrate layer has a chamfered structure, which can effectively prevent the concentration of thermal stress at the edge of the substrate layer, thereby causing interlayer dislocation or defects.
[0071] An embodiment of the present application also provides a semiconductor device, comprising the above-mentioned heterogeneous film.
[0072] The following is an introduction to the specific embodiments of the present application in conjunction with the above-mentioned thinning method of the bonded wafer and the heterogeneous film. The following embodiments describe the technical solution of the present application in more detail, and these embodiments are only for illustrative purposes, because various modifications and changes within the scope of the disclosure of the present application are obvious to those skilled in the art. The reagents used in the embodiments can be obtained commercially or synthesized according to conventional methods, and can be used directly without further treatment, and the instruments and devices used in the embodiments can be obtained commercially.
[0073] Example 1
[0074] This embodiment provides a method for thinning a bonded wafer and a heterogeneous film. The method for thinning a bonded wafer includes:
[0075] 1. Provide a bonding wafer, the bonding wafer comprising a first wafer 1 and a second wafer 2, a bonding interface being provided between the first wafer 1 and the second wafer 2, and a bonding strength between the first wafer 1 and the second wafer 2 being 0.8 J / cm 2 The thickness of the first wafer 1 is 350 μm, and the thickness of the second wafer 2 is 350 μm, which is conducive to forming a step structure 3 in the subsequent thinning process and avoiding delamination or fragmentation inside the first wafer 1.
[0076] Specifically, the first wafer 1 has an arc-shaped chamfered area and a platform area, wherein the platform area corresponds to the bonding interface, and the arc-shaped chamfered area is a suspended edge portion of the first wafer 1 .
[0077] 2. Trim the edge of the first wafer 1. Based on the chamfering process, use a chamfering grinding wheel to chamfer the edge of the first wafer 1, make the chamfering grinding wheel reach a preset rotation speed, make the working surface of the chamfering grinding wheel contact and grind the edge of the first wafer 1, and the chamfering grinding wheel grinds from the edge of the first wafer 1 to the inside of the first wafer 1 to a preset depth and a second preset width to form a step structure 3.
[0078] Specifically, the step width of the step structure 3 is a first preset width, and there is a preset distance between the step surface of the step structure 3 and the bonding interface. The first preset width and the preset distance are related to the thickness of the bonding layer 4 .
[0079] Specifically, the preset depth of the chamfering wheel grinding is 300-320 μm, the preset distance between the step surface and the bonding interface is 20-50 μm, the second preset depth of the chamfering wheel grinding is the sum of the step width and the arc chamfer width, and the step width of the step structure 3 is 1-1.5 mm. In this way, in the process of forming the step structure 3, the arc chamfer can fall off naturally.
[0080] 3. The first wafer 1 is thinned by chemical mechanical polishing to obtain a bonding layer 4 stacked on the second wafer 2. The thinning thickness of the thinning process is greater than the step depth of the step structure 3. The step structure 3 can be removed by the thinning process to obtain a smooth surface of the bonding layer 4, thereby avoiding the abnormal morphology of the step structure 3 from affecting the bonding layer 4. Specifically, the thickness of the bonding layer 4 is 10-40μm.
[0081] 4. Polish the thinned bonded wafer to obtain a heterogeneous thin film.
[0082] The thinning method provided in this embodiment can effectively control the thickness of the bonding layer to avoid wafer damage or delamination during the thinning process. By controlling the preset depth and the first preset width of the step structure, the influence of the thinning process on the bonding interface can be effectively avoided, which is conducive to the preparation of a heterogeneous film with good performance.
[0083] The above description has fully disclosed the specific implementation methods of the present application. It should be pointed out that any changes made by technicians familiar with the field to the specific implementation methods of the present application do not deviate from the scope of the claims of the present application. Accordingly, the scope of the claims of the present application is not limited to the above specific implementation methods.
Claims
1. A method for thinning a bonded wafer, characterized in that: include: Providing a bonding wafer, the bonding wafer comprising a first wafer and a second wafer, wherein a bonding interface is provided between the first wafer and the second wafer; Trimming the edge of the first wafer to form a step structure, wherein the step width of the step structure is a first preset width, and there is a preset distance between the step surface of the step structure and the bonding interface; The first wafer is thinned to obtain a bonding layer stacked on the second wafer, the first preset width and the preset distance are related to the thickness of the bonding layer, and the thinning thickness of the thinning process is greater than the step depth of the step structure.
2. The method for thinning a bonded wafer according to claim 1, characterized in that: The first preset width is 0-1.5 mm.
3. The method for thinning a bonded wafer according to claim 1, characterized in that: The preset distance is 20-50 μm.
4. The method for thinning a bonded wafer according to claim 1, characterized in that: The process of trimming the edge of the first wafer comprises: The first wafer is trimmed based on a chamfering process, and a chamfering grinding wheel is used to grind from the edge of the first wafer to the inside of the first wafer to a preset depth and a second preset width to form a step structure.
5. The method for thinning a bonded wafer according to claim 4, characterized in that: The first wafer has an arc-shaped chamfered area and a platform area, the step structure is formed in the platform area, and the width of the arc-shaped chamfered area is less than or equal to the second preset width.
6. The method for thinning a bonded wafer according to any one of claims 1 to 4, characterized in that: The thinning process includes at least one of mechanical polishing and chemical mechanical polishing.
7. The method for thinning a bonded wafer according to any one of claims 1 to 4, characterized in that: The thickness of the bonding layer after the thinning process is 10-40 μm.
8. The method for thinning a bonded wafer according to any one of claims 1 to 4, characterized in that: The bonding strength between the first wafer and the second wafer is greater than or equal to a preset strength, and the preset strength is 0.8-1.2 J / cm 2 .
9. The method for thinning a bonded wafer according to any one of claims 1 to 4, characterized in that: The first wafer and the second wafer satisfy at least one of the following characteristics: The thickness of the first wafer is 350-750 μm; The material of the first wafer includes at least one of gallium oxide, gallium nitride, III-V compound semiconductors, lithium niobate, lithium tantalate, and silicon carbide; The material of the second wafer includes at least one of silicon, silicon oxide, silicon carbide, sapphire and diamond.
10. A heterogeneous film, characterized in that: The bonded wafer is thinned by the thinning method described in any one of claims 1 to 9, and the thinned bonded wafer is polished to obtain the heterogeneous thin film.