Heat treatment method and heat treatment device

Abstract

The present invention addresses the problem of providing a heat treatment method and a heat treatment device capable of easily setting heat treatment conditions. After a carrier accommodating a plurality of semiconductor wafers constituting a lot is carried into a heat treatment apparatus, a process recipe in which a processing sequence and processing conditions are specified is set for each semiconductor wafer. Next, the reflectance of each semiconductor wafer accommodated in the carrier is measured. On the basis of the set process recipe and the measured reflectivity of the semiconductor wafer, the predicted temperature of the semiconductor wafer during the flash heat treatment is estimated, and the estimated predicted temperature is displayed. Since the processing condition can be set using the displayed predicted temperature as a reference, the condition setting of the heat treatment condition can be easily performed.

Description

[0001] Information about divisional applications

[0002] This case is a divisional application. The parent case of the divisional application is an invention patent application with application date of December 11, 2019, application number 201911266333.8, and invention name “Heat treatment method and heat treatment device”. Technical Field

[0003] The present invention relates to a heat treatment method and a heat treatment apparatus for heating a thin plate-shaped precision electronic substrate (hereinafter referred to as a "substrate") such as a semiconductor wafer by irradiating the substrate with light. Background Art

[0004] In the manufacturing process of semiconductor devices, flash lamp annealing (FLA) for heating semiconductor wafers in a very short time has attracted attention. Flash lamp annealing is a heat treatment technology that uses a xenon flash lamp (hereinafter referred to as a "flash lamp" when it is abbreviated to refer to a xenon flash lamp) to irradiate the surface of a semiconductor wafer with a flash light, thereby raising the temperature of only the surface of the semiconductor wafer in a very short time (several milliseconds or less).

[0005] The radiation spectrum of a xenon flash lamp is distributed from the ultraviolet region to the near-infrared region, and the wavelength is shorter than that of a conventional halogen lamp, which is roughly consistent with the fundamental absorption band of a silicon semiconductor wafer. Therefore, when a semiconductor wafer is irradiated with a flash from a xenon flash lamp, less light is transmitted, and the temperature of the semiconductor wafer can be rapidly increased. It is also known that if the flash irradiation is extremely short, less than a few milliseconds, it is possible to selectively increase the temperature only near the surface of the semiconductor wafer.

[0006] This flash lamp annealing is used for processes that require extremely short heating times, and is typically used, for example, for activation of impurities implanted into semiconductor wafers. If a flash lamp is irradiated onto the surface of a semiconductor wafer into which impurities have been implanted by ion implantation, the surface of the semiconductor wafer can be heated to the activation temperature in an extremely short time, and only the impurity activation can be performed without causing the impurities to diffuse deeply.

[0007] Generally, in an apparatus for processing semiconductor wafers, a control unit controls various components of the apparatus according to a process recipe that specifies a processing sequence and processing conditions, thereby performing a desired process. Patent document 1 discloses that in a flash lamp annealing apparatus, a control unit also controls various components of the apparatus based on a process recipe to perform a heat treatment on a semiconductor wafer.

[0008] Therefore, when flash heating a semiconductor wafer, a process recipe for performing an appropriate treatment must be selected and set. Specifically, a process recipe for treatment conditions must be set such that the surface of the semiconductor wafer reaches a target temperature when the flash is irradiated. Conventionally, a process recipe for optimal treatment conditions is set by experimentally performing flash heating on a semiconductor wafer using at least two process recipes, measuring the surface temperature of the semiconductor wafer, and then performing the flash heating on the semiconductor wafer.

[0009] In addition, not limited to flash lamp annealing, in the annealing process of heating semiconductor wafers by light irradiation, the reflectivity of the wafer surface becomes an important parameter. Even if the same intensity of light is irradiated, the semiconductor wafer with high reflectivity will have a lower reaching temperature due to the increase in reflected light. Patent document 2 discloses a technology for measuring the reflectivity of the semiconductor wafer to be processed.

[0010] [Background Technology Literature]

[0011] [Patent Document]

[0012] [Patent Document 1] Japanese Patent Application Publication No. 2009-231652

[0013] [Patent Document 2] Japanese Patent Application Publication No. 2014-045067 Summary of the invention

[0014] [Problems to be solved by the invention]

[0015] However, the conventional process recipe setting method uses trial and error to determine the optimal conditions, so there is a case where multiple process recipes must be used to experimentally perform flash heating treatment on the semiconductor wafer multiple times. In addition, since this method also relies heavily on the experience or skills of the operator, more flash heating treatments must be performed in the case of an unskilled operator.

[0016] In addition, the reflectivity of the semiconductor wafer depends on the film type or pattern on the wafer surface. In addition, a process recipe that specifies the processing sequence and processing conditions is set according to the film type or pattern of the semiconductor wafer to be processed, and the semiconductor wafer is annealed according to the process recipe.

[0017] However, sometimes a semiconductor wafer formed with a film type different from the predetermined film type is mistakenly carried into the annealing device. Alternatively, sometimes a semiconductor wafer that has undergone abnormal film forming treatment although the film type is the same as the predetermined film type is carried into the annealing device. In this case, the surface reflectivity of the semiconductor wafer is different from the predetermined one, and the desired processing result cannot be obtained.

[0018] The present invention has been made in view of the above-mentioned problems, and a first object of the present invention is to provide a heat treatment method and a heat treatment apparatus that can easily set the heat treatment conditions.

[0019] In addition, a second object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of reliably detecting an abnormal substrate.

[0020] [Technical means to solve the problem]

[0021] In order to solve the above-mentioned problem, the invention of technical solution 1 is a heat treatment method, which heats the substrate by irradiating a flash on the substrate, and is characterized in that it comprises: a process recipe setting step, which sets a process recipe that specifies a processing sequence and processing conditions for the substrate to be processed; a reflectivity measurement step, which measures the reflectivity of the substrate; a temperature estimation step, which estimates the temperature of the substrate during heat treatment based on the process recipe set in the process recipe setting step and the reflectivity measured in the reflectivity measurement step; and a display step, which displays the temperature of the substrate estimated in the temperature estimation step.

[0022] In addition, the invention of technical solution 2 is a heat treatment method that heats a substrate by irradiating a flash on the substrate, and is characterized in that it comprises: a reflectivity measuring step for measuring the reflectivity of a substrate to be processed; an extraction step for extracting a process recipe and a substrate temperature corresponding to the reflectivity measured in the reflectivity measuring step from a database that establishes a correlation between a process recipe that specifies the reflectivity, a processing sequence and processing conditions, and the temperature of the substrate during heat treatment; and a display step for displaying the process recipe and the substrate temperature extracted in the extraction step.

[0023] In addition, the invention of Technical Solution 3 is based on the heat treatment method of the invention of Technical Solution 2, characterized in that it also includes a setting step, which sets the processing conditions of the substrate to be processed based on the process recipe extracted in the extraction step and the temperature of the substrate.

[0024] In addition, the invention of technical solution 4 is a heat treatment method, which heats the substrate by irradiating a flash on the substrate, and is characterized in that it comprises: a reflectivity measuring step, which measures the reflectivity of the substrate to be processed; a processing condition estimating step, which estimates the processing conditions required for the substrate to reach the target temperature during heat treatment based on the reflectivity measured in the reflectivity measuring step; and a display step, which displays the processing conditions estimated in the processing condition estimating step.

[0025] In addition, the invention of technical solution 5 is based on the heat treatment method of the invention of technical solution 4, characterized in that it also includes a setting step, which sets a process recipe for the substrate that specifies the processing conditions estimated in the processing condition estimation step.

[0026] In addition, the invention of technical solution 6 is a heat treatment method, which heats a substrate by irradiating light onto the substrate, and is characterized in that it comprises: an input process for inputting the expected reflectivity of the substrate to be processed; a reflectivity measurement process for measuring the reflectivity of the substrate; a comparison process for comparing the reflectivity measured in the reflectivity measurement process with the expected reflectivity; and a warning process for issuing a warning when the reflectivity measured in the reflectivity measurement process deviates from the expected reflectivity beyond a specific range.

[0027] In addition, the invention of technical solution 7 is a heat treatment device that heats a substrate by irradiating a flash onto the substrate, and is characterized in that it comprises: a chamber that accommodates the substrate to be processed; a flash lamp that irradiates a flash onto the substrate accommodated in the chamber; an input unit that accepts the setting of a process recipe that specifies the processing sequence and processing conditions for the substrate; a reflectivity measuring unit that measures the reflectivity of the substrate; a temperature estimation unit that estimates the temperature of the substrate during heat treatment based on the process recipe set from the input unit and the reflectivity measured by the reflectivity measuring unit; and a display unit that displays the temperature of the substrate estimated by the temperature estimation unit.

[0028] In addition, the invention of technical solution 8 is a heat treatment device that heats a substrate by irradiating a flash on the substrate, and is characterized in that it comprises: a chamber that accommodates the substrate to be processed; a flash lamp that irradiates a flash on the substrate accommodated in the chamber; a reflectivity measuring unit that measures the reflectivity of the substrate; a storage unit that stores a database that associates a process recipe that specifies the reflectivity, processing sequence and processing conditions, and the temperature of the substrate during heat treatment; an extraction unit that extracts from the database the process recipe and the temperature of the substrate corresponding to the reflectivity measured by the reflectivity measuring unit; and a display unit that displays the process recipe and the temperature of the substrate extracted by the extraction unit.

[0029] In addition, the invention of technical solution 9 is a heat treatment device based on the invention of technical solution 8, characterized in that it also includes a setting unit, which sets the processing conditions of the substrate to be processed based on the process recipe extracted by the extraction unit and the temperature of the substrate.

[0030] In addition, the invention of technical solution 10 is a heat treatment device that heats a substrate by irradiating a flash onto the substrate, and is characterized in that it comprises: a chamber that accommodates the substrate to be processed; a flash lamp that irradiates a flash onto the substrate accommodated in the chamber; a reflectivity measuring unit that measures the reflectivity of the substrate; a processing condition estimation unit that estimates the processing conditions required for the substrate to reach a target temperature during heat treatment based on the reflectivity measured by the reflectivity measuring unit; and a display unit that displays the processing conditions estimated by the processing condition estimation unit.

[0031] In addition, the invention of technical solution 11 is based on the heat treatment device of the invention of technical solution 10, characterized in that it also includes a setting unit, which sets a process recipe for the substrate that specifies the processing conditions estimated by the processing condition estimation unit.

[0032] In addition, the invention of technical solution 12 is a heat treatment device that heats a substrate by irradiating light onto the substrate, and is characterized in that it comprises: a chamber that accommodates the substrate to be processed; a light irradiation unit that irradiates light onto the substrate accommodated in the chamber; an input unit that accepts an input of an expected reflectivity of the substrate; a reflectivity measuring unit that measures the reflectivity of the substrate; a comparison unit that compares the reflectivity measured in the reflectivity measuring unit with the expected reflectivity; and a warning unit that issues a warning when the reflectivity measured in the reflectivity measuring unit deviates from the expected reflectivity beyond a specific range.

[0033] [Effects of the Invention]

[0034] According to the invention of technical solution 1, since the temperature of the substrate during heat treatment is estimated and displayed based on the process recipe set in the process recipe setting step and the reflectivity measured in the reflectivity measurement step, the predicted temperature can be used as a reference to set the processing conditions, and the condition setting of the heat treatment conditions can be easily performed.

[0035] According to the invention of Technical Solution 2 and Technical Solution 3, since the process recipe and substrate temperature corresponding to the measured reflectivity are extracted from the database and displayed, the processing conditions can be set based on past performance, and the heat treatment conditions can be easily set.

[0036] According to the invention of Technical Solution 4 and Technical Solution 5, since the processing conditions required for the substrate to reach the target temperature during heat treatment are estimated based on the reflectivity measured in the reflectivity measurement process and then displayed, the processing conditions obtained by calculation processing can be set according to the actually measured reflectivity, and the heat treatment conditions can be easily set.

[0037] According to the invention of claim 6, since a warning is issued when the reflectance measured in the reflectance measuring step exceeds a specific range from the expected reflectance, an abnormal substrate can be detected reliably.

[0038] According to the invention of technical solution 7, since the temperature of the substrate during heat treatment is estimated based on the process recipe set from the input unit and the reflectivity measured by the reflectivity measuring unit and then displayed on the display unit, the predicted temperature can be used as a reference to set the processing conditions, and the heat treatment conditions can be easily set.

[0039] According to the invention of technical solutions 8 and 9, since the process recipe and the temperature of the substrate corresponding to the reflectivity measured by the reflectivity measuring unit are extracted from the database and displayed on the display unit, the processing conditions can be set based on past performance, and the condition setting of the heat treatment conditions can be easily performed.

[0040] According to the invention of technical solutions 10 and 11, since the processing conditions required for the substrate to reach the target temperature during heat treatment are estimated based on the reflectivity measured by the reflectivity measuring unit and then displayed, the processing conditions obtained by calculation processing can be set according to the actually measured reflectivity, and the heat treatment conditions can be easily set.

[0041] According to the invention of claim 12, since a warning is issued when the reflectivity measured by the reflectivity measuring unit deviates from the expected reflectivity beyond a specific range, an abnormal substrate can be detected reliably. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a top view showing the heat treatment apparatus of the present invention.

[0043] Figure 2 yes Figure 1 Front view of the heat treatment device.

[0044] Figure 3 It is a longitudinal sectional view showing the structure of the heat treatment part.

[0045] Figure 4 It is a perspective view showing the overall appearance of the holding portion.

[0046] Figure 5 This is a top view of the base.

[0047] Figure 6 is a cross-sectional view of the base.

[0048] Figure 7 It is a top view of the transfer mechanism.

[0049] Figure 8 It is a side view of the transfer mechanism.

[0050] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps.

[0051] Fig.10 It is a diagram showing the configuration of a reflectance measuring unit and a control unit.

[0052] Fig.11 This is a flowchart showing the procedure of estimating the predicted reaching temperature of the semiconductor wafer in the first embodiment.

[0053] Fig.12 A diagram showing an example of a display screen displayed on the display unit.

[0054] Fig.13 This is a block diagram showing the configuration of a control unit according to the second embodiment.

[0055] Fig.14 This is a flowchart showing the procedure for obtaining the predicted reaching temperature of the semiconductor wafer in the second embodiment.

[0056] Fig.15 This is a block diagram showing the configuration of a control unit according to the third embodiment.

[0057] Fig.16 This is a flowchart showing the procedure for setting processing conditions for a semiconductor wafer in the third embodiment.

[0058] Fig.17 It is a diagram showing the configuration of a reflectance measuring unit and a control unit according to the fourth embodiment.

[0059] Fig.18 This is a flowchart showing the procedure of a semiconductor wafer inspection method based on reflectivity in the fourth embodiment.

[0060] Fig.19 It is a diagram showing an example of a display screen displayed on the display unit in the fourth embodiment. DETAILED DESCRIPTION

[0061] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0062] <First Embodiment>

[0063] First, the overall structure of the heat treatment apparatus of the present invention will be described. Figure 1 is a top view showing a heat treatment apparatus 100 of the present invention, Figure 2is a front view thereof. The heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a circular plate-shaped semiconductor wafer W as a substrate with a flash to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. Impurities are injected into the semiconductor wafer W before being transported into the heat treatment apparatus 100, and the injected impurities are activated by the heat treatment of the heat treatment apparatus 100. In addition, Figure 1 In the following figures, the size or number of each part is exaggerated or simplified as needed for easy understanding. Figure 1 to Figure 3 In each of the drawings, an XYZ orthogonal coordinate system is indicated in which the Z-axis direction is the vertical direction and the XY plane is the horizontal plane in order to make their directional relationship clear.

[0064] like Figure 1 and Figure 2 As shown, the heat treatment apparatus 100 includes: a transfer unit 101 for transferring an unprocessed semiconductor wafer W from outside into the apparatus and transferring a processed semiconductor wafer W out of the apparatus; an alignment unit 230 for positioning the unprocessed semiconductor wafer W; two cooling units 130 and 140 for cooling the semiconductor wafer W after the heat treatment; a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafer W; and a transfer robot 150 for transferring the semiconductor wafer W between the cooling units 130 and 140 and the heat treatment unit 160. In addition, the heat treatment apparatus 100 includes a control unit 3 for controlling the motion mechanisms provided in the above-mentioned processing units and the transfer robot 150 to perform flash heat treatment on the semiconductor wafer W.

[0065] The transfer and conveying unit 101 includes a load port 110 for arranging and placing a plurality of carriers C (two in this embodiment) and a transfer robot 120 for taking out unprocessed semiconductor wafers W from each carrier C and storing processed semiconductor wafers W in each carrier C. The carrier C containing the unprocessed semiconductor wafers W is placed on the load port 110 after being transported by an unmanned transport vehicle (AGV, OHT) or the like, and the carrier C containing the processed semiconductor wafers W is taken out from the load port 110 by the unmanned transport vehicle.

[0066] In addition, in the load port 110, the carrier C can be configured as follows: Figure 2The carrier C is lifted and lowered as shown by the arrow CU so that the transfer robot 120 can take and place any semiconductor wafer W on the carrier C. In addition, as a form of the carrier C, in addition to a FOUP (front opening unified pod) that stores semiconductor wafers W in a closed space, it can also be a SMIF (Standard Mechanical Inter Face) box or an OC (open cassette) that exposes the stored semiconductor wafers W to the external air.

[0067] In addition, the transfer robot 120 can perform the following operations: Figure 1 The handover robot 120 performs the sliding movement shown by the arrow 120S, the rotation movement shown by the arrow 120R, and the lifting movement. Thus, the delivery robot 120 takes and places the semiconductor wafer W on the two carriers C, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130, 140. The taking and placing of the semiconductor wafer W on the carrier C by the delivery robot 120 is performed by the sliding movement of the hand 121 and the lifting movement of the carrier C. In addition, the delivery robot 120 delivers the semiconductor wafer W to the alignment unit 230 or the cooling unit 130, 140 by the sliding movement of the hand 121 and the lifting movement of the delivery robot 120.

[0068] The alignment unit 230 is connected to the side of the transfer unit 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane to face a direction suitable for flash heating. The alignment unit 230 is configured by providing the following mechanism inside an alignment chamber 231 made of an aluminum alloy shell: a mechanism that supports the semiconductor wafer W in a horizontal posture and rotates it ( Fig.10 The alignment chamber 231 includes a rotation support 237, a rotation motor 238, and a mechanism for optically detecting a groove or an orientation flat formed on the peripheral portion of the semiconductor wafer W. In addition, the alignment chamber 231 is provided with a reflectivity measuring unit 232 for measuring the reflectivity of the surface of the semiconductor wafer W supported therein. The reflectivity measuring unit 232 irradiates light to the surface of the semiconductor wafer W, receives reflected light reflected from the surface, and measures the reflectivity of the surface of the semiconductor wafer W based on the intensity of the reflected light.

[0069] The semiconductor wafer W is delivered to the alignment section 230 by the delivery robot 120. The semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 231 in a manner in which the center of the wafer is located at a specific position. In the alignment section 230, the semiconductor wafer W is rotated around the vertical axis with the center of the semiconductor wafer W received from the transfer and conveying section 101 as the rotation center, and the direction of the semiconductor wafer W is adjusted by optically detecting the grooves, etc. In addition, the reflectivity measuring section 232 measures the reflectivity of the surface of the semiconductor wafer W. The semiconductor wafer W whose direction has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.

[0070] As a transfer space for semiconductor wafers W using the transfer robot 150, a transfer chamber 170 is provided to accommodate the transfer robot 150. The transfer chamber 170 is connected in three directions to the processing chamber 6 of the heat treatment unit 160, the first cooling chamber 131 of the cooling unit 130, and the second cooling chamber 141 of the cooling unit 140.

[0071] The heat treatment unit 160 as a main part of the heat treatment apparatus 100 is a substrate processing unit that performs flash heating processing by irradiating flash light from a xenon flash lamp FL to the preheated semiconductor wafer W. The configuration of the heat treatment unit 160 will be described below.

[0072] The two cooling units 130 and 140 have substantially the same structure. The cooling units 130 and 140 are respectively provided with a metal cooling plate and a quartz plate placed on the upper surface of the cooling plate in the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy shells (both are omitted in the figure). The temperature of the cooling plate is adjusted to room temperature (about 23° C.) by a Peltier element or constant temperature water circulation. The semiconductor wafer W subjected to flash heat treatment by the heat treatment unit 160 is moved into the first cooling chamber 131 or the second cooling chamber 141 and placed on the quartz plate and then cooled.

[0073] The first cooling chamber 131 and the second cooling chamber 141 are both located between the transfer and conveying unit 101 and the transport chamber 170, and are connected to both the transfer and conveying unit 101 and the transport chamber 170. Two openings are formed in the first cooling chamber 131 and the second cooling chamber 141 for carrying in and out the semiconductor wafer W. Of the two openings of the first cooling chamber 131, the opening connected to the transfer and conveying unit 101 can be opened and closed by a gate valve 181. On the other hand, the opening of the first cooling chamber 131 connected to the transport chamber 170 can be opened and closed by a gate valve 183. That is, the first cooling chamber 131 is connected to the transfer and conveying unit 101 via the gate valve 181, and the first cooling chamber 131 is connected to the transport chamber 170 via the gate valve 183.

[0074] When the semiconductor wafer W is transferred between the transfer conveyor 101 and the first cooling chamber 131, the gate valve 181 is opened. When the semiconductor wafer W is transferred between the first cooling chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the interior of the first cooling chamber 131 becomes a closed space.

[0075] In addition, of the two openings of the second cooling chamber 141, the opening connected to the transfer and conveying unit 101 can be opened and closed by the gate valve 182. On the other hand, the opening of the second cooling chamber 141 connected to the transfer chamber 170 can be opened and closed by the gate valve 184. That is, the second cooling chamber 141 is connected to the transfer and conveying unit 101 via the gate valve 182, and the second cooling chamber 141 is connected to the transfer chamber 170 via the gate valve 184.

[0076] When the semiconductor wafer W is transferred between the transfer conveyor 101 and the second cooling chamber 141, the gate valve 182 is opened. When the semiconductor wafer W is transferred between the second cooling chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valves 182 and 184 are closed, the interior of the second cooling chamber 141 becomes a closed space.

[0077] Furthermore, the cooling units 130 and 140 respectively include a gas supply mechanism for supplying clean nitrogen gas to the first cooling chamber 131 and the second cooling chamber 141 and an exhaust mechanism for exhausting the gas in the chamber. These gas supply mechanisms and exhaust mechanisms can also switch the flow rates into two stages.

[0078] The transport robot 150 disposed in the transport chamber 170 can rotate as indicated by arrow 150R with the axis along the vertical direction as the center. The transport robot 150 has two link mechanisms including a plurality of arm segments, and transport hands 151a and 151b for holding the semiconductor wafer W are respectively disposed at the front ends of the two link mechanisms. These transport hands 151a and 151b are arranged at a specific interval up and down, and can slide and move linearly in the same horizontal direction independently through the link mechanisms. In addition, the transport robot 150 moves the two transport hands 151a and 151b up and down while maintaining a specific interval by lifting and lowering the base on which the two link mechanisms are disposed.

[0079] When the transfer robot 150 transfers (places) the semiconductor wafer W to the first cooling chamber 131, the second cooling chamber 141, or the processing chamber 6 of the heat treatment unit 160 as a transfer object, first, the two transfer hands 151a and 151b are rotated so as to face the transfer object, and then (or during the rotation) they are moved up and down so that any one of the transfer hands is at a height to transfer the semiconductor wafer W to the transfer object. Then, the transfer hand 151a (151b) is slid and moved linearly in the horizontal direction to transfer the semiconductor wafer W to the transfer object.

[0080] The semiconductor wafer W of the transfer robot 150 and the delivery robot 120 can be delivered via the cooling units 130 and 140. That is, the first cooling chamber 131 of the cooling unit 130 and the second cooling chamber 141 of the cooling unit 140 also function as a passage for delivering the semiconductor wafer W between the transfer robot 150 and the delivery robot 120. Specifically, the semiconductor wafer W is delivered by the transfer robot 150 or the delivery robot 120 to the first cooling chamber 131 or the second cooling chamber 141, and then received by the other. The transfer robot 150 and the delivery robot 120 constitute a transfer mechanism for transferring the semiconductor wafer W from the carrier C to the heat treatment unit 160.

[0081] As described above, gate valves 181 and 182 are provided between the first cooling chamber 131 and the second cooling chamber 141 and the transfer and conveying section 101, respectively. In addition, gate valves 183 and 184 are provided between the transfer chamber 170 and the first cooling chamber 131 and the second cooling chamber 141, respectively. Furthermore, gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the heat treatment section 160. When the semiconductor wafer W is transferred in the heat treatment apparatus 100, these gate valves are opened and closed as appropriate. In addition, nitrogen gas is also supplied from the gas supply section to the transfer chamber 170 and the alignment chamber 231, and the gas inside the transfer chamber 170 and the alignment chamber 231 is exhausted through the exhaust section (both are omitted in the figure).

[0082] Next, the configuration of the heat treatment unit 160 will be described. Figure 3 1 is a longitudinal sectional view showing the structure of the heat treatment unit 160. The heat treatment unit 160 includes: a processing chamber 6 for accommodating a semiconductor wafer W for heat treatment; a flash lamp chamber 5 for housing a plurality of flash lamps FL; and a halogen lamp chamber 4 for housing a plurality of halogen lamps HL. The flash lamp chamber 5 is provided on the upper side of the processing chamber 6, and the halogen lamp chamber 4 is provided on the lower side. In addition, the heat treatment unit 160 includes: a holding unit 7 for holding the semiconductor wafer W in a horizontal position inside the processing chamber 6; and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding unit 7 and the transfer robot 150.

[0083] The processing chamber 6 is formed by installing quartz chamber windows on the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 has a generally cylindrical shape with upper and lower openings, and an upper chamber window 63 is installed and closed at the upper opening, and a lower chamber window 64 is installed and closed at the lower opening. The upper chamber window 63 constituting the top of the processing chamber 6 is a disk-shaped component formed of quartz, and functions as a quartz window that allows the flash emitted from the flash lamp FL to pass into the processing chamber 6. In addition, the lower chamber window 64 constituting the bottom of the processing chamber 6 is also a disk-shaped component formed of quartz, and functions as a quartz window that allows the light from the halogen lamp HL to pass into the processing chamber 6.

[0084] In addition, a reflection ring 68 is installed on the upper part of the wall surface on the inner side of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. The reflection rings 68 and 69 are both formed in a circular ring shape. The upper reflection ring 68 is installed by being embedded from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by being embedded from the lower side of the chamber side portion 61 and fixed with screws not shown in the figure. In other words, the reflection rings 68 and 69 are both installed on the chamber side portion 61 in a freely loadable and detachable manner. The inner space of the processing chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65.

[0085] By installing the reflection rings 68 and 69 on the chamber side portion 61, a recessed portion 62 is formed on the inner wall surface of the processing chamber 6. That is, the recessed portion 62 is formed to be surrounded by the central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not installed, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. The recessed portion 62 is formed in a circular ring shape along the horizontal direction on the inner wall surface of the processing chamber 6, and surrounds the holding portion 7 holding the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (e.g., stainless steel) having excellent strength and heat resistance.

[0086] In addition, a transport opening (furnace port) 66 for carrying in and out the semiconductor wafer W relative to the processing chamber 6 is formed on the chamber side 61. The transport opening 66 can be opened and closed by the gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, the semiconductor wafer W can be carried into the heat treatment space 65 from the transport opening 66 through the recess 62, and the semiconductor wafer W can be carried out from the heat treatment space 65. In addition, if the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.

[0087] In addition, a gas supply hole 81 is formed on the upper part of the inner wall of the processing chamber 6 to supply the processing gas to the heat treatment space 65. The gas supply hole 81 is formed and arranged at a position higher than the recess 62, and can also be arranged on the reflection ring 68. The gas supply hole 81 is connected to the gas supply pipe 83 via the buffer space 82 formed in an annular shape inside the side wall of the processing chamber 6. The gas supply pipe 83 is connected to the processing gas supply source 85. In addition, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. If the valve 84 is opened, the processing gas is transported from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows in a diffused manner in the buffer space 82 where the fluid resistance is smaller than that of the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. As the processing gas, an inert gas such as nitrogen (N2) or a reactive gas such as hydrogen (H2) or ammonia (NH3) (nitrogen in this embodiment) can be used.

[0088] On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the processing chamber 6. The gas exhaust hole 86 is formed and arranged at a lower position than the recess 62, and can also be arranged at the reflection ring 69. The gas exhaust hole 86 is connected to the gas exhaust pipe 88 via the buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6. The gas exhaust pipe 88 is connected to the exhaust mechanism 190. In addition, a valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. If the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88. In addition, the gas supply hole 81 and the gas exhaust hole 86 can be arranged in a plurality along the circumferential direction of the processing chamber 6, or can be a slit-shaped hole. In addition, the processing gas supply source 85 and the exhaust mechanism 190 can be a mechanism arranged in the heat treatment device 100, or a facility of a factory for setting the heat treatment device 100.

[0089] A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. When the valve 192 is opened, the gas in the processing chamber 6 is exhausted through the transfer opening 66.

[0090] Figure 4 : is a perspective view showing the overall appearance of the holding part 7. The holding part 7 is composed of a base ring 71, a connecting part 72 and a base 74. The base ring 71, the connecting part 72 and the base 74 are all formed of quartz. That is, the entire holding part 7 is formed of quartz.

[0091] The base ring 71 is a quartz component in an arc shape with a portion of the circular ring missing. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described below and the base ring 71. The base ring 71 is supported on the wall surface of the processing chamber 6 by being placed on the bottom surface of the recess 62 (see Figure 3 ). On the upper surface of the base ring 71, a plurality of connecting parts 72 (four in this embodiment) are vertically provided along the circumferential direction of the annular shape. The connecting part 72 is also a quartz component and is fixed to the base ring 71 by welding.

[0092] The base 74 is supported by four connecting parts 72 provided on the base ring 71 . Figure 5 74 is a top view of the base. Figure 6 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. In other words, the holding plate 75 has a larger plane size than the semiconductor wafer W.

[0093] A guide ring 76 is provided on the peripheral portion of the upper surface of the retaining plate 75. The guide ring 76 is a circular ring-shaped component having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 is set to be a tapered surface that widens upward from the retaining plate 75. The guide ring 76 is formed of the same quartz as the retaining plate 75. The guide ring 76 can be welded to the upper surface of the retaining plate 75, or can be fixed to the retaining plate 75 using separately processed pins or the like. Alternatively, the retaining plate 75 and the guide ring 76 can be processed as an integral component.

[0094] The area on the upper surface of the holding plate 75 that is closer to the inner side than the guide ring 76 is set as a planar holding surface 75a for holding the semiconductor wafer W. On the holding surface 75a of the holding plate 75, a plurality of substrate support pins 77 are erected. In the present embodiment, a total of 12 substrate support pins 77 are erected at intervals of 30° along a circumference that is concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is φ300 mm, the diameter of the circle is φ270 mm to φ280 mm (φ270 mm in the present embodiment). Each substrate support pin 77 is formed of quartz. The plurality of substrate support pins 77 may be set on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.

[0095] Back to Figure 4The four connecting parts 72 erected on the base ring 71 are fixedly connected to the peripheral part of the holding plate 75 of the base 74 by welding. That is, the base 74 and the base ring 71 are fixedly connected by the connecting parts 72. The base ring 71 of the holding part 7 is supported on the wall surface of the processing chamber 6, and the holding part 7 is installed in the processing chamber 6. When the holding part 7 is installed in the processing chamber 6, the holding plate 75 of the base 74 is in a horizontal posture (a posture in which the normal line is consistent with the vertical direction). In other words, the holding surface 75a of the holding plate 75 is a horizontal plane.

[0096] The semiconductor wafer W carried into the processing chamber 6 is placed and held in a horizontal position on a susceptor 74 of a holding portion 7 installed in the processing chamber 6. At this time, the semiconductor wafer W is supported by 12 substrate support pins 77 vertically provided on a holding plate 75 and held on the susceptor 74. More strictly speaking, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the heights of the 12 substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are uniform, the semiconductor wafer W can be supported in a horizontal position by the 12 substrate support pins 77.

[0097] In addition, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a certain interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the horizontal positional deviation of the semiconductor wafer W supported by the plurality of substrate support pins 77.

[0098] In addition, if Figure 4 and Figure 5 As shown, an opening 78 is formed in the holding plate 75 of the base 74 so as to penetrate vertically. The opening 78 is for the lower radiation thermometer 20 (see Figure 3 ) is provided to receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the lower radiation thermometer 20 receives light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 to measure the temperature of the semiconductor wafer W. Furthermore, four through holes 79 are provided through the holding plate 75 of the susceptor 74 for the lift pins 12 of the transfer mechanism 10 described below to pass through and transfer the semiconductor wafer W.

[0099] Figure 7 1 is a top view of the transfer mechanism 10. Figure 81 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are formed in an arc shape along the substantially annular recess 62. Two lift pins 12 are provided vertically on each transfer arm 11. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer operation position ( Figure 7 solid line position), and a retreat position ( Figure 7 The transfer action position is below the base 74, and the retreat position is outside the base 74. The horizontal movement mechanism 13 may be a mechanism that uses individual motors to rotate each transfer arm 11 separately, or a mechanism that uses a link mechanism to rotate a pair of transfer arms 11 in conjunction with one motor.

[0100] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIG. 1 ) provided in the base 74. Figure 4 , 5 ), the upper end of the lift pin 12 protrudes from the upper surface of the base 74. On the other hand, if the lifting mechanism 14 causes the pair of transfer arms 11 to descend in the transfer action position and pulls the lift pin 12 out of the through hole 79, and the horizontal moving mechanism 13 causes the pair of transfer arms 11 to move in an open manner, then each transfer arm 11 moves to a retreat position. The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 becomes the inner side of the recess 62. In addition, an exhaust mechanism (not shown) is also provided near the portion of the transfer mechanism 10 where the drive portion (the horizontal moving mechanism 13 and the lifting mechanism 14) is provided, and is configured to discharge the gas around the drive portion of the transfer mechanism 10 to the outside of the chamber 6.

[0101] Back to Figure 3 Two radiation thermometers, an upper radiation thermometer 25 and a lower radiation thermometer 20, are provided in the processing chamber 6. As described above, the lower radiation thermometer 20 receives infrared light radiated from the lower surface of the semiconductor wafer W through the opening 78 of the susceptor 74, and measures the temperature of the semiconductor wafer W based on the intensity of the infrared light. On the other hand, the upper radiation thermometer 25 receives infrared light radiated from the upper surface of the semiconductor wafer W held by the susceptor 74, and measures the temperature of the upper surface of the semiconductor wafer W based on the intensity of the infrared light. As the upper radiation thermometer 25, a high-speed radiation thermometer is preferably used so as to be able to follow the temperature change of the upper surface of the semiconductor wafer W that changes rapidly during flash irradiation.

[0102] The flash lamp room 5 disposed above the processing chamber 6 is composed of a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL on the inner side of a housing 51, and a reflector 52 disposed so as to cover the upper side of the light source. In addition, a light irradiation window 53 is provided at the bottom of the housing 51 of the flash lamp room 5. The light irradiation window 53 constituting the bottom of the flash lamp room 5 is a plate-shaped quartz window formed of quartz. By disposing the flash lamp room 5 above the processing chamber 6, the light irradiation window 53 and the upper chamber window 63 are opposed to each other. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the light irradiation window 53 and the upper chamber window 63.

[0103] The flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and are arranged in a plane so that their length directions are parallel to each other along the main surface (that is, along the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0104] The xenon flash lamp FL includes: a rod-shaped glass tube (discharge tube) in which xenon gas is sealed and an anode and a cathode connected to a capacitor are arranged at both ends; and a trigger electrode is attached to the outer peripheral surface of the glass tube. Since xenon gas is an electrical insulator, even if electric charge is stored in the capacitor, no electricity flows into the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor flows into the glass tube instantly, and light is emitted by the excitation of xenon atoms or molecules at this time. In this xenon flash lamp FL, the electrostatic energy previously stored in the capacitor is converted into an extremely short light pulse of 0.1 milliseconds to 100 milliseconds, so it has the characteristic of being able to irradiate extremely strong light compared to a continuously lit light source such as a halogen lamp HL. In other words, the flash lamp FL is a pulse light lamp that emits light instantly in an extremely short time of less than 1 second. In addition, the light emission time of the flash lamp FL can be adjusted according to the coil constant of the lamp power supply that supplies power to the flash lamp FL.

[0105] In addition, the reflector 52 is provided above the plurality of flash lamps FL so as to cover the entirety of the flash lamps FL. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL to the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL) is roughened by sandblasting.

[0106] The halogen lamp chamber 4 disposed below the processing chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside a housing 41. The plurality of halogen lamps HL irradiate light from below the processing chamber 6 through the lower chamber window 64 toward the heat treatment space 65.

[0107] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps HL. In the present embodiment, 20 halogen lamps HL are arranged in the upper and lower sections. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in the upper and lower sections are arranged in parallel with each other along the main surface of the semiconductor wafer W held in the holding portion 7 (that is, along the horizontal direction) in their respective length directions. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower sections is a horizontal plane.

[0108] In addition, if Fig. 9 As shown, the upper and lower sections have a higher density of halogen lamps HL in the area opposite to the peripheral portion than in the area opposite to the central portion of the semiconductor wafer W held by the holding portion 7. That is, in both the upper and lower sections, the spacing of the halogen lamps HL in the peripheral portion is shorter than in the central portion of the lamp arrangement. Therefore, the peripheral portion of the semiconductor wafer W, which is prone to temperature drop when heated by light irradiation from the halogen lamps HL, can be irradiated with a larger amount of light.

[0109] The lamp group including the upper halogen lamps HL and the lamp group including the lower halogen lamps HL are arranged in a lattice-like manner. That is, a total of 40 halogen lamps HL are arranged so that the length direction of each halogen lamp HL in the upper stage is perpendicular to the length direction of each halogen lamp HL in the lower stage.

[0110] The halogen lamp HL is a filament-type light source that emits light by energizing a filament disposed inside a glass tube to turn the filament incandescent. Inside the glass tube, a gas obtained by introducing a trace amount of halogen elements (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is sealed. By introducing the halogen element, the breakage of the filament can be suppressed, and the temperature of the filament can be set to a high temperature. Therefore, the halogen lamp HL has a longer life than a conventional incandescent bulb and can continuously irradiate strong light. In other words, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, since the halogen lamp HL is a rod-shaped lamp, it has a longer life, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the semiconductor wafer W above becomes excellent.

[0111] In addition, a reflector 43 ( Figure 3 ). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.

[0112] In addition to the above-mentioned structure, the heat treatment section 160 is also provided with various cooling structures to prevent the halogen lamp chamber 4, the flash lamp chamber 5 and the processing chamber 6 from excessive temperature rise caused by the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. For example, a water cooling pipe (not shown) is provided on the wall of the processing chamber 6. In addition, the halogen lamp chamber 4 and the flash lamp chamber 5 are provided with an air cooling structure for exhausting heat by forming a gas flow inside. In addition, air is also supplied to the gap between the upper chamber window 63 and the lamp radiation window 53 to cool the flash lamp chamber 5 and the upper chamber window 63.

[0113] Fig.10 2 is a diagram showing the configuration of the reflectivity measuring unit 232 and the control unit 3 provided in the alignment unit 230. The reflectivity measuring unit 232 includes a light projecting unit 300, a light receiving unit 235, a half mirror 236, and a reflectivity estimating unit 31. In the alignment chamber 231 of the alignment unit 230, a rotation support unit 237 that supports and rotates the semiconductor wafer W and a rotation motor 238 that rotationally drives the rotation support unit 237 are provided. The rotation support unit 237 that supports the semiconductor wafer W is rotated by the rotation motor 238 to adjust the direction of the semiconductor wafer W.

[0114] The light projecting unit 300 has a light source such as a halogen light source or an LED (light-emitting diode) light source, and emits light for measuring reflectivity. The light receiving unit 235 has a light receiving element that converts the intensity of the received light into an electrical signal. The light emitted from the light projecting unit 300 is reflected by the half mirror 236 and then vertically irradiated to the upper surface of the semiconductor wafer W supported by the rotating support unit 237. The light irradiated from the light projecting unit 300 is reflected by the upper surface of the semiconductor wafer W. The reflected light is received by the light receiving unit 235 through the half mirror 236. The reflectivity estimating unit 31 of the control unit 3 estimates the reflectivity of the upper surface of the semiconductor wafer W based on the intensity of the reflected light received by the light receiving unit 235. In addition, the light projecting unit 300 may have a plurality of light sources with different irradiation wavelength regions, and may irradiate light to multiple locations on the upper surface of the semiconductor wafer W. If the light projecting unit 300 has a plurality of light sources with different wavelength regions, the reflectivity of the semiconductor wafer W can be measured over a wide range of wavelengths. Furthermore, if light is irradiated onto a plurality of locations on the upper surface of the semiconductor wafer W, local pattern dependency can be reduced.

[0115] The control unit 3 controls the various action mechanisms provided in the heat treatment device 100. The hardware structure of the control unit 3 is the same as that of an ordinary computer. That is, the control unit 3 includes a CPU (Central Processing Unit) as a circuit for performing various calculations, a ROM (Read On1y Memory) as a read-only memory for storing basic programs, a RAM (Random Access Memory) as a free read-write memory for storing various information, and a disk that pre-stores control software or data. The processing in the heat treatment device 100 is performed by the CPU of the control unit 3 executing a specific processing program. The reflectivity estimation unit 31 and the temperature estimation unit 36 ​​are functional processing units that are implemented by the CPU of the control unit 3 executing a specific processing program. The processing content of the temperature estimation unit 36 ​​is further described below. In addition, in Figure 1 In FIG. 1 , the control unit 3 is shown in the transfer and conveying unit 101 , but the present invention is not limited thereto, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100 .

[0116] In addition, the control unit 3 is connected to a display unit 34 and an input unit 33. The control unit 3 causes the display unit 34 to display various information. The operator of the heat treatment device 100 can input various instructions or parameters from the input unit 33 while confirming the information displayed on the display unit 34. As the input unit 33, for example, a keyboard or a mouse can be used. As the display unit 34, for example, a liquid crystal display can be used. In the present embodiment, as the display unit 34 and the input unit 33, a liquid crystal touch panel provided on the outer wall of the heat treatment device 100 is used so that it has both functions.

[0117] Next, the processing operation of the heat treatment apparatus 100 of the present invention is described. Here, first, a typical processing operation performed on a normal semiconductor wafer (product wafer) W that becomes a product is described. The semiconductor wafer W that becomes the processing object is a semiconductor substrate to which impurities (ions) are added by ion implantation. The activation of the impurities is performed by flash irradiation heat treatment (annealing) using the heat treatment apparatus 100.

[0118] First, unprocessed semiconductor wafers W injected with impurities are placed in a state where a plurality of them are contained in carriers C and are placed on the load port 110 of the transfer conveyor 101. Then, the transfer robot 120 takes out the unprocessed semiconductor wafers W from the carriers C one by one and carries them into the alignment chamber 231 of the alignment unit 230. In the alignment chamber 231, the semiconductor wafer W supported by the rotation support 237 is rotated around the vertical axis in a horizontal plane with its center as the rotation center, and the grooves are optically detected, thereby adjusting the direction of the semiconductor wafer W.

[0119] Next, the delivery robot 120 of the transfer and conveying unit 101 takes out the semiconductor wafer W whose direction has been adjusted from the alignment chamber 231 and carries it into the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. The unprocessed semiconductor wafer W carried into the first cooling chamber 131 or the second cooling chamber 141 is carried out into the transfer chamber 170 by the transfer robot 150. When the unprocessed semiconductor wafer W is transferred from the transfer and conveying unit 101 to the transfer chamber 170 via the first cooling chamber 131 or the second cooling chamber 141, the first cooling chamber 131 and the second cooling chamber 141 function as a path for delivering the semiconductor wafer W.

[0120] The transfer robot 150 that has taken out the semiconductor wafer W rotates toward the heat treatment unit 160. Then, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 moves the unprocessed semiconductor wafer W into the processing chamber 6. At this time, when the previously heat-treated semiconductor wafer W is present in the processing chamber 6, the heat-treated semiconductor wafer W is taken out by one of the transfer hands 151a and 151b, and the unprocessed semiconductor wafer W is moved into the processing chamber 6 to perform wafer replacement. Then, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.

[0121] The semiconductor wafer W carried into the processing chamber 6 is preheated by the halogen lamp HL and then flash-heated by flash irradiation from the flash lamp FL. The impurities implanted into the semiconductor wafer W are activated by the flash-heating process.

[0122] After the flash heat treatment is completed, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170 again, and the transfer robot 150 transfers the semiconductor wafer W after the flash heat treatment from the processing chamber 6 to the transfer chamber 170. The transfer robot 150 that has taken out the semiconductor wafer W rotates from the processing chamber 6 toward the first cooling chamber 131 or the second cooling chamber 141. In addition, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.

[0123] Then, the transfer robot 150 transfers the semiconductor wafer W after the heat treatment to the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. At this time, if the semiconductor wafer W passes through the first cooling chamber 131 before the heat treatment, it is still transferred to the first cooling chamber 131 after the heat treatment, and if the semiconductor wafer W passes through the second cooling chamber 141 before the heat treatment, it is still transferred to the second cooling chamber 141 after the heat treatment. In the first cooling chamber 131 or the second cooling chamber 141, the semiconductor wafer W after the flash heat treatment is cooled. Since the temperature of the semiconductor wafer W as a whole is relatively high at the time of being transferred out of the processing chamber 6 of the heat treatment unit 160, the semiconductor wafer W is cooled to near room temperature in the first cooling chamber 131 or the second cooling chamber 141.

[0124] After a specific cooling treatment time, the transfer robot 120 moves the cooled semiconductor wafers W out of the first cooling chamber 131 or the second cooling chamber 141 and returns them to the carrier C. When a specific number of processed semiconductor wafers W are accommodated in the carrier C, the carrier C is moved out of the load port 110 of the transfer conveyor 101 .

[0125] The heat treatment in the heat treatment unit 160 is further described. Before the semiconductor wafer W is carried into the processing chamber 6, the valve 84 for gas supply is opened, and the valves 89 and 192 for exhaust are opened to start supplying and exhausting the inside of the processing chamber 6. If the valve 84 is opened, nitrogen gas is supplied to the heat treatment space 65 from the gas supply hole 81. In addition, if the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.

[0126] In addition, by opening the valve 192, the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Furthermore, the gas around the driving part of the transfer mechanism 10 is also exhausted by the exhaust mechanism (not shown). In addition, during the heat treatment of the semiconductor wafer W in the heat treatment part 160, nitrogen gas is continuously supplied to the heat treatment space 65, and its supply amount is appropriately changed according to the treatment process.

[0127] Then, the gate valve 185 is opened and the transport opening 66 is opened, and the semiconductor wafer W to be processed is transported into the heat treatment space 65 in the processing chamber 6 through the transport opening 66 by the transport robot 150. The transport robot 150 moves the transport hand 151a (or the transport hand 151b) holding the unprocessed semiconductor wafer W into a position directly above the holding portion 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved and raised from the retreat position to the transfer operation position, so that the lift pins 12 protrude from the upper surface of the holding plate 75 of the base 74 through the through holes 79 to receive the semiconductor wafer W. At this time, the lift pins 12 rise to a position higher than the upper ends of the substrate support pins 77.

[0128] After the unprocessed semiconductor wafer W is placed on the lift pins 12, the transport robot 150 withdraws the transport hand 151a from the heat treatment space 65 and closes the transport opening 66 by the gate valve 185. Then, the semiconductor wafer W is handed over to the base 74 of the holding part 7 from the transport mechanism 10 by the pair of transfer arms 11 descending and held from below in a horizontal posture. The semiconductor wafer W is supported by a plurality of substrate support pins 77 vertically arranged on the holding plate 75 and held on the base 74. In addition, the semiconductor wafer W is held on the holding part 7 with the surface where patterning is performed and impurities are injected as the upper surface. A specific gap is formed between the back side (the main surface on the opposite side to the front side) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have descended to the bottom of the base 74 are retreated to the retreat position, that is, the inner side of the recess 62 by the horizontal movement mechanism 13.

[0129] After the semiconductor wafer W is held horizontally from below by the base 74 of the holding portion 7, 40 halogen lamps HL are lit at the same time to start preheating (auxiliary heating). The halogen light emitted from the halogen lamp HL is irradiated from the lower surface of the semiconductor wafer W through the lower chamber window 64 and the base 74 formed by quartz. The temperature of the semiconductor wafer W rises after being preheated by receiving the light from the halogen lamp HL. In addition, the transfer arm 11 of the transfer mechanism 10 has been retreated to the inner side of the recess 62, so it will not hinder the heating by the halogen lamp HL.

[0130] When preheating is performed using the halogen lamp HL, the temperature of the semiconductor wafer W is measured using the lower radiation thermometer 20. That is, the lower radiation thermometer 20 receives infrared light radiated from the lower surface of the semiconductor wafer W held on the base 74 through the opening 78 to measure the temperature of the wafer during heating. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W heated by light irradiation from the halogen lamp HL has reached a specific preheating temperature T1. That is, the control unit 3 performs feedback control on the output of the halogen lamp HL based on the measured value of the lower radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. The preheating temperature T1 is set to a temperature at which there is no need to worry about the impurities added to the semiconductor wafer W diffusing due to heat, that is, about 600°C to 800°C (700°C in this embodiment).

[0131] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, at the time point when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W at approximately the preheating temperature T1.

[0132] By performing such preheating using the halogen lamp HL, the temperature of the entire semiconductor wafer W is uniformly raised to the preheating temperature T1. In the stage of preheating using the halogen lamp HL, there is a tendency that the temperature of the peripheral portion of the semiconductor wafer W, which is more likely to generate heat dissipation, is lower than that of the central portion. The density of the halogen lamps HL in the halogen lamp chamber 4 is higher in the area opposite to the peripheral portion than in the area opposite to the central portion of the semiconductor wafer W. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, which is more likely to generate heat dissipation, becomes larger, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be uniform.

[0133] At a specific time point after the temperature of the semiconductor wafer W reaches the preheating temperature T1, the flash lamp FL flashes the surface of the semiconductor wafer W. At this time, a part of the flash emitted from the flash lamp FL is directly emitted into the processing chamber 6, and another part is temporarily reflected by the reflector 52 and then emitted into the processing chamber 6. The semiconductor wafer W is flash heated by the flash irradiation.

[0134] Since the flash heating is performed by irradiating a flash light from a flash lamp FL, the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light irradiated from the flash lamp FL is an extremely short and strong flash light that converts the electrostatic energy previously stored in the capacitor into an extremely short light pulse and has an irradiation time of approximately 0.1 milliseconds to 100 milliseconds. Moreover, the surface temperature of the semiconductor wafer W flash-heated by the flash light irradiation from the flash lamp FL instantly rises to a processing temperature T2 of 1000°C or more, and after the impurities injected into the semiconductor wafer W are activated, the surface temperature drops rapidly. In this way, the surface temperature of the semiconductor wafer W can be raised and lowered in an extremely short time during the flash heating, so the impurities injected into the semiconductor wafer W can be activated while suppressing the diffusion of the impurities due to heat. In addition, since the time required for the activation of the impurities is extremely short compared to the time required for its thermal diffusion, the activation is completed even in a short time of approximately 0.1 milliseconds to 100 milliseconds when no diffusion occurs.

[0135] After the flash heating treatment is completed, the halogen lamp HL is turned off after a specific time. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W during cooling is measured by the lower radiation thermometer 20, and its measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W drops to a specific temperature based on the measurement result of the lower radiation thermometer 20. Then, after the temperature of the semiconductor wafer W drops below a specific level, the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retreat position to the transfer action position and rises again, whereby the lift pins 12 protrude from the upper surface of the base 74 and receive the heat-treated semiconductor wafer W from the base 74. Subsequently, the transport opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is moved out by the transfer hand 151b (or the transfer hand 151a) of the transfer robot 150. The transfer robot 150 moves the transfer hand 151b to a position directly below the semiconductor wafer W lifted by the lift pins 12 and stops. Then, the pair of transfer arms 11 descends, and the flash-heated semiconductor wafer W is delivered and placed on the transfer hand 151b. Then, the transfer robot 150 withdraws the transfer hand 151b from the processing chamber 6 and carries the processed semiconductor wafer W out.

[0136] Next, a technique for predicting in advance the processing temperature T2 that the surface of the semiconductor wafer W reaches during flash heating will be described. Fig.111 is a flowchart showing the order of estimating the predicted arrival temperature of the semiconductor wafer W in the first embodiment. First, a batch is moved into the heat treatment apparatus 100 (step S11). A batch refers to a group of semiconductor wafers W that are subjected to the same treatment under the same conditions. Specifically, a plurality of (25 in this embodiment) semiconductor wafers W constituting the batch are placed on the load port 110 of the transfer conveyor 101 in a state of being accommodated in the carrier C.

[0137] Next, a process recipe is set for each of the multiple semiconductor wafers W accommodated in the carrier C (step S12). The so-called process recipe refers to a process recipe that specifies the processing sequence and processing conditions for the heat treatment of the semiconductor wafer W. The control unit 3 controls the various mechanisms of the heat treatment device 100 according to the process recipe to perform the preheating treatment and flash heating treatment as described above on the semiconductor wafer W. The process recipe is prepared in advance in multiple forms and stored in the storage unit of the control unit 3, etc. The operator of the heat treatment device 100 selects an appropriate process recipe from the touch panel that functions as the input unit 33 and the display unit 34, and then sets it individually for each of the multiple semiconductor wafers W accommodated in the carrier C. Typically, since one carrier C accommodates multiple semiconductor wafers W that are the objects of the same content of processing under the same conditions, in this case, a common process recipe can also be set for the multiple semiconductor wafers W accommodated in the carrier C. Alternatively, a plurality of processing sequence recipes that specify only the processing sequence and a plurality of processing condition recipes that specify only the processing conditions may be prepared in advance and stored in a storage unit of the control unit 3, etc., and used in combination when setting the process recipes.

[0138] After setting the process recipe for a plurality of semiconductor wafers W, the transfer robot 120 takes out the semiconductor wafers W from the carrier C one by one and moves them into the alignment chamber 231 of the alignment section 230. In the alignment chamber 231, the semiconductor wafer W is supported on the rotating support section 237. Then, the reflectivity measuring section 232 measures the reflectivity of the surface of the semiconductor wafer W supported on the rotating support section 237 (step S13). Specifically, the light emitted from the light projecting section 300 of the reflectivity measuring section 232 is reflected by the half mirror 236 and irradiated onto the surface of the semiconductor wafer W at an incident angle of 0°. The light irradiated from the light projecting section 300 is reflected by the surface of the semiconductor wafer W, and the reflected light is received by the light receiving section 235 through the half mirror 236. Thus, the reflected light intensity of the semiconductor wafer W is obtained.

[0139] In addition, the storage unit of the control unit 3 stores the reflected light intensity pre-measured by the reflectivity measuring unit 232 using the same method as described above for a bare silicon wafer that has not been patterned or ion-implanted. The reflectivity estimating unit 31 estimates the reflectivity of the surface of the semiconductor wafer W by dividing the reflected light intensity of the semiconductor wafer W received by the light receiving unit 235 by the reflected light intensity of the bare wafer as a reference. That is, in this embodiment, the relative reflectivity of the semiconductor wafer W relative to the bare wafer is estimated. The estimated reflectivity of the semiconductor wafer W is stored in the storage unit of the control unit 3.

[0140] After the reflectivity measurement is completed, the transfer robot 120 takes out the measured semiconductor wafer W from the alignment chamber 231 and returns it to the carrier C of the load port 110. That is, the thermal processing apparatus 100 is provided with a dedicated transport mode for measuring the reflectivity of the semiconductor wafer W, and in this transport mode, the semiconductor wafer W taken out of the alignment chamber 231 is not transported to the processing chamber 6 but directly returned to the original carrier C.

[0141] The reflectivity measurement in step S13 is sequentially performed on all the semiconductor wafers W accommodated in the carrier C. That is, the semiconductor wafers W accommodated in the carrier C are sequentially transferred to the alignment chamber 231 to measure the reflectivity, and then returned to the original carrier C sequentially after the measurement.

[0142] After the reflectivity measurement of all the semiconductor wafers W accommodated in the carrier C is completed, the temperature estimation unit 36 ​​of the control unit 3 estimates the predicted arrival temperature of the semiconductor wafer W (step S14). A process recipe that specifies the processing conditions is set for all the semiconductor wafers W accommodated in the carrier C. In the process recipe, the discharge voltage or irradiation time (pulse width) of the flash lamp FL during flash irradiation is specified as a processing condition. More specifically, the discharge voltage of the flash lamp FL is specified by the charging voltage of the capacitor that supplies charge to the flash lamp FL. In addition, the irradiation time of the flash lamp FL is specified by, for example, a pulse waveform applied to the gate of an IGBT (Insulated Gate Bipolar Transistor) connected to the flash lamp FL.

[0143] In addition, the reflectivity (relative reflectivity) of all semiconductor wafers W accommodated in the carrier C is also measured. That is, for all semiconductor wafers W accommodated in the carrier C, the reflectivity as the optical characteristic of the wafer and the discharge voltage or irradiation time as the optical characteristic of the flash lamp FL are obtained as parameters. The temperature estimation unit 36 ​​estimates the predicted arrival temperature of the surface when the flash is irradiated for all the multiple semiconductor wafers W accommodated in the carrier C based on these parameters. Specifically, the surface arrival temperature when the bare wafer is processed is measured under the processing conditions specified by the set process recipe and then saved. The temperature estimation unit 36 ​​estimates the predicted arrival temperature of the surface of the semiconductor wafer W based on the relative reflectivity of the semiconductor wafer W relative to the bare wafer and the surface arrival temperature of the bare wafer. When the relative reflectivity of the semiconductor wafer W is less than 1, the predicted arrival temperature of the surface of the semiconductor wafer W is higher than the surface arrival temperature of the bare wafer. In addition, the predicted arrival temperature can be a temperature distribution representing the surface temperature change of the semiconductor wafer W in a fixed time, or it can be the highest arrival temperature of the surface of the semiconductor wafer W.

[0144] Next, the control unit 3 displays the predicted reaching temperature of the semiconductor wafer W estimated by the temperature estimation unit 36 ​​on the display unit 34 (step S15 ). Fig.12 FIG. 2 is a diagram showing an example of a display screen displayed on the display unit 34. Fig.12 As shown, on the display screen, the actually measured reflectances, set process recipes, and estimated predicted arrival temperatures of all 25 semiconductor wafers W accommodated in the carrier C are displayed together with the carrier ID of the carrier C.

[0145] The operator of the heat treatment apparatus 100 can grasp the predicted arrival temperature of the semiconductor wafer W from the display screen of the display unit 34. The operator corrects the processing conditions of the process recipe or resets the process recipe based on the displayed predicted arrival temperature. For example, when the predicted arrival temperature is higher than the desired target temperature, the operator lowers the discharge voltage of the flash lamp FL or shortens the irradiation time of the flash to lower the arrival temperature of the semiconductor wafer W.

[0146] In the first embodiment, the predicted arrival temperature of the semiconductor wafer W during the flash heat treatment is estimated and displayed based on the set process recipe and the measured reflectivity of the semiconductor wafer W. Since the operator of the heat treatment apparatus 100 can set the treatment conditions using the displayed predicted arrival temperature as a starting point, the operator can easily set the heat treatment conditions compared to a method of finding the optimal conditions by trial and error.

[0147] <Second Embodiment>

[0148] Next, a second embodiment of the present invention will be described. The configuration of the heat treatment apparatus 100 and the processing procedure of the semiconductor wafer W in the second embodiment are substantially the same as those in the first embodiment. The method of obtaining the predicted reaching temperature in the second embodiment is different from that in the first embodiment.

[0149] Fig.13 2 is a block diagram showing the structure of the control unit 3 according to the second embodiment. Figure 1 3, compared with the first embodiment ( Fig.10 ) The same elements are marked with the same symbols. The control unit 3 of the second embodiment includes an extraction unit 37 and a setting unit 38 in addition to the reflectivity estimation unit 31. The extraction unit 37 and the setting unit 38 are also functional processing units implemented by the CPU of the control unit 3 executing a specific processing program, and its processing content will be described below.

[0150] In the second embodiment, a database DB is stored in the magnetic disk 35 as the storage unit of the control unit 3. In the database DB, the reflectivity, process recipe, and temperature of the semiconductor wafer W in the past flash heat treatment are registered in association with each other. The reflectivity of the semiconductor wafer W registered in the database DB is the measured reflectivity measured by the reflectivity measuring unit 232 in the alignment chamber 231. The process recipe registered in the database DB is the process recipe set for the semiconductor wafer W. In addition, the temperature registered in the database DB is the surface temperature of the semiconductor wafer W measured by the upper radiation thermometer 25 during the flash heat treatment. The temperature registered in the database DB may be a temperature distribution representing the surface temperature change of the semiconductor wafer W in a fixed time, or may be the highest reached temperature of the surface of the semiconductor wafer W.

[0151] Fig.14 1 is a flowchart showing the procedure for obtaining the predicted temperature of the semiconductor wafer W in the second embodiment. First, as in the first embodiment, a batch is loaded into the heat treatment apparatus 100 (step S21). That is, a plurality of (25 in this embodiment) semiconductor wafers W constituting the batch are loaded on the loading port 110 of the transfer conveyor 101 in a state of being accommodated in the carrier C.

[0152] After the carrier C is placed on the load port 110, the reflectivity of the surface of the semiconductor wafer W is measured in the second embodiment (step S22). Specifically, the transfer robot 120 takes out the semiconductor wafers W from the carrier C one by one and moves them into the alignment chamber 231 of the alignment unit 230. In the alignment chamber 231, the semiconductor wafer W is supported by the rotation support unit 237. Then, similarly to the first embodiment, the reflectivity measurement unit 232 measures the reflectivity of the surface of the semiconductor wafer W supported by the rotation support unit 237.

[0153] After the reflectivity measurement is completed, the transfer robot 120 takes out the measured semiconductor wafer W from the alignment chamber 231 and returns it to the carrier C of the load port 110. The reflectivity measurement of step S22 is performed sequentially on all of the multiple semiconductor wafers W accommodated in the carrier C. In other words, the multiple semiconductor wafers W accommodated in the carrier C are sequentially transferred to the alignment chamber 231 and then the reflectivity is measured, and then they are returned to the original carrier C sequentially after the measurement.

[0154] Next, the extraction unit 37 of the control unit 3 searches the database DB and extracts the process recipe and the temperature of the semiconductor wafer W that are associated with the reflectivity that is the same as or similar to the reflectivity of the semiconductor wafer W actually measured in step S22 (step S23). Then, the control unit 3 displays the process recipe and the temperature of the semiconductor wafer W extracted by the extraction unit 37 on the display unit 34 (step S24).

[0155] The database DB records the past flash heat treatment results. The process recipe and temperature extracted by the extraction unit 37 are based on the past flash heat treatment results for wafers with the same reflectivity as the semiconductor wafer W to be processed. Therefore, the operator of the heat treatment device 100 can understand the temperature to be reached during the heat treatment by confirming the display content of the display unit 34 according to which process recipe is set for the semiconductor wafer W to be processed. Based on the displayed process recipe and temperature, the operator sets an appropriate process recipe for the semiconductor wafer W to be processed and accommodated in the carrier C, and corrects the processing conditions specified by the process recipe as needed (step S25). That is, the operator selects a process recipe that allows the semiconductor wafer W to be processed to reach the desired target temperature and sets the discharge voltage of the flash lamp FL or the irradiation time of the flash.

[0156] The process recipe setting of step S25 may also be automatically performed by the setting unit 38 of the control unit 3. For example, when the operator inputs the desired target temperature from the input unit 33, the setting unit 38 may select a process recipe that obtains a temperature close to the target temperature based on the search result and set it for the semiconductor wafer W to be processed. Furthermore, the setting unit 38 may also make a fine correction to the processing conditions of the process recipe to obtain a temperature closer to the target temperature, that is, make a fine correction to the discharge voltage of the flash lamp FL or the irradiation time of the flash light specified by the process recipe.

[0157] By heat-treating the semiconductor wafer W in the heat treatment apparatus 100 according to the process recipe set in this way, the semiconductor wafer W can be heated to the target temperature.

[0158] In the second embodiment, based on the database DB in which flash heat treatment results are registered, past results for wafers having the same degree of reflectivity as the semiconductor wafer W to be processed are extracted and displayed. Since the processing conditions for the semiconductor wafer W to be processed can be set based on such past results, the heat treatment conditions can be set more easily than by a method of finding the optimal conditions by trial and error.

[0159] <Third Embodiment>

[0160] Next, a third embodiment of the present invention will be described. The configuration of the heat treatment apparatus 100 and the processing procedure of the semiconductor wafer W in the third embodiment are substantially the same as those in the first embodiment. The third embodiment differs from the first and second embodiments in the method of setting the processing conditions.

[0161] Figure 1 5 is a block diagram showing the structure of the control unit 3 according to the third embodiment. Figure 1 5, for the first embodiment ( Fig.10 ) and the second embodiment ( Fig.13 ) The same elements are marked with the same symbols. The control unit 3 of the third embodiment includes a condition estimation unit 39 and a setting unit 38 in addition to the reflectivity estimation unit 31. The condition estimation unit 39 and the setting unit 38 are also functional processing units implemented by the CPU of the control unit 3 executing a specific processing program, and its processing content will be described below.

[0162] Fig.16 1 is a flowchart showing the procedure for setting the processing conditions of the semiconductor wafer W in the third embodiment. First, as in the first embodiment, a batch is loaded into the heat treatment apparatus 100 (step S31). That is, a plurality of (25 in this embodiment) semiconductor wafers W constituting the batch are loaded on the loading port 110 of the transfer conveyor 101 in a state of being accommodated in the carrier C.

[0163] After the carrier C is placed on the load port 110, the reflectivity of the surface of the semiconductor wafer W is measured in the third embodiment (step S32). Specifically, the transfer robot 120 takes out the semiconductor wafers W from the carrier C one by one and carries them into the alignment chamber 231 of the alignment unit 230. In the alignment chamber 231, the semiconductor wafer W is supported by the rotation support unit 237. Then, similarly to the first embodiment, the reflectivity measurement unit 232 measures the reflectivity of the surface of the semiconductor wafer W supported by the rotation support unit 237.

[0164] After the reflectivity measurement is completed, the transfer robot 120 takes out the measured semiconductor wafer W from the alignment chamber 231 and returns it to the carrier C of the load port 110. The reflectivity measurement of step S32 is performed sequentially on all of the multiple semiconductor wafers W accommodated in the carrier C. In other words, the multiple semiconductor wafers W accommodated in the carrier C are sequentially transferred to the alignment chamber 231 and then the reflectivity is measured, and then they are returned to the original carrier C sequentially after the measurement.

[0165] Next, the condition estimation unit 39 of the control unit 3 estimates the processing conditions for heating the semiconductor wafer W to the desired target temperature based on the reflectivity of the semiconductor wafer W to be processed measured in step S32 (step S33). The condition estimation unit 39 applies a known calculation model to the measured reflectivity as an optical characteristic of the semiconductor wafer W, and estimates the discharge voltage of the flash lamp FL or the irradiation time of the flash light required to obtain the desired target temperature as the processing conditions. The estimated processing conditions are displayed on the display unit 34.

[0166] Next, the setting unit 38 of the control unit 3 creates a process recipe that specifies the processing conditions estimated in step S33 and sets the process recipe for the semiconductor wafer W to be processed (step S34). By heat-treating the semiconductor wafer W in the heat treatment apparatus 100 according to the process recipe thus set, the semiconductor wafer W can be heated to the target temperature. In addition, based on the display content of the display unit 34, the operator of the heat treatment apparatus 100 can also create a process recipe and set the process recipe for the semiconductor wafer W to be processed.

[0167] In the third embodiment, the processing conditions for bringing the semiconductor wafer W to a desired target temperature are estimated based on the measured reflectivity of the semiconductor wafer W to be processed, and a process recipe defining the processing conditions is created and set for the semiconductor wafer W. Since the processing conditions of the semiconductor wafer W obtained by the calculation process can be set based on the measured reflectivity, the heat treatment conditions can be set more easily than a method of finding the optimal conditions by trial and error.

[0168] <Fourth Implementation Method>

[0169] Next, a fourth embodiment of the present invention will be described. The configuration of the heat treatment apparatus 100 and the processing procedure of the semiconductor wafer W of the fourth embodiment are substantially the same as those of the first embodiment.

[0170] Figure 1 7 is a diagram showing the configuration of the reflectivity measuring unit 232 and the control unit 3 according to the fourth embodiment. Fig.17 In the first embodiment ( Fig.10) The same elements are marked with the same symbols. The reflectivity estimation unit 31, the comparison unit 335 and the warning unit 336 are functional processing units implemented by the CPU of the control unit 3 executing a specific processing program. The processing contents of the comparison unit 335 and the warning unit 336 are further described below.

[0171] Fig.18 1 is a flowchart showing the sequence of the inspection method of semiconductor wafer W based on reflectivity in the fourth embodiment. First, a batch is moved into the heat treatment device 100 (step S41). The so-called batch refers to a group of semiconductor wafers W that are the objects of the same content of processing under the same conditions. Specifically, a plurality of (25 pieces in this embodiment) semiconductor wafers W constituting the batch are placed on the load port 110 of the transfer conveyor 101 in a state of being accommodated in the carrier C.

[0172] When the carrier C is placed on the loading port 110, Fig.19 The screen shown is displayed on the display unit 34. Fig.19 As shown, on the display screen, together with the carrier ID of the carrier C, an input box for the predicted reflectivity (Predict), a display box for the measured reflectivity (Reffect), and a display box for the process recipe (Recipe) of all 25 semiconductor wafers W accommodated in the carrier C are displayed.

[0173] The operator of the heat treatment device 100 inputs the expected reflectivity into the expected reflectivity input box from the touch panel functioning as the input unit 33 and the display unit 34 (step S42). It is known that the reflectivity corresponding to the film type, etc., of the film or pattern formed on the semiconductor wafer W accommodated in the carrier C and then carried into the heat treatment device 100 is also known. Therefore, the operator inputs the reflectivity corresponding to the film type, etc. formed on the carried semiconductor wafer W as the expected reflectivity. The input expected reflectivity is displayed on Fig.19 Input box with expected reflectivity shown.

[0174] Next, the reflectivity of each of the plurality of semiconductor wafers W contained in the carrier C is measured (step S43). Specifically, the transfer robot 120 takes out the semiconductor wafers W from the carrier C one by one and moves them into the alignment chamber 231 of the alignment unit 230. In the alignment chamber 231, the semiconductor wafers W are supported on the rotating support unit 237 ( Fig.17 ). The light emitted from the light projecting unit 300 of the reflectivity measuring unit 232 is reflected by the half mirror 236 and irradiated onto the surface of the semiconductor wafer W at an incident angle of 0°. The light irradiated from the light projecting unit 300 is reflected by the surface of the semiconductor wafer W, and the reflected light is received by the light receiving unit 235 through the half mirror 236 and its intensity is measured. Thus, the reflected light intensity of the semiconductor wafer W is obtained.

[0175] In addition, the storage unit of the control unit 3 stores the reflected light intensity pre-measured by the reflectivity measuring unit 232 using the same method as described above for a bare silicon wafer that has not undergone patterning or ion implantation. The reflectivity estimating unit 31 estimates the reflectivity of the surface of the semiconductor wafer W by setting the reflected light intensity of the bare wafer as a reference and dividing the reflected light intensity of the semiconductor wafer W obtained by the light receiving unit 235 by the reflected light intensity of the bare wafer. That is, in the fourth embodiment, the relative reflectivity of the semiconductor wafer W relative to the bare wafer is estimated. The reflectivity of the semiconductor wafer W measured by the reflectivity measuring unit 232 is stored in the storage unit of the control unit 3 and displayed on the display. Fig.19 The measured reflectance is shown in the display box.

[0176] After the reflectivity measurement is completed, the transfer robot 120 takes out the measured semiconductor wafer W from the alignment chamber 231 and returns it to the carrier C of the load port 110. That is, in the usual processing of the semiconductor wafer W, when the semiconductor wafer W taken out from the alignment chamber 231 is transferred to the processing chamber 6 via the first cooling chamber 131 or the second cooling chamber 141, Figure 1 8, the semiconductor wafer W taken out from the alignment chamber 231 is directly returned to the original carrier C. In this way, the heat treatment apparatus 100 of the fourth embodiment is equipped with a dedicated transport mode for measuring the reflectivity of the semiconductor wafer W. In this transport mode, the semiconductor wafer W taken out from the carrier C is transported into the alignment chamber 231 for reflectivity measurement, and then the semiconductor wafer W taken out from the alignment chamber 231 is directly returned to the carrier C. In this dedicated transport mode, since the semiconductor wafer W is not transported to the processing chamber 6, the reflectivity of the semiconductor wafer W can be measured in a short time.

[0177] The reflectivity measurement of step S43 is sequentially performed on all of the plurality of semiconductor wafers W accommodated in the carrier C. That is, the plurality of semiconductor wafers W accommodated in the carrier C are sequentially transferred to the alignment chamber 231 and then the reflectivity is measured, and after the measurement, the plurality of semiconductor wafers W are sequentially returned to the original carrier C. The reflectivities measured for the plurality of semiconductor wafers W are sequentially displayed on the display unit 34.

[0178] After the reflectivity measurement of all the semiconductor wafers W accommodated in the carrier C is completed, the comparison unit 335 of the control unit 3 compares the expected reflectivity input in step S42 with the measured reflectivity measured in step S43 (step S44). Specifically, the allowable range relative to the expected reflectivity (for example, ±3% relative to the expected reflectivity) is stored in advance as an apparatus parameter in the storage unit of the control unit 3. The allowable range can also be appropriately changed to an arbitrary value by the operator of the thermal processing apparatus 100.

[0179] The comparison unit 335 determines whether the measured reflectivity of the semiconductor wafer W is within the allowable range of the expected reflectivity (step S45). When the measured reflectivity of the semiconductor wafer W is not within the allowable range of the expected reflectivity, that is, when the measured reflectivity exceeds a specific range from the expected reflectivity, the process proceeds from step S45 to step S46, and the warning unit 336 issues a warning. For example, the warning unit 336 displays the fact that the measured reflectivity of the semiconductor wafer W deviates from the expected reflectivity on the display unit 34. Alternatively, the warning unit 336 may light up or flash, etc., so that the operator can easily identify it. Furthermore, the warning unit 336 may also display a warning together with an alarm sound.

[0180] On the other hand, if the measured reflectivity of the semiconductor wafer W is within the allowable range of the expected reflectivity, the process proceeds from step S45 to step S47 to start processing the semiconductor wafer W accommodated in the carrier C. Fig.19 The process recipes set in execute the processing in the described order.

[0181] In the fourth embodiment, the measured reflectivity of the semiconductor wafer W is compared with the expected reflectivity, and an alarm is issued when the measured reflectivity deviates from the allowable range of the expected reflectivity. The deviation of the measured reflectivity from the allowable range of the expected reflectivity is a situation where the semiconductor wafer W accommodated in the carrier C and carried into the heat treatment device 100 is abnormal, such as a situation where a film type different from the predetermined film type is formed or a predetermined film type but the film thickness becomes abnormal. In the fourth embodiment, since an alarm is issued when the measured reflectivity deviates from the allowable range of the expected reflectivity, the abnormal semiconductor wafer W can be detected reliably, and the abnormal semiconductor wafer W can be prevented from being mishandled before it happens.

[0182] <Example of variation>

[0183] The embodiments of the present invention have been described above, but the present invention can be modified in various ways other than the above-described contents without departing from the scope of its main purpose. For example, in the third embodiment, the condition estimation unit 39 of the control unit 3 estimates the processing conditions, but instead, a computer separately provided outside the heat treatment apparatus 100 can be used to estimate the processing conditions based on the reflectivity of the semiconductor wafer W. Since the control unit 3 is basically a control computer for controlling each part of the heat treatment apparatus 100, it is preferable to estimate the processing conditions using a dedicated computer when performing complex calculation processing using various parameters.

[0184] In the fourth embodiment, the expected reflectivity is input individually for all semiconductor wafers W accommodated in the carrier C, but the present invention is not limited thereto. Typically, since one carrier C accommodates a plurality of semiconductor wafers W to be processed with the same content under the same conditions, in this case, a common expected reflectivity may be input for the plurality of semiconductor wafers W accommodated in the carrier C.

[0185] In the fourth embodiment, the comparison between the measured reflectance and the expected reflectance does not need to be performed on all semiconductor wafers W accommodated in the carrier C, but may be performed on only some semiconductor wafers W. In this case, some semiconductor wafers W are sampled and inspected.

[0186] In addition, in the above-described embodiment, the reflectivity measuring unit 232 is disposed in the alignment chamber 231 , but the present invention is not limited thereto, and the reflectivity measuring unit 232 may be disposed at any position on the conveying path of the semiconductor wafer W (for example, the first cooling chamber 131 or the second cooling chamber 141 ).

[0187] In the above embodiment, the flash lamp room 5 includes 30 flash lamps FL, but the present invention is not limited thereto, and the number of flash lamps FL can be set to any number. In addition, the flash lamp FL is not limited to a xenon flash lamp, and can also be a krypton flash lamp. In addition, the number of halogen lamps HL included in the halogen lamp room 4 is not limited to 40, and can be set to any number.

[0188] In addition, in the above-described embodiment, a filament-type halogen lamp HL is used as a continuous-lighting lamp that emits light continuously for more than one second to preheat the semiconductor wafer W, but this is not limited to this. A discharge-type arc lamp (e.g., a xenon arc lamp) may be used as a continuous-lighting lamp for preheating instead of the halogen lamp HL.

[0189] Furthermore, the substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, but may be a glass substrate used for a flat panel display such as a liquid crystal display device or a substrate for a solar cell.

[0190] [Explanation of Symbols]

[0191] 3. Control Unit

[0192] 4 Halogen lamp housing

[0193] 5 Flash Room

[0194] 6 Processing Chamber

[0195] 7. Maintaining part

[0196] 10 Transfer mechanism

[0197] 31 Reflectivity estimation unit

[0198] 33 Input section

[0199] 34 Display

[0200] 35 Disk

[0201] 36 Temperature estimation unit

[0202] 37 Extraction Department

[0203] 38 Setting Department

[0204] 39 Condition Estimation Department

[0205] 65 Heat treatment space

[0206] 74 Base

[0207] 100 Heat treatment device

[0208] 101 Transfer and Conveying Department

[0209] 120 Handover Robot

[0210] 130, 140 Cooling unit

[0211] 150 Transport Robot

[0212] 151a, 151b Carrying hand

[0213] 160 Heat Treatment Department

[0214] 231 Alignment Chamber

[0215] 232 Reflectivity measurement unit

[0216] 335 Comparative Department

[0217] 336 Warning Department

[0218] DB database

[0219] FL Flash

[0220] HL halogen lamp

[0221] W Semiconductor Wafer

Claims

1. A heat treatment method, characterized in that: A method for heating a substrate by irradiating the substrate with light, and comprising: Inputting a process step, inputting an expected reflectivity of a substrate to be processed; A reflectivity measuring step of measuring the reflectivity of the substrate; a comparing step of comparing the reflectivity measured in the reflectivity measuring step with the expected reflectivity; as well as and a warning step of issuing a warning when the reflectance measured in the reflectance measuring step deviates from the expected reflectance beyond a specific range.

2. A heat treatment device, characterized in that: A method for heating a substrate by irradiating the substrate with light, and comprising: A chamber for accommodating a substrate to be processed; a light irradiation unit for irradiating light to the substrate accommodated in the chamber; An input unit for receiving an input of an expected reflectivity of the substrate; a reflectivity measuring unit for measuring the reflectivity of the substrate; a comparing unit that compares the reflectivity measured by the reflectivity measuring unit with the expected reflectivity; as well as The warning unit issues a warning when the reflectivity measured by the reflectivity measuring unit deviates from the expected reflectivity beyond a specific range.

Images