Low-power-consumption low-noise amplifier working in liquid helium temperature region

Abstract

The invention discloses a low-power-consumption and low-noise amplifier working in a liquid helium temperature region, which comprises a module circuit, one or more transistor filling regions are reserved in the module circuit; the transistors include low noise transistors and low power consumption transistors. According to the invention, discrete devices are integrated in a modular form, all thin film circuit forms similar to chips are adopted, different types of transistors are integrated into an amplifier circuit in a monolithic microwave integrated chip form, the integration level is high, the consistency is good, and batch production is facilitated; and one or more transistor reservation areas are reserved in the circuit according to a specific processing technology scheme, at least one low-noise transistor and a plurality of low-power-consumption transistors are correspondingly filled to form the multi-stage amplifier circuit, and the operation power consumption and the manufacturing cost are effectively reduced while the noise temperature is kept unchanged.

Description

Technical Field

[0001] The invention relates to the field of quantum technology, and in particular to a low-power low-noise amplifier operating in a liquid helium temperature region. Background Art

[0002] The superconducting quantum computing system works in a dilution refrigerator, and the quantum signal is extremely fragile. Any weak noise will destroy the quantum state, so a low-temperature low-noise amplifier is needed to further amplify the quantum signal. At present, the low-temperature low-noise amplifier is mainly an InP substrate HEMT, which has high mobility, low noise coefficient and high electron mobility, and can provide better performance when amplifying weak signals. With the rapid development of SiGe HBT technology, there is no carrier freezing effect of Si-based devices at low temperatures, so it exhibits good noise characteristics at low temperatures, and has noise characteristics similar to HEMT devices at low frequencies. In addition, SiGe HBT has higher mobility, smaller base current and leakage current, which can obtain a lower base noise coefficient, reduce power consumption and heat loss.

[0003] As the scale of superconducting quantum computing expands, in addition to requiring a low equivalent noise temperature of the amplifier, it is also necessary to reduce the power consumption of the amplifier, because the cooling capacity of the dilution refrigerator is limited to a certain extent, and reducing the power consumption of the amplifier can allow more amplifiers to be placed. However, low-temperature, low-noise HEMTs generally use semiconductor materials such as InP or InGaAs. As the number of bits increases, the power is limited and needs to be reduced; while low-temperature, low-power HBTs usually use semiconductor materials such as GeSi. As the number of bits increases, the power is relatively reduced, but the noise is too high; and due to the differences in transistor materials and substrates, the two cannot be made into MMICs, and discrete components (such as resistors, capacitors, inductors, microstrips, etc. discrete devices to make amplifiers) need to be used for matching. These discrete devices themselves have parasitic parameters, and the bonding and welding between them also have parasitic parameters. Accurate simulation is difficult, so it is difficult to achieve optimal performance. Summary of the invention

[0004] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0005] The purpose of the present invention is to solve the shortcomings of the prior art and to propose a low-power low-noise amplifier operating in the liquid helium temperature region.

[0006] In order to achieve the above object, the present invention adopts the following technical solution: a low power consumption low noise amplifier operating in the liquid helium temperature region, comprising:

[0007] A module circuit, wherein the module circuit includes an input matching circuit, a plurality of inter-stage matching circuits and an output matching circuit, wherein the module circuit has one or more transistor filling areas reserved therein, and the transistor filling areas are used to fill corresponding transistors;

[0008] The transistors include at least one low-noise transistor and a plurality of low-power transistors. The low-noise transistor is arranged between the input matching circuit and the inter-stage matching circuit. The low-power transistor is arranged between the inter-stage matching circuit and the output matching circuit.

[0009] As a further description of the above technical solution, the low-noise transistor is arranged between the input matching circuit and the inter-stage matching circuit, and the low-power transistor is arranged between the inter-stage matching circuit and the output matching circuit.

[0010] As a further description of the above technical solution, the low-noise transistor includes a cascade transistor and an output transistor, both ends of the cascade transistor are electrically connected to the inter-stage matching circuit, both ends of the output transistor are electrically connected to the inter-stage matching circuit and the output matching circuit, and a plurality of low-power transistors are provided.

[0011] As a further description of the above technical solution, the module circuit reserves one or more transistor filling areas according to a processing technology scheme, and the processing scheme includes a thin film circuit integration process scheme, a high electron mobility transistor process scheme and a heterojunction bipolar transistor process scheme.

[0012] As a further description of the above technical solution, the thin-film circuit integration process solution reserves a first filling area, a second filling area and a third filling area, the first filling area is arranged between the input matching circuit and the inter-stage matching circuit, the second filling area is arranged between the inter-stage matching circuits, and the third filling area is arranged between the inter-stage matching circuit and the output matching circuit.

[0013] As a further description of the above technical solution, the gate of the low-noise transistor is electrically connected to the microstrip line of the input matching circuit through a metal wire, the drain of the low-noise transistor is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, the base of the low-power transistor is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, the collector of the low-power transistor in the middle is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, and the collector of the low-power transistor at the tail is electrically connected to the microstrip line of the output matching circuit through a metal wire.

[0014] As a further description of the above technical solution, the high electron mobility transistor process solution reserves a first filling area and a second filling area, the first filling area is arranged between the inter-stage matching circuit, and the second filling area is arranged between the inter-stage matching circuit and the output matching circuit.

[0015] As a further description of the above technical solution, the low-noise transistor, the input matching circuit and the inter-stage matching circuit form a peripheral circuit as a whole, the base of the low-power transistor is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, the collector of the low-power transistor in the middle is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, and the collector of the low-power transistor at the tail is electrically connected to the microstrip line of the output matching circuit through a metal wire.

[0016] As a further description of the above technical solution, the heterojunction bipolar transistor process solution reserves a first filling area, and the first filling area is arranged between the input matching circuit and the inter-stage matching circuit.

[0017] As a further description of the above technical solution, the gate of the low-noise transistor is electrically connected to the microstrip line of the input matching circuit through a metal wire, the drain of the low-noise transistor is electrically connected to the microstrip line of the inter-stage matching circuit through a metal wire, and the low-power transistor, the inter-stage matching circuit and the output matching circuit form a peripheral circuit as a whole.

[0018] The present invention has the following beneficial effects:

[0019] The present invention integrates discrete devices such as microstrip lines, resistors, capacitors, inductors, etc. in a modular form, all of which adopt a thin film circuit form similar to a chip, so as to realize the integration of different types of transistors into an amplifier circuit in the form of a monolithic microwave integrated chip, with high integration, good consistency, and convenience for mass production; and one or more transistor reserved areas can be reserved in the circuit according to a specific processing technology plan, and correspondingly filled with at least one low-noise transistor and multiple low-power transistors to form a multi-stage amplifier circuit, which effectively reduces the operating power consumption and production cost while maintaining the noise temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of a module circuit in the present invention;

[0021] Figure 2 It is a schematic diagram of a module circuit corresponding to the thin film circuit integration process solution in the present invention;

[0022] Figure 3 It is a schematic diagram of a module circuit corresponding to the high electron mobility transistor process solution in the present invention;

[0023] Figure 4 It is a schematic diagram of the module circuit corresponding to the heterojunction bipolar transistor process solution in the present invention.

[0024] Legend:

[0025] 1. Input matching circuit; 2. Inter-stage matching circuit; 3. Output matching circuit; 4. Transistor filling area; 41. First filling area; 42. Second filling area; 43. Third filling area; 5. Low noise transistor; 6. Low power transistor. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Please refer to the following examples for details:

[0028] Reference Figure 1 The present invention provides an embodiment of a low-power low-noise amplifier operating in a liquid helium temperature zone, the specific structure of which includes: a module circuit, the module circuit including an input matching circuit 1, a plurality of inter-stage matching circuits 2 and an output matching circuit 3, the module circuit also reserves one or more transistor filling areas 4 for filling transistors of corresponding types and functions.

[0029] The input matching circuit 1 is used for matching the optimal noise within the passband frequency range; the inter-stage matching circuit 2 is used for matching the front and rear amplifiers; and the output matching circuit 3 is used for output standing wave and stability matching.

[0030] Furthermore, the transistor includes at least one low noise transistor 5 and a plurality of low power transistors 6. The low noise transistor 5 is arranged between the input matching circuit 1 and the inter-stage matching circuit 2, and the low power transistor 6 is arranged between the inter-stage matching circuit 2 and the output matching circuit 3.

[0031] It should be explained in detail that the two ends of the low-power transistor 6 are electrically connected to the input matching circuit 1 and the inter-stage matching circuit 2; and the low-noise transistor 5 includes a cascade transistor and an output transistor, the two ends of the cascade transistor are electrically connected to the inter-stage matching circuit 2, and the two ends of the output transistor are electrically connected to the inter-stage matching circuit 2 and the output matching circuit 3.

[0032] Please continue reading Figure 1In a specific embodiment, the input matching circuit 1 includes a microstrip line TL1, and a transmission line with an impedance of 50Ω is used to transmit signals. The microstrip line TL1 is connected in series with a matching capacitor C1, which plays a role in isolating direct current and impedance matching. The matching capacitor C1 is connected in series with a microstrip line TL2, which plays a role in two-stage impedance transformation, and the upper slender section (high impedance) of TL2 is used to curb high-frequency signal leakage and to provide bias current. Among them, it also includes a gate bias circuit, which includes a resistor R1 and a capacitor C2. The resistor R1 is connected in series with the microstrip line TL2, and the filter capacitor C2 is connected in parallel with the resistor R1 to filter and filter out the high-frequency signal in the bias current. The noise, bandwidth and return loss of the RF input terminal RF in are adjusted by the microstrip line TL2, the matching capacitor C1, the filter capacitor C2 and the resistor R1, and the transistor bias circuit is provided with a power supply function.

[0033] Furthermore, the amplifier inter-stage matching circuit 2 includes a microstrip line TL3, which uses a transmission line with an impedance of 30-70Ω to transmit signals. The microstrip line TL3 is connected in series with a DC blocking capacitor C4 to isolate DC. The matching capacitor C1 is connected in series with an inductor L2, and the inductor L2 is connected in series with the microstrip line TL4. The matching capacitor C1 and the inductor L2 form a filter circuit for adjusting the overall bandwidth and gain.

[0034] Furthermore, a bias circuit is included, and the bias circuit includes an inductor L1, a capacitor C3, a resistor R2 and a capacitor C5. The inductor L1 and the microstrip line TL3 are connected in series to prevent leakage of high-frequency signals and to provide a bias current. The inductor L1 is connected in parallel with the capacitor C3 for filtering. The resistor R2 is connected to the capacitor C4 to prevent leakage of high-frequency signals. The resistor R2 is connected in parallel with the capacitor C5 for filtering.

[0035] Furthermore, the output matching circuit 3 includes a microstrip line TL7, which uses a transmission line with an impedance of 30-70Ω to transmit signals. The microstrip line TL7 is connected in series with a matching capacitor C10, which plays a role in isolating DC and impedance matching. The matching capacitor C1 is connected in series with a microstrip line TL8, and a transmission line with an impedance of 50Ω is used to transmit signals. Among them, it also includes a bias circuit, which includes an inductor L5 and a capacitor C9. The inductor L5 and the microstrip line TL7 are connected in series to curb high-frequency signal leakage and to provide a bias current. The inductor L5 is connected in parallel with the capacitor C9 for filtering.

[0036] It should be explained in detail that the structures of the multiple inter-stage matching circuits 2 and the multiple bias circuits are similar, and the models of discrete components such as microstrip lines, resistors, capacitors, inductors, etc. can be selected and replaced according to actual power consumption and noise requirements.

[0037] It can be understood that in the present application, discrete devices such as microstrip lines, resistors, capacitors, inductors, etc. are integrated in a modular form, all in the form of thin film circuits similar to chips, which can realize the integration of different types of transistors into amplifier circuits in the form of a monolithic microwave integrated chip. Therefore, the integration is high, the consistency is good, and it is easy to carry out mass production.

[0038] Please continue reading Figure 1 The module circuit reserves one or more transistor filling areas 4 according to the processing scheme. The processing scheme includes a thin film circuit integration process scheme, a high electron mobility transistor (HEMT) process scheme and a heterojunction bipolar transistor (HBT) process scheme.

[0039] Please continue reading Figure 2 In a specific embodiment, when the processing scheme is a thin film circuit integration process scheme, a first filling area 41, a second filling area 42 and a third filling area 43 are reserved in the circuit. The first filling area 41 is arranged between the input matching circuit 1 and the inter-stage matching circuit 2, the second filling area 42 is arranged between the inter-stage matching circuit 2, and the third filling area 43 is arranged between the inter-stage matching circuit 2 and the output matching circuit 3.

[0040] In this embodiment, the low noise transistor 5T1 is disposed in the first filling region 41. The gate G of the low noise transistor 5T1 is electrically connected to the microstrip line TL2 of the input matching circuit 1 through the metal wire W1, and the drain of the low noise transistor 5T1 is electrically connected to the microstrip line TL3 of the inter-stage matching circuit 2 through the metal wire W2, and the input matching circuit 1 is transformed from high to low or low to high impedance to achieve optimal noise matching.

[0041] In this embodiment, the low-power transistor 6 is disposed in the second filling area 42 and the third filling area 43. The base B of the low-power transistor 6T2 is electrically connected to the microstrip line TL4 of the inter-stage matching circuit 2 through the metal wire W3, and the collector C of the low-power transistor 6T2 is electrically connected to the microstrip line TL5 of the inter-stage matching circuit 2 through the metal wire W4; the base B of the low-power transistor 6T3 is electrically connected to the microstrip line TL6 of the inter-stage matching circuit 2 through the metal wire W5, and the collector C of the low-power transistor 6T3 is electrically connected to the microstrip line TL7 of the output matching circuit 3 through the metal wire W6.

[0042] Please continue reading Figure 3In a specific embodiment, when the processing scheme is a high electron mobility transistor process scheme, a first filling area 41 and a second filling area 42 are reserved in the circuit, the first filling area 41 is arranged between the inter-stage matching circuit 2, and the second filling area 42 is arranged between the inter-stage matching circuit 2 and the output matching circuit 3.

[0043] In this embodiment, the low noise transistor 5T1 is integrated with the input matching circuit 1 and a group of inter-stage matching circuits 2 to form a peripheral circuit. The low power transistor 6 is arranged in the second filling area 42 and the third filling area 43. The base B of the low power transistor 6T2 is electrically connected to the microstrip line TL4 of the inter-stage matching circuit 2 through the metal wire W3, and the collector C of the low power transistor 6T2 is electrically connected to the microstrip line TL5 of the inter-stage matching circuit 2 through the metal wire W4; the base B of the low power transistor 6T3 is electrically connected to the microstrip line TL6 of the inter-stage matching circuit 2 through the metal wire W5, and the collector C of the low power transistor 6T3 is electrically connected to the microstrip line TL7 of the output matching circuit 3 through the metal wire W6.

[0044] Please continue reading Figure 4 In a specific embodiment, when the processing scheme is a heterojunction bipolar transistor process scheme, a first filling area 41 is reserved in the circuit, and the first filling area 41 is arranged between the input matching circuit 1 and the inter-stage matching circuit 2.

[0045] In this embodiment, the low noise transistor 5T1 is disposed in the first filling area 41. The gate G of the low noise transistor 5T1 is electrically connected to the microstrip line TL2 of the input matching circuit 1 through the metal wire W1, and the drain of the low noise transistor 5T1 is electrically connected to the microstrip line TL3 of the inter-stage matching circuit 2 through the metal wire W2, and the input matching circuit 1 is transformed from high to low or from low to high impedance to match the best noise; and the low power transistor 6 is integrated with the inter-stage matching circuit 2 and the output matching circuit 3 to form a peripheral circuit.

[0046] It can be understood that in the present application, one or more transistor reserved areas are reserved in the circuit according to a specific processing technology scheme, and at least one low-noise transistor 5 and multiple low-power transistors 6 are filled to form a multi-stage amplifier circuit, which effectively reduces the operating power consumption and production cost while maintaining the noise temperature.

[0047] It should be explained in detail that the system cascade noise formula is:

[0048]

[0049] Among them, T cas is the equivalent noise temperature of the multi-stage cascade; T e1 is the first stage equivalent noise temperature, G1 is the first stage gain; ...; T e3is the first stage equivalent noise temperature, G3 is the third stage gain…

[0050] The following takes the typical parameters of a single transistor as an example, ignoring the slight changes in gain and power consumption caused by peripheral matching. The device requirements for actual applications are: frequency range 4-8GHz, operating temperature (-269℃), equivalent noise temperature ≤2K, and power consumption <10mW.

[0051] In this embodiment, according to the system noise cascade formula, the equivalent noise temperature is mainly related to the first stage, so InP HEMT transistors or other low-noise transistors 5 containing In can be used as the first stage of the amplifier to reduce noise; GeSi HBT or other low-power transistors 6 containing Si can be used as the second and third stages of the amplifier to reduce power consumption, thereby producing a low-noise, low-power amplifier;

[0052] Furthermore, the following are the highest equivalent noise temperatures for different types of transistors in the 4-8GHz frequency band:

[0053] (1) InP HEMT transistors, usually with an equivalent noise temperature of 1.5K, a gain of 13dB (20 times), and a power consumption of 3mW; InPHEMT uses a gate index of 2, a gate width of 75um, or InGaAs transistors (such as Mitsubishi MGFC4419);

[0054] (2) GeSi HBT transistor, usually has an equivalent noise temperature of 8K, a gain of 13dB (20 times), and a power consumption of 0.5mW; GaAsHEMT (without In), usually has an equivalent noise temperature of 10K, a gain of 13dB (20 times), and a power consumption of 10mW (e.g. NXP BFU910F).

[0055] After entering the system cascade formula, the following table shows the performance comparison at low temperature:

[0056]

[0057]

[0058] In this embodiment, the first level may be InP, and the second / third level may be GeSi;

[0059] Or a total of two amplifier stages, the first stage is InP, the second stage is GeSi;

[0060] Or there are three amplifier stages in total, the first stage is InP, the second stage is InP, and the third stage is GeSi;

[0061] Or a total of four amplifier stages, the first stage is InP, the second / third / fourth stage is GeSi;

[0062] …

[0063] When actually designing a solution, a combination can be selected based on the balance between noise and power consumption.

[0064] It can be understood that in the present application, by selecting the type of amplifier transistor, the power consumption is reduced by more than 50% when the equivalent noise temperature is basically unchanged or meets conventional requirements; the main material cost of the low-power low-noise amplifier comes from the transistor, and the price of GeSi transistors is much lower than that of InP, which can greatly reduce the manufacturing cost and reduce the production price to 10% of the original.

[0065] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, it is still possible for those skilled in the art to modify the technical solutions described in the aforementioned embodiments or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A low power consumption low noise amplifier operating in the liquid helium temperature region, characterized in that: include: A module circuit, the module circuit comprising an input matching circuit (1), an inter-stage matching circuit (2) and an output matching circuit (3), the module circuit having one or more transistor filling areas (4) reserved therein, the transistor filling areas (4) being used to fill corresponding transistors; The transistor comprises a low-noise transistor (5) and a low-power transistor (6); the low-noise transistor (5) is arranged between the input matching circuit (1) and the inter-stage matching circuit (2); and the low-power transistor (6) is arranged between the inter-stage matching circuit (2) and the output matching circuit (3).

2. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 1, characterized in that: The low-noise transistor (5) is arranged between the input matching circuit (1) and the inter-stage matching circuit (2), and the low-power transistor (6) is arranged between the inter-stage matching circuit (2) and the output matching circuit (3).

3. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 1, characterized in that: The low-noise transistor (5) comprises a cascade transistor and an output transistor, the two ends of the cascade transistor are electrically connected to the inter-stage matching circuit (2), the two ends of the output transistor are electrically connected to the inter-stage matching circuit (2) and the output matching circuit (3), and a plurality of the low-power transistors (6) are provided.

4. A low power consumption low noise amplifier operating in the liquid helium temperature range according to any one of claims 1 to 3, characterized in that: The module circuit reserves one or more transistor filling areas (4) according to a processing scheme, wherein the processing scheme includes a thin film circuit integration process scheme, a high electron mobility transistor process scheme and a heterojunction bipolar transistor process scheme.

5. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 4, characterized in that: The thin film circuit integration process solution reserves a first filling area (41), a second filling area (42) and a third filling area (43); the first filling area (41) is arranged between the input matching circuit (1) and the inter-stage matching circuit (2); the second filling area (42) is arranged between the inter-stage matching circuit (2); and the third filling area (43) is arranged between the inter-stage matching circuit (2) and the output matching circuit (3).

6. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 5, characterized in that: The gate of the low-noise transistor (5) is electrically connected to the microstrip line of the input matching circuit (1) through a metal wire, the drain of the low-noise transistor (5) is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire, the base of the low-power transistor (6) is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire, the collector of the low-power transistor (6) in the middle is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire, and the collector of the low-power transistor (6) at the tail is electrically connected to the microstrip line of the output matching circuit (3) through a metal wire.

7. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 4, characterized in that: The high electron mobility transistor process solution reserves a first filling region (41) and a second filling region (42), wherein the first filling region (41) is arranged between the inter-stage matching circuits (2), and the second filling region (42) is arranged between the inter-stage matching circuits (2) and the output matching circuit (3).

8. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 7, characterized in that: The low-noise transistor (5) is integrated with the input matching circuit (1) and the inter-stage matching circuit (2) to form a peripheral circuit; the base of the low-power transistor (6) is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire; the collector of the low-power transistor (6) in the middle is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire; and the collector of the low-power transistor (6) at the tail is electrically connected to the microstrip line of the output matching circuit (3) through a metal wire.

9. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 4, characterized in that: The heterojunction bipolar transistor process solution reserves a first filling area (41), and the first filling area (41) is arranged between the input matching circuit (1) and the inter-stage matching circuit (2).

10. A low power consumption low noise amplifier operating in the liquid helium temperature region according to claim 9, characterized in that: The gate of the low-noise transistor (5) is electrically connected to the microstrip line of the input matching circuit (1) through a metal wire, the drain of the low-noise transistor (5) is electrically connected to the microstrip line of the inter-stage matching circuit (2) through a metal wire, and the low-power transistor (6) is integrated with the inter-stage matching circuit (2) and the output matching circuit (3) to form a peripheral circuit.

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