ECC (Error Correction Code) verification method and device and electronic equipment

By grouping the original data at the data sending end, adding check bits and processing, the problem of high memory error rate in the existing ECC verification method is solved, and the ability to restore the original data at the receiving end is realized, which significantly reduces the data error rate of the memory.

CN119892112AActive Publication Date: 2025-04-25SHENZHEN CITY TECHWIN SEMICONDUCTOR COMPANY LIMITED
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Patent Information

Application Number
CN202411893756.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-20
Publication Date
2025-04-25
Estimated Expiration
2044-12-20

AI Technical Summary

Technical Problem

The existing ECC verification methods have the problem of high memory error rate, especially when the data packet is large, the probability of more than 2-bit data errors increase, resulting in the protection of Hamming code failure.

Method used

The original data is grouped at the data sending end, check bits are added, CRC fingerprint processing and interleaving processing are performed to form the first intermediate data. Introduce error data during transmission or storage, and restore the original data through deinterleaving, deming Chinese code and de-CRC fingerprint processing.

Benefits of technology

By deprocessing the error data at the receiving end, the data error rate of the memory can be significantly reduced and the integrity of the data during transmission or storage procedures can be ensured.

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Abstract

The invention provides an ECC (Error Correction Code) verification method and device and electronic equipment, and the method comprises the steps: carrying out the grouping of original data codes according to bytes if a detection result shows that a data transmitting end transmits the original data codes, and obtaining a plurality of sub-original data codes; adding a check bit in each sub original data code to obtain a processed original data code; performing CRC fingerprint processing and interleaving processing on the processed original data code to obtain first intermediate state data; when the first intermediate state data is transmitted or stored, introducing error data into the first intermediate state data to obtain second intermediate state data; performing de-interleaving processing, Ming-Han code decoding processing and CRC fingerprint decoding processing on the second intermediate state data to obtain recovery data; and receiving the recovery data through a data receiving end. The ECC verification method can significantly reduce the data error rate of the memory.
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Description

Technical Field

[0001] The present invention relates to the field of ECC verification technology, and in particular to an ECC verification method, device and electronic equipment. Background Art

[0002] Traditional ECC verification methods generally use minimal redundant information to protect data. However, due to the increase in information bits, overly large data groups increase the probability of more than 2-bit data errors. Once this happens, the protection of the Hamming code fails.

[0003] In general, the existing ECC verification method has a high memory error rate. Summary of the invention

[0004] The object of the present invention is to provide an ECC checking method, device and electronic device to alleviate the technical problem of high memory error rate in the existing ECC checking method, thereby reducing the memory error rate.

[0005] In the first aspect, an embodiment of the present invention provides an ECC verification method, comprising: if it is detected that a data sending end sends an original data code, grouping the original data code by bytes to obtain multiple sub-original data codes; adding a check bit in each of the sub-original data codes to obtain a processed original data code; performing CRC fingerprint processing and interleaving processing on the processed original data code to obtain first intermediate state data; when the first intermediate state data is transmitted or stored, introducing error data into the first intermediate state data to obtain second intermediate state data; performing deinterleaving processing, Minghan code deinterleaving processing and CRC fingerprint deinterleaving processing on the second intermediate state data to obtain recovered data; receiving the recovered data through a data receiving end.

[0006] In a preferred embodiment of the present invention, the step of grouping the above original data code by bytes to obtain multiple sub-original data codes includes: grouping the above original data code by one byte to obtain multiple sub-original data codes.

[0007] In a preferred embodiment of the present invention, after the step of grouping the above-mentioned original data code into one byte to obtain multiple sub-original data codes, the above-mentioned method includes: determining whether each of the above-mentioned sub-original data codes is 8 bits; if not, padding zeros after the sub-original data codes that are less than 8 bits to make each of the above-mentioned sub-original data codes 8 bits.

[0008] In a preferred embodiment of the present invention, the original data code is 14 bits.

[0009] In a preferred embodiment of the present invention, the step of grouping the above-mentioned original data code by one byte to obtain multiple sub-original data codes includes: determining the first 8 bits of data of the above-mentioned original data as the first sub-original data code of the above-mentioned multiple sub-original data codes; and padding the last 6 bits of data of the above-mentioned original data with zeros to obtain the second sub-original data code of the above-mentioned multiple sub-original data codes; the above-mentioned second sub-original data code is 8 bits.

[0010] In a preferred embodiment of the present invention, the step of adding a check bit in each of the above-mentioned sub-original data codes to obtain a processed original data code includes: adding a 4-bit check bit after each of the above-mentioned sub-original data codes to obtain a processed original data code.

[0011] In a preferred embodiment of the present invention, the step of performing CRC fingerprint processing and interleaving processing on the above-mentioned processed original data code to obtain the first intermediate state data includes: performing CRC fingerprint processing on the above-mentioned processed original data code to obtain the original data code after fingerprint processing; performing 4-bit interval interleaving processing on the above-mentioned fingerprint processed original data code to obtain the first intermediate state data.

[0012] In the second aspect, an embodiment of the present invention also provides an ECC verification device, including: a grouping module, which is used to group the above original data code by bytes to obtain multiple sub-original data codes if it is detected that the data sending end sends the original data code; a check bit adding module, which is used to add a check bit in each of the above sub-original data codes to obtain a processed original data code; a processing module, which is used to perform CRC fingerprint processing and interleaving processing on the above processed original data code to obtain a first intermediate state data; an error introduction module, which is used to introduce error data into the above first intermediate state data when the above first intermediate state data is being transmitted or stored to obtain a second intermediate state data; a deprocessing module, which is used to perform deinterleaving processing, Minghan code decompression processing and CRC fingerprint decompression processing on the above second intermediate state data to obtain recovered data; a receiving module, which is used to receive the above recovered data through a data receiving end.

[0013] In a third aspect, an embodiment of the present invention further provides an electronic device, comprising a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the method.

[0014] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, and the computer program implements the above method when executed by a processor.

[0015] The embodiments of the present invention have the following beneficial technical effects:

[0016] The embodiment of the present invention provides an ECC verification method, device and electronic device, including: if it is detected that the data sending end sends the original data code, the original data code is grouped by bytes to obtain multiple sub-original data codes; a check bit is added to each of the sub-original data codes to obtain a processed original data code; the processed original data code is subjected to CRC fingerprint processing and interleaving processing to obtain the first intermediate state data; when the first intermediate state data is transmitted or stored, error data is introduced into the first intermediate state data to obtain the second intermediate state data; the second intermediate state data is subjected to deinterleaving processing, Minghan code processing and CRC fingerprint processing to obtain recovery data; the recovery data is received through the data receiving end. The ECC verification method groups the original data, adds check bits, CRC fingerprint processing and interleaving processing at the data sending end, so that even if errors are introduced during the data transmission or storage process, the original data can be recovered at the receiving end through deinterleaving, Minghan code processing and CRC fingerprint processing, thereby significantly reducing the data error rate of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 A schematic diagram of a flow chart of an ECC checking method provided by an embodiment of the present invention;

[0019] Figure 2 A schematic diagram of a flow chart of another ECC checking method provided by an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of the structure of an ECC checking device provided by an embodiment of the present invention;

[0021] Figure 4 A schematic structural diagram of an electronic device provided by an embodiment of the present invention.

[0022] Icons: 31 - grouping module; 32 - check bit adding module; 33 - processing module; 34 - error introduction module; 35 - de-processing module; 36 - receiving module; 41 - memory; 42 - processor; 43 - bus; 44 - communication interface. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0024] The existing ECC verification method has a high memory error rate.

[0025] Based on this, the embodiment of the present invention provides an ECC verification method, device and electronic device. The ECC verification method groups the original data at the data sending end, adds check bits, performs CRC fingerprint processing and interleaving processing, so that even if errors are introduced during data transmission or storage, the original data can be restored at the receiving end through deinterleaving, Minghan code processing and CRC fingerprint processing, thereby significantly reducing the data error rate of the memory. For ease of understanding, an ECC verification method is first introduced in detail.

[0026] Example 1

[0027] In this embodiment, Figure 1 A flowchart of an ECC checking method provided by an embodiment of the present invention.

[0028] Depend on Figure 1 As can be seen, the method includes:

[0029] Step S101: if it is detected that the data sending end sends an original data code, the original data code is grouped by bytes to obtain a plurality of sub-original data codes.

[0030] Step S102: adding a check bit to each of the above sub-original data codes to obtain a processed original data code.

[0031] Step S103: performing CRC fingerprint processing and interleaving processing on the original data code after the above processing to obtain the first intermediate state data.

[0032] Step S104: when the first intermediate state data is being transmitted or stored, erroneous data is introduced into the first intermediate state data to obtain second intermediate state data.

[0033] Step S105: performing de-interleaving processing, Ming-Han code processing and CRC fingerprint processing on the second intermediate state data to obtain restored data.

[0034] Step S106: receiving the above-mentioned restored data through the data receiving end.

[0035] The embodiment of the present invention provides an ECC verification method, including: if it is detected that the data sending end sends the original data code, the original data code is grouped by bytes to obtain multiple sub-original data codes; a check bit is added to each of the sub-original data codes to obtain a processed original data code; the processed original data code is subjected to CRC fingerprint processing and interleaving processing to obtain the first intermediate state data; when the first intermediate state data is transmitted or stored, error data is introduced into the first intermediate state data to obtain the second intermediate state data; the second intermediate state data is subjected to deinterleaving processing, Minghan code processing and CRC fingerprint processing to obtain restored data; and the restored data is received through the data receiving end. The ECC verification method groups the original data at the data sending end, adds check bits, performs CRC fingerprint processing and interleaving processing, so that even if errors are introduced during the data transmission or storage process, the original data can be restored at the receiving end through deinterleaving, Minghan code processing and CRC fingerprint processing, thereby significantly reducing the data error rate of the memory.

[0036] Example 2

[0037] Based on the above embodiments, Figure 2 A schematic flow chart of another ECC checking method provided by an embodiment of the present invention.

[0038] Depend on Figure 2 As can be seen, the method includes:

[0039] Step S201: if it is detected that the data transmitting end sends the original data code, the original data code is grouped into one byte to obtain a plurality of sub-original data codes.

[0040] In this embodiment, after the step of grouping the above-mentioned original data code into one byte to obtain multiple sub-original data codes, the above-mentioned method includes: determining whether each of the above-mentioned sub-original data codes is 8 bits; if not, padding zeros after the sub-original data codes that are less than 8 bits to make each of the above-mentioned sub-original data codes 8 bits.

[0041] In actual operation, the above original data code is 14 bits.

[0042] Furthermore, the step of grouping the above-mentioned original data code by one byte to obtain multiple sub-original data codes includes: determining the first 8 bits of data of the above-mentioned original data as the first sub-original data code of the above-mentioned multiple sub-original data codes; and padding the last 6 bits of data of the above-mentioned original data with zeros to obtain the second sub-original data code of the above-mentioned multiple sub-original data codes; the above-mentioned second sub-original data code is 8 bits.

[0043] Step S202: adding a check bit to each of the above sub-original data codes to obtain a processed original data code.

[0044] In this embodiment, the step of adding a check bit to each of the above sub-original data codes to obtain a processed original data code includes: adding a 4-bit check bit after each of the above sub-original data codes to obtain a processed original data code.

[0045] Step S203: performing CRC fingerprint processing and interleaving processing on the original data code after the above processing to obtain the first intermediate state data.

[0046] In this embodiment, the steps of performing CRC fingerprint processing and interleaving processing on the original data code after the above processing to obtain the first intermediate state data include: performing CRC fingerprint processing on the original data code after the above processing to obtain the original data code after fingerprint processing; performing 4-bit interval interleaving processing on the original data code after the above fingerprint processing to obtain the first intermediate state data.

[0047] Step S204: when the first intermediate state data is being transmitted or stored, erroneous data is introduced into the first intermediate state data to obtain second intermediate state data.

[0048] Step S205: performing de-interleaving processing, Ming-Han code processing and CRC fingerprint processing on the second intermediate state data to obtain restored data.

[0049] Step S206: receiving the above-mentioned restored data through the data receiving end.

[0050] The embodiment of the present invention provides an ECC verification method, including: if it is detected that the data sending end sends the original data code, the original data code is grouped by one byte to obtain multiple sub-original data codes; a check bit is added to each of the sub-original data codes to obtain a processed original data code; the processed original data code is subjected to CRC fingerprint processing and interleaving processing to obtain the first intermediate state data; when the first intermediate state data is transmitted or stored, error data is introduced into the first intermediate state data to obtain the second intermediate state data; the second intermediate state data is subjected to deinterleaving processing, Minghan code processing and CRC fingerprint processing to obtain recovery data; the recovery data is received through the data receiving end. The ECC verification method performs one-byte grouping, adds check bits, CRC fingerprint processing and interleaving processing on the original data at the data sending end, so that even if errors are introduced during the data transmission or storage process, the original data can be recovered at the receiving end through deinterleaving, Minghan code processing and CRC fingerprint processing, thereby further reducing the data error rate of the memory.

[0051] Example 3

[0052] Based on the above embodiments, Figure 3A schematic diagram of the structure of an ECC checking device provided in an embodiment of the present invention.

[0053] Depend on Figure 3 As can be seen, the above-mentioned device includes:

[0054] The grouping module 31 is used for grouping the original data code by bytes to obtain a plurality of sub-original data codes if it is detected that the data sending end sends the original data code.

[0055] The check bit adding module 32 is used to add a check bit to each of the above sub-original data codes to obtain a processed original data code.

[0056] The processing module 33 is used to perform CRC fingerprint processing and interleaving processing on the original data code after the above processing to obtain the first intermediate state data.

[0057] The error introduction module 34 is used to introduce error data into the first intermediate state data when the first intermediate state data is being transmitted or stored, so as to obtain second intermediate state data.

[0058] The de-processing module 35 is used to perform de-interleaving processing, Ming-Han code de-processing and CRC fingerprint de-processing on the second intermediate state data to obtain restored data.

[0059] The receiving module 36 is used to receive the above-mentioned restored data through a data receiving end.

[0060] The grouping module 31, the check bit adding module 32, the processing module 33, the error introducing module 34, the solution processing module 35 and the receiving module 36 are connected in sequence.

[0061] The ECC verification device provided in the embodiment of the present invention has the same technical features as the ECC verification method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the device described above can refer to the corresponding process in the above method embodiment, and will not be repeated here.

[0062] Example 4

[0063] This embodiment provides an electronic device, including a processor and a memory, wherein the memory stores computer executable instructions that can be executed by the processor, and the processor executes the computer executable instructions to implement the steps of the ECC checking method.

[0064] This embodiment provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of the ECC checking method are implemented.

[0065] See also Figure 4 The schematic diagram of the structure of an electronic device shown in the figure comprises: a memory 41 and a processor 42. The memory 41 stores a computer program that can be run on the processor 42. When the processor executes the computer program, the steps provided by the above-mentioned ECC verification method are implemented.

[0066] like Figure 4 As shown, the device further includes: a bus 43 and a communication interface 44, a processor 42, a communication interface 44 and a memory 41 are connected via the bus 43; the processor 42 is used to execute executable modules stored in the memory 41, such as computer programs.

[0067] The memory 41 may include a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk memory. The communication connection between the system network element and at least one other network element is realized through at least one communication interface 44 (which may be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. may be used.

[0068] The bus 43 may be an ISA bus, a PCI bus, or an EISA bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0069] Among them, the memory 41 is used to store the program, and the processor 42 executes the program after receiving the execution instruction. The method performed by the ECC check device disclosed in any embodiment of the present invention can be applied to the processor 42, or implemented by the processor 42. The processor 42 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 42. The above processor 42 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The disclosed methods, steps and logic block diagrams in the embodiments of the present invention can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present invention can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 41, and the processor 42 reads the information in the memory 41 and completes the steps of the above method in combination with its hardware.

[0070] Furthermore, an embodiment of the present invention also provides a machine-readable storage medium, which stores machine-executable instructions. When the machine-executable instructions are called and executed by the processor 42, the machine-executable instructions prompt the processor 42 to implement the above-mentioned ECC checking method.

[0071] The electronic device and computer-readable storage medium provided by the embodiments of the present invention have the same technical features, and therefore can solve the same technical problems and achieve the same technical effects.

[0072] In addition, in the description of the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0073] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

Claims

1. An ECC verification method, characterized in that: include: If it is detected that the data transmitting end sends the original data code, the original data code is grouped by bytes to obtain a plurality of sub-original data codes; Adding a check bit to each of the sub-original data codes to obtain a processed original data code; Performing CRC fingerprint processing and interleaving processing on the processed original data code to obtain first intermediate state data; When the first intermediate state data is being transmitted or stored, introducing error data into the first intermediate state data to obtain second intermediate state data; Performing deinterleaving processing, Ming-Han code processing and CRC fingerprint processing on the second intermediate state data to obtain restored data; The restored data is received through a data receiving end.

2. The ECC checking method according to claim 1, characterized in that: The step of grouping the original data code by bytes to obtain a plurality of sub-original data codes comprises: The original data code is grouped by one byte to obtain a plurality of sub-original data codes.

3. The ECC checking method according to claim 2, characterized in that: After the step of grouping the original data code by one byte to obtain a plurality of sub-original data codes, the method comprises: Determining whether each of the sub-original data codes is 8 bits; If not, zeros are added after the sub-original data codes that are less than 8 bits, so that each of the sub-original data codes is 8 bits.

4. The ECC checking method according to claim 3, characterized in that: The original data code is 14 bits.

5. The ECC checking method according to claim 4, characterized in that: The step of grouping the original data code by one byte to obtain a plurality of sub-original data codes comprises: The first 8 bits of the original data are determined as the first sub-original data code of the multiple sub-original data codes; and the last 6 bits of the original data are padded with zeros to obtain the second sub-original data code of the multiple sub-original data codes; the second sub-original data code is 8 bits.

6. The ECC checking method according to claim 1, characterized in that: The step of adding a check bit to each of the sub-original data codes to obtain a processed original data code comprises: A 4-bit check bit is added after each of the sub-original data codes to obtain a processed original data code.

7. The ECC checking method according to claim 1, characterized in that: The step of performing CRC fingerprint processing and interleaving processing on the processed original data code to obtain first intermediate state data includes: Performing CRC fingerprint processing on the processed original data code to obtain the original data code after fingerprint processing; The original data code after the fingerprint processing is interleaved at 4-bit intervals to obtain first intermediate state data.

8. An ECC checking device, characterized in that: include: A grouping module, for grouping the original data code by bytes to obtain a plurality of sub-original data codes if it is detected that the data sending end sends the original data code; A check bit adding module, used for adding a check bit to each of the sub-original data codes to obtain a processed original data code; A processing module, used for performing CRC fingerprint processing and interleaving processing on the processed original data code to obtain first intermediate state data; an error introduction module, used to introduce error data into the first intermediate state data when the first intermediate state data is being transmitted or stored, so as to obtain second intermediate state data; A de-processing module, used for performing de-interleaving processing, de-Ming-Han code processing and de-CRC fingerprint processing on the second intermediate state data to obtain restored data; The receiving module is used to receive the restored data through a data receiving end.

9. An electronic device, characterized in that: The electronic device comprises a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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