Network-on-chip topological structure and method and device for sending routing request

By introducing a multi-layer sub-network topology into the Spidergon network topology, a ring network topology is formed, which solves the problems of high data transmission delay and complex wiring, and achieves lower network delay and simpler wiring.

CN119892711AInactive Publication Date: 2025-04-25SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD

Patent Information

Application Number
CN202510391390.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-31
Publication Date
2025-04-25
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

When the existing Spidergon network topology is expanded, the network delay of data transmission in the network is high and the wiring complexity is high.

Method used

A on-chip network topology structure is proposed. Through Q subnetwork topology structure one, each subnetwork topology structure one includes 2N subnetwork topology structure two, and subnetwork topology structure two includes 2M routing nodes, forming a ring network topology structure. This structure reduces network delay through a specific routing request sending method.

Benefits of technology

By increasing the number of routing nodes, the network diameter of each routing node is reduced, thereby reducing the network delay of data transmission in the network, and solving the problems of high delay and complex wiring in the prior art.

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Abstract

The embodiment of the invention provides an on-chip network topology structure and a routing request sending method and device.The on-chip network topology structure comprises Q first sub-network topology structures, each first sub-network topology structure comprises 2N second sub-network topology structures, each second sub-network topology structure comprises 2M routing nodes, Q, N and M are integers larger than 1 respectively, and M is an integer larger than 1. Each first sub-network topology structure is connected with other Q-1 first sub-network topology structures, the 2N second sub-network topology structures in each first sub-network topology structure are connected to form a ring network topology structure, and the 2M routing nodes in each second sub-network topology structure are connected to form a ring network topology structure. According to the data transmission method and device, the problem that the network delay of data transmission in the network is high is solved, and the effect of reducing the network delay of data transmission in the network is achieved.
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Description

Technical Field

[0001] The embodiments of the present application relate to the computer field, and in particular, to a network on chip topology structure, a method and a device for sending a routing request. Background Art

[0002] In the field of system-on-chip, the Spidergon network topology is an easily scalable, regular, point-to-point planar topology. The Spidergon network topology is vertex symmetrical, which provides design convenience. It can use uniform routing in the network and place processing units anywhere in the network without considering the impact of location on performance. The regularity of the Spidergon network topology makes it suitable for a variety of interconnection models and reduces the complexity of layout. The low node degree and small network diameter of the Spidergon network topology reduce latency.

[0003] Octagon is a special case of Spidergon when N=8. The biggest feature of this structure is that the network distance is short. Communication between any two nodes can be completed in two steps at most, that is, the network diameter is 2. In related technologies, Octagon has two expansion methods: Figure 1 The structure shown in the figure shows two Octagons connected by an intermediate node. The network diameter is 6, and the maximum value of the routing node out-degree and in-degree is 4. It is obvious that the intermediate node of this structure will become a bottleneck for communication. Another structure is as follows Figure 2 As shown, each node in an Octagon is expanded into an Octagon, and then the nodes at corresponding positions are connected. The network diameter is 8. However, the fatal weakness of this method is that the wiring complexity is too high and the network delay of data transmission in the network is high.

[0004] There is currently no effective solution to the above problems. Summary of the invention

[0005] The embodiments of the present application provide a network-on-chip topology structure, a method and a device for sending a routing request, so as to at least solve the problem of high network delay in data transmission in the network.

[0006] According to one embodiment of the present application, there is provided an on-chip network topology structure, including Q sub-network topology structures 1, wherein the sub-network topology structure 1 includes 2N sub-network topology structures 2, wherein the sub-network topology structure 2 includes 2M routing nodes, wherein Q, N, and M are integers greater than 1, respectively, and each of the sub-network topology structures 1 is connected to other Q-1 sub-network topology structures 1, and the 2N sub-network topology structures 2 in each of the sub-network topology structures 1 are connected to form a ring network topology structure, and the 2M routing nodes in each of the sub-network topology structures 2 are connected to form a ring network topology structure.

[0007] In an exemplary embodiment, the 2N sub-network topology structures 2 in each of the sub-network topology structures 1 are connected to form a ring network topology structure, including: each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite to the sub-network topology structure.

[0008] In an exemplary embodiment, each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite the sub-network topology structure 2, including: the three routing nodes in each of the sub-network topology structures 2 are respectively connected to the corresponding routing nodes in its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite the sub-network topology structure 2.

[0009] In an exemplary embodiment, the three routing nodes in each of the sub-network topology structures 2 are respectively connected to the corresponding routing nodes in the two adjacent sub-network topology structures 2 and the sub-network topology structure 2 opposite to the sub-network topology structure 2, including: The routing node of and its two adjacent sub-network topology structures 2, and the sub-network topology structure 2 located opposite to the sub-network topology structure 2 are numbered , wherein i and j are numbers of the sub-network topology structure 2.

[0010] In an exemplary embodiment, the 2M routing nodes in each of the sub-network topology structures 2 are connected to form a ring network topology structure, including: each of the 2M routing nodes is respectively connected to its two adjacent routing nodes and a routing node located opposite to the routing node.

[0011] In an exemplary embodiment, each of the sub-network topology structures 1 is connected to other Q-1 sub-network topology structures 1, including: the fourth routing node in each sub-network topology structure 2 in the sub-network topology structure 1 is connected to the fourth routing node in the corresponding sub-network topology structure 2 in the other sub-network topology structure 1, wherein the fourth routing node is a routing node in each of the sub-network topology structures 2 except for the three routing nodes connected to the two adjacent sub-network topology structures 2 and the opposite sub-network topology structure 2.

[0012] In an exemplary embodiment, the fourth routing node in each sub-network topology structure 2 in the sub-network topology structure 1 is connected to the fourth routing node in the corresponding sub-network topology structure 2 in the other sub-network topology structure 1, including: The fourth routing node is numbered The four routing nodes are connected, where , is the number of the sub-network topology structure 1, It is the number of the sub-network topology structure 2.

[0013] In an exemplary embodiment, when N=4, each sub-network topology structure 2 includes 8 routing nodes, and the 8 routing nodes are numbered respectively: 00000001, 00000010, 00000100, 00001000, 00100000, 01000000, 10000000.

[0014] According to another embodiment of the present application, a method for sending a routing request is provided, which is applied to the above-mentioned on-chip network topology structure, comprising: obtaining the number of the source routing node and the target routing node number ;exist and When the source routing node and the target routing node are equal, the target routing request of the source routing node is sent to the target routing node in the sub-network topology structure 1; and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

[0015] In an exemplary embodiment, the target routing request of the source routing node is sent from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1 of and If they are equal, the target routing request is changed from number The routing node sends the The routing node is numbered The routing node sends the target routing request to the .

[0016] In an exemplary embodiment, the target routing request of the source routing node is sent from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1 of and If they are not equal, the target routing request is changed from numbered The routing node sends the The routing node numbered The routing node sends the target routing request to The routing node is numbered The routing node sends the target routing request to the target routing node .

[0017] In an exemplary embodiment, the number is The routing node sends the target routing request to the target routing node , including: and If they are equal, the numbers are The routing node directly sends the target routing request to the target routing node ;exist and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0018] In an exemplary embodiment, and In the case of inequality, according to and The target routing request is sent to the target routing node , including: Circular left shift of 1 bit is equal to the , or the Circular left shift of 4 bits is equal to the , or the Circular left shift of 7 bits is equal to the In the case of The routing node sends the target routing request to The routing node is Send the target routing request to , as stated Send the target routing request to the .

[0019] In an exemplary embodiment, and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 2 bits is equal to the In the case of With the In the clockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 that is spaced apart in the clockwise direction sends the target routing request to the target routing node .

[0020] In an exemplary embodiment, and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 6 bits is equal to the In the case of With the In the counterclockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 spaced in the counterclockwise direction sends the target routing request to the target routing node .

[0021] In an exemplary embodiment, and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 5 bits is equal to the In the case of With the There are two sub-network topology structures 2 in the counterclockwise direction; through the The sub-network topology structure 2 of the clockwise adjacent sub-network topology structure 2 sends the target routing request to the target routing node .

[0022] In an exemplary embodiment, and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 3 bits is equal to the In the case of With the There are two sub-network topology structures in the clockwise direction; through the The target routing request is sent to the target routing node in the counterclockwise adjacent sub-network topology structure 2. .

[0023] In an exemplary embodiment, and When the source routing node and the target routing node are equal, sending the target routing request of the source routing node to the target routing node in the sub-network topology structure 1, comprising: and When the source routing node is equal, the target routing node directly sends the target routing request to the target routing node; and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0024] According to another embodiment of the present application, a device for transmitting a data packet is provided, comprising: an acquisition module, configured to acquire the number of a source routing node and the target routing node number ; The first sending module is used to and When the source routing node and the target routing node are equal, the target routing request of the source routing node is sent to the target routing node in the sub-network topology structure 1; the second sending module is used to and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

[0025] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0026] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0027] According to another embodiment of the present application, a computer program product is also provided, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method described in each embodiment of the present application are implemented.

[0028] Through the present application, since the present application provides a network topology structure, including Q sub-network topology structures 1, sub-network topology structure 1 includes 2N sub-network topology structures 2, sub-network topology structure 2 includes 2M routing nodes, Q, N, and M are integers greater than 1, each sub-network topology structure 1 is connected to other Q-1 sub-network topology structures 1, and the 2N sub-network topology structures 2 in each sub-network topology structure 1 are connected to form a ring network topology structure, and the 2M routing nodes in each sub-network topology structure 2 are connected to form a ring network topology structure. Compared with the prior art, the number of nodes in the network topology structure of the present application has been expanded, but the network diameter of each routing node is smaller, which reduces the network delay of data transmission in the network. Therefore, the problem of high network delay of data transmission in the network can be solved, and the effect of reducing the network delay of data transmission in the network can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a schematic diagram of a network topology structure according to an embodiment of the present application;

[0030] Figure 2 is a schematic diagram of another network topology structure according to an embodiment of the present application;

[0031] Figure 3 is a schematic diagram of the Spidergon network structure according to an embodiment of the present application;

[0032] Figure 4 is another schematic diagram of a Spidergon network structure according to an embodiment of the present application;

[0033] Figure 5 is a schematic diagram of a sub-network topology structure according to an embodiment of the present application;

[0034] Figure 6 is a schematic diagram of the on-chip network topology structure of Octagon according to an embodiment of the present application;

[0035] Figure 7 is a flowchart of a method for sending a routing request according to an embodiment of the present application;

[0036] Figure 8 It is a structural block diagram of an apparatus for transmitting data packets according to an embodiment of the present application. DETAILED DESCRIPTION

[0037] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0038] Aiming at the defects of the system on chip in terms of latency, clock synchronization, scalability, energy consumption, reusability, etc., a new system on chip structure, the network on chip, has overcome the limitations brought by the bus structure, fully borrowed the relevant network technology in the existing computer network, and introduced it into the system on chip for development and utilization, which has a good development prospect. Its advantages are reflected in:

[0039] (1) The on-chip network borrows the network structure of computer networks. The entire network is connected by multiple point-to-point lines, which will not interfere with each other and can meet the communication requirements of multiple users.

[0040] (2) Unlike the system-on-chip, the network-on-chip adopts a global asynchronous and local synchronous approach to solve the clock synchronization problem. The local network works at its own clock frequency, which avoids the global synchronization problem of the clock, solves the clock offset problem, and greatly reduces the power consumption of the network.

[0041] (3) The utilization rate of bandwidth in the on-chip network is relatively high. Since the on-chip network supports multi-point parallel transmission, it can complete data transmission on multiple lines at the same time, and the communication efficiency is relatively high. In addition, the addressing of the on-chip network is completed within the local network. The expansion of the network scale has a relatively small impact on the addressing. In this way, the number of bits occupied by addressing in the bandwidth will not increase, and the bandwidth will not become a bottleneck for the expansion of the network scale.

[0042] (4) Since the bus structure uses a central decision unit to uniformly manage the use rights of the lines, and the on-chip network uses a random arbitration mechanism, there is no large delay problem.

[0043] (5) The on-chip network adopts the core concept. As the network scale expands, the decision delay of each core will become larger and larger, which will have a greater impact on the performance of the system. The on-chip network adopts a local decision strategy to complete an independent functional unit in the line in a distributed manner, which has good reusability. At the same time, the routing equipment in the network can also be used in a variety of environments, and the reusability is very high. Due to the good reusability of network components, the on-chip network has the characteristics of high cohesion, high scalability and portability, which greatly shortens the system development time and improves the development efficiency. It is particularly important in the current ultra-large-scale network design.

[0044] The Spidergon network topology is an easily scalable, regular, point-to-point planar topology. It is similar to a ring structure. The basic framework of the network is a ring with multiple routing nodes hanging on it. Each routing node is connected to a resource node and is also connected to the two routing nodes on the left and right. In addition, it is connected to the opposite routing node through the center of the ring. Each routing node has four links, and each link is composed of two unidirectional links.

[0045] The routing nodes of the Spidergon network have an even number of nodes 2M (M is an integer greater than 1, and the sub-network topology structure 2 in this application is the Spidergon network). According to the formal definition, each node is connected to the other three routing nodes through three unidirectional links, such as Figure 3 Shown is a schematic diagram of the Spidergon network structure consisting of 8 routing nodes.

[0046] The Spidergon network topology defines a deterministic shortest path routing algorithm: when the source node is the required number of hops from the target node , it moves along the ring in the appropriate direction; when the source node is the required number of hops from the target node When the network is connected, it uses the cross link to jump to the routing node on the opposite side of the network, and then moves along the ring in the appropriate direction. It can be seen that the main advantages of this topology are: good network diameter, small number of connections, and simple routing scheme.

[0047] Spidergon has many advantages: first, the structure vertex is symmetrical, which provides convenience for design, so uniform routing in the network can be used, and processing units can be placed anywhere in the network without considering the impact of the location on performance; second, the regularity makes it suitable for a variety of interconnection models and reduces the complexity of the layout; third, the low node degree and small network diameter reduce latency. Octagon is a special case of Spidergon when N=8 (the subnetwork topology structure 1 in this application adopts the Octagon structure). The biggest feature of this structure is the short network distance. Communication between any two nodes can be completed in at most two steps, that is, the network diameter is 2. The biggest feature of the Octagon structure is that the network distance is short. Communication between any two nodes can be completed in at most two steps, that is, the network diameter is 2, and the network delay of data transmission in the network is small.

[0048] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0049] In this embodiment, an on-chip network topology structure is provided, including Q sub-network topology structures 1, the sub-network topology structure 1 includes 2N sub-network topology structures 2, the sub-network topology structure 2 includes 2M routing nodes, Q, N, and M are integers greater than 1, each of the sub-network topology structure 1 is connected to other Q-1 sub-network topology structures 1, the 2N sub-network topology structures 2 in each sub-network topology structure 1 are connected to form a ring network topology structure, and the 2M routing nodes in each sub-network topology structure 2 are connected to form a ring network topology structure.

[0050] In actual application scenarios, the number of Q can be set according to actual conditions, for example, the value of Q can be 3, 4, 5, etc. The number of N can also be set according to actual conditions, for example, the value of N can be 2, 3, 4, etc. The value of M can also be set according to actual conditions, for example, the value of M can be 2, 3, 4, etc. The above sub-network topology structure 2 adopts the Spidergon network topology structure. In the sub-network topology structure 2, each routing node is connected to its two adjacent routing nodes and the opposite routing node. Taking M=2 as an example, Figure 4 In the sub-network topology structure 2 shown, in the interconnection mode of the four routing nodes, each routing node is connected to two adjacent routing nodes and a routing node located opposite to it.

[0051] As an optional implementation, the 2N sub-network topology structures 2 in each of the sub-network topology structures 1 are connected to form a ring network topology structure, including: each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite to the sub-network topology structure.

[0052] The sub-network topology structure 1 may adopt the Octagon network topology structure, which is a special case of the Spidergon network topology structure when 2N=8. The biggest feature of this structure is that the network distance is short, and communication between any two nodes can be completed in at most two steps, that is, the network diameter is 2. In this embodiment, the nodes in the Octagon network topology structure can be replaced with the Spidergon network topology structure, that is, the Octagon network topology structure is composed of 8 interconnected Spidergon network topologies.

[0053] As an optional implementation, each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite the sub-network topology structure 2, including: the three routing nodes in each of the sub-network topology structures 2 are respectively connected to the corresponding routing nodes in its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite the sub-network topology structure 2.

[0054] Take the Spidergon network topology structure including 4 routing nodes as an example. Figure 5 The sub-network topology structure 1 shown is formed by 8 sub-network topology structures 2 connected to each other. The network topology structure 1 adopts the Octagon network topology structure. The network topology structure 1 adopts the Spidergon network topology structure formed by 4 routing nodes connected to each other. Each sub-network topology structure 2 of the 8 sub-network topology structures 2 is connected to its adjacent sub-network topology structure 2 and the sub-network topology structure 2 located opposite to the sub-network topology structure 2.

[0055] In this embodiment, the Octagon network topology is combined with the spidergon network topology containing four routing nodes and the ring structure. The network has 32 routing nodes, which quadruples the number of routing nodes in the Octagon network topology and increases the network scale. The out-degree and in-degree of each routing node in the network topology are 4, and the network diameter is 5, which reduces the network diameter and reduces the network delay of data transmission in the network.

[0056] As an optional implementation, the three routing nodes in each of the sub-network topology structures 2 are respectively connected to the corresponding routing nodes in the two adjacent sub-network topology structures 2 and the sub-network topology structure 2 opposite to the sub-network topology structure 2, including: The routing node of and its two adjacent sub-network topology structures 2, and the sub-network topology structure 2 located opposite to the sub-network topology structure 2 are numbered , wherein i and j are numbers of the sub-network topology structure 2.

[0057] by Figure 5 Taking the subnetwork topology structure 1 shown as an example, each subnetwork topology structure 2 and the routing nodes in the subnetwork topology structure 2 are encoded according to the encoding method shown in the figure. In the subnetwork topology structure 1 shown in the figure, the codes of the 8 subnetwork topology structures 2 included are 00000001, 00000010, 00000100, 00001000, 00010000, 00100000, 01000000, 10000000, and the code of the routing node in each subnetwork topology structure 2 is the code of each subnetwork topology structure 2 in which it is located and the code of the routing node in the subnetwork topology structure 2 in which the routing node connected to it is located. Taking the sub-network topology structure 2 coded as 00000001 as an example, as shown in the figure, it is connected to the routing node (00000010, 00000001) in the sub-network topology structure 2 coded as 00000010 through the routing node (00000001, 00010000), and is connected to the routing node (00010000, 00000001) in the sub-network topology structure 2 coded as 00010000 through the routing node (00000001, 100000) and is connected to the routing node (100000, 00000001) in the sub-network topology structure 2 coded as 100000 through the routing node (00000001, 100000).

[0058] As an optional implementation, the 2M routing nodes in each of the sub-network topology structures 2 are connected to form a ring network topology structure, including: each of the 2M routing nodes is respectively connected to its two adjacent routing nodes and the routing node located opposite to the routing node.

[0059] As an optional implementation, each of the subnetwork topology structures 1 is connected to other Q-1 subnetwork topology structures 1, including: the fourth routing node in each subnetwork topology structure 2 in the subnetwork topology structure 1 is connected to the fourth routing node in the corresponding subnetwork topology structure 2 in the other subnetwork topology structure 1, wherein the fourth routing node is a routing node in each of the subnetwork topology structures 2 except for the three routing nodes connected to the two adjacent subnetwork topology structures 2 and the opposite subnetwork topology structure 2.

[0060] As an optional implementation, the fourth routing node in each sub-network topology structure 2 in the sub-network topology structure 1 is connected to the fourth routing node in the corresponding sub-network topology structure 2 in the other sub-network topology structure 1, including: The fourth routing node is numbered The four routing nodes are connected, where , is the number of the sub-network topology structure 1, It is the number of the sub-network topology structure 2.

[0061] As an optional implementation, when N=4, each subnetwork topology structure 2 includes 8 routing nodes, and the 8 routing nodes are numbered respectively: 00000001, 00000010, 00000100, 0001000, 0010000, 01000000, 10000000.

[0062] The present application is described below by means of specific embodiments:

[0063] Taking the above-mentioned on-chip network topology structure with Q=3, N=4, and M=2 as an example, the network topology structure 1 can be constructed as follows:

[0064] The first step is to construct 2N=8 Figure 4 The Spidergon network topology structure with 2M=4 routing nodes shown (the Spidergon network topology structure composed of 4 routing nodes is sub-network topology structure 2, and 8 sub-network topology structures 2 constitute sub-network topology structure 1);

[0065] The second step is to replace each routing node of Octagon with Figure 4 The Spidergon network topology structure then connects the nodes at the corresponding positions, and the 8 sub-network topology structures 2 are connected into the sub-network topology structure 1. The result is as follows Figure 5 Subnetwork topology shown in Figure 1.

[0066] The encoding method of the topological structure of the sub-network topology structure Octagon combined with the Spidergon network topology structure is as follows: Figure 5 As shown, the appearance of the topological structure that combines the Octagon and Spidergon network topologies is an Octagon structure. It is first encoded according to the Octagon structure, and it contains 8 ring topologies. The encoding i of the 8 Spidergon network topologies is encoded using 8-bit unique hot encoding, that is, 00000001, 00000010, 00000100, 00001000, 00010000, 00100000, 01000000, and 10000000 represent the 8 Spidergon network topologies. Each Spidergon network topology has 4 routing nodes, and each routing node is fully connected. However, there are three routing nodes that are connected to three other different ring topologies. Each route is numbered (i, j), where i represents the number of the ring topology (the i-th subnetwork topology structure 2). Indicates that the routing node is Spidergon network topology ( sub-network topology II) connected, Indicates that the routing node is not connected to other Spidergon network topologies. It can be seen that the routing node numbered (i, j) is connected to the routing node numbered (j, i).

[0067] The characteristics of the topological structure that combines the Octagon and Spidergon network topological structures are: the network has 32 routing nodes, the network diameter is 5, and the out-degree and in-degree of each routing node are 4.

[0068] like Figure 6 The figure shows a topology of Q=3 sub-networks constituting the on-chip network topology of 3D Octagon, which includes the following steps:

[0069] Step 1: First construct 3 according to Octagon's expansion method Figure 5 The sub-network topology structure 1 is a combination of the Octagon and Spidergon network topologies shown;

[0070] Step 2: Follow Figure 5 The encoding method of the topology structure of the combined Octagon and Spidergon network topologies shown encodes the three sub-network topologies;

[0071] Step 3: Connect the nodes coded as (i, i) in the sub-network topology structure 1 that combines the three Octagons with the Spidergon network topology into a ring topology.

[0072] The encoding method of the topological structure combining 3D Octagon, spidergon and ring structure includes the following steps:

[0073] Step 1: Encode the sub-network topology structure 1 that combines the three Octagon and Spidergon network topologies, which are: 001, 010, 100, representing the sub-network topology structure 1 of the 0th, 1st, and 2nd layers;

[0074] Step 2: In each sub-network topology structure 1 that combines the Octagon and Spidergon network topology structures, first encode according to the Octagon structure, which contains 00000001, 00000010, 00000100, 00001000, 00010000, 00100000, 01000000, 10000000 to represent 8 spidergon sub-network topology structures 2;

[0075] Step 3: The three routing nodes in each subnetwork topology structure 2 are connected to the other three different subnetwork topologies 2. Number each routing node as (s, (i, j)), where s represents the number of subnetwork topology structure 1, i, j represent the number of subnetwork topology structure 2, and number each routing node as (i, j), where i represents the number of the ring topology. Indicates that the routing node is connected to the jth Spidergon network topology. It can be seen that the routing node numbered (i, j) is connected to the routing node numbered (j, i).

[0076] The characteristics of the topological structure of the above 3D Octagon combined with spidergon and ring structure are: the network has 96 routing nodes and the network diameter is 7; among them, the out-degree and in-degree of 24 routing nodes are 5, and the out-degree and in-degree of the other 72 routing nodes are 4.

[0077] In this embodiment, a method for sending a routing request applied to the above-mentioned on-chip network topology is provided. Figure 7 is a flowchart of a method for sending a routing request according to an embodiment of the present application. Figure 7 As shown, the process includes the following steps:

[0078] Step S702: Get the source routing node number and the target routing node number ;

[0079] Step S704, and If they are equal, sending the target routing request of the source routing node to the target routing node in sub-network topology structure 1;

[0080] Step S706, and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

[0081] Through the above steps, due to the topology structure combining Octagon with the Spidergon network topology structure containing four routing nodes, the network has 96 routing nodes, which increases the number of Octagon routing nodes by 12 times, and the maximum out-degree and in-degree of the routing nodes are 5, and the complexity of layout and routing is acceptable. The network diameter is 7, which is smaller than the network diameter in the prior art, reducing the network delay of data transmission in the network.

[0082] The execution subject of the above steps may be a server, a terminal, etc., but is not limited thereto.

[0083] The execution order of step S704 and step S706 is interchangeable, that is, step S706 may be executed first, and then step S704.

[0084] Assume that the current routing node , target routing node ,The routing method of this application is as follows: all routing requests follow the shortest path routing; , it indicates that the source routing node and the target routing node are not in the same layer, and the routing should be firstly made to the layer where the target routing node is located. and If the value of , indicating that the source routing node and the target routing node are not in the same layer; if , indicating that the source routing node and the target routing node are in the same layer.

[0085] if , indicating that the source routing node and the target routing node are in the same layer, and are first routed to the same Spidergon network topology (sub-network topology 2): and Are they equal? ​​If This indicates that the source routing node and the target routing node are in the same Spidergon network topology (sub-network topology structure 2) at the same layer. There is a direct link between the source routing node and the target routing node. Direct routing is sufficient and routing is complete. ,according to Circular left shift to get The number of bits is used for routing.

[0086] As an optional implementation, the target routing request of the source routing node is changed from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1 of and If they are equal, the target routing request is changed from number The routing node sends the The routing node is numbered The routing node sends the target routing request to the .

[0087] if , then the layer where the source routing node is located is directly connected to the layer where the target routing node is located, and the layer where the source routing node is located is connected to the layer where the target routing node is located through and Direct connection can be directly routed to the layer where the target routing node is located: .

[0088] As an optional implementation, the target routing request of the source routing node is changed from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1 of and If they are not equal, the target routing request is changed from numbered The routing node sends the The routing node numbered The routing node sends the target routing request to The routing node is numbered The routing node sends the target routing request to the target routing node .

[0089] if , the source routing node should first be routed to a routing node that is directly connected to the target routing node's layer (the target routing node's layer is also called the target routing node's sub-network topology structure 1) at the source routing node's layer (the target routing node's layer is also called the target routing node's sub-network topology structure 1), and then routed to the target routing node through the routing node. The routing node sends the The source node is located at a layer that is different from the target node through the routing node. and directly connected, so it can be numbered The routing node sends the target routing request to The routing nodes are numbered The routing node sends the target routing request to the target routing node .

[0090] As an optional implementation, the number is The routing node sends the target routing request to the target routing node , including: and If they are equal, the numbers are The routing node directly sends the target routing request to the target routing node ;exist and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0091] if This means that the source routing node and the target routing node are in the same spidergon network topology (the same sub-network topology structure 2) at the same layer (the same sub-network topology structure 1), and there is a direct link between the source routing node and the target routing node, so direct routing is sufficient. , indicating that the spidergon network topology structure where the source routing node and the target routing node are located is not the same. and The relationship between the spidergon network topology structure where the source routing node is located (sub-network topology structure 2) and the spidergon network topology structure where the target routing node is located (the spidergon network topology structure where the source routing node is located is directly connected to the spidergon network topology structure where the target routing node is located, or there are several spidergon network topologies between the spidergon network topology structure where the source routing node is located and the spidergon network topology structure where the target routing node is located).

[0092] As an optional implementation, in and In the case of inequality, according to and The target routing request is sent to the target routing node , including: Circular left shift of 1 bit is equal to the , or the Circular left shift of 4 bits is equal to the , or the Circular left shift of 7 bits is equal to the In the case of The routing node sends the target routing request to The routing node is Send the target routing request to , as stated Send the target routing request to the .

[0093] if Circularly shifting left by 1 bit, 4 bits, and 7 bits can get , then the spidergon network topology structure where the source routing node is located is directly connected to the spidergon network topology structure where the target routing node is located.

[0094] As an optional implementation, in and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 2 bits is equal to the In the case of With the In the clockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 that is spaced apart in the clockwise direction sends the target routing request to the target routing node .

[0095] As an optional implementation, in and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 6 bits is equal to the In the case of With the In the counterclockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 spaced in the counterclockwise direction sends the target routing request to the target routing node .

[0096] As an optional implementation, in and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 5 bits is equal to the In the case of With the There are two sub-network topology structures 2 in the counterclockwise direction; through the The sub-network topology structure 2 of the clockwise adjacent sub-network topology structure 2 sends the target routing request to the target routing node .

[0097] As an optional implementation, in and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: Circular left shift of 3 bits is equal to the In the case of With the There are two sub-network topology structures in the clockwise direction; through the The target routing request is sent to the target routing node in the counterclockwise adjacent sub-network topology structure 2. .

[0098] As an optional implementation, in and When the source routing node and the target routing node are equal, sending the target routing request of the source routing node to the target routing node in the sub-network topology structure 1, comprising: and When the source routing node is equal, the target routing node directly sends the target routing request to the target routing node; and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0099] The above-mentioned routing method in this application is described below through a specific embodiment:

[0100] Step 1: Judgement and If the value of , indicating that the source routing node and the target routing node are not in the same layer, go to the second step; if , indicating that the source routing node and the target routing node are in the same layer, and proceed to the third step;

[0101] Step 2: , it indicates that the source routing node and the target routing node are not in the same layer. First, you should route to the layer where the target routing node is located (the sub-network topology structure where the target routing node is located):

[0102] 2.1 Judgment and Are they equal: If , then the source routing node is directly connected to the layer where the target routing node is located, and can be directly routed to the layer where the target routing node is located: ;if , then the layers where the source routing node and the target routing node are located are not directly connected, and go to 2.2;

[0103] 2.2 , then you should first route to a node that has a direct connection to the layer where the target routing node is located:

[0104]

[0105] Then route to the layer where the target routing node is located: ;

[0106] Step 3: Routing to the same Spidergon network topology (sub-network topology 2): Determination and Are they equal? ​​If This indicates that in the same Spidergon network topology (sub-network topology 2) at the same layer (sub-network topology 1), there is a directly connected link, and direct routing is sufficient, and routing ends; if Go to step 4;

[0107] Step 4: If Circularly shifting left by 1 bit, 4 bits, and 7 bits can get , then the Spidergon network topology structure (sub-network topology structure 2) where the source routing node is located is directly connected to the Spidergon network topology structure (sub-network topology structure 2) where the target routing node is located, and the routing method is as follows:

[0108]

[0109] if Circularly shifting 2 bits left gives , then the Spidergon network topology structure where the source routing node is located and the Spidergon network topology structure where the target routing node is located are separated by a Spidergon network topology structure in the clockwise direction, and the routing method is as follows:

[0110] First route clockwise to the Spidergon network topology that is spaced apart in the clockwise direction :

[0111]

[0112] Then from the middle Spidergon network topology The Spidergon network topology structure where the target routing node is located is routed clockwise:

[0113]

[0114] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0115]

[0116] if Circularly shifting 6 bits left gives , then the Spidergon network topology structure where the source routing node is located and the Spidergon network topology structure where the target routing node is located are separated by one Spidergon network topology structure in the counterclockwise direction, and the routing method is as follows:

[0117] First route counterclockwise to the Spidergon network topology spaced counterclockwise :

[0118]

[0119] Then the Spidergon network topology is spaced counterclockwise The Spidergon network topology structure where the target routing node is located is routed counterclockwise:

[0120]

[0121] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0122]

[0123] if Circularly shifting 3 bits left gives , then the Spidergon network topology where the source routing node is located and the Spidergon network topology where the target routing node is located are separated by two Spidergon network topologies in the clockwise direction, and the routing method is as follows:

[0124] First route to the adjacent Spidergon network topology in the counterclockwise direction :

[0125]

[0126] Then route to the opposite side through the cross link The Spidergon network topology:

[0127]

[0128] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0129]

[0130] if Circularly shifting 5 bits left gives , then the Spidergon network topology where the source routing node is located and the Spidergon network topology where the target routing node is located are separated by two Spidergon network topologies in the counterclockwise direction, and the routing method is as follows:

[0131] First route to the adjacent Spidergon network topology in the clockwise direction :

[0132]

[0133] Then the cross link is used to route to the Spidergon network topology where the target routing node is located on the opposite side:

[0134]

[0135] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0136]

[0137] Example 1: Current routing node , target routing node

[0138] Step 1: Judgement and The value of , indicating that the source routing node and the target routing node are not in the same layer, and proceed to the second step;

[0139] Step 2: , it indicates that the source routing node and the target routing node are not in the same layer. You should first route to the layer where the target routing node is located:

[0140] 2.1 Judgment and Are they equal? , then the source routing node and the target routing node have no direct connection in the layer, and go to 2.2;

[0141] 2.2 , then you should first route to a node that has a direct connection to the layer where the target routing node is located:

[0142]

[0143] Then route to the layer where the target routing node is located:

[0144]

[0145] Step 3: At this time, routing to the layer where the target routing node is located should first be routed to the same Spidergon network topology (sub-network topology structure 2): Determine and Are they equal? Go to step 4;

[0146] if Circularly shifting 7 bits left gives , then the Spidergon network topology where the target routing node is located is directly connected, and the routing method is as follows:

[0147] Example 2: Current routing node , target routing node

[0148] Step 1: Judgement and The value of , indicating that the source routing node and the target routing node are in the same layer, and proceed to the third step;

[0149] Step 3: Now , indicating that the source routing node and the target routing node are in the same layer (same sub-network topology structure 1). First, route to the same Spidergon network topology structure (same sub-network topology structure 2): and Are they equal? Go to step 4;

[0150] Step 4: Circularly shifting 6 bits left gives , then the Spidergon network topology structure where the source routing node is located and the Spidergon network topology structure where the target routing node is located are separated by one Spidergon network topology structure in the counterclockwise direction, and the routing method is as follows:

[0151] First route counterclockwise to the Spidergon network topology structure that is spaced in the counterclockwise direction :

[0152]

[0153] Then the Spidergon network topology is spaced counterclockwise Counterclockwise routing to the Spidergon network topology where the target routing node is located (sub-network topology 2):

[0154]

[0155] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0156]

[0157] Example 3: Current routing node , target routing node ;

[0158] Step 1: Judgement and The value of , indicating that the source routing node and the target routing node are in the same layer (same sub-network topology structure 1), and proceed to the third step;

[0159] Step 3: Now , indicating that the source routing node and the target routing node are in the same layer. First, route to the same Spidergon network topology (sub-network topology structure 2): and Are they equal? Go to step 4;

[0160] Step 4: Circularly shifting 3 bits left gives , then the Spidergon network topology where the source routing node is located and the Spidergon network topology where the target routing node is located are separated by two Spidergon network topologies in the clockwise direction, and the routing method is as follows:

[0161] First route to the adjacent Spidergon network topology in the counterclockwise direction :

[0162]

[0163] Then the cross link is used to route to the Spidergon network topology where the target routing node is located on the opposite side:

[0164]

[0165] Then route to the target routing node from the Spidergon network topology where the target routing node is located:

[0166]

[0167] This application combines Octagon with a Spidergon network topology with four routing nodes. The network has 96 routing nodes, which increases the number of Octagon routing nodes by 12 times. However, the maximum out-degree and in-degree of the routing nodes are 5, and the complexity of layout and routing is acceptable. The network diameter is 7, which is smaller, reducing the network delay of data transmission in the network.

[0168] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0169] In the present embodiment, a device for transmitting data packets is also provided, and the device is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware is also possible and conceived.

[0170] Figure 8 is a structural block diagram of a device for transmitting a data packet according to an embodiment of the present application, such as Figure 8 As shown, the device includes: an acquisition module 802, which is used to obtain the number of the source routing node and the target routing node number ; The first sending module 804 is used to and When the source routing node and the target routing node are equal, the target routing request of the source routing node is sent to the target routing node in the sub-network topology structure 1; the second sending module 806 is used to and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

[0171] As an optional embodiment, the device is also used in and If they are equal, the target routing request is changed from number The routing node sends the The routing node is numbered The routing node sends the target routing request to the .

[0172] As an optional embodiment, the device is also used in and If they are not equal, the target routing request is changed from numbered The routing node sends the The routing node numbered The routing node sends the target routing request to The routing node is numbered The routing node sends the target routing request to the target routing node .

[0173] As an optional embodiment, the device is also used in and If they are equal, the numbers are The routing node directly sends the target routing request to the target routing node ;exist and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0174] As an optional embodiment, the device is also used in the Circular left shift of 1 bit is equal to the , or the Circular left shift of 4 bits is equal to the , or the Circular left shift of 7 bits is equal to the In the case of The routing node sends the target routing request to The routing node is Send the target routing request to , as stated Send the target routing request to the .

[0175] As an optional embodiment, the device is also used in Circular left shift of 2 bits is equal to the In the case of With the In the clockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 that is spaced apart in the clockwise direction sends the target routing request to the target routing node .

[0176] As an optional embodiment, the device is also used in Circular left shift of 6 bits is equal to the In the case of With the In the counterclockwise direction, there is one sub-network topology structure 2; through the With the The sub-network topology structure 2 spaced in the counterclockwise direction sends the target routing request to the target routing node .

[0177] As an optional embodiment, the device is also used in Circular left shift of 5 bits is equal to the In the case of With the There are two sub-network topology structures 2 in the counterclockwise direction; through the The sub-network topology structure 2 of the clockwise adjacent sub-network topology structure 2 sends the target routing request to the target routing node .

[0178] As an optional embodiment, the device is also used in Circular left shift of 3 bits is equal to the In the case of With the In the clockwise direction, there are two sub-network topology structures 2; through the The target routing request is sent to the target routing node in the counterclockwise adjacent sub-network topology structure 2. .

[0179] As an optional embodiment, the device is also used in and When the source routing node is equal, the target routing node directly sends the target routing request to the target routing node; and In the case of inequality, according to and The target routing request is sent to the target routing node .

[0180] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0181] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0182] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0183] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0184] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0185] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0186] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0187] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A network-on-chip topology structure, characterized in that: It includes Q sub-network topology structures 1, the sub-network topology structure 1 includes 2N sub-network topology structures 2, the sub-network topology structure 2 includes 2M routing nodes, Q, N, and M are integers greater than 1 respectively, each of the sub-network topology structures 1 is connected to other Q-1 sub-network topology structures 1, the 2N sub-network topology structures 2 in each sub-network topology structure 1 are connected to form a ring network topology structure, and the 2M routing nodes in each sub-network topology structure 2 are connected to form a ring network topology structure.

2. The network-on-chip topology structure according to claim 1, characterized in that: The 2N sub-network topology structures 2 in each of the sub-network topology structures 1 are connected to form a ring network topology structure, including: Each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 located opposite to the sub-network topology structure.

3. The network-on-chip topology structure according to claim 2, characterized in that: Each of the sub-network topology structures 2 is respectively connected to its two adjacent sub-network topology structures 2 and the sub-network topology structure 2 opposite to the sub-network topology structure, including: The three routing nodes in each of the sub-network topology structures 2 are respectively connected to corresponding routing nodes in two adjacent sub-network topology structures 2 and a sub-network topology structure 2 located opposite to the sub-network topology structure 2.

4. The network-on-chip topology structure according to claim 3, characterized in that: The three routing nodes in each of the sub-network topology structures 2 are respectively connected to the corresponding routing nodes in the two adjacent sub-network topology structures 2 and the sub-network topology structure 2 opposite to the sub-network topology structure 2, including: Each of the sub-network topology structures is numbered as The routing node of and its two adjacent sub-network topology structures 2, and the sub-network topology structure 2 located opposite to the sub-network topology structure 2 are numbered , wherein i and j are numbers of the sub-network topology structure 2.

5. The network-on-chip topology structure according to claim 1, characterized in that: The 2M routing nodes in each of the sub-network topology structures 2 are connected to form a ring network topology structure, including: Each routing node among the 2M routing nodes is respectively connected to its two adjacent routing nodes and a routing node located opposite to the routing node.

6. The network-on-chip topology structure according to claim 1, characterized in that: Each of the sub-network topology structures is connected to other Q-1 sub-network topology structures, including: The fourth routing node in each sub-network topology structure 2 in the sub-network topology structure 1 is connected to the fourth routing node in the corresponding sub-network topology structure 2 in other sub-network topology structures 1, wherein the fourth routing node is a routing node in each of the sub-network topology structures 2 except for the three routing nodes connected to the two adjacent sub-network topology structures 2 and the opposite sub-network topology structure 2.

7. The network-on-chip topology structure according to claim 6, characterized in that: The fourth routing node in each sub-network topology structure 2 in the sub-network topology structure 1 is connected to the fourth routing node in the corresponding sub-network topology structure 2 in the other sub-network topology structure 1, including: Number The fourth routing node is numbered The four routing nodes are connected, where , is the number of the sub-network topology structure 1, It is the number of the sub-network topology structure 2.

8. The network on chip topology structure according to any one of claims 1 to 7, characterized in that: Also includes: When N=4, each sub-network topology structure 2 includes 8 routing nodes, and the 8 routing nodes are numbered respectively: 00000001, 00000010, 00000100, 00001000, 0010000, 01000000, 10000000.

9. A method for sending a routing request, characterized in that: The network-on-chip topology structure applied to any one of claims 1 to 8 above comprises: Get the source routing node ID and the target routing node number ; exist and If they are equal, sending the target routing request of the source routing node to the target routing node in sub-network topology structure 1; exist and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

10. The method according to claim 9, characterized in that The target routing request of the source routing node is sent from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The method includes sending the target routing request to the target routing node within the subnetwork topology structure 1 of the target routing node, comprising: exist and If they are equal, the target routing request is changed from number The routing node sends the The routing node; The number is The routing node sends the target routing request to the .

11. The method according to claim 9, characterized in that The target routing request of the source routing node is sent from The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1, and further includes: exist and If they are not equal, the target routing request is changed from numbered The routing node sends the The routing node; The number is The routing node sends the target routing request to The routing node is numbered The routing node sends the target routing request to the target routing node .

12. The method according to claim 11, characterized in that The number is The routing node sends the target routing request to the target routing node ,include: exist and If they are equal, the numbers are The routing node directly sends the target routing request to the target routing node ; exist and In the case of inequality, according to and The target routing request is sent to the target routing node .

13. The method according to claim 12, characterized in that exist and In the case of inequality, according to and The target routing request is sent to the target routing node ,include: In the Circular left shift of 1 bit is equal to the , or the Circular left shift of 4 bits is equal to the , or the Circular left shift of 7 bits is equal to the In the case of The routing node sends the target routing request to The routing node is Send the target routing request to , as stated Send the target routing request to the .

14. The method according to claim 12, characterized in that exist and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: exist Circular left shift of 2 bits is equal to the In the case of With the There is one sub-network topology structure 2 every other in the clockwise direction; Through the With the The sub-network topology structure 2 that is spaced apart in the clockwise direction sends the target routing request to the target routing node .

15. The method according to claim 12, characterized in that exist and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: exist Circular left shift of 6 bits is equal to the In the case of With the There is one sub-network topology structure 2 every other in the counterclockwise direction; Through the With the The sub-network topology structure 2 spaced in the counterclockwise direction sends the target routing request to the target routing node .

16. The method according to claim 12, characterized in that exist and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: exist Circular left shift of 5 bits is equal to the In the case of With the There are two sub-network topology structures 2 in the counterclockwise direction; By The sub-network topology structure 2 of the clockwise adjacent sub-network topology structure 2 sends the target routing request to the target routing node .

17. The method according to claim 12, characterized in that exist and In the case of inequality, according to and The target routing request is sent to the target routing node , also includes: exist Circular left shift of 3 bits is equal to the In the case of With the There are two sub-network topology structures 2 in the clockwise direction; By The target routing request is sent to the target routing node in the counterclockwise adjacent sub-network topology structure 2. .

18. The method according to claim 9, characterized in that exist and When the source routing node and the target routing node are equal, sending the target routing request of the source routing node to the target routing node in the sub-network topology structure 1 includes: exist and If they are equal, the source routing node directly sends the target routing request to the target routing node; exist and In the case of inequality, according to and The target routing request is sent to the target routing node .

19. A device for transmitting a data packet, characterized in that: include: Acquisition module, used to obtain the number of the source routing node and the target routing node number ; The first sending module is used to and If they are equal, sending the target routing request of the source routing node to the target routing node in sub-network topology structure 1; The second sending module is used to and If they are not equal, the target routing request of the source routing node is changed from the number The sub-network topology structure is sent to The sub-network topology structure is one, and the number is The target routing request is sent to the target routing node within the sub-network topology structure 1.

20. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 9 to 18 when executed by a processor.

21. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 9 to 18 are implemented.

22. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 9 to 18 is implemented.

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