A communication system and method

Abstract

Embodiments of the present application disclose a communication system and method. Among them, the system includes: a local node, N extended nodes, and multiple BLVDS buses; the local node includes a local node communication module and a local node I / O module, and the local node communication module and the local node I / O module are connected through a BLVDS bus; each extended node includes an extended node communication module and an extended node I / O module, and the extended node communication module and the extended node I / O module of the same node are connected through a BLVDS bus; the local node communication module includes a first LVDS interface and a second LVDS interface, the extended node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and the N extended node communication modules are connected in a ring through multiple LVDS interfaces, so that high-efficiency and accurate communication between large-scale extended node I / O modules and the local node can be achieved at low cost.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and more specifically, to a communication system and method. Background Art

[0002] Currently, in industrial control systems, as the performance of controllers continues to improve, the amount of input / output (I / O) data that controllers can handle is also increasing. To ensure efficient and accurate communication between a large number of I / O nodes and controllers, it is necessary to increase the communication bus bandwidth and bus stability of the controller system.

[0003] Existing technical solutions mainly rely on two bus expansion schemes: star topology and ring topology. Among them, the star topology mainly uses the principle of a switch to achieve communication between the controller and communication modules on each rack through an Ethernet switch, and the communication module then converts the Ethernet protocol into the system bus protocol on the rack; the ring topology uses the Hierarchical State Routing (HSR) protocol to achieve data communication between each rack.

[0004] However, whether it is star topology or ring topology, most of them use Ethernet for bus expansion and then convert the Ethernet protocol into the communication bus protocol on the rack through a communication protocol conversion module on the rack. This process has complex protocol conversion and low efficiency; moreover, the communication module requires a physical layer PHY and a microcontroller unit (MCU) that supports the data link layer MAC, resulting in high costs. Summary of the Invention

[0005] In view of this, embodiments of this application disclose a communication system and method to achieve efficient and accurate communication between large-scale extended node I / O modules and local nodes at low cost.

[0006] The technical solutions provided by the embodiments of this application are as follows:

[0007] In a first aspect, embodiments of this application provide a communication system, which includes: a local node, N extended nodes, and multiple bus low-voltage differential signal (BLVDS) buses, where N is a positive integer not less than 1;

[0008] The local node includes a local node communication module and a local node input / output (I / O) module, and the local node communication module and the local node I / O module are connected through the BLVDS bus;

[0009] Each of the extension nodes includes an extension node communication module and an extension node I / O module, and the extension node communication module and the extension node I / O module of the same node are connected through the BLVDS bus;

[0010] The local node communication module includes a first low-voltage differential signal (LVDS) interface and a second LVDS interface, the extension node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and N extension node communication modules are connected in a ring through the first LVDS interface, the second LVDS interface, the third LVDS interface, and the fourth LVDS interface.

[0011] In a possible implementation, the first LVDS interface is used for the local node communication module to send data to the next-level node;

[0012] The second LVDS interface is used for the local node communication module to send data to the previous-level node;

[0013] The third LVDS interface is used for the extension node communication module to send data to the next-level node;

[0014] The fourth LVDS interface is used for the extension node communication module to send data to the previous-level node.

[0015] In a possible implementation, the first LVDS interface is further used for the local node communication module to receive data sent by the previous-level node;

[0016] The second LVDS interface is further used for the local node communication module to receive data sent by the next-level node;

[0017] The third LVDS interface is further used for the extension node communication module to receive data sent by the previous-level node;

[0018] The fourth LVDS interface is further used for the extension node communication module to receive data sent by the next-level node.

[0019] In a possible implementation, the local node communication module is used to send data to be executed to the extension node communication module;

[0020] The extended node communication module is used to receive the data to be executed, and determine whether the communication address in the destination address corresponding to the data to be executed is consistent with the extended node address corresponding to the extended node communication module; if the communication address is not consistent with the extended node address, the data to be executed is sent to the next-level node or the previous-level node; if the communication address is consistent with the extended node address, the data to be executed is sent to the BLVDS bus corresponding to the extended node communication module;

[0021] The extended node I / O module is used to receive the data to be executed through the BLVDS bus, and determine whether the communication slot identifier in the destination address is consistent with the extended slot identifier corresponding to the extended node I / O module. If the communication slot identifier is not consistent with the extended slot identifier, the data to be executed is discarded; if the communication slot identifier is consistent with the extended slot identifier, the data to be executed is executed.

[0022] In a possible implementation manner, when the communication slot identifier is consistent with the extended slot identifier, the extended node I / O module is specifically used for:

[0023] Perform cyclic redundancy check code (CRC) check on the data to be executed; if the CRC check fails, the data to be executed is discarded; if the CRC check passes, the data to be executed is executed.

[0024] In a possible implementation manner, the extended node communication module further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and a field programmable gate array (FPGA) execution unit;

[0025] The FPGA execution unit is used to determine whether the communication address is consistent with the extended node address; if the communication address is not consistent with the extended node address, the data to be executed is transferred to the first LVDS data buffer or the second LVDS data buffer, and the data to be executed is sent to the next-level node or the previous-level node; if the communication address is consistent with the extended node address, the data to be executed is transferred to the BLVDS data buffer, and the data to be executed is sent to the BLVDS bus corresponding to the extended node communication module.

[0026] In a possible implementation manner, the extended node I / O module is used to send response data to the extended node communication module through the BLVDS bus;

[0027] The extended node communication module is used to receive the response data and send the response data to the next-level node and / or the previous-level node;

[0028] The local communication module is configured to receive the response data.

[0029] In a possible implementation, the extended node communication module further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and an FPGA execution unit;

[0030] The FPGA execution unit is configured to move the response data to the first LVDS data buffer and / or the second LVDS data buffer after the BLVDS data buffer receives the response data, and send the response data to the next-level node and / or the previous-level node.

[0031] In a possible implementation, the BLVDS data buffer includes a first BLVDS data buffer and a second BLVDS data buffer; the extended node communication module and the extended node I / O module of the same node are connected by two BLVDS buses;

[0032] The FPGA execution unit in the extended node communication module of the same node as the extended node I / O module that sends the response data is specifically configured to:

[0033] After the first BLVDS data buffer or the second BLVDS data buffer receives the response data, move the response data to the first LVDS data buffer and the second LVDS data buffer, and send the response data to the next-level node and the previous-level node.

[0034] In a second aspect, an embodiment of the present application provides a communication method, which is applied to the communication system described in any item of the first aspect above. The method includes:

[0035] The local node communication module sends the data to be executed to the extended node communication module;

[0036] The extended node communication module receives the data to be executed;

[0037] The extended node communication module determines whether the communication address in the destination address corresponding to the data to be executed is the same as the extended node address corresponding to the extended node communication module;

[0038] If the communication address is not the same as the extended node address, the extended node communication module sends the data to be executed to the next-level node or the previous-level node;

[0039] If the communication address is the same as the extended node address, the extended node communication module sends the data to be executed to the BLVDS bus corresponding to the extended node communication module;

[0040] The extended node I / O module receives the data to be executed through the BLVDS bus;

[0041] The extended node I / O module determines whether the communication slot identifier in the destination address is consistent with the extended slot identifier corresponding to the extended node I / O module;

[0042] If the communication slot identifier is inconsistent with the extended slot identifier, the extended node I / O module discards the data to be executed;

[0043] If the communication slot identifier is consistent with the extended slot identifier, the extended node I / O module executes the data to be executed.

[0044] Embodiments of the present application disclose a communication system and method. Among them, the system includes: a local node, N extended nodes, and multiple bus low-voltage differential signal (BLVDS) buses, where N is a positive integer not less than 1; the local node includes a local node communication module and a local node input / output (I / O) module, and the local node communication module and the local node I / O module are connected through the BLVDS bus; each extended node includes an extended node communication module and an extended node I / O module, and the extended node communication module and the extended node I / O module of the same node are connected through the BLVDS bus; the local node communication module includes a first low-voltage differential signal (LVDS) interface and a second LVDS interface, the extended node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and the N extended node communication modules are connected in a ring through the first LVDS interface, the second LVDS interface, the third LVDS interface, and the fourth LVDS interface. It can be seen that in the embodiments of the present application, a ring network topology based on the LVDS interface and a system bus based on the BLVDS bus are implemented. In this way, ring bus communication between extended nodes can be realized using the LVDS interface, and communication between multiple extended node I / O modules and the extended node communication module on the extended node can be realized using the BLVDS bus. Therefore, the communication process between the local node and the extended node I / O module can be realized without data protocol conversion, and efficient and accurate communication between a large number of extended node I / O modules and the local node can be realized at low cost. Description of the Drawings

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to the disclosed drawings without creative efforts.

[0046] Figure 1Schematic diagram of the structure of a communication system disclosed in an embodiment of the present application;

[0047] Figure 2 Basic block diagram of the FPGA in a communication module disclosed in an embodiment of the present application;

[0048] Figure 3 Flowchart of receiving data disclosed in an embodiment of the present application;

[0049] Figure 4 Flowchart of sending data disclosed in an embodiment of the present application;

[0050] Figure 5 Flowchart of a communication method disclosed in an embodiment of the present application. Detailed implementation manners

[0051] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0052] The terms "including", "comprising", "having" and their variants in this specification all mean "including but not limited to", unless otherwise specifically emphasized in other ways. It should be noted that in the description of the embodiments of the present application, words such as "first" and "second" are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0053] An embodiment of the present application discloses a communication system and method. Among them, the system includes: a local node, N extended nodes, and multiple bus-type low-voltage differential signal BLVDS buses, where N is a positive integer not less than 1; the local node includes a local node communication module and a local node input / output I / O module, and the local node communication module and the local node I / O module are connected through a BLVDS bus; each extended node includes an extended node communication module and an extended node I / O module, and the extended node communication module and the extended node I / O module of the same node are connected through a BLVDS bus; the local node communication module includes a first low-voltage differential signal LVDS interface and a second LVDS interface, the extended node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and the N extended node communication modules are connected in a ring through the first LVDS interface, the second LVDS interface, the third LVDS interface, and the fourth LVDS interface. It can be seen that in the embodiment of the present application, a ring network topology based on the LVDS interface and a system bus based on the BLVDS bus are implemented. In this way, ring bus communication between extended nodes can be realized by using the LVDS interface, and communication between multiple extended node I / O modules and the extended node communication module on the extended node can be realized by using the BLVDS bus. Therefore, the communication process between the local node and the extended node I / O module can be realized without data protocol conversion, and efficient and accurate communication between a large number of extended node I / O modules and the local node can be realized at low cost.

[0054] See Figure 1 , a schematic structural diagram of a communication system disclosed in an embodiment of the present application, the system includes: a local node, N extended nodes, and multiple bus-type low-voltage differential signal BLVDS buses, where N is a positive integer not less than 1;

[0055] The local node includes a local node communication module and a local node input / output I / O module, and the local node communication module and the local node I / O module are connected through the BLVDS bus;

[0056] Each of the extended nodes includes an extended node communication module and an extended node I / O module, and the extended node communication module and the extended node I / O module of the same node are connected through the BLVDS bus;

[0057] The local node communication module includes a first low-voltage differential signal LVDS interface and a second LVDS interface, the extended node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and the N extended node communication modules are connected in a ring through the first LVDS interface, the second LVDS interface, the third LVDS interface, and the fourth LVDS interface.

[0058] It should be noted that the local node communication module in the embodiments of the present application is the controller. Bus Low-Voltage Differential Signaling (BLVDS) is a bus-type differential signal developed from low-voltage differential signals, with characteristics such as high speed, low swing, low noise, and suitability for multiple loads. The BLVDS interface supports bidirectional communication and hot plugging, and is very suitable for bus-type applications with multiple nodes and heavy loads, such as the backplane communication bus of a plug-in rack. Low-Voltage Differential Signaling (LVDS) has a core technology of transmitting data at high speed with an extremely low voltage swing differential, which can achieve point-to-point or one-to-many connections, and has characteristics such as low power consumption, low bit error rate, low crosstalk, and low radiation.

[0059] Among them, the first LVDS interface is used for the local node communication module to send data to the next-level node and also for the local node communication module to receive data sent by the previous-level node; the second LVDS interface is used for the local node communication module to send data to the previous-level node and also for the local node communication module to receive data sent by the next-level node; the third LVDS interface is used for the extended node communication module to send data to the next-level node and also for the extended node communication module to receive data sent by the previous-level node; the fourth LVDS interface is used for the extended node communication module to send data to the previous-level node and also for the extended node communication module to receive data sent by the next-level node.

[0060] In the embodiments of the present application, the local node communication module sends data to the next-level node through the first LVDS interface and receives data sent by the previous-level node through the first LVDS interface; the local node communication module sends data to the previous-level node through the second LVDS interface and receives data sent by the next-level node through the second LVDS interface. Figure 1 Taking it as an example, the next-level node of the local node is the extended node 1, and the previous-level node of the local node is the extended node N. For example, when the local node sends the data to be executed, the local node communication module sends the data to be executed to the extended node communication module 1 through the first LVDS interface and sends the data to be executed to the extended node communication module N through the second LVDS interface; when the local node receives the response data, the local node communication module may receive the response data sent by the extended node communication module N through the first LVDS interface or may receive the response data sent by the extended node communication module 1 through the second LVDS interface. It can be understood that the above is only an exemplary description and should not be construed as a limitation of the present application.

[0061] It should be noted that in the case where the local node sends execution data to the expansion node in the embodiment of the present application, the local node communication module generally sends the same execution data to the expansion node communication module 1 and the expansion node communication module N at the same time, so as to send the data to be executed through two different communication paths. In this way, when a certain expansion node communication module fails and cannot communicate, the execution data can still be transmitted to the destination node from the other direction, improving the reliability of the system communication bus. For example: there are a total of 5 expansion nodes, and the local node is to send execution data to expansion node 3, then there are two communication paths. Communication path 1 is: local node communication module → expansion node communication module 1 → expansion node communication module 2 → expansion node communication module 3. Communication path 2 is: local node communication module → expansion node communication module 5 → expansion node communication module 4 → expansion node communication module 3. Suppose the expansion node communication module 2 fails and cannot communicate, the execution data can still be transmitted to expansion node 3 from communication path 2. It can be understood that the above is only an exemplary illustration and should not be construed as a limitation of the present application.

[0062] In the embodiment of the present application, the expansion node communication module sends data to the next-level node through the third LVDS interface and receives data sent by the upper-level node through the third LVDS interface; the expansion node communication module sends data to the upper-level node through the fourth LVDS interface and receives data sent by the lower-level node through the fourth LVDS interface. Similarly, taking Figure 1 as an example for illustration, the next-level node of expansion node 2 is expansion node 3, and the upper-level node of expansion node 2 is expansion node 1. There are a total of 5 expansion nodes. When the local node is to send the data to be executed to expansion node 3, the expansion node communication module 2 will send the data to be executed to the expansion node communication module 3 through the third LVDS interface, but there is no situation where the expansion node communication module 2 sends the data to be executed to the expansion node 1 through the fourth LVDS interface. When expansion node 3 is to send the response data to the local node, the expansion node communication module 2 will receive the response data sent by communication module 3 through the fourth LVDS interface, but there is no situation where the expansion node communication module 2 receives the response data sent by communication module 1 through the third LVDS interface. It can be understood that the above is only an exemplary illustration and should not be construed as a limitation of the present application.

[0063] It can be seen that in the embodiments of the present application, while ensuring that the bus communication rate is 100 Mbps, the network topology is simplified, and a ring network topology based on the LVDS interface and a system bus based on the BLVDS bus are realized. In this way, ring bus communication between extended nodes can be achieved using the LVDS interface, and communication between multiple extended node I / O modules and the extended node communication module on the extended node can be achieved using the BLVDS bus. As a result, the communication process between the local node and the extended node I / O module does not require data protocol conversion, and efficient and accurate communication between a large number of extended node I / O modules and the local node can be achieved at low cost.

[0064] In a possible implementation manner, the local node communication module in the communication system provided in the embodiments of the present application is used to send data to be executed to the extended node communication module;

[0065] The extended node communication module is used to receive the data to be executed, and determine whether the communication address in the destination address corresponding to the data to be executed is the same as the extended node address corresponding to the extended node communication module; if the communication address is not the same as the extended node address, the data to be executed is sent to the next-level node or the previous-level node; if the communication address is the same as the extended node address, the data to be executed is sent to the BLVDS bus corresponding to the extended node communication module;

[0066] The extended node I / O module is used to receive the data to be executed through the BLVDS bus, and determine whether the communication slot identifier in the destination address is the same as the extended slot identifier corresponding to the extended node I / O module. If the communication slot identifier is not the same as the extended slot identifier, the data to be executed is discarded; if the communication slot identifier is the same as the extended slot identifier, the data to be executed is executed.

[0067] For example, there are 5 expansion nodes, and each expansion node includes 3 expansion node I / O modules. If the local node is to send the data to be executed to the expansion node I / O module 302 of expansion node 3, there are two communication paths. The first communication path is: local node communication module → expansion node communication module 1 → expansion node communication module 2 → expansion node communication module 3 → expansion node I / O module 302. The second communication path is: local node communication module → expansion node communication module 5 → expansion node communication module 4 → expansion node communication module 3 → expansion node I / O module 302. Then, expansion node communication module 1 and expansion node communication module 2 send the data to be executed to the next-level node; expansion node communication module 5 and expansion node communication module 4 send the data to be executed to the upper-level node; expansion node communication module 3 sends the data to be executed to the BLVDS bus corresponding to expansion node communication module 3. Expansion node I / O module 302 executes the data to be executed, and expansion node I / O module 301 and expansion node I / O module 303 discard the data to be executed. It can be understood that the above example is only for illustrative purposes and should not be construed as a limitation on the embodiments of the present application.

[0068] Among them, each expansion node has a corresponding expansion node address, and each expansion node I / O module has a corresponding expansion slot identifier, that is, each rack has its own rack address, and each slot on each rack has its own slot address. It can be understood that the communication module and the I / O module connected by the same BLVDS bus constitute a rack. After power-on, the communication module reads the rack address of this rack and then uses this address as the "communication address", which is in the form of 4-bit or 8-bit binary encoding, and the number of address bits is determined by the number of racks to be expanded. For example, the expansion node address of expansion node 3 is 0003, and the expansion node includes 3 expansion node I / O modules. The expansion slot identifier of the first I / O module is 000000001, the expansion slot identifier of the second I / O module is 000000002, and the expansion slot identifier of the third I / O module is 000000003. If the local node is to send the data to be executed to the expansion node I / O module 302 of expansion node 3, the destination address is 0003\000000002. It can be understood that the above is only for illustrative purposes and should not be construed as a limitation on the present application.

[0069] It can be seen that in the embodiments of the present application, the expansion node communication module judges the communication address in the destination address, and the expansion node I / O module judges the communication slot identifier in the destination address, so as to ensure that the target expansion node I / O module can accurately receive the data to be executed, thereby realizing accurate communication between the large-scale expansion node I / O module and the local node. Moreover, the data can be sent to the target expansion node I / O module through two communication paths, improving the reliability of the system communication bus.

[0070] In a possible implementation, in the communication system provided in the embodiments of the present application, when the communication slot identifier is the same as the expansion slot identifier, the expansion node I / O module is specifically configured to:

[0071] Perform cyclic redundancy check (CRC) on the to-be-executed data; if the CRC check fails, discard the to-be-executed data; if the CRC check passes, execute the to-be-executed data.

[0072] It should be noted that the cyclic redundancy check (CRC) is one of the most commonly used error-checking codes in the field of data communication, and its characteristic is that the lengths of the information field and the check field can be arbitrarily selected.

[0073] It can be seen that by performing CRC check on the to-be-executed data in the embodiments of the present application, it can be determined whether the original information has an error during the data transmission process, ensuring that the expansion node I / O module executes the correct to-be-executed data.

[0074] In a possible implementation, the expansion node communication module in the embodiments of the present application further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and a field programmable gate array (FPGA) execution unit;

[0075] The FPGA execution unit is configured to determine whether the communication address is the same as the expansion node address; if the communication address is not the same as the expansion node address, move the to-be-executed data to the first LVDS data buffer or the second LVDS data buffer, and send the to-be-executed data to the next-level node or the previous-level node; if the communication address is the same as the expansion node address, move the to-be-executed data to the BLVDS data buffer, and send the to-be-executed data to the BLVDS bus corresponding to the expansion node communication module.

[0076] It should be noted that the Field-Programmable Gate Array (FPGA) is a further development based on programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits, addressing both the deficiencies of custom circuits and overcoming the drawback of limited gate counts in the original programmable devices. Additionally, in a possible implementation, the FPGA can be replaced by a Complex Programmable Logic Device (CPLD), i.e., the FPGA execution unit can be replaced by a CPLD execution unit.

[0077] In the embodiments of this application, the main function of the data buffer is to store data when the speeds of the data reception and data processing operations do not match, waiting for the control logic to process the received data in sequence. After the data to be executed is transferred to the first LVDS data buffer or the second LVDS data buffer, the FPGA sets the LVDS data transmission flag; after the data to be executed is transferred to the BLVDS data buffer, the FPGA sets the BLVDS data transmission flag.

[0078] It can be understood that, in a possible implementation, the communication module and the I / O module in the embodiments of this application are based on the FPGA as the core. Through the rich LVDS interfaces, BLVDS interfaces, and programmable logic resources of the FPGA chip, a ring topology network based on the LVDS interface and a system bus based on the BLVDS interface are implemented. The LVDS resources are used to achieve the ring bus connection between multiple racks, and the BLVDS resources are used to achieve the bus communication on each rack. Through the expansion of the two-level bus, the total number of controllable expansion node I / O modules is increased, and the communication efficiency, stability, and accuracy of the control system communication bus are improved by leveraging the bidirectional communication characteristics of the ring network and the consistency of the bus protocol.

[0079] It can be seen that in the embodiments of this application, by setting up the data buffer, data can be stored when the speeds of the data reception and data processing operations do not match, waiting for the control logic to process the received data in sequence, ensuring that the data can be correctly processed.

[0080] In a possible implementation, the expansion node I / O module in the communication system provided in the embodiments of this application is used to send response data to the expansion node communication module through the BLVDS bus;

[0081] The expansion node communication module is used to receive the response data and send the response data to the next-level node and / or the previous-level node;

[0082] The local communication module is used to receive the response data.

[0083] It should be noted that the communication module on the extended node is connected to the I / O module on this extended node through the BLVDS bus and adopts a "response" mechanism, that is, the I / O module will only return its own data to the controller after receiving the data or instruction sent to itself. That is, in the embodiment of the present application, after the I / O module receives the data to be executed and executes the data to be executed, it sends the response data to the extended node communication module through the BLVDS bus.

[0084] For example, the extended node I / O module 302 in the extended node 3 sends the response data. There are two communication paths. The first communication path is: extended node I / O module 302 → extended node communication module 3 → extended node communication module 2 → extended node communication module 1 → local node; the second communication path is: extended node I / O module 302 → extended node communication module 3 → extended node communication module 4 → extended node communication module 5 → local node. Then the extended node communication module 3 sends the response data to the next-level node and the previous-level node; the extended node communication modules 2 and 1 send the response data to the previous-level node; the extended node communication modules 4 and 5 send data to the next-level node. It can be understood that the above is only an exemplary illustration and should not be construed as a limitation to the present application.

[0085] It can be seen that in the embodiment of the present application, the response data can be transmitted through two communication paths, so as to ensure that the response data can be received by the local node and improve the reliability of the system communication bus.

[0086] In a possible implementation manner, the extended node communication module in the communication system provided in the embodiment of the present application further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and an FPGA execution unit;

[0087] The FPGA execution unit is used to move the response data to the first LVDS data buffer and / or the second LVDS data buffer after the BLVDS data buffer receives the response data, and send the response data to the next-level node and / or the previous-level node.

[0088] It can be seen that in the embodiment of the present application, by setting up data buffers, when the speeds of the two operations of data reception and data processing cannot match, the data is stored first and waits for the control logic to process the received data in sequence, ensuring that the data can be correctly processed.

[0089] In a possible implementation, the BLVDS data buffer in the communication system provided in the embodiments of the present application includes a first BLVDS data buffer and a second BLVDS data buffer; the extended node communication module and the extended node I / O module of the same node are connected through two BLVDS buses;

[0090] The FPGA execution unit in the extended node communication module of the same node as the extended node I / O module that sends the response data is specifically configured to:

[0091] After the response data is received in the first BLVDS data buffer or the second BLVDS data buffer, move the response data to the first LVDS data buffer and the second LVDS data buffer, and send the response data to the next-level node and the upper-level node.

[0092] It can be seen that in the embodiments of the present application, by setting redundant BLVDS buses, if one BLVDS bus has a problem, data can still be sent and received through the other BLVDS bus, ensuring that the data can be sent to the extended node communication module, further enhancing communication stability, and improving the reliability of the system communication bus.

[0093] See Figure 2 , which is a basic block diagram of an FPGA in a communication module disclosed in the embodiments of the present application. It can be understood that the communication module includes a local node communication module and an extended node communication module. In a possible implementation, the communication module in the embodiments of the present application includes an LVDS0 interface and an LVDS1 interface, that is, the first LVDS interface and the second LVDS interface corresponding to the local node communication module, or the third LVDS interface and the fourth LVDS interface corresponding to the extended node communication module. All functions of the communication module are implemented by the FPGA, and the FPGA is mainly divided into three parts: an LVDS interface transceiver execution unit, an FPGA main logic part, and a BLVDS interface transceiver execution unit. The LVDS interface transceiver execution unit corresponds to Figure 2 LVDS0_RX, LVDS0_TX, LVDS0_RX_Detection, LVDS0_TX_Buffer, LVDS1_RX, LVDS1_TX, LVDS1_RX_Detection, LVDS1_TX_Buffer in Figure 2 ; the FPGA main logic part corresponds to the FPGA main logic execution in Figure 2BLVDS_A, BLVDS_B, BLVDS_A_Buffer, and BLVDS_B_Buffe in it. Among them, the LVDS interface transceiver execution unit is designed with a receive and transmit data buffer; the BLVDS interface transceiver execution unit is designed with a receive and transmit data buffer; the FPGA main logic execution unit has a function of judging the receive data address and a data transfer function.

[0094] See Figure 3 , which is a flowchart of receiving data disclosed in an embodiment of the present application. In a possible implementation manner, in the embodiment of the present application, since the entire system communication bus adopts a "reply" mechanism, the controller needs to first send an instruction or execute data to the IO. After LVDS0 or LVDS1 receives the data, it judges whether the communication address in the destination address of the data is consistent with the node address information of this rack. If the communication address in the data packet is inconsistent with the rack address information of this rack, when the FPGA main logic performs data transfer, it directly moves the data to the transmit buffer of LVDS1 or LVDS0, and the FPGA sets the LVDS transmit data flag and sends the data to the next-level node; if the communication address in the data packet is consistent with the rack address information of this rack, when the FPGA main logic performs data transfer, it moves the data to the transmit data buffers of BLVDS_A and BLVDS_B. BLVDS_A and BLVDS_B are redundant buses at the same level. The FPGA sets the transmit data flags of BLVDS_A and BLVDS_B and simultaneously sends the data to the BLVDS_A and BLVDS_B buses; all IO modules on the same rack will receive this data packet, judge the slot identifier in the destination address among them, and the IO modules with unmatched slot identifiers will actively discard this packet of data. The IO modules with matched slot identifiers will receive this packet of data and perform a CRC check on the entire packet of data. If the check fails, they will actively discard this packet of data. After the check passes, they will execute the instructions or parameters of this packet of data.

[0095] See Figure 4, which is a flowchart of sending data disclosed in an embodiment of the present application. In a possible implementation manner, in the embodiment of the present application, after the extended I / O node receives an instruction or executes data, it will feedback "reply" data to the controller; the data is sent by the extended I / O node. When the data reception buffer areas of the BLVDS_A interface and the BLVDS_B interface of the extended node communication module on the same rack receive the data, there will be a time difference, and this time difference is random. The FPGA will determine the buffer area that receives the data first, and transfer the data in this data buffer area to the data transmission buffer areas of the LVDS0 interface and the LVDS1 interface. After the transfer is completed, the FPGA will set the transmission flag bits of the two interfaces LVDS0 and LVDS1, and the LVDS0 and LVDS1 interfaces will send the data to the next-level node and the previous-level node. The data reception process of the controller is the same as that of the extended I / O node receiving data.

[0096] It can be seen that in the embodiment of the present application, the FPGA is used to implement the conversion between the ring network communication and the bus network communication; the FPGA is used to replace the MCU+PYH topology to implement the ring network communication, reducing the complexity of the physical layer and the protocol layer of the communication bus and reducing the material maintenance cost; the LVDS interface is used to implement the communication, and the external communication medium can be selected as optical signal and electrical signal according to the actual situation.

[0097] See Figure 5 , which is a flowchart of a communication method disclosed in an embodiment of the present application. The method includes:

[0098] S501. The local node communication module sends the data to be executed to the extended node communication module;

[0099] S502. The extended node communication module receives the data to be executed;

[0100] S503. The extended node communication module determines whether the communication address in the destination address corresponding to the data to be executed is the same as the extended node address corresponding to the extended node communication module;

[0101] S504. If the communication address is not the same as the extended node address, the extended node communication module sends the data to be executed to the next-level node or the previous-level node;

[0102] S505. If the communication address is the same as the extended node address, the extended node communication module sends the data to be executed to the BLVDS bus corresponding to the extended node communication module;

[0103] S506. The extended node I / O module receives the data to be executed through the BLVDS bus;

[0104] S507. The extended node I / O module determines whether the communication slot identifier in the destination address is consistent with the extended slot identifier corresponding to the extended node I / O module;

[0105] S508. If the communication slot identifier is inconsistent with the extended slot identifier, the extended node I / O module discards the data to be executed;

[0106] S509. If the communication slot identifier is consistent with the extended slot identifier, the extended node I / O module executes the data to be executed.

[0107] It can be seen that in the embodiment of the present application, the communication address in the destination address is judged by the extended node communication module, and the communication slot identifier in the destination address is judged by the extended node I / O module, so as to ensure that the target extended node I / O module can accurately receive the data to be executed, thereby realizing accurate communication between the large-scale extended node I / O module and the local node. Moreover, the data can be sent to the target extended node I / O module through two communication paths, improving the reliability of the system communication bus.

[0108] In a possible implementation manner, in the communication method provided in the embodiment of the present application, when the communication slot identifier is consistent with the extended slot identifier, the method further includes:

[0109] The extended node I / O module performs cyclic redundancy check code (CRC) check on the data to be executed;

[0110] If the CRC check fails, the extended node I / O module discards the data to be executed;

[0111] If the CRC check passes, the extended node I / O module executes the data to be executed.

[0112] In a possible implementation manner, in the communication method provided in the embodiment of the present application, the extended node communication module further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and a field programmable gate array (FPGA) execution unit. The above steps S503 - S505 may specifically include:

[0113] The FPGA execution unit determines whether the communication address is consistent with the extended node address

[0114] If the communication address is inconsistent with the extended node address, the FPGA execution unit transfers the data to be executed to the first LVDS data buffer or the second LVDS data buffer, and sends the data to be executed to the next-level node or the previous-level node;

[0115] If the communication address is the same as the extended node address, the FPGA execution unit transfers the data to be executed to the BLVDS data buffer area and sends the data to be executed to the BLVDS bus corresponding to the extended node communication module.

[0116] In a possible implementation manner, the communication method provided in the embodiments of the present application further includes:

[0117] S601. The extended node I / O module sends response data to the extended node communication module;

[0118] S602. The extended node communication module receives the response data;

[0119] S603. The extended node communication module sends the response data to the next-level node and / or the previous-level node;

[0120] S604. The local node communication module receives the response data.

[0121] In a possible implementation manner, the extended node communication module in the communication method provided in the embodiments of the present application further includes: a first LVDS data buffer area, a second LVDS data buffer area, a BLVDS data buffer area, and an FPGA execution unit; the above steps S602-S603 may specifically include:

[0122] After the response data is received in the BLVDS data buffer area, the FPGA execution unit transfers the response data to the first LVDS data buffer area and / or the second LVDS data buffer area;

[0123] The FPGA execution unit sends the response data to the next-level node and / or the previous-level node.

[0124] In a possible implementation manner, the BLVDS data buffer area in the communication method provided in the embodiments of the present application includes a first BLVDS data buffer area and a second BLVDS data buffer area; the extended node communication module and the extended node I / O module of the same node are connected through two BLVDS buses;

[0125] When the FPGA execution unit is the FPGA execution unit in the extended node communication module of the same node as the extended node I / O module that sends the response data;

[0126] After the response data is received in the first BLVDS reception buffer or the second BLVDS reception buffer, the FPGA execution unit transfers the response data to the first LVDS data buffer and the second LVDS data buffer, and sends the response data to the next-level node and the previous-level node.

[0127] From the description of the above embodiments, those skilled in the art can clearly understand that all or part of the steps in the above embodiment methods can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network communication device such as a media gateway, etc.) to execute the methods described in various embodiments or some parts of the embodiments of the present application.

[0128] It should be noted that the various embodiments in this specification are described in a progressive manner, and the key points of each embodiment are the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the methods disclosed in the embodiments, since they correspond to the systems disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the system part.

[0129] Finally, it should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0130] The various embodiments in this specification are described in a progressive manner, and the key points of each embodiment are the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

[0131] The foregoing description of the disclosed embodiments enables those skilled in the art to practice or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A communication system, characterized in that, The system includes: a local node, N extended nodes, and multiple bus-type low-voltage differential signal (BLVDS) buses, where N is a positive integer not less than 1; The local node includes a local node communication module and a local node input / output (I / O) module, and the local node communication module and the local node I / O module are connected through the BLVDS bus; Each of the extended nodes includes an extended node communication module and an extended node I / O module, and the extended node communication module and the extended node I / O module of the same node are connected through the BLVDS bus; The local node communication module includes a first low-voltage differential signal (LVDS) interface and a second LVDS interface, the extended node communication module includes a third LVDS interface and a fourth LVDS interface, and the local node communication module and the N extended node communication modules are connected in a ring through the first LVDS interface, the second LVDS interface, the third LVDS interface, and the fourth LVDS interface; Among them, the first LVDS interface is used for the local node communication module to send data to the next-level node; The second LVDS interface is used for the local node communication module to send data to the previous-level node; the local node communication module sends data to the next-level node while the local node communication module sends data to the previous-level node; The third LVDS interface is used for the extended node communication module to send data to the next-level node; The fourth LVDS interface is used for the extended node communication module to send data to the previous-level node; Among them, the first LVDS interface is also used for the local node communication module to receive data sent by the previous-level node; The second LVDS interface is also used for the local node communication module to receive data sent by the next-level node; The third LVDS interface is also used for the extended node communication module to receive data sent by the previous-level node; The fourth LVDS interface is also used for the extended node communication module to receive data sent by the next-level node.

2. The system according to claim 1, wherein The local node communication module is used to send data to be executed to the extended node communication module; The extended node communication module is used to receive the data to be executed, and determine whether the communication address in the destination address corresponding to the data to be executed is the same as the extended node address corresponding to the extended node communication module; if the communication address is not the same as the extended node address, the data to be executed is sent to the next-level node or the previous-level node; if the communication address is the same as the extended node address, the data to be executed is sent to the BLVDS bus corresponding to the extended node communication module; The extended node I / O module is used to receive the data to be executed through the BLVDS bus, and determine whether the communication slot identifier in the destination address is consistent with the extended slot identifier corresponding to the extended node I / O module. If the communication slot identifier is inconsistent with the extended slot identifier, the data to be executed is discarded; if the communication slot identifier is consistent with the extended slot identifier, the data to be executed is executed.

3. The system according to claim 2, wherein When the communication slot identifier is consistent with the extended slot identifier, the extended node I / O module is specifically used for: Performing cyclic redundancy check code (CRC) check on the data to be executed; if the CRC check fails, the data to be executed is discarded; if the CRC check passes, the data to be executed is executed.

4. The system according to claim 2, wherein The extended node communication module further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and a field programmable gate array (FPGA) execution unit; The FPGA execution unit is used to determine whether the communication address is consistent with the extended node address; if the communication address is inconsistent with the extended node address, the data to be executed is transferred to the first LVDS data buffer or the second LVDS data buffer, and the data to be executed is sent to the next-level node or the previous-level node; if the communication address is consistent with the extended node address, the data to be executed is transferred to the BLVDS data buffer, and the data to be executed is sent to the BLVDS bus corresponding to the extended node communication module.

5. The system according to claim 1, wherein The extended node I / O module is used to send response data to the extended node communication module through the BLVDS bus; The extended node communication module is used to receive the response data and send the response data to the next-level node and / or the previous-level node; The local communication module is used to receive the response data.

6. The system according to claim 5, characterized in that, The extended node communication module further includes: a first LVDS data buffer, a second LVDS data buffer, a BLVDS data buffer, and an FPGA execution unit; The FPGA execution unit is used to transfer the response data to the first LVDS data buffer and / or the second LVDS data buffer after the BLVDS data buffer receives the response data, and send the response data to the next-level node and / or the previous-level node.

7. The system according to claim 6, characterized in that, The BLVDS data buffer includes a first BLVDS data buffer and a second BLVDS data buffer; the extended node communication module and the extended node I / O module of the same node are connected through two BLVDS buses; The FPGA execution unit in the extended node communication module of the same node as the extended node I / O module that sends the response data is specifically used for: After receiving the response data in the first BLVDS data buffer or the second BLVDS data buffer, transfer the response data to the first LVDS data buffer and the second LVDS data buffer, and send the response data to the next-level node and the previous-level node.

8. A communication method, characterized in that, Applied to the communication system according to any one of claims 1 to 7, the method includes: The local node communication module sends the data to be executed to the extended node communication module; The extended node communication module receives the data to be executed; The extended node communication module determines whether the communication address in the destination address corresponding to the data to be executed is the same as the extended node address corresponding to the extended node communication module; If the communication address is not the same as the extended node address, the extended node communication module sends the data to be executed to the next-level node or the previous-level node; If the communication address is the same as the extended node address, the extended node communication module sends the data to be executed to the BLVDS bus corresponding to the extended node communication module; The extended node I / O module receives the data to be executed through the BLVDS bus; The extended node I / O module determines whether the communication slot identifier in the destination address is the same as the extended slot identifier corresponding to the extended node I / O module; If the communication slot identifier is not the same as the extended slot identifier, the extended node I / O module discards the data to be executed; If the communication slot identifier is the same as the extended slot identifier, the extended node I / O module executes the data to be executed.

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