Circuit board and manufacturing method thereof

Abstract

A circuit board comprises a board body, a cavity opening, a power supply circuit, a metal wall layer and a plurality of shielding blind holes. The plate body is provided with an upper surface and a lower surface opposite to the upper surface. The cavity opening is formed in the plate body and provided with a bottom and a step-shaped side wall surrounding the bottom, and the step-shaped side wall is connected with the upper surface. The power supply line is arranged on the bottom. The metal wall layer is arranged on the stepped side wall and is electrically separated from the power supply circuit. The shielding blind hole is arranged in the plate body and located between the bottom and the lower surface. The circuit board can improve the integration of the circuit board.

Description

Technical Field

[0001] The invention relates to a circuit board and a manufacturing method thereof, and in particular to a circuit board with a cavity opening whose side wall is stepped and a manufacturing method thereof. Background Art

[0002] As electronic products develop towards lightweight and miniaturization, more and more products combine cavity waveguides with circuit boards. Through the low signal loss characteristics of air, cavity waveguides can transmit signals completely. Cavity waveguides can be used in automotive radar products, for example. However, forming a circuit board with a cavity by laminating a multi-layer structure may cause problems such as cavity groove alignment deviation, discontinuity of the metal layer on the cavity side wall, and glue overflow into the cavity, making it difficult to improve the yield, or even reduce it. Summary of the invention

[0003] At least one embodiment of the present invention provides a circuit board having a cavity opening with a stepped sidewall and a metal wall layer disposed on the stepped sidewall, which can improve the integration of the circuit board.

[0004] At least one embodiment of the present invention provides a method for manufacturing the above-mentioned circuit board to help improve the yield rate of the above-mentioned circuit board.

[0005] A circuit board proposed in at least one embodiment of the present invention comprises a board body, a cavity opening, a power supply line, a metal wall layer and a plurality of shielding blind holes. The board body has an upper surface and a lower surface opposite to the upper surface. The cavity opening is arranged in the board body and has a bottom and a stepped side wall surrounding the bottom, and the stepped side wall is connected to the upper surface. The power supply line is arranged on the bottom. The metal wall layer is arranged on the stepped side wall and is electrically separated from the power supply line. The shielding blind hole is arranged in the board body and is located between the bottom and the lower surface.

[0006] In at least one embodiment of the present invention, in a normal direction of the lower surface, the plurality of shielding blind holes do not overlap with the power supply circuit.

[0007] In at least one embodiment of the present invention, the board body includes a bottom layer, a middle layer and a top layer. The bottom layer has the lower surface, and the plurality of shielding blind holes are arranged in the bottom layer. The middle layer is arranged on the bottom layer. The top layer is arranged on the middle layer and has the upper surface.

[0008] In at least one embodiment of the present invention, the cavity opening includes a middle opening and a top opening. The middle opening is disposed in the middle layer and has a middle sidewall and a middle opening width. The top opening is disposed in the top layer and has a top sidewall and a top opening width, and the top opening width is greater than the middle opening width.

[0009] In at least one embodiment of the present invention, the metal wall layer includes a bottom section, a middle section and a top section. The bottom section is disposed on the bottom. The middle section is disposed on the middle side wall and connected to the bottom section. The top section is disposed on the top side wall and connected to the middle section.

[0010] In at least one embodiment of the present invention, the top section extends to the upper surface.

[0011] In at least one embodiment of the present invention, the intermediate layer includes a first sublayer and a second sublayer. The first sublayer is disposed on the bottom layer. The second sublayer is disposed on the first sublayer.

[0012] In at least one embodiment of the present invention, the middle opening includes a first opening and a second opening. The first opening is disposed in the first sub-layer and has a first sidewall and a first opening width. The second opening is disposed in the second sub-layer and has a second sidewall and a second opening width, and the second opening width is greater than the first opening width.

[0013] In at least one embodiment of the present invention, the middle section includes a first section and a second section. The first section is disposed on the first side wall and connected to the bottom section. The second section is disposed on the second side wall and connected to the first section and the top section.

[0014] A method for manufacturing a circuit board according to at least one embodiment of the present invention comprises providing a bottom wiring structure having a top surface and a bottom surface opposite to the top surface. A peelable adhesive is attached to the top surface. An intermediate wiring structure and a top wiring structure are provided. The intermediate wiring structure is disposed between the bottom wiring structure and the top wiring structure to form a wiring stack. A plurality of shielding blind holes are formed on the bottom surface. A portion of the wiring stack is removed to form a temporary opening and a temporary wiring stack surrounded by the first temporary opening, wherein the temporary opening exposes a portion of the bottom wiring structure and has a temporary side wall. An initial metal wall layer is formed on the temporary side wall. A portion of the temporary wiring stack is removed to expose the peelable adhesive and a portion of the initial metal wall layer is removed to form a metal wall layer. The peelable adhesive and the remaining temporary wiring stack located on the peelable adhesive are removed to form a cavity opening, wherein the cavity opening has a bottom and a stepped side wall surrounding the bottom, wherein the metal wall layer is located on the stepped side wall. A power supply line is formed, wherein the power supply line is located on the bottom and is electrically separated from the metal wall layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a partial cross-sectional schematic diagram of a circuit board according to at least one embodiment of the present invention;

[0016] Figures 2A to 2M It is a partial cross-sectional view of a circuit board in different process stages according to at least one embodiment of the present invention. DETAILED DESCRIPTION

[0017] In the following text, in order to clearly present the technical features of the present invention, the dimensions (such as length, width, thickness and depth) of the elements (such as layers, films, substrates and regions, etc.) in the drawings will be enlarged in a non-proportional manner, and the number of some elements will be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of elements in the drawings and the dimensions and shapes presented by the elements, but should cover the dimensions, shapes and deviations of the two caused by actual processes and / or tolerances. For example, the flat surface shown in the drawings may have rough and / or nonlinear features, and the acute angles shown in the drawings may be rounded. Therefore, the elements presented in the drawings of the present invention are mainly for illustration, and are not intended to accurately depict the actual shape of the elements, nor are they intended to limit the claims of the present invention.

[0018] Secondly, the words "about", "approximately" or "substantially" used in the present invention not only cover the numerical values ​​and numerical ranges clearly recorded, but also cover the permissible deviation range that can be understood by the technicians in the technical field to which the invention belongs, wherein the deviation range can be determined by the error generated during measurement, and the error is caused by the limitation of the measurement system or process conditions. For example, two objects (such as the planes or traces of the substrate) are "substantially parallel" or "substantially perpendicular", wherein "substantially parallel" and "substantially perpendicular" respectively represent that the parallelism and perpendicularity between the two objects may include the non-parallelism and non-perpendicularity caused by the permissible deviation range.

[0019] The spatially relative terms used in the present invention, such as "below", "under", "above", "on", etc., are for the convenience of describing the relative relationship between one element or feature and another element or feature, as shown in the figure. The true meaning of these spatially relative terms includes other orientations. For example, when the figure is flipped 180 degrees up and down, the relationship between one element and another element may change from "below" or "under" to "above" or "on". In addition, the spatially relative descriptions used in the present invention should also be interpreted in the same way.

[0020] It should be understood that, although the present invention may use the terms "first", "second", "third" and the like to describe various elements or features, these elements or features should not be limited by these terms. These terms are mainly used to distinguish one element from another element, or one feature from another feature. In addition, the term "or" used in the present invention may include any one or more combinations of the associated listed items depending on the actual situation.

[0021] Although a series of operations or steps are utilized in the present invention to illustrate the manufacturing method, the order shown in these operations or steps should not be interpreted as a limitation of the present invention. For example, some operations or steps can be performed in different orders and / or simultaneously with other steps. In addition, each operation or step described herein can include several sub-steps or actions.

[0022] In addition, the present invention may be implemented or applied through other different specific embodiments, and the details of the present invention may also be combined, modified and changed in various embodiments based on different viewpoints and applications without departing from the concept of the present invention.

[0023] Figure 1 FIG. 1 is a partial cross-sectional view of a circuit board according to at least one embodiment of the present invention. Figure 1 The circuit board 1 includes a board body 10, a cavity opening 20, a power supply circuit PC, a metal wall layer 30 and a plurality of shielding blind holes BH. The board body 10 has an upper surface US and a lower surface LS opposite to the upper surface US. The cavity opening 20 is arranged in the board body 10, and has a bottom BT and a stepped side wall SW surrounding the bottom BT, and the stepped side wall SW is connected to the upper surface US. The power supply circuit PC is arranged on the bottom BT. The metal wall layer 30 is arranged on the stepped side wall SW and is electrically separated from the power supply circuit PC. The shielding blind hole BH is arranged in the board body 10 and is located between the bottom BT and the lower surface LS.

[0024] Through the above structural design, a cavity opening with a stepped sidewall is arranged in the board body of the circuit board to form a circuit board with a vertical cavity waveguide structure, which makes it easy to combine the cavity waveguide structure into the circuit board, thereby improving the integration of the circuit board. Since air can be stored in the cavity opening, the cavity opening has a smaller dielectric constant, so the signal transmission capability can be improved. In addition, a metal wall layer is arranged on the aforementioned stepped sidewall to improve the shielding capability, which can reduce radiation loss.

[0025] Please continue reading Figure 1 The board body 10 includes a bottom layer 11, an intermediate layer 12 disposed on the bottom layer 11, and a top layer 13 disposed on the intermediate layer 12. The top layer 13 is disposed on the intermediate layer 12 and has an upper surface US, while the bottom layer 11 has a lower surface LS, and a shielding blind hole BH is disposed in the bottom layer 11. Figure 1 As shown, the bottom layer 11, the middle layer 12 and the top layer 13 may include an insulating layer (not shown) and a circuit layer (not shown). In addition, in the normal direction of the lower surface LS, the shielding blind hole BH does not overlap with the power supply circuit PC. Figure 1 As shown, the shielding blind hole BH is electrically connected to the metal wall layer 30 through the circuit layer located at the bottom BT, and the shielding blind hole BH is electrically connected to the metal coating (not marked) located on the lower surface LS. The above design can further enhance the shielding capability of the metal wall layer 30 and the shielding blind hole BH.

[0026] The cavity opening 20 includes a middle opening 21 and a top opening 22. The middle opening 21 is disposed in the middle layer 12 and has a middle sidewall SWM, and the top opening 22 is disposed in the top layer 13 and has a top sidewall SWU. Figure 1 As shown, the middle opening 21 has middle opening widths W1 and W2, and the top opening 22 has a top opening width W, which is greater than the middle opening widths W1 and W2. By designing the opening widths, the middle sidewall SWM and the top sidewall SWU can form the above-mentioned stepped sidewall SW.

[0027] The metal wall layer 30 includes a bottom section 31, a middle section 32 and a top section 33. The bottom section 31 is disposed on the bottom BT of the cavity opening 20, the middle section 32 is disposed on the middle side wall SWM and connected to the bottom section 31, and the top section 33 is disposed on the top side wall SWU and connected to the middle section 32. In other words, the bottom section 31 is disposed on the top surface of the bottom layer 11, the middle section 32 is disposed on the side of the middle layer 12 and connected to the bottom section 31, and the top section 33 is disposed on the side of the top layer 13 and connected to the middle section 32. Therefore, the metal wall layer 30 is a continuous and complete metal layer formed on the stepped side wall SW, so it can have better shielding ability and higher reliability. In some embodiments, the top section 33 can extend to the upper surface US of the board body 10, that is, the top surface of the top layer 13.

[0028] Please continue reading Figure 1 , the middle layer 12 includes a first sublayer 121 and a second sublayer 122, the first sublayer 121 is disposed on the bottom layer 11, the second sublayer 122 is disposed on the first sublayer 121, and the first sublayer 121 and the second sublayer 122 may include an insulating layer (not labeled) and a circuit layer (not labeled). The middle opening 21 includes a first opening 211 and a second opening 212, the first opening 211 is disposed in the first sublayer 121, and has a first side wall SW1 and a first opening width W1, the second opening 212 is disposed in the second sublayer 122, and has a second side wall SW2 and a second opening width W2, and the second opening width W2 is greater than the first opening width W1. Through the design of the aforementioned opening width, the first side wall SW1 and the second side wall SW2 of the top side wall SWU and the middle side wall SWM can form the above-mentioned stepped side wall SW.

[0029] like Figure 1As shown, the middle section 32 includes a first section 321 and a second section 322, the first section 321 is disposed on the first side wall SW1 and connected to the bottom section 31, and the second section 322 is disposed on the second side wall SW2 and connected to the first section 321 and the top section 33. In other words, the first section 321 is disposed on the side and top surface of the first sub-layer 121 and connected to the bottom section 31, and the second section 322 is disposed on the side and top surface of the second sub-layer 122 and connected to the first section 321 and the top section 33.

[0030] Figures 2A to 2M is a partial cross-sectional view of a circuit board in different process stages according to at least one embodiment of the present invention. Figure 2A to Figure 2C ,like Figure 2A As shown, a bottom wiring structure 11' is provided, which has a top surface S1 and a bottom surface S2 opposite to the top surface S1. Figure 2B As shown, the peelable adhesive G is attached to the top surface S1. Figure 2C As shown, an intermediate layer circuit structure 12' and a top layer circuit structure 13' are provided, and the intermediate layer circuit structure 12' is disposed between the bottom layer circuit structure 11' and the top layer circuit structure 13' to form a circuit stack 10'. In some embodiments, the circuit stack 10' can be formed by a build-up method. In addition, the circuit stack 10' has an initial upper surface US' and an initial lower surface LS' opposite to the initial upper surface US', and the initial lower surface LS' is the bottom surface S2 of the bottom layer circuit structure 11'.

[0031] See also Figure 2D to Figure 2F , a plurality of shielding blind holes BH are formed on the bottom surface S2. First, as Figure 2D As shown, a plurality of initial blind holes BH' are formed on the bottom surface S2. In some embodiments, the initial blind holes BH' can be formed by a laser drilling process. Figure 2E As shown, a blind hole metal layer BM is formed on the hole wall of the initial blind hole BH'. In some embodiments, the blind hole metal layer BM can be formed by electroless plating, wherein the material of the blind hole metal layer BM can include copper. Figure 2F As shown, a metal material F is formed in the initial blind hole BH' to form a shielding blind hole BH, wherein the metal material F can be formed by electroplating. Alternatively, the metal material F can be a conductive colloid such as copper paste or silver paste.

[0032] See also Figure 2G A metal coating layer CL is formed on the initial upper surface US' and the initial lower surface LS' of the circuit stack 10'. In some embodiments, the metal coating layer CL may be formed by an electroplating process, and the material of the metal coating layer CL may include copper.

[0033] See also Figure 2H, remove part of the circuit stack 10' to form a temporary opening 20' and a temporary circuit stack TL surrounded by the temporary opening 20', the temporary opening 20' exposes part of the underlying circuit structure 11' and has a temporary sidewall TSW. In detail, remove part of the circuit stack 10' downward from the initial upper surface US' of the circuit stack 10' to form a temporary opening 20', the temporary opening 20' exposes part of the underlying circuit structure 11' and has a stepped temporary sidewall TSW. In some embodiments, the temporary opening 20' can be formed by a mechanical processing process, such as routing. Figure 2H As shown, the temporary opening 20' exposes the circuit layers (not shown) of the bottom circuit structure 11', the middle circuit structure 12' and the top circuit structure 13'. The vertical depth and horizontal position of the dredging groove can be determined by the position of each circuit layer to improve the positioning accuracy of the dredging groove.

[0034] See also Fig.2I , forming an initial metal wall layer 30' on the temporary sidewall TSW. In some embodiments, the initial metal wall layer 30' can be formed by electroless plating and electroplating, wherein the material of the initial metal wall layer 30' can include copper. In some embodiments, the initial metal wall layer 30' can be formed by electroplating, such as Fig.2I As shown, the circuit layers of the bottom circuit structure 11', the middle circuit structure 12' and the top circuit structure 13' exposed by the temporary opening 20' can increase the electroplating rate and improve the uniformity of the coating, and can also reduce the problem of too thin film thickness or even broken lines at the turning point.

[0035] See also Figure 2J , remove part of the temporary circuit stack TL to expose the peelable glue G and remove part of the initial metal wall layer 30' to form the metal wall layer 30. In detail, remove part of the temporary circuit stack TL from the top surface of the temporary circuit stack TL downward to expose the peelable glue G, and simultaneously remove part of the initial metal wall layer 30' located on the top surface and side surface of the temporary circuit stack TL to form the metal wall layer 30. In some embodiments, part of the temporary circuit stack TL and part of the initial metal wall layer 30' can be removed by a mechanical processing process (such as profile cutting).

[0036] See also Figure 2K , the peelable glue G and the remaining temporary circuit stack TL on the peelable glue G are removed to form a cavity opening 20. The cavity opening 20 has a bottom BT and a stepped sidewall SW surrounding the bottom, and the metal wall layer 30 is located on the stepped sidewall SW.

[0037] See also Figure 2L , forming a power supply line PC, the power supply line PC is located on the bottom BT and is electrically separated from the metal wall layer 30. In some embodiments, the power supply line PC can be formed by a lithography process and an etching process. Figure 2L As shown, the circuit stack 10 ′ forms the board body 10 , and the bottom circuit structure 11 ′, the middle circuit structure 12 ′ and the top circuit structure 13 ′ respectively form the bottom layer 11 , the middle layer 12 and the top layer 13 of the board body 10 .

[0038] See also Figure 2M , a solder mask layer SM and a surface treatment layer SF can be formed on the upper surface US and the lower surface LS of the board body 10 to complete the circuit board 1. In some embodiments, the solder mask layer SM can be formed by a printing process, and the material of the solder mask layer SM can be ink or resin. In some embodiments, the surface treatment layer SF can be formed by a tin plating process or a tin spraying process. Alternatively, the surface treatment layer SF can also be a nickel-gold layer. However, the present invention is not limited to this. In other embodiments, the circuit board 1 can be completed without forming the solder mask layer SM and the surface treatment layer SF. Figure 2L shown.

[0039] In summary, in the circuit board and its manufacturing method of at least one embodiment of the present invention, a cavity opening with a stepped sidewall can be set in the board body of the circuit board to form a circuit board with a vertical cavity waveguide structure, which makes it easy to combine the cavity waveguide structure into the circuit board, thereby improving the integration of the circuit board. Since air can be stored in the cavity opening, the cavity opening has a smaller dielectric constant, so the signal transmission capability can be improved. Furthermore, a metal wall layer is set on the aforementioned stepped sidewall to enhance the shielding capability and reduce radiation loss. In addition, the circuit board manufacturing method of at least one embodiment of the present invention forms a cavity opening by removing the circuit structure, which can avoid problems such as alignment deviation of the cavity slot body and overflow of glue into the cavity, and forms a metal wall layer by one-time electroplating, which can reduce problems such as discontinuity or incompleteness of the metal wall layer, thereby improving the yield.

[0040] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the attached claims.

[0041]

Explanation of symbols

[0042] 1: Circuit board

[0043] 10:Plate body

[0044] 10': Circuit stacking

[0045] 11: Bottom layer

[0046] 11': Bottom line structure

[0047] 12: Middle layer

[0048] 12': Middle layer line structure

[0049] 13: Top floor

[0050] 13': Top line structure

[0051] 121: First sublayer

[0052] 122: Second sublayer

[0053] 20: Cavity opening

[0054] 20': Temporary opening

[0055] 21: Middle opening

[0056] 22: Top opening

[0057] 211: First Opening

[0058] 212: Second opening

[0059] 30:Metal wall layer

[0060] 30': Initial metal wall layer

[0061] 31: Bottom section

[0062] 32: Middle section

[0063] 33: Top section

[0064] 321: First section

[0065] 322: Second Section

[0066] BH: Shielded Blind Hole

[0067] BH': Initial blind hole

[0068] BT: Bottom

[0069] G: Peelable colloid

[0070] LS: Lower surface

[0071] LS': Initial lower surface

[0072] PC: Power supply line

[0073] S1: Top surface

[0074] S2: Bottom

[0075] SF: Surface treatment layer

[0076] SM: Solder mask

[0077] SW: Stepped sidewall

[0078] SW1: First side wall

[0079] SW2: Second side wall

[0080] SWM: Middle Sidewall

[0081] SWU: Top side wall

[0082] TL: Temporary Line Stacking

[0083] TSW: Temporary Side Wall

[0084] US: Upper surface

[0085] US': Initial upper surface

[0086] W: Top opening width

[0087] W1: First opening width

[0088] W2: Second opening width.

Claims

1. A circuit board, characterized in that: include: A plate body having an upper surface and a lower surface opposite to the upper surface; a cavity opening, disposed in the plate body, and having a bottom and a stepped sidewall surrounding the bottom, wherein the stepped sidewall is connected to the upper surface; A power supply circuit is arranged on the bottom; A metal wall layer, disposed on the stepped side wall and electrically separated from the power supply circuit; as well as A plurality of shielding blind holes are arranged in the plate body and located between the bottom and the lower surface.

2. The circuit board according to claim 1, characterized in that: In the normal direction of the lower surface, the plurality of shielding blind holes do not overlap with the power supply circuit.

3. The circuit board according to claim 1, characterized in that: The plate body comprises: A bottom layer having the lower surface, wherein the plurality of shielding blind holes are disposed in the bottom layer; an intermediate layer disposed on the bottom layer; and The top layer is disposed on the middle layer and has the upper surface.

4. The circuit board according to claim 3, characterized in that: The cavity opening comprises: a middle opening disposed in the middle layer and having a middle sidewall and a middle opening width; as well as A top opening is disposed in the top layer and has a top sidewall and a top opening width, wherein the top opening width is greater than the middle opening width.

5. The circuit board according to claim 4, characterized in that: The metal wall layer comprises: A bottom section, disposed on the bottom; a middle section, disposed on the middle side wall and connected to the bottom section; and The top section is disposed on the top side wall and connected to the middle section.

6. The circuit board according to claim 5, characterized in that: The top section extends to the upper surface.

7. The circuit board according to claim 5, characterized in that: The intermediate layer comprises: A first sub-layer is disposed on the bottom layer; and The second sublayer is arranged on the first sublayer.

8. The circuit board according to claim 7, characterized in that: The middle opening comprises: a first opening disposed in the first sub-layer and having a first sidewall and a first opening width; and The second opening is disposed in the second sub-layer and has a second sidewall and a second opening width, wherein the second opening width is greater than the first opening width.

9. The circuit board according to claim 8, characterized in that: The middle section includes: A first section, disposed on the first side wall and connected to the bottom section; and The second section is disposed on the second side wall and connects the first section and the top section.

10. A method for manufacturing a circuit board, characterized in that: include: Providing a bottom wiring structure having a top surface and a bottom surface opposite to the top surface; Laminating a peelable colloid on the top surface; Provide middle layer circuit structure and top layer circuit structure; The middle layer circuit structure is arranged between the bottom layer circuit structure and the top layer circuit structure to form a circuit stack; forming a plurality of shielding blind holes on the bottom surface; Removing a portion of the circuit stack to form a temporary opening and a temporary circuit stack surrounded by the temporary opening, wherein the temporary opening exposes a portion of the underlying circuit structure and has a temporary sidewall; forming an initial metal wall layer on the temporary sidewall; Removing part of the temporary circuit stack to expose the strippable glue and removing part of the initial metal wall layer to form a metal wall layer; Removing the strippable adhesive and the remaining temporary circuit stack on the strippable adhesive to form a cavity opening, wherein the cavity opening has a bottom and a stepped sidewall surrounding the bottom, and the metal wall layer is located on the stepped sidewall; as well as A power supply line is formed, wherein the power supply line is located on the bottom and is electrically separated from the metal wall layer.

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