Preparation method of wide-band multi-spectral indium gallium arsenide detector

Abstract

The application relates to a preparation method of a wide-band multi-spectrum indium gallium arsenide detector, and belongs to the technical field of indium gallium arsenide detectors. y P 1‑y Transition layer, In x Ga 1‑x As absorption layer and N-type InAs y P 1‑y Cap layer design, a wide-band multi-spectrum indium gallium arsenide detector capable of working at room temperature, i.e. 0.9-2.5 mu m, is prepared; by integrating a multi-spectrum filter array to the back of the indium gallium arsenide detector, multi-channel multi-spectrum imaging is realized; by adopting inductively coupled plasma chemical vapor deposition atomic layer deposition passivation film and controlling deposition conditions, the dark current of the device is effectively reduced; by thinning the InP substrate, the waveband crosstalk between pixels is effectively inhibited; by depositing a back anti-reflection film on the surface of the thinned InP substrate, back reflection is reduced and transmittance is increased; by using alignment marks and alignment structures, a flip chip bonder is used to flip and align the readout circuit with the filter, high-precision alignment integration of the filter and the device is realized, the alignment precision is better than 2 mu m, the alignment precision is greatly increased, and the method is convenient to operate, and has a good application prospect in the field of multi-spectrum detectors.

Description

TECHNICAL FIELD

[0001] The application relates to a preparation method of a wide-band multi-spectral indium gallium arsenide detector and belongs to the technical field of indium gallium arsenide detectors. BACKGROUND

[0002] In addition to the 380nm-760nm visible light band that can be seen by human eyes, the natural radiation energy also includes gamma rays, ultraviolet light, near-infrared light, short-middle-long-wave infrared light, very long-wave infrared light and microwaves that cannot be seen by human eyes. Among them, the short-wave infrared light mainly refers to the radiation energy covering the 900nm-3000nm band, and there is relatively much radiation energy in the natural world, and there is relatively much spectral information in the band, so that multi-spectral and high-spectral detection and analysis means can be used for the detection, identification and analysis of various substances.

[0003] The mainstream photoelectric materials responding to the 900nm-3000nm band include indium gallium arsenide (InGaAs), mercury cadmium telluride (HgCdTe), indium arsenide (InAs) and lead sulfide (PbS), and the InGaAs is the most representative short-wave infrared detector material, which has the advantages of performance, cost, power consumption and volume. At present, the mainstream indium gallium arsenide product uses InP / InGaAs as the material, responds to the 900nm-1700nm band, and can be expanded to 400nm-1700nm through an InP substrate thinning process. The process of the product is relatively mature, and the product has been widely applied. 0.53 Ga 0.47 As, responds to the 900nm-1700nm band, and can be expanded to 400nm-1700nm through an InP substrate thinning process. The process of the product is relatively mature, and the product has been widely applied.

[0004] However, the detector product responding to the wavelength of 2500nm has the problems of needing to re-optimize and adjust the material component structure, reduce the lattice mismatch conduction in the epitaxial growth process and reduce the dark current of the device, so that there is no mature product in China, and the application of the wide-spectrum detector with the expanded cutoff wavelength cannot be met.

[0005] With the miniaturization of the mounting platform and the demand for field application, the demand for multi-spectral imagers in the fields of agriculture, forestry, military, medicine, scientific research and the like is also increasing. Therefore, the development of the wide-band multi-spectral indium gallium arsenide detector product has strong practical value, and can effectively meet various analysis requirements. SUMMARY

[0006] In order to realize the multi-spectral detection imaging of the indium gallium arsenide short-wave detector, the application provides a preparation method of a wide-band multi-spectral indium gallium arsenide detector. The method integrates a multi-spectral filter array to the back of the indium gallium arsenide detector, realizes multi-spectral imaging of multiple channels, reduces the optical crosstalk between different spectral bands as much as possible, and ensures the feasibility of the process. The InP substrate is thinned to 10-60um, and the band crosstalk between pixels is suppressed.

[0007] The object of the present application is achieved by the following technical solutions.

[0008] A preparation method of a wide-band multi-spectrum indium gallium arsenide detector, the method steps are as follows:

[0009] (1) sequentially growing an InP buffer layer, an InAs y P 1-y transition layer, an In x Ga 1-x As absorption layer and an N-type InAs y P 1-y cap layer on an InP substrate in sequence;

[0010] Further, the thickness of the InP substrate is preferably 300-500 μm, the thickness of the InP buffer layer is preferably 100-500 nm, the thickness of the InAs y P 1-y transition layer is preferably 2-5 μm, the thickness of the In x Ga 1-x As absorption layer is preferably 2-4 μm, and the thickness of the N-type InAs y P 1-y cap layer is preferably 800-1500 nm;

[0011] Preferably, x in the In x Ga 1-x As is 0.82, i.e. In 0.82 Ga 0.18 As; and y in the InAs y P 1-y is 0.6, i.e. InAs 0.6 P 0.4 .

[0012] (2) depositing a mask layer on the surface of the N-type InAs y P 1-y cap layer by using plasma enhanced chemical vapor deposition (PECVD);

[0013] Further, the thickness of the mask layer is preferably 100-500 nm; and the material of the mask layer is preferably Si3N4 or SiO2.

[0014] (3) performing diffusion area lithography on the mask layer, removing the mask layer corresponding to the pixel area by etching, and then diffusing Zn in the area where the mask layer is removed until the Zn diffuses to the In x Ga 1-x As absorption layer and the In x Ga 1-x As absorption layer.As absorption layer has a diffusion depth of 50nm-1000nm and a concentration of 1x10 18 ~5x10 18 The region containing Zn doping forms a P-type doped region.

[0015] Further, the diffusion depth is preferably 100nm-200nm.

[0016] (4) An N-type contact region is photoetched on the mask layer on the overall periphery of the P-type doped region. After the corresponding mask layer is removed by etching, the N-type InAs y P 1-y cap layer, In x Ga 1-x As absorption layer, and InAs y P 1-y transition layer are completely removed by wet etching after the N-type contact region is formed around the P-type doped region.

[0017] (5) A passivation film is deposited on the surface exposed after the mask layer is removed by using inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology. Then, an ohmic contact region is photoetched on the passivation film, and part of the passivation film on the surface of the P-type doped region is removed by etching to form P-type and N-type ohmic contact regions.

[0018] When the passivation film is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 250-300°C, the power is controlled to be 200-300W, and the pressure is controlled to be 5-10Pa, so as to effectively reduce the dark current of the device.

[0019] Further, the material of the passivation film is preferably Si3N4 or SiO2, and the thickness of the passivation film is preferably 20-100nm.

[0020] (6) Electrode pattern photoetching is performed on the P-type and N-type ohmic contact regions, and then titanium (Ti) metal layer, platinum (Pt) metal layer, and gold (Au) metal layer are sputtered in sequence as metal electrodes to form P-type metal electrode regions, i.e. P electrodes, and N-type metal electrode regions, i.e. N electrodes, so as to prepare a plurality of single focal plane detector arrays.

[0021] Further, the thickness of the Ti metal layer is preferably 30-100nm, the thickness of the Pt metal layer is preferably 30-100nm, and the thickness of the Au metal layer is preferably 100-300nm.

[0022] (7) the plurality of single focal plane detector arrays are divided to obtain a single focal plane array, and the single focal plane array is connected to a readout circuit, the readout circuit is provided with an alignment mark, and the connection position of the single focal plane array is located at a position on the readout circuit except the alignment mark.

[0023] (8) the InP substrate is thinned to 10-60 mu m by grinding, polishing and etching, so that the band crosstalk between pixels can be effectively inhibited; an atomic layer deposition technology of inductively coupled plasma chemical vapor deposition is used to deposit a back antireflection film on the surface of the thinned InP substrate, the material of the back antireflection film is Si3N4 or SiO2, and the thickness is 200-300 nm, so as to reduce back reflection and increase transmittance, thereby obtaining an indium gallium arsenide focal plane detector chip;

[0024] Preferably, the InP substrate is thinned to 13-17 mu m.

[0025] (9) four ceramic cubes plated with indium are bonded to the readout circuit with the indium plated surface facing upward, and the bonding position is located at a position on the readout circuit except the indium gallium arsenide focal plane detector chip and the alignment mark;

[0026] Further, preferably, the thickness of the ceramic cube is 22-28 mu m.

[0027] (10) the readout circuit is provided with an alignment mark, and the filter is provided with an alignment structure, the readout circuit and the filter are aligned and integrated by using a flip chip bonder through the alignment mark and the alignment structure, thereby obtaining a wide-band multi-spectral indium gallium arsenide detector.

[0028] Advantages

[0029] (1) the application provides a preparation method of a wide-band multi-spectral indium gallium arsenide detector, the method is characterized by the design of an InP buffer layer, an InAs y P 1-y transition layer, an In x Ga 1-x As absorption layer and an N-type InAs y P 1-y cap layer, so that a wide-band multi-spectral indium gallium arsenide detector capable of working at room temperature is prepared, the band is expanded from 1.7 mu m of lattice matching to 2.5 mu m, the wide-band expansion facilitates the application in other spectral, gas detection and other fields, the spectral channel and spectral range of the filter can be freely designed and selected according to actual needs, the flexibility is good, the integration is simple, and the production is facilitated.

[0030] (2) the application provides a preparation method of a wide-band multi-spectral indium gallium arsenide detector, the method is characterized by integrating a multi-spectral filter array to the back of the indium gallium arsenide detector, so that multi-channel multi-spectral imaging is realized.

[0031] (3) The application provides a preparation method of a wide-band multi-spectrum indium gallium arsenide detector, wherein when an inductively coupled plasma chemical vapor deposition atomic layer deposition passivation film is prepared, the temperature is controlled to be 250-300 DEG C, the power is controlled to be 200-300 W, and the pressure is controlled to be 5-10 Pa, so that the dark current of the device is effectively reduced.

[0032] (4) The application provides a preparation method of a wide-band multi-spectrum indium gallium arsenide detector, wherein the InP substrate is removed by grinding, polishing and etching, and is thinned to 10-60 mu m, so that the waveband crosstalk between pixels is effectively inhibited.

[0033] (5) The application provides a preparation method of a wide-band multi-spectrum indium gallium arsenide detector, wherein an inductively coupled plasma chemical vapor deposition atomic layer deposition technology is used to deposit a back antireflection film on the surface of the thinned InP substrate, so that the back reflection is reduced and the transmittance is increased.

[0034] (6) The application provides a preparation method of a wide-band multi-spectrum indium gallium arsenide detector, wherein alignment marks and alignment structures are used, and a flip chip bonder is used to flip and align the readout circuit and the optical filter, so that the optical filter and the device are high-precision aligned and integrated, the alignment precision is better than 2 mu m, the alignment precision is greatly increased, the operation is convenient, and the method has a good application prospect in the field of multi-spectrum detectors. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 A structural schematic diagram of the material prepared in step (1) in Example 1.

[0036] Figure 2 A sectional structural schematic diagram of the P-type doped region prepared in step (3) in Example 1.

[0037] Figure 3 A planar structural schematic diagram of the N-type contact region prepared in step (4) in Example 1.

[0038] Figure 4 A structural schematic diagram of the P electrode and the N electrode prepared in step (6) in Example 1.

[0039] Figure 5 A test effect diagram of the wide-band multi-spectrum indium gallium arsenide detector prepared in Example 1.

[0040] Wherein, 1-InP substrate, 2-InP buffer layer, 3-InAs y P 1-y transition layer, 4-In x Ga 1-x As absorption layer, 5-N type InAs y P1-y Cap layer, 6 - Mask layer, 7 - P-type doped region, 8 - N-type contact region, 9 - Passivation film, 10 - P electrode, 11 - N electrode DETAILED DESCRIPTION

[0041] The application will be further described in conjunction with specific embodiments, wherein the methods are conventional methods and the raw materials are commercially available unless otherwise specified.

[0042] Example 1

[0043] A method for preparing a wide-band multi-spectrum indium gallium arsenide detector, the method steps are as follows:

[0044] (1) Using metal organic chemical vapor deposition (MOCVD) technology, sequentially depositing and growing InP buffer layer 2, InAs y P 1-y transition layer 3, In x Ga 1-x As absorption layer 4 and N-type InAs y P 1-y cap layer 5 on InP substrate 1, as shown in the figure. Figure 1

[0045] Among them, the thickness of InP substrate 1 is 350 μm, the thickness of InP buffer layer 2 is 350 nm, the thickness of InAs y P 1-y transition layer 3 is 2.5 μm, In x Ga 1-x As absorption layer 4 is 3 μm, N-type InAs y P 1-y cap layer 5 is 1000 nm; the In x Ga 1-x As, x is 0.82, that is, In 0.82 Ga 0.18 As, the InAs y P 1-y , y is 0.6, that is, InAs 0.6 P 0.4 .

[0046] (2) Using plasma enhanced chemical vapor deposition (PECVD) technology, depositing a layer of Si3N4 mask layer 6 with a thickness of 300 nm on the surface of N-type InAs y P 1-y cap layer 5.

[0047] ​(3) On the Si3N4 mask layer 6, a diffusion region photoetching is made, the Si3N4 mask layer 6 corresponding to the pixel area is removed by inductively coupled plasma (ICP) dry etching, and then Zn is diffused to the In 0.82 Ga 0.18 As absorption layer 4 by MOCVD technology, and the diffusion depth of the In 0.82 Ga 0.18 As absorption layer 4 is 100 nm, and the concentration is 1×10 18 , and the region containing Zn doping forms a P-type doped region 7, as shown in FIG. 4. Figure 2

[0048] (4) On the Si3N4 mask layer 6 around the P-type doped region 7, an N-type contact region 8 photoetching is made, and then the mask layer 6 corresponding to the N-type contact region 8 is removed by etching, and then the N-type InAs 0.6 P 0.4 cap layer 5, In 0.82 Ga 0.18 As absorption layer 4 and InAs 0.6 P 0.4 transition layer 3 are completely removed by wet etching, and the N-type contact region 8 is formed around the P-type doped region 7, as shown in FIG. 5. Figure 3

[0049] (5) After the mask layer 6 is removed, a Si3N4 passivation film 9 with a thickness of 40 nm is deposited on the exposed surface by inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology, and then an ohmic contact region photoetching is made on the Si3N4 passivation film 9, and part of the passivation film 9 on the surface of the P-type doped region 7 is removed by reactive ion etching (RIE) to form P-type and N-type ohmic contact regions.

[0050] When the Si3N4 passivation film 9 is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 250°C, the power is 200W, and the pressure is 5Pa, so as to effectively reduce the dark current of the device.

[0051] (6) Electrode pattern photoetching is made on the P-type and N-type ohmic contact regions, and then Ti metal layer, Pt metal layer and Au metal layer are sputtered in sequence as metal electrodes by magnetron sputtering technology to form P-type metal electrode region, i.e. P electrode 10, and N-type metal electrode region, i.e. N electrode 11, so as to prepare a plurality of single focal plane detector arrays, as shown in FIG. 6. Figure 4

[0052] Among them, the thickness of the Ti metal layer is 50 nm, the thickness of the Pt metal layer is 50 nm, and the thickness of the Au metal layer is 250 nm.​​​

[0053] (7) the plurality of single focal plane detector arrays are split to obtain a single focal plane array, and the single focal plane array is connected to the readout circuit, the readout circuit is provided with an alignment mark, and the connection position of the single focal plane array is located on the readout circuit except the alignment mark.

[0054] (8) the InP substrate 1 is thinned to 13 μm by grinding and polishing and etching to remove part of the InP substrate 1, so that the wavelength crosstalk between pixels can be effectively suppressed; and a Si3N4 back antireflection film with a thickness of 200 nm is deposited on the surface of the thinned InP substrate 1 by using an inductively coupled plasma chemical vapor deposition atomic layer deposition technology, so as to reduce back reflection and increase transmittance, thereby obtaining an indium gallium arsenide focal plane detector chip.

[0055] (9) four ceramic cubes plated with indium are adhered to the readout circuit with the indium-plated surface facing upward, and the adhesion position is located on the readout circuit except the indium gallium arsenide focal plane detector chip and the alignment mark.

[0056] (10) the readout circuit is provided with an alignment mark, and the optical filter is provided with an alignment structure, and the readout circuit and the optical filter are aligned and integrated by using a flip chip bonder through the alignment mark and the alignment structure, thereby obtaining a wide-band multi-spectral indium gallium arsenide detector.

[0057] The wide-band multi-spectral indium gallium arsenide detector prepared in the embodiment is tested.

[0058] (1) the test effect diagram is shown in Figure 5 , which shows that the detector realizes multi-spectral detection of four channels.

[0059] (2) the test results show that the detector has a wide-band of 0.9 μm to 2.5 μm working at room temperature.

[0060] Embodiment 2

[0061] A preparation method of a wide-band multi-spectral indium gallium arsenide detector, the steps of the method are as follows:

[0062] (1) an InP buffer layer 2, an InAs y P 1-y transition layer 3, an In x Ga 1-x As absorption layer 4 and an N-type InAs y P 1-y cap layer 5 are sequentially deposited and grown on an InP substrate 1 by using a metal organic chemical vapor deposition technology.

[0063] Among them, the thickness of the InP substrate 1 is 300 μm, the thickness of the InP buffer layer 2 is 100 nm, the thickness of the InAsy P 1-y The thickness of transition layer 3 is 2 μm, In x Ga 1-x The thickness of As absorber layer 4 is 2 μm, N-type InAs y P 1-y The thickness of the cap layer 5 is 800 nm; the In x Ga 1-x In As, x is 0.82, which is In 0.82 Ga 0.18 As, the InAs y P 1-y The value of y in the equation is 0.6, which corresponds to InAs. 0.6 P 0.4 .

[0064] (2) Using plasma-enhanced chemical vapor deposition technology on N-type InAs y P 1-y A 100nm thick Si3N4 mask layer 6 is deposited on the surface of the cap layer 5.

[0065] (3) Photolithography is performed on the Si3N4 mask layer 6 to create a diffusion region. After removing the Si3N4 mask layer 6 corresponding to the pixel region using ICP dry etching, Zn diffusion is performed on the region where the Si3N4 mask layer 6 has been removed. Zn is diffused into In using MOCVD technology. 0.82 Ga 0.18 As absorption layer 4 and in In 0.82 Ga 0.18 The diffusion depth of As absorber layer 4 is 200 nm, and the concentration is 5 × 10⁻⁶. 18 The region containing Zn doping forms a P-type doped region 7.

[0066] (4) Photolithography is performed on the Si3N4 mask layer 6 around the entire periphery of the P-type doped region 7 to form the N-type contact region 8. After removing the corresponding mask layer 6 by etching, the N-type InAs corresponding to the N-type contact region 8 is completely removed by wet etching. 0.6 P 0.4 Hat layer 5, In 0.82 Ga 0.18 As absorption layer 4 and InAs 0.6 P 0.4 The transition layer 3 forms an N-type contact region 8 around the P-type doped region 7, and all other mask layers 6 are completely removed by wet etching.

[0067] (5) After removing the mask layer 6, a Si3N4 passivation film 9 with a thickness of 100 nm is deposited on the exposed surface by using an inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology; then, an ohmic contact area is photoetched on the Si3N4 passivation film 9, and a part of the passivation film 9 on the surface of the P-type doped region 7 is removed by reactive ion etching (RIE) to form P-type and N-type ohmic contact areas;

[0068] When the Si3N4 passivation film 9 is deposited by using the inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 300℃, the power is 300W, and the pressure is 10Pa, so that the dark current of the device is effectively reduced.

[0069] (6) Electrode pattern photoetching is performed on the P-type and N-type ohmic contact areas, and then a Ti metal layer, a Pt metal layer and an Au metal layer are sequentially sputtered as metal electrodes by using a magnetron sputtering technology to form a P electrode 10 and an N electrode 11, thereby obtaining a plurality of single focal plane detector arrays;

[0070] The thickness of the Ti metal layer is 30 nm, the thickness of the Pt metal layer is 30 nm, and the thickness of the Au metal layer is 100 nm.

[0071] (7) The plurality of single focal plane detector arrays are segmented to obtain a single focal plane array, and the single focal plane array is connected to a readout circuit. The readout circuit is provided with an alignment mark, and the connection position of the single focal plane array is located on the readout circuit except the alignment mark.

[0072] (8) The InP substrate 1 is thinned to 15μm by grinding, polishing and etching to effectively suppress the band crosstalk between pixels. A Si3N4 back antireflection film with a thickness of 250 nm is deposited on the surface of the thinned InP substrate 1 by using an inductively coupled plasma chemical vapor deposition atomic layer deposition technology to reduce back reflection and increase transmittance, thereby obtaining an indium gallium arsenide focal plane detector chip.

[0073] (9) Four ceramic cubes plated with indium are adhered to the readout circuit with the indium-plated surface facing upward, and the adhesion position is located on the readout circuit except the indium gallium arsenide focal plane detector chip and the alignment mark.

[0074] (10) The readout circuit is provided with an alignment mark, and the optical filter is provided with an alignment structure. The readout circuit and the optical filter are aligned and integrated by using a flip chip bonder through the alignment mark and the alignment structure, thereby obtaining a wide-band multi-spectral indium gallium arsenide detector.

[0075] The wide-band multi-spectral indium gallium arsenide detector prepared in the embodiment is tested.

[0076] (1) The test result shows that the detector realizes 4-channel multi-spectrum detection, which is similar to Figure 5 .

[0077] (2) The test result shows that the detector has a wide waveband of 0.9 μm-2.5 μm working at room temperature.

[0078] Embodiment 3

[0079] A preparation method of a wide waveband multi-spectrum indium gallium arsenide detector, the method steps are as follows:

[0080] (1) An InP buffer layer 2, an InAs y P 1-y transition layer 3, an In x Ga 1-x As absorption layer 4 and an N-type InAs y P 1-y cap layer 5 are sequentially deposited and grown on an InP substrate 1 by metal organic chemical vapor deposition technology.

[0081] The thickness of the InP substrate 1 is 500 μm, the thickness of the InP buffer layer 2 is 500 nm, the thickness of the InAs y P 1-y transition layer 3 is 5 μm, the thickness of the In x Ga 1-x As absorption layer 4 is 4 μm, and the thickness of the N-type InAs y P 1-y cap layer 5 is 1500 nm; x in the In x Ga 1-x As is 0.82, i.e. In 0.82 Ga 0.18 As, and y in the InAs y P 1-y is 0.6, i.e. InAs 0.6 P 0.4 .

[0082] (2) A SiO2 mask layer 6 with a thickness of 500 nm is deposited on the surface of the N-type InAs y P 1-y cap layer 5 by plasma enhanced chemical vapor deposition technology.

[0083] (3) A diffusion area photoetching is made on the SiO2 mask layer 6, after the SiO2 mask layer 6 corresponding to the pixel area is removed by ICP dry etching, Zn is diffused to the In 0.82 Ga 0.18 As absorption layer 4 and the In0.82 Ga 0.18 The diffusion depth of the As absorption layer 4 is 150 nm, and the concentration is 3×10 18 The region containing Zn doping forms a P-type doped region 7.

[0084] (4) The N-type contact region 8 is photoetched on the SiO2 mask layer 6 on the whole periphery of the P-type doped region 7. After the corresponding mask layer 6 is removed by etching, the N-type InAs 0.6 P 0.4 The cap layer 5, In 0.82 Ga 0.18 The As absorption layer 4 and InAs 0.6 P 0.4 The transition layer 3, and the N-type contact region 8 is formed around the P-type doped region 7. The remaining mask layer 6 is completely removed by wet etching.

[0085] (5) A 20-nm-thick SiO2 passivation film 9 is deposited on the surface exposed after the mask layer 6 is removed by using inductively coupled plasma chemical vapor deposition atomic layer deposition (ICPCVD) technology. Then, the ohmic contact region is photoetched on the SiO2 passivation film 9. The surface part of the passivation film 9 on the P-type doped region 7 is removed by reactive ion etching (RIE) to form P-type and N-type ohmic contact regions.

[0086] When the Si3N4 passivation film 9 is deposited by inductively coupled plasma chemical vapor deposition atomic layer deposition, the temperature is controlled to be 275°C, the power is 250 W, and the pressure is 7 Pa, so as to effectively reduce the dark current of the device.

[0087] (6) The electrode pattern is photoetched on the P-type and N-type ohmic contact regions. Then, the Ti metal layer, the Pt metal layer, and the Au metal layer are sequentially sputtered as metal electrodes by using magnetron sputtering technology to form the P-type metal electrode region, i.e., the P electrode 10, and the N-type metal electrode region, i.e., the N electrode 11, so as to prepare a plurality of single focal plane detector arrays.

[0088] The thickness of the Ti metal layer is 100 nm, the thickness of the Pt metal layer is 100 nm, and the thickness of the Au metal layer is 300 nm.

[0089] (7) The plurality of single focal plane detector arrays are segmented to obtain a single focal plane array. The single focal plane array is connected to a readout circuit. The readout circuit is provided with an alignment mark. The connection position of the single focal plane array is located on the readout circuit except the alignment mark.

[0090] (8) The InP substrate 1 is thinned to 17μm by grinding, polishing and etching to remove part of it, which can effectively suppress crosstalk between pixels. SiO2 back antireflection film with a thickness of 300nm is deposited on the surface of the thinned InP substrate 1 by inductively coupled plasma chemical vapor deposition atomic layer deposition technology to reduce back reflection and increase transmittance, thus preparing an indium gallium arsenide focal plane detector chip.

[0091] (9) Four ceramic blocks with indium-plated surfaces, each 28 μm thick, are bonded to the readout circuit with the indium-plated surface facing up. The bonding positions are on the readout circuit excluding the indium gallium arsenide focal plane detector chip and the alignment mark.

[0092] (10) An alignment mark is provided on the readout circuit and an alignment structure is provided on the filter. The readout circuit and the filter are aligned and integrated by using an inverted soldering machine through the alignment mark and the alignment structure to prepare a wide-band multispectral indium gallium arsenide detector.

[0093] The broadband multispectral indium gallium arsenide detector prepared in this embodiment was tested:

[0094] (1) Test results show that the detector achieves multispectral detection in four channels, and... Figure 5 similar.

[0095] (2) Test results show that the detector has a wide wavelength range of 0.9μm to 2.5μm at room temperature.

[0096] In summary, the above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for preparing a wide-band multi-spectral InGaAs detector, characterized in that: (5) after removing the mask layer, a passivation film is deposited on the exposed surface by ICPCVD, and an ohmic contact area is lithographed on the passivation film, and a part of the passivation film on the surface of the P-type doped region is etched to form P-type and N-type ohmic contact areas; (6) electrode pattern lithography is performed on the P-type and N-type ohmic contact areas, and then Ti, Pt and Au metal layers are sputtered in sequence as metal electrodes to form P electrodes and N electrodes, thereby preparing a plurality of single focal plane detector arrays; (7) the plurality of single focal plane detector arrays are segmented to obtain a single focal plane array, and the single focal plane array is connected to a readout circuit, the readout circuit is provided with an alignment mark, and the connection position of the single focal plane array is located on the readout circuit except the alignment mark; (8) the InP substrate is thinned to 10-60 μm by grinding, polishing and etching, a back antireflection film is deposited on the surface of the thinned InP substrate by ICPCVD, and an InGaAs focal plane detector chip is prepared; (9) four ceramic squares plated with indium on the surface are bonded to the readout circuit with the indium-plated surface facing up, and the bonding position is located on the readout circuit except the InGaAs focal plane detector chip and the alignment mark; (10) the readout circuit is provided with an alignment mark, and the filter is provided with an alignment structure, the readout circuit and the filter are aligned and integrated by using a flip chip bonder through the alignment mark and the alignment structure, thereby preparing a wide-band multi-spectral InGaAs detector. (1) InP buffer layer, InAs y P 1-y transition layer, In x Ga 1-x As absorption layer and N-type InAs y P 1-y cap layer are sequentially grown on InP substrate (2) A PECVD is used to deposit a mask layer on the surface of the N-type InAs y P 1-y cap layer; (3) making diffusion region photoetching on the mask layer, etching the mask layer corresponding to the pixel region, diffusing Zn to In x Ga 1-x As absorption layer, the Zn-doped region forms a P-type doped region; (4) N-type contact area photoetching on the mask layer, etching off the corresponding mask layer, then wet etching off the N-type InAs corresponding to the N-type contact area y P 1-y cap layer, In x Ga 1-x As absorption layer and InAs y P 1-y transition layer, after forming the N-type contact area around the P-type doped area, wet etching off the remaining mask layer; In step (5), the temperature for depositing the passivation film by ICPCVD is 250-300 ℃, the power is 200-300 W, and the pressure is 5-10 Pa. In step (8), the back antireflection film is made of Si3N4 or SiO2, and has a thickness of 200-300 nm. In step (2), the mask layer has a thickness of 100-500 nm and is made of Si3N4 or SiO2. In step (3), the diffusion depth reaches 100-200 nm. In step (5), the passivation film is made of Si3N4 or SiO2, and has a thickness of 20-100 nm. In step (6), the Ti metal layer has a thickness of 30-100 nm, the Pt metal layer has a thickness of 30-100 nm, and the Au metal layer has a thickness of 100-300 nm.

2. The method of claim 1, wherein the method further comprises: In step (3), Zn diffuses to In x Ga 1-x As absorption layer and the diffusion depth of the absorption layer reaches 50 nm ~ 1000 nm; ​ In step (8), the InP substrate is thinned to 13-17 μm. In step (9), the ceramic square has a thickness of 22-28 μm.

3. The method of claim 1 or 2, wherein the method further comprises: In step (1), the thickness of the InP substrate is 300 μm ~ 500 μm, the thickness of the InP buffer layer is 100 nm ~ 500 nm, the thickness of the InAs y P 1-y The thickness of the transition layer is 2 μm ~ 5 μm, the thickness of the In x Ga 1-x The thickness of the As absorption layer is 2 μm ~ 4 μm, the thickness of the N-type InAs y P 1-y The thickness of the cap layer is 800 nm ~ 1500 nm; ​ The In x Ga 1-x As is In 0.82 Ga 0.18 As; the InAs y P 1-y is InAs 0.6 P 0.4 .

4. The method of claim 1 or 2, wherein the method further comprises: In step (2), the mask layer has a thickness of 100-500 nm and is made of Si3N4 or SiO2. ​ 5. The method of claim 1 or 2, wherein the method further comprises: In step (3), the diffusion depth reaches 100-200 nm. ​ 6. The method of claim 1 or 2, wherein the method further comprises: In step (5), the passivation film is made of Si3N4 or SiO2, and has a thickness of 20-100 nm. ​ 7. The method of claim 1 or 2, wherein the method further comprises: ​ ​ 8. The method of claim 1 or 2, wherein the method further comprises: ​ ​ 9. The method of claim 1 or 2, wherein the method further comprises: ​ ​ 10. The method of claim 1 or 2, wherein the method further comprises: In step (1), the thickness of the InP substrate is 300 μm ~ 500 μm, the thickness of the InP buffer layer is 100 nm ~ 500 nm, the thickness of the InAs y P 1-y The thickness of the transition layer is 2 μm ~ 5 μm, the thickness of the In x Ga 1-x The thickness of the As absorption layer is 2 μm ~ 4 μm, the thickness of the N-type InAs y P 1-y The thickness of the cap layer is 800 nm ~ 1500 nm; ​ the In x Ga 1-x As is In 0.82 Ga 0.18 As; the InAs y P 1-y is InAs 0.6 P 0.4 ; ​ ​ ​ In step (6), the thickness of the Ti metal layer is 30 nm to 100 nm, the thickness of the Pt metal layer is 30 nm to 100 nm, and the thickness of the Au metal layer is 100 nm to 300 nm; In step (8), the InP substrate is thinned to 13 μm to 17 μm; In step (9), the thickness of the ceramic square block is 22 μm to 28 μm.

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